Optimized reactive power control and fault ride-through method and system for hybrid commutation converter

Abstract

The invention discloses an optimized reactive power control and fault ride-through method and system for a hybrid commutation converter, and the method comprises the steps: introducing reactive power control and considering the constant voltage control of negative turn-off angle limitation, achieving the control of an extremely low turn-off angle through the active turn-off of a full-control device in the converter under a steady-state working condition, and further meeting the demands of a high power factor; the investment of passive filter equipment is reduced; under the alternating current fault working condition, forced commutation and negative turn-off angle operation are achieved through active turn-off of a full-control device, the receiving end power grid voltage is effectively supported while commutation failure of a half-control thyristor in the hybrid commutation converter is avoided, and the active power transmission level during the fault period is improved. The full-control characteristic of the reverse blocking type integrated gate commutation thyristor in the hybrid commutation converter is fully utilized, reactive power control under the steady-state working condition and stable power transmission under the alternating-current fault are achieved by optimizing active turn-off control, and the method has wide applicability and good application prospects.

Description

Technical Field

[0001] The present invention relates to the field of high-voltage direct current transmission, and particularly to an optimized reactive power control and fault ride-through method and system for a hybrid commutation converter. Background Art

[0002] Line-commutated converter based high-voltage direct current transmission (LCC-HVDC) has been widely used globally due to its advantages such as large-capacity transmission, long-distance transmission, and low operating losses. However, there are some inherent problems in the operation of LCC-HVDC systems that limit their development. The most serious problem is commutation failure. Since the commutation devices in LCC-HVDC systems are semi-controlled thyristors that rely on the AC grid voltage to assist commutation, AC grid faults may cause commutation failure in the HVDC system. This may lead to a decrease in DC voltage, a surge in DC current, and DC power oscillation. A commutation failure fault in a single DC transmission line may trigger multiple subsequent commutation failures, resulting in converter blocking, interruption of DC power transmission, and a decrease in grid frequency, posing a serious threat to the safety and stability of the power grid.

[0003] In recent years, significant progress has been made in the manufacturing process and operating losses of fully-controlled integrated gate-commutated thyristors (IGCTs), especially in reverse-blocking IGCTs (RB-IGCTs). Since IGCTs originated from thyristors and inherit most of the manufacturing processes of thyristors, their current-carrying principles, capabilities, and reliability are similar to those of thyristors, and their on-state losses are much lower than those of other fully-controlled devices.

[0004] Currently, relevant research has been carried out in the literature on the idea of integrating IGCTs into LCC-HVDC to enhance the system's ability to resist commutation failure. By introducing fully-controlled devices into the LCC converter, commutation failure can be eradicated at the mechanism level. Domestic and foreign scholars have gradually carried out research on hybrid commutation converters based on IGCTs. Currently, the topological structures mainly vary according to different means of suppressing the turn-off overvoltage of RB-IGCTs. For example, common topological structures based on the overvoltage action and energy consumption of valve arresters and topological structures based on suppressing overvoltage by reusing valve-side filter capacitors. Since arresters are prone to failure after long-term operation, the reliability of the system is reduced. Using valve-side filter capacitors to suppress the overvoltage of RB-IGCTs can ensure high reliability. However, most of the current control methods for such topologies inherit the control architecture of conventional DC transmission LCCs and use fixed turn-off angle control. Reactive power compensation equipment still needs to be configured. How to utilize the reactive power regulation ability based on the minimum turn-off angle or negative turn-off angle operation brought by the controllable turn-off characteristics of RB-IGCTs, as well as the high-level power maintenance ability during faults, remains the key and difficult problems to be solved. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide an optimized reactive power control and fault ride-through method and system for a hybrid commutation converter, aiming at the deficiencies of the existing technology, to ensure a high power factor under normal operating conditions and stable power transmission under fault conditions of the hybrid commutation converter.

[0006] To solve the above technical problems, the technical solution adopted by the present invention is: an optimized reactive power control and fault ride-through method for a hybrid commutation converter. The hybrid commutation converter includes three parallel commutation valve arms, and each commutation valve arm includes upper and lower sub-commutation valve arms; each sub-commutation valve arm group includes m series-connected thyristor modules and n series-connected reverse-blocking integrated gate-commutated thyristor modules; filtering capacitors are connected in parallel between the phases of each commutation valve arm; a filtering inductor is connected in series at the outlet side of each phase of each commutation valve arm; each thyristor and reverse-blocking integrated gate-commutated thyristor module is connected to a buffer branch, and the buffer branch includes a series-connected buffer capacitor and damping resistor; the hybrid commutation converter is connected in series to the DC side of the DC power transmission system, and the hybrid commutation converter is connected to the receiving-end power grid through a YY or DY commutation transformer; the method includes the following steps:

[0007] S1. Detect the three-phase AC voltages u a 、u b 、u c of the receiving-end power grid and the DC voltage U meas 、inverter-side DC current I di_meas 、receiving-end active power P imeas and reactive power Q imeas of the DC power transmission system; perform AC fault detection on the three-phase AC voltages u a 、u b 、u c of the receiving-end power grid to obtain the receiving-end AC fault flag F _Uac , pass the system DC voltage U meas through a filter to obtain the DC voltage U DM , and pass the system DC current I di_meas through a filter to obtain the inverter-side DC current I DM ;

[0008] S2. Subtract the DC voltage command U Dref from the DC voltage U DM to obtain the DC voltage deviation ΔU. The DC voltage deviation ΔU is sent to a first PI controller to obtain the fixed DC voltage control leading trigger angle command β CU ;

[0009] S3. Input the DC voltage U DM into the low-voltage current limiting control module, compare the obtained low-voltage current limiting DC current command with the initial set current command I set , and take the smaller value as the rectifier-side current command Idr , the rectifier - side current command \(I\) dr minus the current margin \(I\) m to obtain the inverter - side current command \(I\) di , the inverter - side DC current \(I\) DM and the rectifier - side current command \(I\) dr are subtracted to obtain the deviation \(\Delta I\) d , then \(\Delta I\) d and the current margin \(I\) m are subtracted to obtain the DC current deviation \(\Delta e\) I , the DC current deviation \(\Delta e\) I is sent to the second PI controller to obtain the leading trigger - angle command \(\beta\) for constant DC current control CC ;

[0010] S4. Subtract the measured inverter - side reactive power \(Q\) from the reactive - power command 0 under unity power - factor operation imeas , the difference is added to \(\Delta I\) d and the output \(\Delta\beta\) after inputting into the current - deviation control module to obtain \(Q\) error , \(Q\) error is sent to the third PI controller to obtain \(\beta\) CQ0 , the output \(\beta\) of the third PI controller CQ0 is multiplied by the fault flag \(F\) _Uac to obtain the leading trigger - angle command \(\beta\) for constant reactive - power control CQ ;

[0011] S5. Take the larger value of the leading trigger - angle command \(\beta\) for constant DC current CC and the leading trigger - angle command \(\beta\) for constant reactive - power control CQ , compare this larger value with the leading trigger - angle command \(\beta\) for constant DC voltage CU , and take the smaller value as the leading trigger - angle command \(\beta\) of the receiving - end inverter inv , subtract \(\beta\) from \(\pi\) inv to obtain the trigger - angle command \(\alpha\) of the receiving - end inverter inv ;

[0012] S6. Use the trigger - angle command \(\alpha\) of the receiving - end inverter inv to generate trigger signals for each valve arm to control the turn - on and turn - off of thyristors and reverse - blocking integrated gate - commutated thyristors in the hybrid - commutation converter.

[0013] By introducing reactive power control and constant voltage control considering the negative turn-off angle limit, in the steady-state operating condition, the present invention uses the active turn-off of fully controlled devices in the converter to achieve extremely low turn-off angle control, thereby meeting the high power factor requirement and reducing the investment in passive filter equipment; in the AC fault condition, the active turn-off of fully controlled devices is used to achieve forced commutation and negative turn-off angle operation, effectively supporting the voltage of the receiving-end power grid while avoiding commutation failure of semi-controlled thyristors in the hybrid commutation converter, and improving the active power transmission level during the fault. The present invention makes full use of the fully controlled characteristics of the reverse-blocking integrated gate-commutated thyristor in the hybrid commutation converter, and realizes reactive power control under steady-state conditions and stable power transmission under AC faults through optimizing the active turn-off control, having wide applicability and good application prospects.

[0014] The expression of the low-voltage current limiting control module is as follows:

[0015]

[0016] The expression of the current deviation control module is as follows: k is the conversion coefficient between the turn-off angle command compensation value and the current deviation value, ΔI H is the upper limit setting value of the current deviation, Δβ max represents the maximum value of the Δβ compensation command.

[0017] The lower limit value of the first PI controller is restricted as: β CU_min > 0.1222 - arcsin(η), β CU_min is the lower limit value of the first PI controller, η is the proportion of the reverse-blocking integrated gate-commutated thyristor in the sub-converting valve arm of the hybrid commutation converter in the total power devices in the sub-converting valve arm, η = n / (n + m), n represents the number of reverse-blocking integrated gate-commutated thyristors in the sub-converting valve arm, and m represents the number of conventional flow thyristors in the sub-converting valve arm.

[0018] The lower limit value of the third PI controller is 0.0468°, ensuring that the reverse-blocking integrated gate-commutated thyristor can commutate successfully naturally under steady-state conditions.

[0019] The leading trigger angle command β CQ of the constant reactive power control is expressed as: β CQ = β CQ0 ·F _Uac , β CQ0 is the output of the third PI controller in the constant reactive power control, F _Uac is the receiving-end AC fault flag F _Uac , when the receiving-end AC fault occurs, F _Uac = 0, and when there is no fault, F _Uac = 1.

[0020] As an inventive concept, the present invention also provides an optimized reactive power control and fault ride-through control system for a hybrid commutation converter, including a memory, a processor, and a computer program stored on the memory; the processor executes the computer program to implement the steps of the above method.

[0021] As an inventive concept, the present invention also provides a computer-readable storage medium with a computer program / instructions stored thereon; when the computer program / instructions are executed by a processor, the steps of the above method are implemented.

[0022] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention makes full use of the wide-range trigger angle adjustment characteristic of the hybrid commutation converter, and proposes an optimized reactive power control under unity power factor operation and a constant voltage control fault ride-through control considering the negative turn-off angle limit, realizing the high power factor requirement under steady-state conditions, avoiding commutation failure of semi-controlled thyristors during AC fault conditions, while improving the active power transmission level during AC fault conditions, and reducing the investment in DC filters. The proposed method is also applicable to other low-frequency phase-controlled converters with flexible trigger angle adjustment ability, and has a wider applicability. Description of the Drawings

[0023] Figure 1 is the inverter topology diagram of the DC transmission system based on the hybrid commutation converter in the embodiment of the present invention;

[0024] Figure 2 is the implementation process of an optimized reactive power control and fault ride-through method for a hybrid commutation converter in the embodiment of the present invention;

[0025] Figure 3 is the block diagram of the DC transmission control system in the embodiment of the present invention;

[0026] Figure 4 is the simulation experiment result of a three-phase fault (grounding inductance 0.15H) in the AC system in the embodiment of the present invention;

[0027] Figure 5 is the simulation experiment result of a single-phase solid grounding fault in the AC system in the embodiment of the present invention. Detailed Embodiments

[0028] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments of the present invention belong to the protection scope of the present invention.

[0029] Embodiment 1

[0030] Figure 1 is the inverter topology diagram of the DC transmission system based on the hybrid commutation converter in the embodiment of the present invention. As Figure 1 shown, the hybrid commutation converter transforms the commutation valve group in the original line-commutated converter based on thyristor components, introduces fully-controlled devices and utilizes the fully-controlled characteristics of the fully-controlled devices to achieve controllable turn-off of the commutation current, without the risk of commutation failure. During the fault of the receiving-end power grid, the trigger angle of the inverter can be adjusted within a wide range, providing a basis for forced commutation and high-level power transmission in the DC transmission system. The hybrid commutation converter includes three parallel commutation valve arms, and each commutation valve arm includes two sub-commutation valve arms, upper and lower; each of the sub-commutation valve arm groups includes m thyristor modules and n reverse-blocking integrated gate-commutated thyristor modules; a filtering capacitor is connected in parallel between the phases of each of the commutation valve arms; a filtering inductor is connected in series at the outlet side of each phase of each of the commutation valves; each of the thyristors and reverse-blocking integrated gate-commutated thyristor (RB-IGCT) modules is connected to a buffer branch, and the buffer branch includes a buffer capacitor and a damping resistor connected in series; the hybrid commutation converter is connected in series to the DC side of the DC transmission system, and the hybrid commutation converter is connected to the receiving-end power grid through a YY or DY commutation transformer.

[0031] Figure 2 is the implementation process of an optimized reactive power control and fault ride-through method for a hybrid commutation converter in the embodiment of the present invention. The following will be combined with Figure 2 to describe this method. As Figure 2 shown, this method includes the following steps:

[0032] Step 1: Detect the three-phase AC voltage u a , u b , u c of the receiving-end power grid and the DC voltage U meas , the DC current I di_meas on the inverter side of the DC transmission system, the active power P imeas and the reactive power Q imeas ; Pass the three-phase AC voltage u a , u b , u c of the receiving-end power grid through the single-phase and three-phase fault detection module to obtain the receiving-end AC fault flag F _Uac , extract the DC voltage U meas from the system DC voltage U DM through a filter, and extract the DC current I di_meas from the system DC current I DM through a filter.

[0033] Step 2: Compare the DC voltage command U Dref with the filtered DC voltage U DMTake the difference to obtain the DC voltage deviation ΔU, and send the DC voltage deviation ΔU to the first PI controller to obtain the leading trigger angle command β for the fixed DC voltage control. CU Among them, to ensure the reliable commutation of the thyristors in the converter valve arm, the lower limit value of the first PI controller in the fixed DC voltage control is constrained as follows: β CU_min > 0.1222 - arcsin(η), where β CU_min is the lower limit value of the first PI controller, and η is the proportion of the reverse-blocking integrated gate-commutated thyristors in the sub-converter valve arm of the hybrid commutation converter to the total power devices in this sub-converter valve arm. There is η = n / (n + m), where n represents the number of reverse-blocking integrated gate-commutated thyristors in the sub-converter valve arm, and m represents the number of conventional flow thyristors in the sub-converter valve arm.

[0034] Step 3: Input the filtered DC voltage U DM into the low-voltage current limiting control module, compare the obtained low-voltage current limiting DC current command with the initial set current command I set , and take the smaller value as the rectifier side current command I dr . Subtract the current margin I dr from the rectifier side current command I m to obtain the inverter side current command I di . Take the difference between the filtered inverter side DC current I DM and the rectifier side current command I dr to get the deviation ΔI d . Then, take the difference between ΔI d and the current margin I m to obtain the DC current deviation Δe I . Send the DC current deviation Δe I to the second PI controller to obtain the leading trigger angle command β for the fixed DC current control CC ;

[0035] Among them, the expression of the low-voltage current limiting control module is:

[0036] 0.4 p.u. ≤ U DM <0.9 p.u., where U d is the DC voltage U extracted by the filter DM , and I VL is the output value of the low-voltage current limiting control module;

[0037] The expression of the current deviation control curve is:

[0038] k is the conversion coefficient between the turn-off angle command compensation value and the current deviation value, ΔI H is the upper limit setting value of the current deviation, and Δβ max represents the maximum value of the Δβ compensation command.

[0039] Step 4: Subtract the measured reactive power Q on the inverter side from the reactive power command 0 under unity power factor operation imeas And superimpose the above ΔI d The output Δβ after entering the input current deviation control module to obtain Q error , send Q error To the third PI controller to obtain β CQ0 , the output β of the third PI controller CQ0 Multiply with the fault flag F _Uac To obtain the leading trigger angle command β for the fixed reactive power control CQ .

[0040] Among them, to ensure that the reverse-conducting integrated gate-commutated thyristor can commutate naturally under steady-state conditions, considering that the turn-off recovery time of RB-IGCT is about 26 μs, and the corresponding electrical angle is about 0.0468°, so the lower limit value of the third PI controller in the fixed reactive power control is set to 0.0468°.

[0041] Among them, the AC fault freezes the fixed reactive power control controller, that is, during the fault, its output is set to 0, so the leading trigger angle command β CQ The expression is: β CQ = β CQ0 ·F _Uac , β CQ0 Is the output of the third PI controller in the fixed reactive power control, F _Uac Is the receiving-end AC fault flag F _Uac , when the receiving-end AC fault occurs, F _Uac = 0, when there is no fault, F _Uac = 1. Therefore, during an AC fault, the receiving-end AC fault flag F _Uac Can be used to set the output of the low reactive power controller to 0.

[0042] Step 5: Take the larger value of the fixed DC current leading trigger angle command β CC And the fixed reactive power control leading trigger angle command β CQ Compare with the fixed DC voltage leading trigger angle command β CU , and take the smaller value as the receiving-end inverter leading trigger angle command β inv , subtract β inv From π to obtain the receiving-end inverter trigger angle command α inv ;

[0043] Step 6: Use the final output command α inv Generate the trigger signals for each valve arm to control the on and off of the thyristors and reverse-conducting integrated gate-commutated thyristors in the hybrid commutation converter.

[0044] Figure 4 andFigure 5 These are the real-time simulation experiment results of the embodiments of the present invention.

[0045] Figure 4 、 Figure 5 It shows that the DC transmission system with a hybrid commutation converter in the embodiments of the present invention can still effectively avoid commutation failures under extreme faults and ensure the stable transmission of a certain amount of active power; the proposed method has wide applicability, and the simulation results under three-phase severe fault grounding and single-phase metallic grounding faults show that the proposed control strategy effectively suppresses thyristor commutation failures and improves the stability of the system's fault transient power transmission.

[0046] Figure 4 、 Figure 5 It verifies the feasibility and practical value of the method, can effectively improve the transient and steady-state performance of the hybrid commutation converter, and is beneficial to the further development of new hybrid converters in practical engineering.

[0047] Embodiment 2

[0048] Embodiment 2 of the present invention provides a terminal device corresponding to Embodiment 1 above. The terminal device can be a processing device for a client, such as a mobile phone, a laptop computer, a tablet computer, a desktop computer, etc., to execute the method of the above embodiment.

[0049] The terminal device of this embodiment includes a memory, a processor, and a computer program stored on the memory; the processor executes the computer program on the memory to implement the steps of the method of Embodiment 1 above.

[0050] In some implementations, the memory can be a high-speed random access memory (RAM: Random Access Memory), and may also include non-volatile memory, such as at least one disk memory.

[0051] In other implementations, the processor can be a central processing unit (CPU), a digital signal processor (DSP), or various other types of general-purpose processors, which are not limited here.

[0052] Embodiment 3

[0053] Embodiment 3 of the present invention provides a computer-readable storage medium corresponding to Embodiment 1 above, on which a computer program / instructions are stored. When the computer program / instructions are executed by a processor, the steps of the method of Embodiment 1 above are implemented.

[0054] A computer-readable storage medium can be a tangible device that retains and stores instructions for use by an instruction execution device. A computer-readable storage medium may be, for example, but is not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination of the foregoing.

[0055] Those skilled in the art will appreciate that the embodiments of the present application may be provided as a method, a system, or a computer program product. Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code. The solutions in the embodiments of the present application can be implemented in various computer languages. For example, object-oriented programming languages such as Java and interpreted scripting languages such as JavaScript.

[0056] The present application is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the functions specified in Figure 1 one or more of the flows Figure 1 or a plurality of flows and / or blocks

[0057] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are performed on the computer or other programmable device to generate a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in Figure 1 one or more of the flows Figure 1 or a plurality of flows and / or blocks

[0058] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concepts. Therefore, the appended claims are intended to be construed to include the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0059] Obviously, those skilled in the art can make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalent technologies, this application is also intended to include these modifications and variations.

Claims

1. A method for optimizing reactive power control and fault ride-through of a hybrid commutation converter, wherein the hybrid commutation converter comprises three parallel commutation valve arms, each commutation valve arm comprises two upper and lower sub-commutation valve arms; each of the sub-commutation valve arm groups comprises m series-connected thyristor modules and n series-connected reverse-resistance integrated gate-level commutation thyristor modules; each of the phases of the commutation valve arm is connected in parallel with a filter capacitor; each of the phase outlet sides of each commutation valve arm is connected in series with a filter inductor; each of the thyristors and reverse-resistance integrated gate-level commutation thyristor modules is connected to a buffer branch, and the buffer branch comprises a buffer capacitor and a damping resistor connected in series; the hybrid commutation converter is connected in series to the DC side of the DC transmission system, and the hybrid commutation converter is connected to the receiving-end power grid via a YY or DY converter transformer; characterized in that The following steps are involved: S1, detect the three-phase AC voltage u of the receiving end power grid a 、u b 、u c and the DC voltage U on the inverter side of the DC transmission system meas , inverter side DC current I di_meas , receiving end active power P imeas and reactive power Q imeas ; Three-phase AC voltage u of the receiving power grid a 、u b 、u c Perform AC fault detection and obtain the receiving end AC fault flag F _Uac , the system DC voltage U meas Through the filter, we get the DC voltage U DM , the system DC current I di_meas Through the filter, the inverter side DC current I is obtained DM ; S2, the DC voltage command U Dref With DC voltage U DM The DC voltage deviation ΔU is obtained by making a difference, and the DC voltage deviation ΔU is sent to the first PI controller to obtain the fixed DC voltage control leading trigger angle instruction β CU ; S3, DC voltage U DM Input the low-voltage current limiting control module, and compare the obtained low-voltage current limiting DC current command with the initial current command I set Compare and take the smaller value as the rectifier side current command I dr , rectifier side current command I dr Subtract the current margin I m Get the inverter side current command I di , the inverter side DC current I DM and the rectifier side current command I dr The deviation ΔI is obtained by subtracting d , and then ΔI d With current margin I m The DC current deviation Δe is obtained by subtracting I , DC current deviation Δe I Send it to the second PI controller to obtain the DC current control leading trigger angle instruction β CC ; S4, subtract the measured inverter side reactive power Q from the reactive power command 0 under unity power factor operation imeas , difference superposition ΔI d The output Δβ after inputting the current deviation control module is obtained. error , Q error Send it to the third PI controller to get β CQ0 , the output β of the third PI controller CQ0 With fault flag F _Uac Multiply them to get the leading trigger angle command β of the constant reactive power control CQ ; S5, set the DC current leading trigger angle instruction β CC And fixed reactive power control leading trigger angle command β CQ The larger value is compared with the fixed DC voltage leading trigger angle instruction β CU , and the smaller value is used as the leading trigger angle instruction β of the receiving inverter inv , subtract β from π inv Get the receiving inverter trigger angle command α inv ; S6, using the receiving end inverter trigger angle command α inv Generate trigger signals for each valve arm to control the opening and closing of the thyristors and reverse-resistance integrated gate-level commutation thyristors in the hybrid commutation converter.

2. The method for optimizing reactive power control and fault ride-through of a hybrid commutated converter according to claim 1, characterized in that: The low voltage current limiting control module expression is:

3. The method for optimizing reactive power control and fault ride-through of a hybrid commutated converter according to claim 1, characterized in that: The current deviation control module expression is: k is the conversion coefficient between the turn-off angle command compensation value and the current deviation value, ΔI H is the current deviation upper limit setting value, Δβ max Indicates the maximum value of the Δβ compensation command.

4. The method for optimizing reactive power control and fault ride-through of a hybrid commutated converter according to claim 1, characterized in that: The lower limit value constraint of the first PI controller is: CU_min >0.1222-arcsin(η),β CU_min is the lower limit value of the first PI controller, η is the ratio of the reverse-resistance integrated gate-level commutation thyristors in the sub-commutation valve arm of the hybrid commutation converter to the total power devices in the sub-commutation valve arm, η=n / (n+m), n represents the number of reverse-resistance integrated gate-level commutation thyristors in the sub-commutation valve arm, and m represents the number of conventional thyristors in the sub-commutation valve arm.

5. The method for optimizing reactive power control and fault ride-through of a hybrid commutated converter according to claim 1, characterized in that: The lower limit value of the third PI controller is 0.0468°.

6. The method for optimizing reactive power control and fault ride-through of a hybrid commutated converter according to claim 1, characterized in that: The constant reactive power control controls the leading firing angle instruction β CQ The expression is: CQ =β CQ0 ·F _Uac , β CQ0 is the output of the third PI controller in the constant reactive power control, F _Uac F is the receiving end AC fault flag _Uac , when AC fault occurs at the receiving end, F _Uac =0, no fault F _Uac =1.

7. An optimized reactive power control and fault ride-through control system for a hybrid commutation converter, comprising a memory, a processor and a computer program stored in the memory; characterized in that: The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 6.

8. A computer-readable storage medium having a computer program / instruction stored thereon; characterized in that: When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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