Testing method for software separation of multi-core smart meters
By controlling the simulation components to connect to the metering core and management core of the multi-core smart meter, and using the simulation channel switch and SPI interface to monitor or interfere with its communication, the problem of incomplete testing in the existing technology is solved, and comprehensive and real-time testing of multi-core smart meter is achieved.
Patent Information
- Application Number
- CN201911294545.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-12-16
- Publication Date
- 2025-08-12
- Estimated Expiration
- 2039-12-16
AI Technical Summary
The prior art cannot effectively test the data interaction and failure impact between the metering core and the management core in a multi-core smart meter, resulting in insufficient comprehensiveness and real-time testing.
The upper computer control simulation components (such as FPGA) are used to connect to the metering core and the management core, and monitor or interfere with their communication through the simulation channel switch and the simulation SPI interface to achieve testing of metrology accuracy, data interaction accuracy and fault impact.
A comprehensive test of the independence of the metering core and management core software, communication reliability and real-time data interaction of multi-core smart meter is realized, ensuring the comprehensiveness and real-timeness of the test.
Smart Images

Figure CN112986894B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of instruments and meters, and in particular to a testing method for software separation of a multi-core smart meter. Background Art
[0002] The multi-core smart energy meter based on IR46 divides the meter functions into two independent parts: the metering core and the management core. Based on the principle of physical separation, they are implemented by two independent chips that do not interfere with each other, ultimately achieving software separation. Among them, the metering core provides legal data such as electricity and clock, while the electricity and clock of the management core are based on the metering core and are synchronized in real time.
[0003] Because the metering and management chips communicate via the SPI bus, the data interaction and mutual influence between the two chips cannot be tested using conventional methods. Currently, programmers can only perform simulation tests at program breakpoints, but comprehensiveness and real-time performance cannot be guaranteed. Summary of the Invention
[0004] The purpose of the present invention is to overcome the defects of the prior art and provide a testing method for software separation of a multi-core smart meter.
[0005] To achieve the above object, the present invention adopts the following technical solutions:
[0006] A method for testing software separation of a multi-core smart meter, wherein a metering core and a management core of the multi-core smart meter are respectively connected to a simulation unit, and a host computer controls the simulation unit to perform a measurement accuracy test and / or a data interaction correctness test and / or a fault impact test on the software separation of the metering core and the management core.
[0007] Preferably, the simulation unit is connected to the host computer, and the host computer is also respectively connected to the metering core and the management core for communication; a simulation channel switch and a simulation SPI interface are formed inside the simulation unit, the metering core and the management core are connected for communication via the simulation channel switch, and the simulation SPI interface is connected to the host computer for communication;
[0008] The host computer controls the simulation channel switch to close, connects the communication between the metering core and the management core, monitors the communication between the metering core and the management core through the simulation SPI interface, and / or interferes with the communication between the metering core and the management core;
[0009] Or the host computer controls the simulation channel switch to be disconnected, cuts off the communication between the metering core and the management core, and communicates with the metering core through the simulation SPI interface;
[0010] Alternatively, the host computer controls the simulation channel switch to be disconnected, thereby cutting off the communication between the metering core and the management core, and communicating with the management core through the simulation SPI interface.
[0011] Preferably, the simulation unit is an FPGA, including a simulation SPI interface capable of communicating with a host computer; the host computer is also respectively connected to the metering core and the management core for communication;
[0012] The host computer switches on the communication between the metering core and the management core through the simulation channel switch, monitors the communication between the metering core and the management core, and / or interferes with the communication between the metering core and the management core;
[0013] Alternatively, the host computer only communicates with the metering core through the simulated SPI interface, simulates the management core and communicates with the metering core;
[0014] Alternatively, the host computer is only connected to the management core for communication via the simulated SPI interface, simulating the metering core and communicating with the management core.
[0015] Preferably, the measurement accuracy test comprises the following steps:
[0016] Step 1-1: Read the power data of the metering chip and the management chip. After the power data of the metering chip and the management chip are consistent, proceed to step 1-2.
[0017] Step 1-2: Control the metering core and the management core to disconnect the communication;
[0018] Steps 1-3: Make the metering core move kWh, 0< ≤0.02;
[0019] Steps 1-4: Read the power data of the metering chip and the management chip during peak, flat, and valley periods respectively;
[0020] Steps 1-5 compare whether the power data of the metering chip and the management chip during the peak, flat, and valley periods are consistent. If they are consistent, the measurement accuracy test fails.
[0021] Preferably, the measurement accuracy test further comprises the following steps:
[0022] In step 1-5, if there is any inconsistency, proceed to step 1-6;
[0023] Step 1-6: Control the metering core and the management core to establish a communication connection;
[0024] Steps 1-7, Delay s,0< ≤2;
[0025] Steps 1-8: Read the power data of the metering chip and the management chip;
[0026] Step 1-9: Compare the power data of the metering chip and the management chip to see if they are consistent. If they are consistent, the metering accuracy test is passed.
[0027] Preferably, the measurement accuracy test further comprises the following steps:
[0028] In step 1-9, if there is inconsistency, proceed to step 1-10;
[0029] Step 1-10, determine the number of times steps 1-9 are completed, if the number of completed times is less than , then go to step 1-7. If the number of steps 1-9 completed is > If the comparison results of steps 1-9 are inconsistent each time, the measurement accuracy is unqualified; ≤15.
[0030] Preferably, the data interaction correctness test includes the following steps:
[0031] Step 2-1: Read the power data of the metering chip and the management chip;
[0032] Step 2-2, control the metering core to disconnect from the management core;
[0033] Step 2-3, metering core movement kWh, 0< ≤0.02;
[0034] Step 2-4: Control the metering core to establish a communication connection with the management core;
[0035] Step 2-5: When the last byte of the reading frame from the management chip is intercepted, the timing starts; when the first byte of the response frame from the metering chip is received, the timing ends;
[0036] Step 2-6, calculate the cumulative time from the start to the end of the timing in step 2-5. If the cumulative time is less than or equal to s, the data interaction correctness test is qualified. If the cumulative time is greater than s, the data interaction correctness test fails; where 0< ≤2.
[0037] Preferably, the data interaction correctness test further includes the following steps:
[0038] Step 2-7: After step 2-2, intercept the complete frame read by the management core;
[0039] Step 2-8: Check whether the management chip reads the complete frame correctly. If it is incorrect, the data interaction correctness test fails. If it is correct, proceed to step 2-9.
[0040] Step 2-9: Make the metering core move kWh, 0< ≤0.02;
[0041] Step 2-10, control the metering core to establish a communication connection with the management core;
[0042] Step 2-11, intercepting the complete frame of the metering chip response;
[0043] Step 2-12, judging the correctness of the complete frame responded by the metering core, if it is incorrect, the data interaction correctness test fails, if it is correct, the data interaction correctness test passes.
[0044] Preferably, the fault impact test includes the following steps:
[0045] Step 3-1: Read the power data of the metering chip and the management chip;
[0046] Step 3-2, control the management chip to power off;
[0047] Step 3-3, measuring the chip movement time ,1< ≤10min, during which the host computer simulation management chip frequently reads the metering chip data through the simulation SPI interface;
[0048] Step 3-4: Power on the control management chip;
[0049] Step 3-5: Read the metering chip power data;
[0050] Step 3-6, judging whether the metering core power data read in step 3-5 is consistent with the theoretical power. If they are consistent, the fault impact test is qualified; otherwise, the fault impact test is unqualified.
[0051] Preferably, the fault impact test further includes the following steps:
[0052] Step 3-7: After step 3-1, control the metering core to power off;
[0053] Step 3-8, monitor the management chip reading frame. After receiving the management chip reading frame, the host computer replies with the correct data frame to the management chip through the simulated SPI interface. Second-rate, ≥1;
[0054] Step 3-9, control the metering chip to power on;
[0055] Step 3-10: Read the power data of the metering chip and the management chip;
[0056] Step 3-11, judging whether the metering core power data read in step 3-10 is consistent with the theoretical power, if they are consistent, the fault impact test is qualified, if not, the fault impact test is unqualified.
[0057] The multi-core smart meter software separation testing method of the present invention can be used to test the software independence, communication reliability, data interaction real-time and big data interference of the metering core and management core of the multi-core smart meter. BRIEF DESCRIPTION OF THE DRAWINGS
[0058] Figure 1 It is a flow chart of measurement accuracy test of the present invention;
[0059] Figure 2 This is a flow chart of the data interaction correctness test of the present invention;
[0060] Figure 3 This is a flow chart of the fault impact test of the present invention;
[0061] Figure 4 It is a structural diagram of a first embodiment of a smart meter dual-core communication simulation system according to the present invention;
[0062] Figure 5 It is a structural diagram of the first embodiment of the smart meter dual-core communication simulation system of the present invention, which is in monitoring mode;
[0063] Figure 6 1 is a schematic structural diagram of a first embodiment of a dual-core communication simulation system for a smart meter according to the present invention, which is in interference mode;
[0064] Figure 7 It is a structural diagram of the first embodiment of the intelligent meter dual-core communication simulation system of the present invention, which is in the simulation management core mode;
[0065] Figure 8 1 is a schematic structural diagram of a first embodiment of a dual-core communication simulation system for a smart meter according to the present invention, which is in a simulation metering core mode;
[0066] Figure 9 It is a flowchart of four working modes of the dual-core communication simulation system of the smart meter of the present invention;
[0067] Figure 10 It is a structural diagram of the second embodiment of the smart meter dual-core communication simulation system of the present invention. DETAILED DESCRIPTION
[0068] The following is combined with Figure 4-10 The given examples further illustrate the specific implementation of the smart meter dual-core communication simulation system of the present invention. The smart meter dual-core communication simulation system of the present invention is not limited to the description of the following examples.
[0069] The present invention provides a dual-core communication simulation system for a smart meter, which includes a simulation unit and a host computer. The metering core and the management core of the smart meter are respectively connected to the simulation unit, the simulation unit is connected to the host computer, and the host computer is respectively connected to the metering core and the management core for communication.
[0070] The host computer connects the communication between the metering core and the management core through the simulation unit, monitors the communication between the metering core and the management core through the simulation unit, and / or interferes with the communication between the metering core and the management core;
[0071] Or the host computer only connects to the communication with the metering core through the simulation unit, and simulates the communication between the management core and the metering core;
[0072] Alternatively, the host computer only connects to the communication with the management core through the simulation part, and simulates the communication between the metering core and the management core.
[0073] The intelligent meter dual-core communication simulation system of the present invention has a host computer that controls the disconnection and connection of the communication between the metering core and the management core through the simulation unit, and can monitor, interfere with and simulate the communication between the two chips. It can be used for dual-core separation testing of intelligent meters that comply with the IR46 standard.
[0074] Preferably, the simulation unit is an FPGA, including a simulated SPI interface capable of communicating with a host computer. The metering core and the management core can communicate with the simulated SPI interface respectively, and the metering core and the management core communicate according to the SPI protocol. Furthermore, the FPGA also includes a simulated channel switch, through which the metering core and the management core communicate. The simulated channel switch is implemented by programming within the FPGA, and the host computer can control the opening / closing of the simulated channel switch.
[0075] Specifically, the metering core and management core are each connected to an FPGA (e.g., with a detachable or pluggable connection, meaning each is connected to an FPGA interface). The simulated SPI interface is implemented through internal FPGA programming. A host computer communicates with the FPGA to control the operating state of the simulated SPI interface. The simulated channel switch is a program function. The host computer controls the FPGA to enable and disable communication between the metering core and management core, enabling or disabling either the metering core or the management core individually, and simulating either the management core or the metering core. The metering core, management core, and simulation unit (i.e., the FPGA) form a simulated meter for simulating a multi-core smart meter.
[0076] like Figure 4 FIG. 1 shows a first embodiment of the dual-core communication simulation system for smart meters according to the present invention.
[0077] The present invention provides a dual-core communication simulation system for a smart meter, comprising a simulation unit and a host computer. The simulation unit is an FPGA, and a simulation channel switch and a simulation SPI interface are formed by programming within the FPGA. A metering core and a management core of the smart meter are respectively connected to the FPGA via their respective dual-core communication interfaces. The FPGA is communicatively connected to the host computer, and the host computer is further communicatively connected to the metering core and the management core, respectively. The metering core and the management core are communicatively connected via the simulation channel switch. The host computer controls the simulation channel switch to be turned off / on to disconnect / connect communication between the metering core and the management core. The simulation SPI interface is communicatively connected to the host computer to monitor communication between the metering core and the management core and / or interfere with communication between the metering core and the management core. Alternatively, the host computer turns off the simulation channel switch to disconnect communication between the metering core and the management core, and the host computer simulates the management core and communicates with the metering core via the simulation SPI interface according to a dual-core communication protocol. Alternatively, the host computer turns off the simulation channel switch to disconnect communication between the management core and the metering core, and the host computer simulates the metering core and communicates with the management core via the simulation SPI interface according to the dual-core communication protocol.
[0078] Preferably, Figure 4 As shown, the FPGA communicates with the host computer according to the TCP / IP protocol; the host computer communicates with the metering core and the management core respectively according to the RS485 protocol. Preferably, the dual-core communication protocol is the 645 protocol or the 698 protocol.
[0079] Preferably, the FPGA includes a development board of model D3-10NANO.
[0080] like Figure 6-10 As shown, the smart meter dual-core communication simulation system of this embodiment includes the following four working modes: monitoring mode, interference mode, simulation metering core mode and simulation management core mode; wherein,
[0081] like Figure 5 and 9 As shown, in the monitoring mode, the host computer controls the closure of the simulation channel switch to connect the metering core and the management core to communicate, and the simulation SPI interface is set to the input state and interacts with the host computer. At this time, the intelligent meter dual-core communication simulation system of the present invention is only used for monitoring. Specifically, the host computer selects the working mode as the monitoring mode, the FPGA connects the metering core, the management core, and the simulation SPI interface, and sets the simulation SPI interface to the input mode. The simulation SPI interface monitors the communication between the metering core and the management core in real time and uploads the dual-core communication frame to the host computer. For example, the FPGA can be parsed based on the protocol, and the monitoring of the dual-core communication is achieved by intercepting the reading frame of the management core and the reply frame of the metering core.
[0082] like Figure 6 and 9As shown, in interference mode, the host computer controls the emulation channel switch to close, enabling communication between the metering core and the management core. The emulated SPI interface is set to open-drain output mode, and interference pulses are sent during communication using bus conflicts. Specifically, the host computer selects interference mode as the operating mode, connects the metering core, the management core, and the emulated SPI interface via FPGA, sets the emulated SPI interface to output mode (open-drain output), and sets the emulated SPI interface to emit pulse interference of a certain frequency, pulse width, and number according to test requirements. The impact of the dual-core communication interference is determined through 485 communication or the meter LCD. If the meter is not operating normally, it is judged as unqualified. For example, during the metering core's data transmission, a pulse interference signal is injected into the SPI channel between the metering core and the management core. The host computer cyclically reads or displays the power data on the LCD to check whether the power data of the metering core and the management core are consistent. If they are consistent, the meter is judged as qualified; if they are inconsistent, the meter is judged as unqualified. Furthermore, the simulated SPI interface includes an SDO pin, an SDI pin, a CLK pin and a CS pin, and "according to test requirements" means: if the impact of communication clock disorder is tested, interference is injected into the CLK pin; if the impact of communication data disorder is tested, interference is injected into the SDO pin and the SDI pin; if illegal data is tested, interference is injected into the CS pin.
[0083] like Figure 8 and 9 As shown, in the simulated metering core mode, the metering core and management core are disconnected, while the management core communicates normally with the simulated SPI interface. The simulated SPI interface is set to output mode, and communication frames are frequently sent to the management core or error frames are replied to via the simulated SPI interface, as required by the test. Specifically, the host computer selects the simulated metering core mode as the operating mode, connects the management core to the simulated SPI interface via the FPGA, disconnects communication between the metering core and management core, and sets the simulated SPI interface to input / output mode (push-pull output) similar to the metering core interface. As required by the test, the host computer can frequently communicate with the management core via the simulated SPI interface, or send error / illegal frames, to test the impact of metering core failures on the management core. The host computer then communicates with the management core via 485 communication to read the management core's operating status. If the management core is not functioning properly, the system is deemed unqualified. This mode allows testing the reliability of dual-core communication and the impact of management core failures on legal metrology (i.e., metering core). In this mode, the "test requirement" refers to testing the reliability of dual-core communication. By simulating illegal communication between the metering core and management core, the host computer tests the stability of the management core interface program.
[0084] like Figure 7 and 9As shown, in the simulation management core mode, the management core and the metering core are disconnected from each other, and the metering core communicates normally with the simulation SPI interface. The simulation SPI interface is set to the output state, and communication frames are frequently sent to the metering core or error communication frames are sent through the simulation SPI interface according to the test requirements. The upper computer selects the working mode as the simulation management core mode, connects the metering core and the simulation SPI interface through FPGA and disconnects the communication between the metering core and the management core, and sets the simulation SPI interface to the input / output mode (push-pull output) according to the management core interface. According to the test requirements, the simulation SPI interface can frequently communicate with the metering core, or send error / illegal frames, to test the impact of the management core failure on the metering core. In the above mode, the reliability of dual-core communication and the impact of the failure of the legal metering chip on the management core can be tested. In the above mode, the "test requirement" refers to the requirement to test the reliability of dual-core communication. By simulating illegal communication between the management core and the metering core, the stability of the metering core communication interface program is tested.
[0085] like Figure 10 FIG. 2 shows a second embodiment of the dual-core communication simulation system for smart meters according to the present invention.
[0086] The second embodiment of the smart meter dual-core communication simulation system differs from the first embodiment in that the host computer is not directly connected to the metering core and management core. Instead, the FPGA connects to each of these cores using the RS485 protocol. The host computer outputs reading instructions to the FPGA, which reads the data from the metering core and management core via RS485 communication and then uploads it to the host computer. Furthermore, the second embodiment can also implement the four operating modes of the first embodiment.
[0087] like Figure 1-3 As shown, the present invention also discloses a test method for software separation of a multi-core smart meter, which is implemented through a first embodiment of a smart meter dual-core communication simulation system.
[0088] The test method for software separation of a multi-core smart meter of the present invention is used for connecting the metering core and the management core of the multi-core smart meter to simulation parts respectively, and controlling the simulation parts through a host computer to perform measurement accuracy test, data interaction correctness test and fault impact test on the software separation of the metering core and the management core.
[0089] The multi-core smart meter software separation testing method of the present invention can test the software independence, communication reliability, data interaction real-time and big data interference of the metering core and management core of the multi-core smart meter.
[0090] Preferably, Figure 4As shown, the simulation unit is an FPGA, which is connected to a host computer, which is also connected to the metering core and management core. Furthermore, the host computer controls the simulated SPI interface and performs fault injection and big data attacks to test the metering core and management core software for measurement accuracy, data interaction correctness, and fault impact.
[0091] Furthermore, the host computer can be directly connected to the metering core and the management core via RS485 communication; or the host computer is connected to the FPGA via Ethernet, and the FPGA is connected via RS485 communication; the above two methods coexist, and the host computer can choose any of the above methods to communicate with the metering core and the management core.
[0092] Preferably, Figure 1 FIG. 1 shows an implementation of the measurement accuracy test.
[0093] like Figure 1 As shown, the measurement accuracy test includes the following steps:
[0094] Step 1-1: Read the power data of the metering chip and the management chip. After the power data of the metering chip and the management chip are consistent, proceed to step 1-2.
[0095] Step 1-2: Control the metering core and the management core to disconnect the communication;
[0096] Steps 1-3: Make the metering core move kWh;
[0097] Steps 1-4: Read the power data of the metering chip and the management chip during peak, flat, and valley periods respectively;
[0098] Steps 1-5 compare the power data of the metering core and the management core during the peak, flat, and valley periods to see if they are consistent. If they are consistent, the measurement accuracy test fails.
[0099] Preferably, Figure 1 As shown, in step 1-5, if the comparison results are inconsistent, proceed to step 1-6;
[0100] Step 1-6: Control the metering core and the management core to establish a communication connection;
[0101] Steps 1-7, Delay s;
[0102] Steps 1-8: Read the power data of the metering chip and the management chip;
[0103] Step 1-9: Compare the power data of the metering chip and the management chip to see if they are consistent. If they are consistent, the metering accuracy test is passed.
[0104] Preferably, Figure 1 As shown, in step 1-9, if the comparison results are inconsistent, go to step 1-10;
[0105] Step 1-10, determine the number of times steps 1-9 are completed, if the number of completed times is less than , then go to step 1-7, if the number of completions> If the comparison results of steps 1-9 are all inconsistent, the measurement accuracy test fails.
[0106] Preferably, 5≤ ≤60; Preferably, 30. Preferably, 0 < ≤0.1; Preferably, 0 < ≤5; Preferably 1.
[0107] Specifically, in step 1-1, after reading the energy data from the metering core and the management core, it is necessary to determine whether the energy data from the two cores is consistent. If not, the energy data from the metering core and the management core is read again after a certain delay until they are consistent. Alternatively, in step 1-1, the energy data from both the metering core and the management core need not be read, but the energy data from both cores is directly reset to zero before proceeding to the subsequent steps. In step 1-2, the host computer controls the simulation channel switch to disconnect communication between the metering core and the management core. In step 1-3, the smart meter dual-core simulation system is connected to a test power supply (i.e., voltage and current signals) for a period of time, and the metering core calculates energy based on the sampled voltage and current signals. Preferably, in step 1-6, the host computer controls the simulation channel switch to connect communication between the metering core and the management core. Preferably, in step 1-9, the host computer compares the energy data from the metering core and the management core to determine whether they are consistent. The comparison includes, but is not limited to, the total forward active energy of the metering core and the total forward active energy of the management core, and the total reverse active energy of the metering core and the total reverse active energy of the management core. Preferably, in step 1-10, the host computer counts the number of times steps 1-9 are completed and compare ... Make a comparison.
[0108] Preferably, in steps 1-1, 1-4, and 1-8, the host computer reads the power data of the metering core and the management core respectively through the simulated SPI interface of the FPGA. Furthermore, the power data includes the current total forward active power and the current total reverse active power of the metering core, and the current total forward active power, the current total reverse active power, and the current combined active power of the management core.
[0109] The following is a specific example of the measurement accuracy test.
[0110] Combine Figure 1, the measurement accuracy test includes the following steps:
[0111] (1a) The smart meter dual-core communication simulation system is powered on;
[0112] (2a) The host computer establishes application connections with the metering core and the management core respectively according to the 698 protocol; the host computer controls the simulation channel switch to close, so that the communication between the metering core and the management core is connected;
[0113] (3a) The host computer reads the metering chip and manages the power and time of the chip according to the 698 protocol;
[0114] (4a) The smart meter dual-core communication simulation system monitors the communication time between the metering core and the management core;
[0115] Preferably, in step 4a, the FPGA intercepts the last byte of the management core reading frame and starts timing, the FPGA receives the first byte of the metering core response frame and ends timing, and calculates the time difference between the two, that is, the communication time between the management core and the metering core.
[0116] (5a) The host computer determines whether the communication time between the metering core and the management core is s, > 0; if the communication time between the metering core and the management core is ≤ seconds, it is qualified. If the communication time between the metering chip and the management chip is > Seconds will be disqualified;
[0117] (6a) Clear the power data of the metering chip and the management chip, and then make the metering chip move to 0.01kWh;
[0118] Preferably, the metering core can be operated by connecting the power supply to the dual-core communication simulation system of the smart meter (i.e., loading voltage signal and current signal) for a period of time; for example, if the voltage of 220V and the current of 10A are loaded to the FPGA for half an hour, the operation of the metering core is UIt=220V×10A×0.5h=1.1kWh.
[0119] (7a) The host computer reads the power and time of the metering chip according to the 698 protocol;
[0120] (8a) The host computer reads the power and time of the management chip according to the 698 protocol;
[0121] (9a) The host computer compares the consistency of the data of the metering core and the management core. If they are consistent, the measurement accuracy test is qualified; if they are inconsistent, the measurement accuracy test is unqualified;
[0122] (10a) The host computer controls the simulation channel switch to disconnect the SPI communication between the metering core and the management core;
[0123] (11a) The metering core is set to read 0.01 kWh;
[0124] (12a) The host computer reads the power data of the metering chip and the management chip according to the 698 protocol;
[0125] (13a) The host computer determines the consistency between the power data of the metering core and the power data of the management core. If they are consistent, the metering accuracy test fails. If they are inconsistent (for example, the latter differs from the former by 0.01 kWh), the metering accuracy test passes.
[0126] (14a) The host computer controls the simulation channel switch to close to connect the SPI communication between the metering core and the management core;
[0127] (15a) The host computer control delay is 1 s;
[0128] (16a) The host computer reads the power of the metering chip according to the 698 protocol;
[0129] (17a) The host computer reads the power of the management chip according to the 698 protocol;
[0130] (18a) Compare the metering core power data and the management core power data to see if they are consistent. If they are consistent, the measurement accuracy test is qualified;
[0131] (19a) In step (18a), if the comparison result is inconsistent, go to step (15a) and repeat steps (15a)-(18a) 30 times. If the comparison results are all inconsistent, the measurement accuracy test fails.
[0132] Preferably, Figure 2 FIG. 1 shows an implementation of the data interaction correctness test.
[0133] like Figure 2 As shown, the data interaction correctness test includes the following steps:
[0134] Step 2-1: Read the power data of the metering chip and the management chip;
[0135] Step 2-2, control the metering core to disconnect the communication with the management core;
[0136] Step 2-3: Make the metering core move kWh;
[0137] Step 2-4, control the metering core to establish communication with the management core;
[0138] Step 2-5: When the last byte of the reading frame from the management core is intercepted, the timing starts, and when the first byte of the response frame from the metering core is received, the timing ends;
[0139] The management core reading frame and the metering core's response frame are both data packets; the specific process of steps 2-5 is as follows: the host computer monitors the communication between the metering core and the management core through the simulated SPI interface, obtains the communication packet sent by the management core to the metering core based on the communication protocol, and parses the communication packet to determine whether it is a command for the management core to send the metering core to read the power data; if so, the timing starts when the last byte of the management core reading frame is intercepted; the communication packet replied by the metering core to the management core is obtained based on the communication protocol, and the communication packet is parsed to determine whether it is the response power data of the response reading frame sent by the metering core to the management core. If so, the timing ends when the first byte of the metering core response frame is received.
[0140] Step 2-6, calculate the cumulative time from the start to the end of the timing in step 2-5. If the cumulative time is ≤ s, the data interaction correctness test is qualified. If the cumulative time is greater than s, the data interaction correctness test fails.
[0141] Preferably, the data interaction correctness test process further includes the following steps:
[0142] Step 2-7: After step 2-2, intercept the complete frame read by the management core;
[0143] Step 2-8: Check whether the management chip reads the complete frame correctly. If it is incorrect, the data interaction correctness test fails. If it is correct, proceed to step 2-9.
[0144] Step 2-9: Make the metering core move kWh;
[0145] Step 2-10, control the metering core to establish a communication connection with the management core;
[0146] Step 2-11, intercepting the complete frame of the metering chip response;
[0147] Step 2-12, judging the correctness of the complete frame responded by the metering core, if it is incorrect, the data interaction correctness test fails, if it is correct, the data interaction correctness test passes.
[0148] Preferably, 0 < ≤0.1; Preferably, 0 < ≤0.1; Preferably, 0.01. Preferably, 0.5< ≤30; Preferably 1.
[0149] Preferably, in steps 2-5 and 2-6, the frame is intercepted by the simulated SPI interface and transmitted to the host computer, which calculates the cumulative time and compares the cumulative time with the . Preferably, in steps 2-7 and 2-8, the frame is intercepted by the simulated SPI interface and transmitted to the host computer, and the host computer determines the correctness of the frame based on the communication protocol with the management core (for example, the 698 protocol). Preferably, in steps 2-11 and 2-12, the frame is intercepted by the simulated SPI interface and transmitted to the host computer, and the host computer parses and determines the correctness of the frame based on the communication protocol with the metering core (for example, the 698 protocol). If the frame cannot be parsed, the data interaction correctness test fails.
[0150] The following is a specific embodiment of the data interaction correctness test.
[0151] Combine Figure 2 , the data interaction correctness test includes the following steps:
[0152] (1b) The smart meter dual-core communication simulation system is powered on;
[0153] (2b) The host computer establishes application connections with the metering core and the management core respectively according to the 698 protocol;
[0154] (3b) The host computer obtains the power data of the metering core or the management core through the simulated SPI interface;
[0155] (4b) The host computer sets the working mode of the smart meter dual-core communication simulation system to monitoring mode;
[0156] (5b) The smart meter dual-core communication simulation system intercepts the reading command sent by the management core;
[0157] (6b) The host computer determines the management chip Whether the data read in seconds meets the data during design, >0; For example, if the design is to read data every second (of course, it can also be every two seconds, every three seconds, every four seconds, etc.), the smart meter dual-core communication simulation system monitors whether the data frame of the power reading meets the requirement of reading once every 1 second. If so, it is qualified, otherwise it is unqualified;
[0158] (7b) The smart meter dual-core communication simulation system intercepts the metering core reply frame through its simulated SPI interface;
[0159] (8b) The host computer determines the correctness of the metering core reply frame and whether the communication time between the metering core and the management core is 1 s based on the communication protocol (698 protocol) between the host computer and the metering core;
[0160] (9b) The host computer disconnects the communication between the metering chip and the management chip through the simulated SPI interface;
[0161] (10b) making the metering core count 0.01 kWh;
[0162] (11b) The host computer obtains data of the metering chip or the management chip through the simulated SPI interface;
[0163] (12b) The host computer simulates the management chip and sends communication frames containing wrong addresses, data items supported by the management chip but not supported by the metering chip, and data items not specified in the 698 protocol to the metering chip, so as to perform a fault injection test on the metering chip that falls within the scope of communication interference. If the metering chip returns normal data, it means that the metering chip is not designed according to the standard. If the returned data is abnormal, the metering chip passes this test.
[0164] (13b) The host computer obtains the management core data through the simulated SPI interface, and determines the consistency between the management core data and the data in step (11b). If they are consistent, the data is qualified; if they are inconsistent, the data is unqualified;
[0165] (14b) The upper computer simulates the management core and sends an incorrect frame (incorrect data format) to the metering core. If the metering core returns a response, the judgment is wrong; if the metering core does not return a response, the judgment is correct;
[0166] (15b) The host computer controls the simulation channel switch to connect the communication between the metering core and the management core;
[0167] (16b) The host computer reads the management chip data according to the 698 protocol;
[0168] Preferably, after step (15b) is completed, step (16b) is performed after a certain delay to synchronize the data of the metering core and the management core.
[0169] (17b) The host computer determines the consistency between the management core data and the metering core data. If they are consistent, the data are considered qualified; if they are inconsistent, the data are considered unqualified.
[0170] (18b) The smart meter dual-core communication simulation system is powered off.
[0171] Preferably, when testing the correctness of data interaction between the metering core and the management core software, the hardware interface can be modified and an oscilloscope can be connected to test the effective interaction time between the metering core and the management core. Specifically, the user can manually modify the interface between the metering core and the management core and lead them out with wires, then insert an oscilloscope for monitoring.
[0172] Preferably, Figure 3 FIG. 1 shows an implementation of the fault impact test.
[0173] like Figure 3 As shown, the fault impact test includes the following steps:
[0174] Step 3-1: Read the power data of the metering chip and the management chip;
[0175] Step 3-2, control the management chip to power off;
[0176] Step 3-3, measuring the chip movement time ,0< ≤10min, during which the host computer simulation management chip frequently reads the metering chip data through the simulation SPI interface;
[0177] Step 3-4: Power on the control management chip;
[0178] Step 3-5: Read the metering chip power data;
[0179] Step 3-6, judging whether the metering core power data read in step 3-5 is consistent with the theoretical power. If they are consistent, the fault impact test is qualified; otherwise, the fault impact test is unqualified.
[0180] Preferably, between steps 3-2 and 3-3, the host computer simulates the management core and frequently (5-10 times per second) reads the meter core data through the simulated SPI interface. This data interference and attack on the meter core is a form of fault injection, used to test the data processing and protection capabilities of the meter core's SPI channel.
[0181] Preferably, Figure 3 As shown, the fault impact test further includes the following steps:
[0182] Step 3-7: After step 3-1, control the metering core to power off;
[0183] Step 3-8, monitor the management chip reading frame. After receiving the management chip reading frame, the host computer replies with the correct data frame to the management chip through the simulated SPI interface. Second-rate;
[0184] Step 3-9, control the metering chip to power on;
[0185] Step 3-10: Read the power data of the metering chip and the management chip;
[0186] Step 3-11, judging whether the metering core power data read in step 3-10 is consistent with the theoretical power, if they are consistent, the fault impact test is qualified, if not, the fault impact test is unqualified.
[0187] Preferably, in step 3-8, after receiving the management core reading frame, the host computer replies to the management core with the correct data frame via the simulated SPI interface. times, 1≤ ≤5; The above operation simulates the metering core responding to the correct response frame to the management core based on the metering core power data read in step 3-1. When the metering core is powered on, the management core is tested to see if it has obtained data from the metering core. Further, the system actively responds to the management core with a correct data frame, and the cycle continues. Second-rate, =3.
[0188] Preferably, when conducting a fault impact test on the separation of the metering core and management core software, if the management core fails, the management core module can be manually unplugged (for example, the management core loses power), and the metering core should not be affected after the management core fails; however, it is impossible to test the metering core failure (for example, the metering core loses power) and communication fault injection (for example, the upper computer simulates the management core to frequently read the metering core data).
[0189] The following is a specific embodiment of the fault impact test.
[0190] Combine Figure 3 , the fault impact test process includes the following steps:
[0191] (1c) The smart meter dual-core communication simulation system is powered on;
[0192] (2c) The host computer establishes application connections with the metering core and the management core respectively according to the 698 protocol;
[0193] (3c) The host computer reads the power and time of the metering chip and the management chip according to the 698 protocol;
[0194] (4c) The host computer controls the simulation channel switch to disconnect the communication between the metering core and the management core;
[0195] (5c) The smart meter dual-core communication simulation system controls the voltage 220V and current Ib input to the simulated meter, and the simulated meter starts measuring electricity (i.e., starts counting).
[0196] (6c) The simulated electric meter runs for 5 minutes;
[0197] (7c) The smart meter dual-core communication simulation system controls the voltage of the simulated meter to be 220V and the current to be 0A. At this time, the measured energy meter should not change.
[0198] (8c) The host computer reads the power and time of the metering chip and the management chip according to the 698 protocol;
[0199] (9c) The host computer compares whether the metering core's power level is correct, that is, whether the metering value of the metering core is consistent with the theoretical value;
[0200] (10c) The host computer determines whether the power data of the management core changes. If the power data of the management core changes, the system fails the test. If the power data of the management core does not change, the system passes the test.
[0201] (11c) The host computer switches on the communication between the metering chip and the management chip through the simulation channel switch;
[0202] (12c) The host computer control delay is 1 s;
[0203] (13c) The host computer reads the power and time of the metering chip and the management chip according to the 698 protocol;
[0204] (14c) The host computer controls the simulation channel switch to disconnect the communication between the metering core and the management core;
[0205] (15c) The smart meter dual-core communication simulation system controls the input power voltage of the simulated meter to 220V and the current to 2Ib, and the simulated meter starts to measure the electricity (i.e., starts to run);
[0206] (16c) The host computer controls the delay for 1 minute;
[0207] (17c) The smart meter dual-core communication simulation system is powered off;
[0208] (18c) The host computer control delay is 1 s;
[0209] (19c) The smart meter dual-core communication simulation system controls the voltage 220V and current 2Ib of the input simulation meter;
[0210] (20c) The host computer controls the delay for 2 minutes;
[0211] (21c) The simulated electric meter is powered off;
[0212] (22c) The host computer control delay is 1 s;
[0213] (23c) The smart meter dual-core communication simulation system controls the voltage 220v and current 2Ib of the input simulation meter;
[0214] (24c) The host computer controls the delay for 2 minutes;
[0215] (25c) The simulated electric meter is powered off;
[0216] (26c) The host computer control delay is 1 s;
[0217] (27c) The intelligent meter dual-core communication simulation system loads the control input simulation meter voltage 220V and current 0A;
[0218] (28c) The host computer reads the power and time of the metering chip and the management chip according to the 698 protocol;
[0219] (29c) The host computer compares the power of the metering core with the theoretical value to see whether it is consistent;
[0220] (30c) The host computer determines whether the power and time of the management core are consistent with the power data in step (13c). If they are consistent, the data synchronization is accurate; if they are inconsistent, there is a problem with the data synchronization;
[0221] (31c) The host computer controls the simulation channel switch to connect the communication between the metering core and the management core;
[0222] (32c) Setting the meter time 5 s before the settlement time (monthly settlement parameter); specifically, the host computer sends the setting data to the FPGA, and the FPGA changes the time of the simulated energy meter;
[0223] (33c) Simulate the power off of the electric meter;
[0224] (34c) The host computer controls the delay for 10 s;
[0225] (35c) The simulated meter is powered on, and the intelligent meter dual-core communication simulation system controls the input voltage of the simulated meter to 220V and the current to 0A. The host computer disconnects the communication between the metering core and the management core through the simulation channel switch;
[0226] (36c) The host computer reads the power, time, and frozen data of the metering chip and the management chip according to the 698 protocol; the host computer determines the consistency of the data (including power and time) of the metering chip and the management chip. If the data of the metering chip and the management chip are consistent, the device is judged to be qualified; if not, the device is judged to be unqualified;
[0227] (38c) The host computer controls the simulation channel switch to connect the communication between the metering core and the management core;
[0228] (39c) The smart meter dual-core communication simulation system is powered off.
[0229] It should be pointed out that in measurement accuracy testing, data interaction correctness testing, and fault impact testing, "frame" refers to a data packet; for example, a reading frame refers to a data packet used for reading, and a reply frame refers to a data packet used for reply.
[0230] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.
Claims
1. A test method for software separation of multi-core smart meters, characterized in that: The metering core and the management core of the multi-core smart meter are respectively connected to the simulation part, and the upper computer controls the simulation part to perform measurement accuracy test and / or data interaction correctness test and / or fault impact test on the metering core and the management core software separation; The simulation unit is connected to the host computer, and the host computer is also respectively connected to the metering core and the management core; a simulation channel switch and a simulation SPI interface are formed inside the simulation unit, the metering core and the management core are connected through the simulation channel switch, and the simulation SPI interface is connected to the host computer for communication, and the host computer controls the closing and opening of the simulation channel switch; The host computer controls the simulation channel switch to close, connects the communication between the metering core and the management core, monitors the communication between the metering core and the management core through the simulation SPI interface, and / or interferes with the communication between the metering core and the management core; Or the host computer controls the simulation channel switch to be disconnected, cuts off the communication between the metering core and the management core, and communicates with the metering core through the simulation SPI interface; Alternatively, the host computer controls the simulation channel switch to be disconnected, thereby cutting off the communication between the metering core and the management core, and communicating with the management core through the simulation SPI interface.
2. The method for testing software separation of a multi-core smart meter according to claim 1, characterized in that: When the host computer monitors the communication between the metering core and the management core through the simulated SPI interface, the simulated channel switch is closed to connect the metering core and the management core, and the simulated SPI interface is set to the input state and interacts with the host computer; When the host computer interferes with the communication between the metering core and the management core through the simulated SPI interface, the simulated channel switch is closed to connect the metering core and the management core, the simulated SPI interface is set to an open-drain output state, and an interference pulse is sent in a bus conflict manner during the communication process; When the host computer simulates the metering core, the communication between the metering core and the management core is disconnected, the management core communicates normally with the simulated SPI interface, the simulated SPI interface is set to the output state, and communication frames are frequently sent to the management core through the simulated SPI interface or wrong communication frames are replied according to the test requirements; When the host computer simulates the management core, the communication between the metering core and the management core is disconnected, the metering core communicates normally with the simulated SPI interface, the simulated SPI interface is set to the output state, and communication frames are frequently sent to the metering core or erroneous communication frames are sent through the simulated SPI interface according to test requirements.
3. The method for testing software separation of a multi-core smart meter according to claim 1, characterized in that: The simulation part is FPGA; The host computer switches on the communication between the metering core and the management core through the simulation channel switch, monitors the communication between the metering core and the management core, and / or interferes with the communication between the metering core and the management core; Alternatively, the host computer only communicates with the metering core through the simulated SPI interface, simulates the management core and communicates with the metering core; Alternatively, the host computer is only connected to the management core for communication via the simulated SPI interface, simulating the metering core and communicating with the management core.
4. The method for testing software separation of a multi-core smart meter according to any one of claims 1 to 3, characterized in that: The measurement accuracy test includes the following steps: Step 1-1: Read the power data of the metering chip and the management chip. After the power data of the metering chip and the management chip are consistent, proceed to step 1-2. Step 1-2: Control the metering core and the management core to disconnect the communication; Steps 1-3: Make the metering core move kWh, 0< ≤0.02; Steps 1-4: Read the power data of the metering chip and the management chip during peak, flat, and valley periods respectively; Steps 1-5 compare whether the power data of the metering chip and the management chip during the peak, flat, and valley periods are consistent. If they are consistent, the measurement accuracy test fails.
5. The method for testing software separation of a multi-core smart meter according to claim 4, characterized in that: The measurement accuracy test further comprises the following steps: In step 1-5, if there is any inconsistency, proceed to step 1-6; Step 1-6: Control the metering core and the management core to establish a communication connection; Steps 1-7, Delay s,0< ≤2; Steps 1-8: Read the power data of the metering chip and the management chip; Step 1-9: Compare the power data of the metering chip and the management chip to see if they are consistent. If they are consistent, the metering accuracy test is passed.
6. The method for testing software separation of a multi-core smart meter according to claim 5, characterized in that: The measurement accuracy test further comprises the following steps: In step 1-9, if there is inconsistency, proceed to step 1-10; Step 1-10, determine the number of times steps 1-9 are completed, if the number of completed times is less than , then go to step 1-7. If the number of steps 1-9 completed is > If the comparison results of steps 1-9 are inconsistent each time, the measurement accuracy is unqualified; ≤15.
7. The method for testing software separation of a multi-core smart meter according to any one of claims 1 to 3, characterized in that: The data interaction correctness test includes the following steps: Step 2-1: Read the power data of the metering chip and the management chip; Step 2-2, control the metering core to disconnect from the management core; Step 2-3, metering core movement kWh, 0< ≤0.02; Step 2-4: Control the metering core to establish a communication connection with the management core; Step 2-5: When the last byte of the reading frame from the management chip is intercepted, the timing starts; when the first byte of the response frame from the metering chip is received, the timing ends; Step 2-6, calculate the cumulative time from the start to the end of the timing in step 2-5. If the cumulative time is less than or equal to s, the data interaction correctness test is qualified. If the cumulative time is greater than s, the data interaction correctness test fails; where 0< ≤2.
8. The method for testing software separation of a multi-core smart meter according to claim 7, characterized in that: The data interaction correctness test also includes the following steps: Step 2-7: After step 2-2, intercept the complete frame read by the management core; Step 2-8: Check whether the management chip reads the complete frame correctly. If it is incorrect, the data interaction correctness test fails. If it is correct, proceed to step 2-9. Step 2-9: Make the metering core move kWh, 0< ≤0.02; Step 2-10, control the metering core to establish a communication connection with the management core; Step 2-11, intercepting the complete frame of the metering chip response; Step 2-12, judging the correctness of the complete frame responded by the metering core, if it is incorrect, the data interaction correctness test fails, if it is correct, the data interaction correctness test passes.
9. The method for testing software separation of a multi-core smart meter according to any one of claims 1 to 3, characterized in that: The fault impact test includes the following steps: Step 3-1: Read the power data of the metering chip and the management chip; Step 3-2, control the management chip to power off; Step 3-3, measuring the chip movement time ,1< ≤10min, during which the host computer simulation management chip frequently reads the metering chip data through the simulation SPI interface; Step 3-4: Power on the control management chip; Step 3-5: Read the metering chip power data; Step 3-6, judging whether the metering core power data read in step 3-5 is consistent with the theoretical power. If they are consistent, the fault impact test is qualified; otherwise, the fault impact test is unqualified.
10. The method for testing software separation of a multi-core smart meter according to claim 9, characterized in that: The fault impact test further comprises the following steps: Step 3-7: After step 3-1, control the metering core to power off; Step 3-8, monitor the management chip reading frame. After receiving the management chip reading frame, the host computer replies with the correct data frame to the management chip through the simulated SPI interface. Second-rate, ≥1; Step 3-9, control the metering chip to power on; Step 3-10: Read the power data of the metering chip and the management chip; Step 3-11, judging whether the metering core power data read in step 3-10 is consistent with the theoretical power, if they are consistent, the fault impact test is qualified, if not, the fault impact test is unqualified.
11. The method for testing software separation of a multi-core smart meter according to claim 3, characterized in that: The simulated SPI interface is implemented by programming inside the FPGA, and the simulated channel switch is a function of the program.