Process handling methods and related products
By judging the access status of the critical region and allowing or waiting for the process to access the critical region, the problem that processes cannot access shared resources normally in the prior art is solved, normal resource access of the process is realized, and the resource access efficiency of the processor is improved.
Patent Information
- Application Number
- CN201911274599.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-12-12
- Publication Date
- 2025-04-29
- Estimated Expiration
- 2039-12-12
AI Technical Summary
In the prior art, when a process initiated by the kernel state and user state accesses a critical area, the shared resources cannot be accessed by multiple threads at the same time, resulting in the process being unable to enter the critical area normally and being unable to access the shared resources, resulting in the process failing or error in accessing the resources.
By determining whether the critical region is being accessed by other processes, if it is not accessed, the first or second process is allowed to access the critical region; if it has been accessed, wait for other processes to exit the critical region before accessing. The specific method includes calling atomic operation to detect the value of the configuration parameter. If it is a preset value, it means that the critical area has not been accessed, otherwise it means that it has been accessed.
Ensure that processes in the processor can enter the critical area normally and access common resources normally, avoid failure or errors of process accessing resources, and improve the processor's resource access efficiency.
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Figure CN112988368B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of artificial intelligence technology, and in particular to a process processing method and related products. Background Art
[0002] With the development of artificial intelligence technology, processors have begun to be widely used and can be applied to various technical fields. For example, processors can be applied to intelligent image processing, data analysis and other fields.
[0003] In the prior art, a process in a processor may enter the kernel running state, or the process may enter the user running state; wherein the kernel running state is referred to as kernel state for short, and the user running state is referred to as user state for short. A critical region is configured in the processor, and a critical region refers to a program segment that accesses shared resources, and these shared resources cannot be accessed by multiple threads at the same time. When the processor has kernel state and user state, the kernel state can initiate a process to access the critical region, and the user state can also initiate a process to access the critical region.
[0004] However, in the prior art, when a process initiated in kernel state and a process initiated in user state both need to access a critical area, that is, when a process initiated in kernel state and a process initiated in user state both need to access shared resources, since these shared resources cannot be accessed by multiple threads at the same time, the process initiated in kernel state and the process initiated in user state cannot enter the critical area normally and cannot access the shared resources, resulting in failure or error in the process accessing resources. Summary of the invention
[0005] Based on this, it is necessary to provide a process processing method and related products to address the above technical issues.
[0006] In a first aspect, the present application provides a process processing method, comprising:
[0007] When it is determined that the user running state initiates a first process to access the critical region, and / or when it is determined that the kernel running state initiates a second process to access the critical region, determining whether the critical region is being accessed by other processes;
[0008] If it is determined that the critical region is not being accessed by other processes, the first process or the second process is allowed to access the critical region.
[0009] In some embodiments, the method further comprises:
[0010] If it is determined that the critical region is being accessed by other processes, then wait for the other processes to exit the critical region, and when it is determined that the other processes exit the critical region, allow the first process or the second process to access the critical region.
[0011] In some embodiments, determining whether the critical region is being accessed by other processes includes:
[0012] Calling an atomic operation, and using the atomic operation to detect a value of a preset configuration parameter;
[0013] If the atomic operation is used to determine that the value of the configuration parameter is a preset value, it is determined that the critical region is not being accessed by other processes;
[0014] If it is determined by using the atomic operation that the value of the configuration parameter is not a preset value, it is determined that the critical area is being accessed by other processes.
[0015] In some embodiments, after allowing the first process or the second process to access the critical area, the method further includes:
[0016] When allowing the first process to access the critical area, using the atomic operation to set the value of the configuration parameter to the process identifier of the first process;
[0017] When the second process is allowed to access the critical area, the value of the configuration parameter is set as the process identifier of the second process using the atomic operation.
[0018] In some embodiments, using the atomic operation to set the value of the configuration parameter to the process identifier of the first process includes:
[0019] Adopting the atomic operation and using the virtual address of the user running state, setting the value of the configuration parameter in the memory unit to the process identifier of the first process;
[0020] Using the atomic operation to set the value of the configuration parameter as the process identifier of the second process includes:
[0021] The atomic operation is adopted to set the value of the configuration parameter in the memory unit as the process identifier of the second process using the virtual address of the kernel running state.
[0022] In some embodiments, after using the atomic operation to set the value of the configuration parameter as the process identifier of the first process, the method further includes:
[0023] When determining that the first process exits the critical region, using the atomic operation to set the value of the configuration parameter to the preset value;
[0024] After using the atomic operation to set the value of the configuration parameter as the process identifier of the second process, the method further includes:
[0025] When it is determined that the second process exits the critical region, the value of the configuration parameter is set to the preset value by using the atomic operation.
[0026] In some embodiments, allowing the first process or the second process to access the critical area includes:
[0027] Determine the initiation time of the first process and the initiation time of the second process; when the initiation time of the first process is earlier than the initiation time of the second process, allow the first process to access the critical area, and when the initiation time of the second process is earlier than the initiation time of the first process, allow the second process to access the critical area;
[0028] Alternatively, the first process has a priority, and the second process has a priority; the process with the highest priority between the first process and the second process is allowed to access the critical area.
[0029] In some embodiments, the method further comprises:
[0030] When an abnormal process exit is detected, an atomic operation is called;
[0031] When the value of the preset configuration parameter detected by the atomic operation is the process identifier of the process that has abnormally exited, the value of the configuration parameter is set to the preset value by the atomic operation.
[0032] In a second aspect, an embodiment of the present application provides a processor, the processor comprising:
[0033] A first determining unit, configured to determine whether the critical region is being accessed by other processes when determining that the user running state initiates the first process to access the critical region and / or determining that the kernel running state initiates the second process to access the critical region;
[0034] The second determining unit is configured to allow the first process or the second process to access the critical region if it is determined that the critical region is not being accessed by other processes.
[0035] In some embodiments, the processor further includes:
[0036] The third determining unit is configured to wait for the other process to exit the critical region if it is determined that the critical region is being accessed by other processes, and allow the first process or the second process to access the critical region when it is determined that the other process exits the critical region.
[0037] In some embodiments, the first determining unit includes:
[0038] A detection module, used for calling an atomic operation and using the atomic operation to detect a value of a preset configuration parameter;
[0039] A first determination module, configured to determine that the critical region is not being accessed by other processes if the value of the configuration parameter is determined to be a preset value by using the atomic operation;
[0040] The second determination module is used to determine that the critical area is being accessed by other processes if the value of the configuration parameter determined by the atomic operation is not a preset value.
[0041] In some embodiments, the processor further includes:
[0042] a first configuration unit, configured to, after the second determination unit allows the first process or the second process to access the critical region, use the atomic operation to set the value of the configuration parameter to the process identifier of the first process when the first process is allowed to access the critical region;
[0043] Alternatively, the second configuration unit is used to set the value of the configuration parameter to the process identifier of the second process by using the atomic operation when allowing the second process to access the critical area after the second determination unit allows the first process or the second process to access the critical area.
[0044] In some embodiments, the first configuration unit is specifically configured to:
[0045] Adopting the atomic operation and using the virtual address of the user running state, setting the value of the configuration parameter in the memory unit to the process identifier of the first process;
[0046] The second configuration unit is specifically used to:
[0047] The atomic operation is adopted to set the value of the configuration parameter in the memory unit as the process identifier of the second process using the virtual address of the kernel running state.
[0048] In some embodiments, the processor further includes:
[0049] a third configuration unit, configured to, after the first configuration unit uses the atomic operation to set the value of the configuration parameter to the process identifier of the first process, and when it is determined that the first process exits the critical region, use the atomic operation to set the value of the configuration parameter to the preset value;
[0050] The processor further includes:
[0051] A fourth configuration unit is used to set the value of the configuration parameter to the preset value by using the atomic operation when it is determined that the second process exits the critical area after the second configuration unit uses the atomic operation to set the value of the configuration parameter to the process identifier of the second process.
[0052] In some embodiments, the second determining unit is specifically configured to:
[0053] Determine the initiation time of the first process and the initiation time of the second process; when the initiation time of the first process is earlier than the initiation time of the second process, allow the first process to access the critical area, and when the initiation time of the second process is earlier than the initiation time of the first process, allow the second process to access the critical area;
[0054] Alternatively, the first process has a priority, and the second process has a priority; the process with the highest priority between the first process and the second process is allowed to access the critical area.
[0055] In some embodiments, the processor further includes:
[0056] A calling unit is used to call an atomic operation when an abnormal process exit is detected;
[0057] The fifth configuration unit is used to use the atomic operation to set the value of the configuration parameter to a preset value when the value of the preset configuration parameter detected by the atomic operation is the process identifier of the process that has abnormally exited.
[0058] In a third aspect, the present application provides a combined processing device, wherein the process processing device includes one or more processors described in the first aspect of the present application, and is used to obtain data from other processing devices, and execute specified process processing operations, and transmit the execution results to other processing devices through an I / O interface;
[0059] When the process processing device includes a plurality of the processors, the plurality of processors may be connected and transmit data through a specific structure;
[0060] Among them, the multiple processors are interconnected and transmit data through a fast peripheral device interconnect bus PCIE bus; the multiple processors share the same control system or have their own control systems; the multiple processors share a memory unit or have their own memory units.
[0061] In a third aspect, the present application provides a combined processing device, including the process processing device as described in the second aspect of the present application, a universal interconnection interface and other processing devices;
[0062] The process processing device interacts with the other processing devices to jointly complete the operation specified by the user.
[0063] In a fourth aspect, the present application provides a chip, comprising the process processing device as described in the second aspect of the present application or the combined processing device as described in the third aspect of the present application.
[0064] In a fifth aspect, the present application provides a board card, which includes the chip as described in the fourth aspect of the present application.
[0065] In a sixth aspect, the present application provides an electronic device, which includes the chip as described in the fourth aspect of the present application or the board as described in the fifth aspect of the present application.
[0066] In the above, in the scheme of the embodiment of the present application, when it is determined that the user running state initiates the first process to access the critical area, and / or, it is determined that the kernel running state initiates the second process to access the critical area, it is determined whether the critical area is being accessed by other processes; if it is determined that the critical area is not being accessed by other processes, the first process or the second process is allowed to access the critical area. The process entering the user running state in the processor needs to access the critical area, or the process entering the kernel running state in the processor needs to access the critical area; or the process entering the user running state in the processor needs to access the critical area, and another process entering the kernel running state in the processor needs to access the critical area; however, the shared resources indicated by the critical area cannot be accessed by multiple threads at the same time, so the processor only allows the process entering the user running state or the process entering the kernel running state to access the critical area, and the processor needs to determine that the critical area is not accessed by other processes in the current state, and then the processor determines to allow the process entering the user running state and the process entering the kernel running state, one of the two processes to access the shared resources of the critical area. Furthermore, the processes in the processor can enter the critical area normally and access the shared resources normally, so that one of the processes can successfully access the resources to complete the processing task. BRIEF DESCRIPTION OF THE DRAWINGS
[0067] Figure 1 The application scenario provided by the embodiment of the present application is shown in FIG. Figure 1 ;
[0068] Figure 2 The application scenario provided by the embodiment of the present application is shown in FIG. Figure 2 ;
[0069] Figure 3 A schematic diagram of a process processing method provided in an embodiment of the present application;
[0070] Figure 4 A schematic diagram of another process processing method provided in an embodiment of the present application;
[0071] Figure 5 A schematic diagram of a processor provided in an embodiment of the present application;
[0072] Figure 6 A schematic diagram of another processor provided in an embodiment of the present application;
[0073] Figure 7 A schematic diagram of a process processing device provided in an embodiment of the present application;
[0074] Figure 8 A schematic diagram of a combined processing device provided in an embodiment of the present application;
[0075] Fig. 9 A schematic diagram of a chip provided in an embodiment of the present application Figure 1 ;
[0076] Fig.10 A schematic diagram of a chip provided in an embodiment of the present application Figure 2 ;
[0077] Fig.11 A schematic diagram of a chip provided in an embodiment of the present application Figure 3 ;
[0078] Fig.12 A schematic diagram of a board provided in an embodiment of the present application;
[0079] Fig.13 A schematic diagram of an electronic device provided in an embodiment of the present application Figure 1 ;
[0080] Fig.14 A schematic diagram of an electronic device provided in an embodiment of the present application Figure 2 ;
[0081] Fig.15 A schematic diagram of an electronic device provided in an embodiment of the present application Figure 3 . DETAILED DESCRIPTION
[0082] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.
[0083] It should be understood that the terms "first", "second", etc. in the claims, specification and drawings of the present application are used to distinguish different objects rather than to describe a specific order. The terms "include" and "comprise" used in the specification and claims of the present application indicate the presence of the described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their collections.
[0084] It should also be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in this application specification and claims, unless the context clearly indicates otherwise, the singular forms of "a", "an" and "the" are intended to include plural forms. It should also be further understood that the term "and / or" used in this application specification and claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.
[0085] As used in this specification and claims, the term "if" may be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" may be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.
[0086] The technical solution of the present application is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.
[0087] In existing artificial intelligence technologies, processors can perform various intelligent processing, for example, intelligent processing of images, intelligent analysis of data, and so on.
[0088] Figure 1 The application scenario provided by the embodiment of the present application is shown in FIG. Figure 1 ,like Figure 1 As shown, artificial intelligence chips and processors can be applied to face recognition. By using artificial intelligence chips or processors to directly recognize face images, recognition results can be obtained. The recognition results can be images or other data.
[0089] Figure 2 The application scenario provided by the embodiment of the present application is shown in FIG. Figure 2 ,like Figure 2As shown, artificial intelligence chips and processors can be applied to data calculations on servers to process big data or perform accurate calculations on precision data.
[0090] The process in the processor will enter the kernel running state, or the process can enter the user running state; the kernel running state is referred to as kernel state; the user running state is referred to as user state. User state is a non-privileged state, in which some operation permissions of the process are restricted; kernel state refers to the state when the process executes the processor call and falls into the kernel code execution.
[0091] The processor is configured with a critical section, which refers to a program segment that accesses shared resources, and these shared resources cannot be accessed by multiple threads at the same time. When a thread enters the critical section, other threads or processes must wait (for example: bounded waiting method).
[0092] When there are kernel state and user state, the kernel state can initiate a process to access the critical area, and the user state can also initiate a process to access the critical area.
[0093] Therefore, when both the process initiated by kernel state and the process initiated by user state need to access the critical area, both the process initiated by kernel state and the process initiated by user state need to access shared resources, but these shared resources cannot be accessed by multiple threads at the same time, which causes the process initiated by kernel state and the process initiated by user state to be unable to enter the critical area normally and unable to access the shared resources, resulting in failure or error in the process accessing resources.
[0094] In order to solve the above problems existing in the prior art, the present application provides a process processing method and related products to prevent the failure or error of the process accessing resources.
[0095] In some embodiments, Figure 3 A schematic diagram of a process processing method provided in an embodiment of the present application is shown as follows: Figure 3 As shown, the method comprises:
[0096] 101. When it is determined that the user running state initiates a first process to access a critical region, and / or when it is determined that the kernel running state initiates a second process to access a critical region, determine whether the critical region is being accessed by other processes.
[0097] For example, the execution subject of this embodiment may be a processor, in which case the processor is a hardware unit or a hardware device. Alternatively, the execution subject of this embodiment may be a process processing device, in which case the process processing device is an independent hardware unit or a hardware device, and the process processing device may also be a logic unit set in the processor.
[0098] In this embodiment, the execution subject is introduced as a processor.
[0099] The processor can initiate multiple processes, and each process can complete corresponding task processing. The process in the processor can enter the kernel running state, at which time the kernel running state initiates the process; the process in the processor can also enter the user running state, at which time the user running state initiates the process.
[0100] The processor is configured with a critical section, which refers to a program segment that accesses shared resources, and these shared resources cannot be accessed by multiple threads at the same time. The process is allowed to access the critical section, but the critical section cannot be accessed by multiple threads at the same time.
[0101] Therefore, when the processor determines that the user running state initiates the first process and the first process needs to access the critical area of the processor, in order to allow the first process to access the critical area, the processor needs to determine whether the critical area is being accessed by other processes.
[0102] Alternatively, when the processor determines that the kernel running state initiates the second process and the second process needs to access the critical area of the processor, the processor needs to determine whether the critical area is being accessed by other processes in order to allow the second process to access the critical area.
[0103] Alternatively, there is a situation where the user running state initiates the first process and the kernel running state initiates the second process. At this time, when the processor determines that the user running state initiates the first process and the first process needs to access the critical area of the processor, and determines that the kernel running state initiates the second process and the second process needs to access the critical area of the processor, the processor needs to determine whether the critical area is being accessed by other processes.
[0104] The tasks processed by the first process initiated by the user running state and the tasks processed by the second process initiated by the kernel running state can be the same or different. For example, the first process needs to process the intelligent recognition task, and the second process needs to process the intelligent computing task; for another example, the first process needs to process process 1 in the intelligent recognition task, and the second process needs to process process 2 in the intelligent recognition task.
[0105] 102. If it is determined that the critical area is not being accessed by other processes, allow the first process or the second process to access the critical area.
[0106] Exemplarily, if the processor determines that the critical region is being accessed by other processes, since the shared resources indicated by the critical region cannot be accessed by multiple threads at the same time, the processor determines not to allow the first process to access the critical region, nor to allow the second process to access the critical region.
[0107] When the processor determines that the first process initiated by the user running state needs to access the critical area, if the processor determines that the critical area is not being accessed by other processes, the processor determines to allow the first process to access the critical area so that the first process can access the shared resource.
[0108] When the processor determines that the second process initiated by the kernel running state needs to access the critical area, if the processor determines that the critical area is not being accessed by other processes, the processor determines to allow the second process to access the critical area so that the second process can access the shared resource.
[0109] When the processor determines that the first process initiated in the user running state needs to access the critical area, and the second process initiated in the kernel running state needs to access the critical area, if the processor determines that the critical area is not being accessed by other processes, the processor determines to allow the first process or the second process to access the critical area so that the first process or the second process can access shared resources.
[0110] For example, when the processor determines that the first process initiated in the user running state needs to access the critical area, and the second process initiated in the kernel running state needs to access the critical area, the processor can select the first process or the second process to access the critical area according to the priority of the task processed by the process. For example, if the processor determines that the priority of the task processed by the first process is higher, the first process is allowed to access the critical area first. Alternatively, the processor can select the first process or the second process to access the critical area according to the computational amount of the task processed by the process. For example, if the processor determines that the computational amount of the task processed by the first process is larger, the first process is allowed to access the critical area first.
[0111] In this embodiment, when determining that the user running state initiates the first process to access the critical area, and / or determining that the kernel running state initiates the second process to access the critical area, it is determined whether the critical area is being accessed by other processes; if it is determined that the critical area is not being accessed by other processes, the first process or the second process is allowed to access the critical area. The process entering the user running state in the processor needs to access the critical area, or the process entering the kernel running state in the processor needs to access the critical area; or the process entering the user running state in the processor needs to access the critical area, and another process entering the kernel running state in the processor needs to access the critical area; however, the shared resources indicated by the critical area cannot be accessed by multiple threads at the same time, so the processor only allows the process entering the user running state or the process entering the kernel running state to access the critical area, and the processor needs to determine that the critical area is not accessed by other processes in the current state, and then the processor determines to allow the process entering the user running state and the process entering the kernel running state, one of the two processes to access the shared resources of the critical area. Then, the process in the processor can enter the critical area normally and access the shared resources normally; so that one of the processes can successfully access the resources to complete the processing task.
[0112] In some embodiments, Figure 4 A schematic diagram of another process processing method provided in an embodiment of the present application, such as Figure 4 As shown, the method comprises:
[0113] 201. When it is determined that the user running state initiates a first process to access a critical area, and / or when it is determined that the kernel running state initiates a second process to access a critical area, an atomic operation is called, and the atomic operation is used to detect a value of a preset configuration parameter.
[0114] For example, the execution subject of this embodiment may be a processor, in which case the processor is a hardware unit or a hardware device. Alternatively, the execution subject of this embodiment may be a process processing device, in which case the process processing device is an independent hardware unit or a hardware device, and the process processing device may also be a logic unit set in the processor.
[0115] In this embodiment, the execution subject is introduced as a processor.
[0116] The processor can initiate multiple processes, and each process can complete corresponding task processing. The process in the processor can enter the kernel running state, at which time the kernel running state initiates the process; the process in the processor can also enter the user running state, at which time the user running state initiates the process.
[0117] The processor is configured with a critical section, which refers to a program segment that accesses shared resources, and these shared resources cannot be accessed by multiple threads at the same time. The process is allowed to access the critical section, but the critical section cannot be accessed by multiple threads at the same time.
[0118] In order to complete the process access to the critical area, the processor can call atomic operations to complete the processing of the process. First, the processor opens up a memory area, which is used to place the configuration parameters of the atomic operation. The configuration parameters represent the identification of the atomic operation; the processor pre-sets a preset value for the configuration operation of the atomic operation; when the configuration parameter of the atomic operation is the preset value, the critical area is not being accessed by other processes; when the configuration parameter of the atomic operation is not the preset value, the critical area is being accessed by other processes. In one instance, the preset value can be zero. The above memory area can also be called a memory unit.
[0119] Among them, atomic operation refers to an operation that will not be interrupted by the thread scheduling mechanism. Once an atomic operation starts, it will run until it ends without any context switch (for example, switching to another thread) in the middle.
[0120] For example, when the processor adopts the Linux system, a memory area is set in a driver's Linux kernel, and the memory area can store integers, that is, the memory area is used to store a configuration parameter; and the configuration parameter stored in the memory area is set to 0.
[0121] Therefore, when the processor determines that the user running state initiates the first process and the first process needs to access the critical area of the processor, the processor can call an atomic operation to allow the first process to access the critical area.
[0122] Then, the processor obtains the configuration parameters of the atomic operation from the memory area. In one example, the processor uses the atomic operation to obtain the configuration parameters of the atomic operation from the memory area.
[0123] Furthermore, the processor can determine whether the configuration parameters of the atomic operation obtained are preset values. For example, determine whether the value of the configuration parameter is 0. Since the processor uses the configuration parameters of the atomic operation to determine whether the critical area is being accessed by the process, based on the principle that the atomic operation will not be interrupted, the processor can quickly and accurately determine whether the critical area is being accessed by the process.
[0124] Furthermore, when loading the driver, the processor initializes the configuration parameters to the preset parameters, and at the same time, the processor maps the virtual address of the kernel control corresponding to the kernel running state to the virtual address of the user space corresponding to the user running state. For example, the virtual address of the kernel control corresponding to the kernel running state is int*addr_kernel, and the virtual address of the user space corresponding to the user running state is int*addr_user. Furthermore, initially, addr_kernel and addr_user are the same physical address.
[0125] 202. If the value of the configuration parameter is determined to be a preset value by an atomic operation, it is determined that the critical area is not being accessed by other processes.
[0126] Exemplarily, after step 201, the processor uses atomic operations to determine the values of the configuration parameters of the atomic operations; if the processor determines that the obtained values of the configuration parameters are preset values, since the preset values indicate that the critical area is not being accessed by other processes, the processor can determine that the critical area is not being accessed by other processes in the current state.
[0127] 203. If it is determined that the critical area is not being accessed by other processes, allow the first process or the second process to access the critical area.
[0128] In one example, step 203 specifically includes the following implementations:
[0129] The first implementation method of step 203 is to determine the initiation time of the first process and the initiation time of the second process; when the initiation time of the first process is earlier than the initiation time of the second process, the first process is allowed to access the critical area, and when the initiation time of the second process is earlier than the initiation time of the first process, the second process is allowed to access the critical area.
[0130] In a second implementation of step 203, the first process has a priority, and the second process has a priority; the process with the highest priority between the first process and the second process is allowed to access the critical area.
[0131] Illustratively, after step 202, the processor determines that the critical region is not being accessed by other processes, and the processor determines that the critical region can be accessed by the first process or the second process.
[0132] The specific implementation methods of step 203 include the following:
[0133] A first implementation method of step 203: when the processor determines that the first process initiated in the user running state needs to access the critical area, the processor determines to allow the first process to access the critical area so that the first process can access the shared resources; when the processor determines that the second process initiated in the kernel running state needs to access the critical area, the processor determines to allow the second process to access the critical area so that the second process can access the shared resources.
[0134] A second implementation method of step 203: When the processor determines that the first process initiated in the user running state needs to access the critical area and the second process initiated in the kernel running state needs to access the critical area, the processor selects one of the first process and the second process to allow access to the critical area, and the other process that is not selected waits so that it can access the critical area when the critical area has not been accessed.
[0135] In one example, the processor can read the initiation time of the first process and the initiation time of the second process; then, the processor determines whether the initiation time of the first process is earlier than the initiation time of the second process. If the processor determines that the initiation time of the first process is earlier than the initiation time of the second process, the processor determines to allow the first process to enter the critical area, and then the first process initiated by the user running state accesses the shared resources of the critical area; thus, the second process enters the waiting state, and after the processor determines that the access of the first process is over, the processor allows the second process to enter and access the critical area. If the processor determines that the initiation time of the second process is earlier than the initiation time of the first process, the processor determines to allow the second process to enter the critical area, and then the second process initiated by the kernel running state accesses the shared resources of the critical area; thus, the first process enters the waiting state, and after the processor determines that the access of the second process is over, the processor allows the first process to enter and access the critical area.
[0136] In one example, a priority can be configured for a process, and then when a process is initiated, each process has its own corresponding priority; thus, the first process initiated in the user running state has a priority, and the second process initiated in the kernel running state also has a priority; the processor can determine whether the priority of the first process is higher than the priority of the second process; if the processor determines that the priority of the first process is higher than the priority of the second process, the processor determines to allow the first process to enter the critical area, and then the first process initiated in the user running state accesses the shared resources of the critical area; thus, the second process enters a waiting state, and after the processor determines that the access of the first process is over, the processor allows the second process to enter and access the critical area. If the processor determines that the priority of the second process is higher than the priority of the first process, the processor determines to allow the second process to enter the critical area, and then the second process initiated in the kernel running state accesses the shared resources of the critical area; thus, the first process enters a waiting state, and after the processor determines that the access of the second process is over, the processor allows the first process to enter and access the critical area.
[0137] In one example, the processor can determine the amount of computation of the task processed by the process; the processor determines whether the amount of computation of the task processed by the first process is less than the amount of computation of the task processed by the second process; if the processor determines that the amount of computation of the task processed by the first process is less than the amount of computation of the task processed by the second process, the processor determines to allow the first process to enter the critical area, and then the first process initiated by the user running state accesses the shared resources of the critical area; thus, the second process enters the waiting state, and after the processor determines that the access of the first process is over, the processor allows the second process to enter and access the critical area. If the processor determines that the amount of computation of the task processed by the second process is less than or equal to the amount of computation of the task processed by the first process, the processor determines to allow the second process to enter the critical area, and then the second process initiated by the kernel running state accesses the shared resources of the critical area; thus, the first process enters the waiting state, and after the processor determines that the access of the second process is over, the processor allows the first process to enter and access the critical area.
[0138] In one example, the processor determines that the computational amount of the task processed by the first process is equal to the computational amount of the task processed by the second process, and then the processor selects the process with the highest priority to access the critical area according to the priority of the process.
[0139] 204. When allowing the first process to access the critical area, use an atomic operation to set the value of the configuration parameter to the process ID of the first process.
[0140] In one example, step 204 specifically includes: using an atomic operation and a virtual address in a user running state to set the value of the configuration parameter in the memory unit to the process identifier of the first process.
[0141] Exemplarily, in step 203, the processor has completed the selection of the first process and the second process. When the processor determines that the first process is allowed to access the critical area, the first process can enter the critical area to access the shared resources of the critical area; and, in order to prevent other processes from entering the critical area when the first process accesses the critical area, the processor needs to change the value of the configuration parameter of the atomic operation so that the value of the configuration parameter is no longer the above-mentioned preset value.
[0142] At this time, since it is the first process initiated by the user running state that accesses the critical area, the processor can use the virtual address of the user running state to change the configuration parameters of the atomic operation to the process ID (processID, abbreviated as PID) of the first process. At this time, since the configuration parameters are stored in the memory unit, when the processor changes the configuration parameters to the process ID of the first process, the value of the configuration parameters in the memory unit is the process ID of the first process.
[0143] 205. When determining that the first process exits the critical region, an atomic operation is used to set the value of the configuration parameter to a preset value.
[0144] Exemplarily, after step 204, the processor also needs to detect in real time that the first process no longer accesses the critical area. Thus, when the processor detects that the first process exits the critical area, the processor needs to modify the value of the configuration parameter in order to allow other processes or the second process to access the critical area.
[0145] At this time, the processor can use atomic operations to set the value of the configuration parameter of the original value operation to a preset value. Since the preset value indicates that the critical area is not being accessed by a process, the second process or processes can enter the critical area to access the shared resource.
[0146] 206. When allowing the second process to access the critical area, an atomic operation is used to set the value of the configuration parameter to the process ID of the second process.
[0147] In one example, step 206 specifically includes: using an atomic operation and a virtual address in the kernel running state to set the value of the configuration parameter in the memory unit to the process identifier of the second process.
[0148] Exemplarily, in step 203, the processor has completed the selection of the first process and the second process. When the processor determines that the second process is allowed to access the critical area, the second process can enter the critical area to access the shared resources of the critical area; and, in order to prevent other processes from entering the critical area when the second process accesses the critical area, the processor needs to change the value of the configuration parameter of the atomic operation so that the value of the configuration parameter is no longer the above-mentioned preset value.
[0149] At this time, since it is the second process initiated by the kernel running state that accesses the critical area, the processor can use the virtual address of the kernel running state to change the configuration parameters of the atomic operation to the process identifier PID of the second process. At this time, since the configuration parameters are stored in the memory unit, when the processor changes the configuration parameters to the process identifier of the second process, the value of the configuration parameters in the memory unit is the process identifier of the second process.
[0150] 207. When determining that the second process exits the critical region, an atomic operation is used to set the value of the configuration parameter to a preset value.
[0151] Exemplarily, after step 206, the processor also needs to detect in real time that the second process no longer accesses the critical area. Thus, when the processor detects that the second process exits the critical area, the processor needs to modify the value of the configuration parameter in order to allow other processes or the first process to access the critical area.
[0152] At this time, the processor can use atomic operations to set the value of the configuration parameter of the original value operation to a preset value. Since the preset value indicates that the critical area is not being accessed by a process, the first process or processes can enter the critical area to access the shared resource.
[0153] 208. If the value of the configuration parameter determined by atomic operation is not the preset value, it is determined that the critical area is being accessed by other processes.
[0154] Exemplarily, after step 201, the processor uses atomic operations to determine the value of the configuration parameter of the atomic operation; if the processor determines that the value of the configuration parameter obtained is not the preset value; since the preset value indicates that the critical area is not being accessed by other processes, but the value of the configuration parameter is not the preset value, the processor can determine that the critical area is being accessed by other processes in the current state. Therefore, the first process initiated by the user running state and the second process initiated by the kernel running state cannot enter the critical area.
[0155] 209. If it is determined that the critical area is being accessed by other processes, wait for the other processes to exit the critical area, and when it is determined that the other processes exit the critical area, allow the first process or the second process to access the critical area.
[0156] Exemplarily, after step 208, the processor determines that the critical area is being accessed by other processes in the current state. If only the first process is initiated in the user running state at this time, the processor determines that the first process enters a waiting state; when the processor detects that other processes accessing the critical area exit the critical area, the processor can change the value of the configuration parameter to the above-mentioned preset value, and then the processor allows the first process initiated in the user running state to enter the critical area to access the shared resources of the critical area.
[0157] Alternatively, after step 208, the processor determines that the critical area is being accessed by other processes in the current state. If only the kernel running state initiates the second process at this time, the processor determines that the second process enters the waiting state; when the processor detects that other processes accessing the critical area exit the critical area, the processor can change the value of the configuration parameter to the above-mentioned preset value, and then the processor allows the second process initiated by the kernel running state to enter the critical area to access the shared resources of the critical area.
[0158] Alternatively, after step 208, the processor determines that the critical area is being accessed by other processes in the current state. If the user running state initiates the first process and the kernel running state initiates the second process, the processor determines that the second process enters the waiting state; when the processor detects that other processes accessing the critical area exit the critical area, the processor can change the value of the configuration parameter to the above-mentioned preset value, and then the processor selects one of the first process and the second process to enter the critical area to access the shared resources of the critical area.
[0159] For example, when the processor uses atomic operations to determine that the configuration parameter is not 0, the processor determines that other processes have entered the critical area, and the processor determines that the current process is not allowed to enter the critical area; the processor continues to detect the value of the configuration parameter, and when the processor waits for the value of the configuration parameter to be 0, the processor allows the current process to enter the critical area. Furthermore, when the processor determines that the process exits the critical area, the processor uses atomic operations to set the value of the configuration parameter to 0; the processor allows the current process to enter the critical area.
[0160] In one example, during the implementation of any of the above steps, the following steps may also be performed:
[0161] When an abnormal process exit is detected, an atomic operation is called; when the atomic operation is used to detect that the value of a preset configuration parameter is the process identifier of the process that has abnormally exited, the atomic operation is used to set the value of the configuration parameter to a preset value.
[0162] Exemplarily, this embodiment also provides an exception handling mechanism. During the process of a process accessing a critical region, due to the process itself or the interference of other processes of the processor, the process accessing the critical region may exit abnormally; at this time, the critical region is no longer accessed by the process; the processor needs to process in a timely manner to ensure that other processes can access the critical region normally, avoid waste of resources, and speed up the operation efficiency of the processor.
[0163] Furthermore, when the processor detects that the process has exited abnormally, the processor uses atomic operations to detect the value of the configuration parameter in the memory unit, and then determines whether the value is the process identifier PID of the process that exited abnormally; if so, the processor uses atomic operations to set the value of the configuration parameter in the memory unit to a preset value, such as setting the configuration parameter to 0; because the preset value indicates that the critical area is not being accessed by other processes, other processes can be called to access the critical area.
[0164] In this embodiment, based on the above embodiment, the processor uses the configuration parameters of the atomic operation to determine whether the critical area is being accessed by the process. Based on the principle that the atomic operation will not be interrupted, the processor can quickly and accurately determine whether the critical area is being accessed by the process. In addition, when the processor allows the first process to access the critical area, the processor uses the atomic operation to set the value of the configuration parameter to the process identifier of the first process, or when the processor allows the second process to access the critical area, the processor uses the atomic operation to set the value of the configuration parameter to the process identifier of the second process. Based on the principle that the atomic operation will not be interrupted, the processor can quickly and accurately modify the configuration parameters in the memory unit to the identifier of the process that is accessing the critical area, and then other processes can no longer access the critical area, ensuring that the current process can successfully access the shared resources of the critical area. In addition, when the processor determines that the process exits the critical area, or detects that the process accessing the critical area sends an abnormal exit, the processor uses the atomic operation to set the value of the configuration parameter to the preset value. Based on the principle that the atomic operation will not be interrupted, the processor can quickly and accurately modify the configuration parameters in the memory unit to the preset value, thereby ensuring that other processes can quickly and successfully access the critical area.
[0165] In some embodiments, Figure 5 A schematic diagram of a processor provided in an embodiment of the present application, such as Figure 5 As shown, the processor includes:
[0166] The first determining unit 31 is used to determine whether the critical area is being accessed by other processes when it is determined that the user running state initiates the first process to access the critical area and / or when it is determined that the kernel running state initiates the second process to access the critical area.
[0167] The second determining unit 32 is configured to allow the first process or the second process to access the critical region if it is determined that the critical region is not being accessed by other processes.
[0168] The principles and technical effects of each unit and module of this embodiment can be found in the above method embodiment and will not be described in detail again.
[0169] In some embodiments, Figure 6 A schematic diagram of another processor provided in an embodiment of the present application, in Figure 5 Based on the embodiment shown, Figure 6 As shown, the processor also includes:
[0170] The third determining unit 41 is configured to wait for other processes to exit the critical region if it is determined that the critical region is being accessed by other processes, and allow the first process or the second process to access the critical region when it is determined that other processes exit the critical region.
[0171] In one example, the first determining unit 31 includes:
[0172] The detection module 311 is used to call the atomic operation and use the atomic operation to detect the value of the preset configuration parameter.
[0173] The first determination module 312 is configured to determine that the critical region is not being accessed by other processes if the value of the configuration parameter is determined to be a preset value by using an atomic operation.
[0174] The second determination module 313 is used to determine that the critical area is being accessed by other processes if the value of the configuration parameter determined by the atomic operation is not the preset value.
[0175] In one example, the processor further includes:
[0176] The first configuration unit 42 is used for, after the second determination unit 32 allows the first process or the second process to access the critical area, using an atomic operation to set the value of the configuration parameter to the process identifier of the first process when the first process is allowed to access the critical area.
[0177] Alternatively, the second configuration unit 43 is configured to, after the second determination unit 32 allows the first process or the second process to access the critical area, use an atomic operation to set the value of the configuration parameter to the process identifier of the second process when the second process is allowed to access the critical area.
[0178] In one example, the first configuration unit 42 is specifically used to: adopt an atomic operation and use a virtual address in a user running state to set the value of the configuration parameter in the memory unit to the process identifier of the first process.
[0179] The second configuration unit 43 is specifically used to: adopt an atomic operation and use the virtual address of the kernel running state to set the value of the configuration parameter in the memory unit as the process identifier of the second process.
[0180] In one example, the processor further includes:
[0181] The third configuration unit 44 is used to set the value of the configuration parameter to a preset value by using an atomic operation when it is determined that the first process exits the critical area after the first configuration unit 42 sets the value of the configuration parameter to the process identifier of the first process by using an atomic operation.
[0182] The processor also includes:
[0183] The fourth configuration unit 45 is used to set the value of the configuration parameter to a preset value by using an atomic operation when it is determined that the second process exits the critical area after the second configuration unit 43 sets the value of the configuration parameter to the process identifier of the second process by using an atomic operation.
[0184] In one example, the second determination unit 32 is specifically used to: determine the initiation time of the first process and the initiation time of the second process; when the initiation time of the first process is earlier than the initiation time of the second process, allow the first process to access the critical area, and when the initiation time of the second process is earlier than the initiation time of the first process, allow the second process to access the critical area.
[0185] Alternatively, the second determining unit 32 is specifically configured to: the first process has a priority, the second process has a priority; and the process with the highest priority between the first process and the second process is allowed to access the critical area.
[0186] In one example, the processor further includes:
[0187] The calling unit 46 is used to call the atomic operation when an abnormal process exit is detected.
[0188] The fifth configuration unit 47 is used to set the value of the configuration parameter to the preset value by using an atomic operation when it is detected by using an atomic operation that the value of the preset configuration parameter is the process identifier of the process that has abnormally exited.
[0189] The principles and technical effects of each unit and module of this embodiment can be found in the above method embodiment and will not be described in detail again.
[0190] The above-mentioned units may be hardware circuits including digital circuits, analog circuits, etc. The physical implementation of the hardware circuits includes but is not limited to physical devices, and the physical devices include but are not limited to transistors, memristors, etc. The units and modules in the above-mentioned processors may be any appropriate hardware processors, such as CPU, GPU, FPGA, DSP, and ASIC, etc. The above-mentioned storage units may be any appropriate magnetic storage media or magneto-optical storage media, such as RRAM, DRAM, SRAM, EDRAM, HBM, HMC, etc.
[0191] In some embodiments, Figure 7 A schematic diagram of a process processing device provided in an embodiment of the present application is shown in FIG. Figure 7 As shown, the process processing device includes one or more of the above-mentioned processors, which are used to obtain data or receive thread tasks from other processing devices, and execute specified process processing operations, and transmit the execution results to other processing devices through I / O interfaces.
[0192] When the process processing device includes multiple processors, the multiple processors can be connected and transmit data through a specific structure.
[0193] Among them, multiple processors are interconnected and transmit data through a fast peripheral device interconnection bus PCIE bus. Multiple processors share the same control system or have their own control systems. Multiple processors share memory units or have their own memory units. The interconnection mode of multiple processors is any interconnection topology. The process processing device has high compatibility and can be connected to various types of servers through a PCIE interface.
[0194] In some embodiments, Figure 8 A schematic diagram of a combined processing device provided in an embodiment of the present application is shown in FIG. Figure 8 As shown, the combined processing device includes the process processing device as mentioned above, a universal interconnection interface and other processing devices.
[0195] The process processing device interacts with other processing devices to jointly complete the operations specified by the user.
[0196] The above-mentioned combined device can be used as a system for smart devices such as mobile phones, robots, and drones, effectively reducing the core area of the control part, improving the processing speed, and reducing the overall power consumption.
[0197] In some embodiments, Fig. 9 A schematic diagram of a chip provided in an embodiment of the present application Figure 1 ,like Fig. 9 As shown, the chip includes the process processing device as described above.
[0198] In one example, the chip includes at least one of the above-mentioned process processing devices.
[0199] In some embodiments, Fig.10 A schematic diagram of a chip provided in an embodiment of the present application Figure 2 ,like Fig.10 As shown, the chip includes the combined processing device as described above.
[0200] In one example, a chip includes at least one of the above-mentioned combined processing devices.
[0201] In some embodiments, Fig.11 A schematic diagram of a chip provided in an embodiment of the present application Figure 3 ,like Fig.11 As shown, the chip includes the process processing device as described above and the combination processing device as described above.
[0202] In one example, the chip includes at least one process processing device and at least one combination processing device. The process processing device and the combination processing device may or may not exchange data.
[0203] In some embodiments, Fig.12 A schematic diagram of a board provided in an embodiment of the present application is shown as follows: Fig.12 As shown, the board includes the chip as described above.
[0204] In one example, at least one chip is disposed in the board.
[0205] In some embodiments, Fig.13 A schematic diagram of an electronic device provided in an embodiment of the present application Figure 1 , Fig.14 A schematic diagram of an electronic device provided in an embodiment of the present application Figure 2 , Fig.15 A schematic diagram of an electronic device provided in an embodiment of the present application Figure 3 ,like Figure 13-Figure 15 As shown, the present application provides an electronic device, the electronic device includes the chip as described above or the board as described above, or the electronic device includes the chip as described above and the board as described above.
[0206] Among them, the electronic device includes: a data processing device, a robot, a computer, a printer, a scanner, a tablet computer, a smart terminal, a mobile phone, a driving recorder, a navigator, a sensor, a camera, a cloud server, a camera, a camcorder, a projector, a watch, a headset, a mobile storage, a wearable device, a vehicle, a household appliance, and / or a medical device.
[0207] The above-mentioned means of transportation include airplanes, ships and / or vehicles; the above-mentioned household appliances include televisions, air conditioners, microwave ovens, refrigerators, rice cookers, humidifiers, washing machines, electric lights, gas stoves, and range hoods; medical equipment includes magnetic resonance imaging, ultrasound machines and / or electrocardiographs.
[0208] Reference to "embodiment" in this application indicates that a particular feature, structure, or characteristic described in conjunction with the embodiment may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments.
[0209] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A process processing method, characterized in that: include: When it is determined that the user running state initiates a first process to access the critical region, and / or when it is determined that the kernel running state initiates a second process to access the critical region, determining whether the critical region is being accessed by other processes; If it is determined that the critical area is not being accessed by other processes, allowing the first process or the second process to access the critical area; Determining whether the critical area is being accessed by other processes includes: Calling an atomic operation, and using the atomic operation to detect a value of a preset configuration parameter; If the atomic operation is used to determine that the value of the configuration parameter is a preset value, it is determined that the critical region is not being accessed by other processes; If the value of the configuration parameter is determined by using the atomic operation to be not a preset value, it is determined that the critical region is being accessed by other processes; After allowing the first process or the second process to access the critical area, the method further includes: When allowing the first process to access the critical area, using the atomic operation to set the value of the configuration parameter to the process identifier of the first process; When the second process is allowed to access the critical area, the value of the configuration parameter is set as the process identifier of the second process using the atomic operation.
2. The method according to claim 1, characterized in that The method further comprises: If it is determined that the critical region is being accessed by other processes, then wait for the other processes to exit the critical region, and when it is determined that the other processes exit the critical region, allow the first process or the second process to access the critical region.
3. The method according to claim 1, characterized in that Using the atomic operation to set the value of the configuration parameter as the process identifier of the first process includes: Adopting the atomic operation and using the virtual address of the user running state, setting the value of the configuration parameter in the memory unit to the process identifier of the first process; Using the atomic operation to set the value of the configuration parameter as the process identifier of the second process includes: The atomic operation is adopted to set the value of the configuration parameter in the memory unit as the process identifier of the second process using the virtual address of the kernel running state.
4. The method according to claim 1, characterized in that After using the atomic operation to set the value of the configuration parameter as the process identifier of the first process, the method further includes: When determining that the first process exits the critical region, using the atomic operation to set the value of the configuration parameter to the preset value; After using the atomic operation to set the value of the configuration parameter as the process identifier of the second process, the method further includes: When it is determined that the second process exits the critical region, the value of the configuration parameter is set to the preset value by using the atomic operation.
5. The method according to any one of claims 1 to 4, characterized in that: Allowing the first process or the second process to access the critical area includes: Determine the initiation time of the first process and the initiation time of the second process; when the initiation time of the first process is earlier than the initiation time of the second process, allow the first process to access the critical area, and when the initiation time of the second process is earlier than the initiation time of the first process, allow the second process to access the critical area; Alternatively, the first process has a priority, and the second process has a priority; the process with the highest priority between the first process and the second process is allowed to access the critical area.
6. The method according to any one of claims 1 to 4, characterized in that: The method further comprises: When an abnormal process exit is detected, an atomic operation is called; When the value of the preset configuration parameter detected by the atomic operation is the process identifier of the process that has abnormally exited, the value of the configuration parameter is set to the preset value by the atomic operation.
7. A processor, characterized in that: The processor comprises: A first determining unit, configured to determine whether the critical region is being accessed by other processes when determining that the user running state initiates the first process to access the critical region and / or determining that the kernel running state initiates the second process to access the critical region; a second determining unit, configured to allow the first process or the second process to access the critical region if it is determined that the critical region is not being accessed by other processes; The first determining unit includes: A detection module, used for calling an atomic operation and using the atomic operation to detect a value of a preset configuration parameter; A first determination module, configured to determine that the critical region is not being accessed by other processes if the value of the configuration parameter is determined to be a preset value by using the atomic operation; A second determination module, configured to determine that the critical region is being accessed by other processes if the value of the configuration parameter determined by the atomic operation is not a preset value; The processor further includes: a first configuration unit, configured to, after the second determination unit allows the first process or the second process to access the critical region, use the atomic operation to set the value of the configuration parameter to the process identifier of the first process when the first process is allowed to access the critical region; Alternatively, the second configuration unit is used to set the value of the configuration parameter to the process identifier of the second process by using the atomic operation when allowing the second process to access the critical area after the second determination unit allows the first process or the second process to access the critical area.
8. The processor according to claim 7, characterized in that The processor further includes: The third determining unit is configured to wait for the other process to exit the critical region if it is determined that the critical region is being accessed by other processes, and allow the first process or the second process to access the critical region when it is determined that the other process exits the critical region.
9. The processor according to claim 7, characterized in that: The first configuration unit is specifically used for: Adopting the atomic operation and using the virtual address of the user running state, setting the value of the configuration parameter in the memory unit to the process identifier of the first process; The second configuration unit is specifically used to: The atomic operation is adopted to set the value of the configuration parameter in the memory unit as the process identifier of the second process using the virtual address of the kernel running state.
10. The processor according to claim 7, characterized in that The processor further includes: a third configuration unit, configured to, after the first configuration unit uses the atomic operation to set the value of the configuration parameter to the process identifier of the first process, and when it is determined that the first process exits the critical region, use the atomic operation to set the value of the configuration parameter to the preset value; The processor further includes: A fourth configuration unit is used to set the value of the configuration parameter to the preset value by using the atomic operation when it is determined that the second process exits the critical area after the second configuration unit uses the atomic operation to set the value of the configuration parameter to the process identifier of the second process.
11. The processor according to any one of claims 7 to 10, characterized in that: The second determining unit is specifically configured to: Determine the initiation time of the first process and the initiation time of the second process; when the initiation time of the first process is earlier than the initiation time of the second process, allow the first process to access the critical area, and when the initiation time of the second process is earlier than the initiation time of the first process, allow the second process to access the critical area; Alternatively, the first process has a priority, and the second process has a priority; the process with the highest priority between the first process and the second process is allowed to access the critical area.
12. The processor according to any one of claims 7 to 10, characterized in that: The processor further includes: A calling unit is used to call an atomic operation when an abnormal process exit is detected; The fifth configuration unit is used to use the atomic operation to set the value of the configuration parameter to a preset value when the value of the preset configuration parameter detected by the atomic operation is the process identifier of the process that has abnormally exited.
13. A process processing device, characterized in that: The process processing device comprises one or more processors as claimed in any one of claims 7 to 12, which are used to obtain data to be calculated and control information from other processing devices, and perform specified processing operations, and transmit the execution results to other processing devices through I / O interfaces; When the process processing device includes a plurality of the processors, the plurality of processors may be connected and transmit data through a specific structure; Wherein, the plurality of processors are interconnected and transmit data via a PCIE bus; the plurality of processors share the same control system or have their own control system; The multiple processors share a memory unit or have their own memory units.
14. A combined processing device, characterized in that: It includes the process processing device as claimed in claim 13, a universal interconnection interface and other processing devices; The process processing device interacts with the other processing devices to jointly complete the operation specified by the user.
15. A chip, characterized in that: The chip includes the process processing device as claimed in claim 13, or the chip includes the combined processing device as claimed in claim 14.
16. A board, characterized in that: The board includes the chip as claimed in claim 15.
17. An electronic device, characterized in that: The electronic device includes the chip as claimed in claim 15, or the electronic device includes the board as claimed in claim 16.
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