Power converter and period modulation control method thereof

Abstract

The present disclosure relates to a controller and a control method for controlling the output voltage of a resonant power converter, including controlling the power converter according to a control cycle. The control cycle includes an on-operating mode and an off-operating mode, wherein the on-operating mode generates a voltage Vo1 during a time period T_on, and the off-operating mode generates a voltage Vo2 during a time period T_off. The converter operates at a first selected switching frequency and generates Vo1 within an on-time T_on corresponding to a first selected number of switching cycles. The converter output voltage or input-output voltage can be sampled and used to determine the switching frequency of the on-operating mode and the duration of the off-operating mode. The final output voltage of the power converter is adjusted to a selected value based on the ratio of (T_on): (T_on+T_off). This embodiment can be applied to a wide input voltage range and provide a wide output voltage range, which is compatible with devices such as mobile phones, tablets, and laptops.

Description

Technical Field

[0001] The present invention relates to a controller for a power converter. More particularly, the present invention relates to a controller and a control method for enabling a power converter (eg, a resonant power converter) to operate in a wide input voltage range and a wide output voltage range. Background Art

[0002] The USB Power Delivery (USB-PD) standard was introduced to address the issue of incompatible output voltage levels for power adapters used in mobile phones, tablets, and laptops. A PD-compatible power adapter converts universal AC voltage to DC voltage and provides an adjustable output voltage between 5V and 20V for portable devices such as mobile phones, tablets, and laptops. The power adapter communicates with the device being charged (such as a laptop, tablet, or mobile phone) and generates the required output voltage level to match the device's needs. Therefore, the same power adapter can be used for multiple USB-PD-compatible devices.

[0003] Resonant converters are ideal for implementing USB-PD chargers because they offer features such as zero voltage switching (ZVS) and high switching frequency operation, which can reduce the overall size of the power adapter. This is especially true when using switching devices such as GaN (gallium nitride) switches, which can achieve high efficiency and small size in power adapter applications.

[0004] However, to achieve an output voltage range of 5V to 20V, the resonant converter's switching frequency must vary over a wide range (e.g., a ratio of 3:1 or higher), which is detrimental to design. If the voltage gain variation is designed to be wide, performance (e.g., efficiency, power density, etc.) will degrade. For example, with an input voltage of 200V DC, if the output voltage is 5V, the required voltage gain is 0.025 (5V / 200V). If the output voltage is 9V, the required voltage gain is 0.045 (9V / 200V). If the output voltage is 20V, the required voltage gain is 0.1 (20V / 200V). In other words, the resonant converter's voltage gain variation must vary between 0.025 and 0.1, or within a range of 4:1 for a fixed input voltage of 200V DC. If input voltage variation is taken into account, the required voltage gain variation becomes even higher. In this case, the resonant converter must operate over a very wide frequency range, sacrificing efficiency and power density.

[0005] In addition to USB-PD applications, several other applications also require a very wide voltage gain variation range. One example is the DC-DC converter of the electric vehicle (EV) power system. This DC-DC converter is typically designed to accommodate an output voltage level of 9V to 16V and an input voltage level of 240V to 430V. Therefore, the highest voltage gain requirement of the DC-DC converter is 16V / 240V=0.067, while the lowest voltage gain requirement is 9V / 430V=0.021. In this case, the required voltage gain variation range is 0.021 to 0.067, or a variation range of 3.2:1. This is also a very challenging requirement for resonant converters. In order to maintain such a wide voltage gain variation range, the design of the resonant converter is affected and efficiency cannot be optimized. Summary of the Invention

[0006] The present disclosure provides a power converter and a period modulation control method thereof to address the deficiencies of the related art.

[0007] According to a first aspect of an embodiment of the present disclosure, there is provided a method for controlling an output voltage of a resonant power converter, the method comprising:

[0008] Controlling the power converter according to a control period Tcontrol, the control period comprising an on-operation mode with a duration T_on and an off-operation mode with a duration T_off;

[0009] controlling the power converter according to a control period Tcontrol, the control period including a duration T_on in an on-operation mode and a duration T_off in an off-operation mode;

[0010] Based on the ratio of (T_on):(T_on+T_off), the output voltage Vo of the power converter will be adjusted to a corresponding selected value.

[0011] In one embodiment, the method includes generating a first voltage Vo1 during a duration T_on and generating a second voltage Vo2 during a duration T_off.

[0012] In one embodiment, the method includes generating a first voltage Vol during a duration T_on using a first switching frequency and generating a second voltage Vo2 during a duration T_off using a second switching frequency.

[0013] In one embodiment, the first switching frequency Vo1 is greater than the second switching frequency Vo2.

[0014] In one embodiment, the method comprises: selecting a minimum value T_off_min within the duration T_off, wherein T_off_min is less than 25% of the control period Tcontrol.

[0015] In one embodiment, the minimum value T_off_min of the duration T_off is 0.

[0016] In one embodiment, the duration T_on is equal to a first selected number of switching cycles N1 , where one switching cycle is 1 / Fs1 .

[0017] In one embodiment, the control period Tcontrol only includes an on-mode operation of duration T_on.

[0018] In one embodiment, the method includes shutting down the power converter during a second selected number of switching cycles corresponding to a time period T_off.

[0019] In one embodiment, the method includes adjusting the switching frequency during the turn-on mode of operation.

[0020] In one embodiment, the method includes using at least a first switching frequency and a second switching frequency during the turn-on mode of operation.

[0021] In one embodiment, the method includes: sampling an input voltage and an output voltage of a converter;

[0022] The switching frequency during the duration T_on and the number of switching cycles corresponding to the duration T_on are selected using the sampled input voltage and output voltage; and the duration T_off is selected using the output voltage sampling.

[0023] In one embodiment, the method includes: sampling an input voltage and an output voltage of a converter; selecting a switching frequency during a duration T_on and a number of switching cycles corresponding to the duration T_on using the sampled input voltage and output voltage; and selecting a duration T_off using the sampled input voltage and output voltage.

[0024] In one embodiment, the method includes: sampling an input voltage and an output voltage of the converter; selecting a number of switching cycles corresponding to a T_on period using the sampled input and output voltages; and selecting a switching frequency and a duration T_off during the T_on period using the sampled output voltage.

[0025] In one embodiment, the method includes: sampling the input voltage and output voltage of the converter; using the sampled input voltage and output voltage to select the number and duration T_off of switching cycles during T_on; and using the sampled output voltage to select the switching frequency during T_on.

[0026] In different embodiments, the power converter may be a parallel resonant converter, a series resonant converter, an LLC resonant converter or an LCC resonant converter.

[0027] According to another aspect of the present invention, a controller for a power converter is provided, wherein the controller uses the method described in the present invention.

[0028] In one embodiment, the controller may be implemented in digital technology. In different implementations, the power converter may be a parallel resonant converter, a series resonant converter, an LLC resonant converter or an LCC resonant converter.

[0029] According to another aspect of the present invention, a power converter is provided, comprising a controller according to the present invention. In various embodiments, the power converter can be a parallel resonant converter, a series resonant converter, an LLC resonant converter, or an LCC resonant converter. In various embodiments, the power converter provides an output voltage compatible with a variety of devices, such as mobile phones, tablet computers, and laptop computers.

[0030] The technical solutions provided by the embodiments of the present disclosure may have the following beneficial effects:

[0031] As can be seen from the above embodiments, the solution provided by the embodiments of the present disclosure can control the power converter according to the control period Tcontrol, which includes an on-operating mode with a duration of T_on and an off-operating mode with a duration of T_off; sampling the output voltage of the power converter, and using the sampled output voltage to select the switching frequency Fs1 in the on-operating mode, the number of switching cycles first selected corresponds to the duration T_on and the duration T_off; wherein the output voltage Vo of the power converter is adjusted to the desired value based on the ratio of (T_on): (T_on + T_off). This embodiment can be applied to a wide input voltage range and provides a wide output voltage range, compatible with devices such as mobile phones, tablets, and laptops.

[0032] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0034] FIG1A is a schematic diagram of a half-bridge parallel resonant converter (PRC) based on the prior art.

[0035] FIG1B is a schematic diagram of a full-bridge parallel resonant converter based on the prior art.

[0036] FIG. 2 shows waveforms of the conventional parallel resonant converter shown in FIG. 1A .

[0037] Figure 3 1 is a schematic diagram showing an output voltage Vrec waveform and switching frequency control for implementing power cycle modulation using a parallel resonant converter according to an exemplary embodiment, wherein N1=2 and N2=1.

[0038] Figure 4 1 is a schematic diagram illustrating an output voltage Vrec waveform and switching frequency control according to an exemplary embodiment, wherein the output voltage Vrec waveform and switching frequency control are used for a parallel resonant converter to implement power cycle modulation, wherein N1=2 and N2=1, and Vo2 is set to zero.

[0039] Figure 5 The present invention is a schematic diagram illustrating an output voltage Vrec waveform and switching frequency control according to an exemplary embodiment, wherein the output voltage Vrec waveform and switching frequency control are used for a parallel resonant converter to implement power cycle modulation, wherein different switching frequencies are used during an on-state operation mode.

[0040] Figure 6 The output voltage Vrec waveform and switching frequency control schematic diagram are shown according to an exemplary embodiment, which are used for a parallel resonant converter to implement power cycle modulation, wherein the T_off time is variable.

[0041] Figure 7A (A, top) is a schematic diagram showing adjustment of different input voltages Fs1 with higher input voltages and higher switching frequency Fs1A according to an exemplary embodiment;

[0042] Figure 7B (B, lower figure) is a schematic diagram showing different input voltage Fs1 adjustments with a lower input voltage Vin2 < Vin1 and a lower switching frequency Fs1B < Fs1A according to an exemplary embodiment.

[0043] Figure 8 is a block diagram illustrating an implementation of a power cycle modulation control method according to an exemplary embodiment.

[0044] Figure 9 3 is a schematic diagram showing three switching cycles during an on-mode (N1=3) according to an exemplary embodiment.

[0045] Figure 10A 10B and 10C are schematic diagrams of a control strategy for outputting a voltage of 20V when the input voltage is (A) 400V, (B) 300V, and (C) 200V, respectively, according to an exemplary embodiment.

[0046] Figure 11 The diagram is a schematic diagram showing a control strategy for an output voltage of 15V and an input voltage of 400V according to an exemplary embodiment.

[0047] Figure 12 The diagram is a schematic diagram showing a control strategy for an output voltage of 12V and an input voltage of 400V according to an exemplary embodiment.

[0048] Figure 13 FIG. 1 is a schematic diagram showing a control strategy for an output voltage of 9V and an input voltage of 400V according to an exemplary embodiment.

[0049] Figure 14 FIG. 1 is a schematic diagram showing a control strategy for an output voltage of 5V and an input voltage of 400V according to an exemplary embodiment.

[0050] Figure 15 1 is a schematic diagram showing a control strategy for an output voltage of 20V and an input voltage of 400V according to an exemplary embodiment, wherein the switching frequency Fs1 is constant.

[0051] FIG16 is a schematic diagram of an LCC resonant converter based on prior art.

[0052] FIG17 is a schematic diagram of a series resonant converter based on prior art.

[0053] Figure 18 The diagram is a full-load operation diagram of a series resonant converter under power cycle modulation control according to an exemplary embodiment.

[0054] Figure 19 The figure is a schematic diagram showing the operation of a series resonant converter controlled by power cycle modulation under T_off time regulation according to an exemplary embodiment.

[0055] Figure 20 The present invention is a schematic diagram showing setting the average load current to achieve peak efficiency during the turn-on operation mode of a series resonant converter according to an exemplary embodiment.

[0056] Figures 21A-21Eis a block diagram of a power cycle modulation control circuit based on different embodiments according to an exemplary embodiment.

[0057] Figure 22 The diagram is a schematic diagram showing an output current of a series resonant converter controlled by power cycle modulation under the working conditions of Vin=200V, Vo=20V and 50% of full load according to an exemplary embodiment.

[0058] Figure 23 The diagram shows an output current diagram of a series resonant converter controlled by power cycle modulation under the working conditions of Vin=200V, Vo=5V and 50% of full load according to an exemplary embodiment, wherein a higher switching frequency is used to limit the resonant current.

[0059] FIG24 is a schematic diagram of an LLC resonant converter based on prior art.

[0060] Figure 25 The figure shows a full-load operation schematic diagram of a power cycle modulation controlled LLC resonant converter according to an exemplary embodiment.

[0061] Figure 26 The figure shows an output current diagram of an LLC resonant converter with T_off time adjustment under power cycle modulation control according to an exemplary embodiment.

[0062] Figure 27 This is a circuit diagram of a power cycle modulation implementation scheme of a parallel resonant converter obtained using PSIM simulation software.

[0063] Figure 28 For simulation Figure 27 The key waveforms of the power cycle modulation control used to generate 9V output are given.

[0064] Figure 29 For simulation Figure 27 The key waveforms of the power cycle modulation control used to generate the 15V output are given.

[0065] Figure 30 For simulation Figure 27 The key waveforms of the power cycle modulation control used to generate 5V output are given.

[0066] Figure 31 For simulation Figure 27 The energy feedback waveform of power cycle modulation control at 9V output is given.

[0067] Figure 32A For simulation Figure 27 The control waveform of the extended on-time under power cycle modulation control at 9V output is given.

[0068] Figure 32B For simulation Figure 27 The Vds1 and Vds2 waveforms of the MOSFET are given at 5V output.

[0069] Figure 33 For simulation Figure 27 The asymmetric switching mode in Figure 1 shows the Vds1 and Vds2 waveforms of the MOSFET at 5V output.

[0070] Figure 34 For simulation Figure 27 The key waveforms of the asymmetrical switching mode at 9V output are given.

[0071] Figure 35 FIG. 4 is a general circuit diagram illustrating an implementation of selecting Fs1 and T_off based on converter output voltage sampling according to an exemplary embodiment.

[0072] Figure 36 is a simplified implementation circuit diagram showing selection of Fs1 and T_off based on converter output voltage sampling according to an exemplary embodiment. DETAILED DESCRIPTION

[0073] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, like numbers in different figures represent like or similar elements unless otherwise indicated. The exemplary embodiments described below are not intended to represent all embodiments consistent with the present disclosure. Rather, they are merely examples of devices consistent with certain aspects of the present disclosure, as detailed in the appended claims.

[0074] Based on the overall concept of the present invention, a power cycle modulation (PCM) control method is proposed for controlling the output voltage of a resonant converter to provide a wide output voltage variation range (e.g., 5V to 20V) within a wide input voltage range (e.g., 120V to 220V), while having a narrow switching frequency variation range (e.g., less than 1.5:1) and achieving high-efficiency operation.

[0075] 1. Power cycle modulation control of parallel resonant converter

[0076] The general working mode of the PCM control described in the present invention is illustrated by taking a parallel resonant converter (PRC) as an example. In a PRC, the switching frequency Fs is used to control the output voltage. Different switching frequencies will generate different output voltages. Figures 1A and 1B show the circuit diagrams of traditional half-bridge and full-bridge resonant converters, respectively. Both topologies have primary-side resonant devices, including a series inductor Lr and a parallel capacitor Cr. The voltage Vcr across the parallel resonant capacitor Cr is rectified by synchronous rectifiers S1 and S2 on the secondary side and filtered by output filters Lo and Co. The converter output is equivalent to a voltage source and requires an output LC filter to generate a direct current (DC) output voltage Vout.

[0077] Figure 2 shows typical waveforms for a conventional half-bridge PRC circuit under switching frequency control. The top waveform is the gate drive signal Vgs1 for the top transistor Q1. The second waveform is the gate drive signal Vgs2 for the bottom transistor Q2. The third waveform is the resonant current Ires, and the bottom waveform is the input voltage Vrec across the output filters Lo and Co.

[0078] When the switching frequency changes, the voltage across the parallel capacitor Cr will change, and the average voltage of the rectified voltage Vrec on the secondary side will also change. The average value of Vrec is the output voltage because the average voltage across the filter inductor Lo is zero. When the switching frequency is Fs1, the peak value across the parallel capacitor Cr is VCr1, and the average voltage of the rectified voltage is Vrec1, which is the same as the output voltage Vo1. When the switching frequency is Fs2 (Fs2>Fs1), VCr2 will be less than VCr1, and the average value of the rectified voltage Vrec2<Vrec1, so Vo2=Vrec2<Vo1. Note that in order to achieve zero voltage switching, the switching frequency of the parallel resonant converter is higher than the resonant frequency.

[0079] Note that when the switching frequency is Fs1, the converter generates an output voltage of Vo1; and when the switching frequency is Fs2, the converter generates an output voltage of Vo2. In these cases, Fs1 is higher than Fs2 (i.e., Fs1>Fs2), and Vo1 is higher than Vo2 (i.e., Vo1>Vo2).

[0080] According to one embodiment, compared with the traditional PRC operation, the operation of the power cycle modulation resonant converter includes the following:

[0081] 1. The resonant converter operates at Fs1 for a preset number of switching cycles, i.e., operates at a switching frequency of Fs1 for N1 switching cycles; this operating mode is defined as the on-operation mode.

[0082] 2. At the end of switching cycle N1, the resonant converter operates at a switching frequency of Fs2 for another predetermined number of switching cycles, namely N2; this operation mode is defined as the shutdown operation mode.

[0083] 3. At the end of the off - mode operation, the resonant converter operates again in the on - mode operation.

[0084] 4. Repeat the above sequence. The waveforms (when N1 = 2 and N2 = 1) are as Figure 3 shown. In this case, the output voltage can be calculated as:

[0085] Vo = (N1 * Ts1 * Vol+N2 * Ts2 * Vo2) / Tcontrol (1)

[0086] where Tcontrol = N1 * Ts1+N2 * Ts2 is the duration of a complete control cycle. The power cycle ratio (PCR) is defined as:

[0087] PCR = N1 * Ts1 / Tcontrol (2)

[0088] Ts1 = 1 / Fs1 and Ts2 = 1 / Fs2. Ts1 and Ts2 are the switching periods of two switching frequencies. Note that Figure 3 the voltage waveform Vrec shown is the rectified voltage on the secondary side. Thus, N1 has four half - sine waveforms (corresponding to N1 = 2 switching periods), while N2 has two half - sine waveforms (corresponding to N2 = 1 switching period). It should be noted that in actual implementation, the waveform of Vrec is not a pure sine waveform. For simplicity of description, it is assumed to be a sine waveform in the present invention. However, this description and the results apply to the actual waveforms close to sine waves in actual implementation.

[0089] In addition, the average voltage during the switching period N1 is Vo1, and the average voltage during the switching period N2 is Vo2. The time interval of one control cycle is Tcontrol.

[0090] From the above equations (1) and (2), it is observed that the output voltage can be adjusted by adjusting the PCR. Assume a specific set of parameters of the parallel resonant converter is used in the present invention, Fs1 = 500 kHz (Ts1 = 2 us) and Fs2 = 1 MHz (Ts2 = 1 us), Vo2 = 0.25 * Vo1. Then, by choosing N1 = 2 and N2 = 1, the output voltage Vo can be calculated as:

[0091] Vo = (2 * 2 us * Vo1+1 * 1 us * 0.25 * Vo1) / (2 * 2 us+1 * 1 us)=0.85Vo1 (3)

[0092] Table 1 shows examples of output voltages for various N1 and N2 values. For the calculations, assume Vo2 = 0.25Vo1. In Table 1, T_on = N1 × Ts1, and T_off = N2 × Ts2. T_on is the time period during which the converter operates in on-mode when the switching frequency is Fs1. T_off is the time period during which the converter operates in off-mode when the switching frequency is Fs2.

[0093] Table 1. Calculated values of Vo at different N1 and N2 conditions when Vo2 = 0.25Vo1

[0094]

[0095]

[0096] In Table 1, N2=0 means that the converter is always in the on-mode, that is, the switching frequency is always Fs1.

[0097] For example, when N1=3 and N2=5, T_on=3*2us=6us, T_off=5*1us=5us, and the output voltage Vo=(Vo1*6us+0.25Vo1*5us) / (6us+5us)=0.66Vo1.

[0098] As can be seen from Table 1, the output voltage can be adjusted to 0.26 times Vo1, which means that by controlling the resonant converter at two discrete switching frequencies, the output voltage can be adjusted in a wide range from 0.26Vo1 to Vo1, with a variation range of about 4:1.

[0099] From the above analysis, it can be further known that the present invention expects to make Vo2 = 0 to further increase the variation range of the output voltage. This means that during the shutdown mode, the parallel resonant converter stops switching, that is, both Q1 and Q2 are turned off. Figure 4 The Vrec waveform is given under this working condition when N1=2 and N2=1.

[0100] In this case, the PCM control execution method can be described as follows:

[0101] 1. The resonant converter operates in an on-state operating mode with a switching frequency of Fs1 for a predetermined number of switching cycles, for example, N1 switching cycles.

[0102] 2. At the end of the on-mode operation, the resonant converter stops operating (operates in the off-mode operation) for another predetermined number of switching cycles, ie, N2 or T_off time period.

[0103] 3. At the end of the off-mode (after the T_off period), the resonant converter operates in the on-mode again (at a frequency of Fs1 for N1 cycles). This operation is repeated.

[0104] Note that during shutdown mode, the resonant converter consumes no power (or energy) from the input source. In the example of a half-bridge converter (e.g., Figure 1A), Q1 (the upper switch) is turned off (Q1's gate voltage is low) to meet this requirement (using no energy). The state of switch Q2 (the lower switch) can be set based on two conditions. The first condition is that Q2 is off (Q2's gate voltage is low). The second condition is that Q2 is on (Q2's gate voltage is high). That is, the gate voltage of Q1 is low and the gate voltage of Q2 is high. For a full-bridge control scheme, such as shown in Figure 1B, during shutdown mode, switches Q1 and Q3 are off, consuming no energy from the input source. In one embodiment, the operating condition for Q2 and Q4 is that both Q2 and Q4 are on (Q2 and Q4's gate voltages are high). Another possible condition is that both Q2 and Q4 are off (Q2 and Q4's gate voltages are low). Under actual operating conditions, the status of Q2 (half-bridge configuration) or Q2 and Q4 (full-bridge configuration) during the shutdown mode of operation does not affect the operation of the PCM control method embodiment.

[0105] The following description is based on a half-bridge converter, but the method is applicable to both half-bridge and full-bridge converters. Assuming that Fs1 = 500KHz and Vo = Vo1 in the on-mode, the converter will run N1 switching cycles with a switching period of 2us (Ts = Ts1, Ts1 = 1 / Fs1). When both Q1 and Q2 are turned off, it operates in the off-mode (or stop switching) for N2 switching cycles (also with Ts = Ts1 = 2us). In Table 2, T_on = N1 × Ts1, T_off = N2 × Ts1. T_on is the time the converter operates in the on-mode, and T_off is the time the converter operates in the off-mode. In the present invention, the term "stop switching" refers to the working state in which Q1 is disconnected during the off-mode, which lasts for one or more switching cycles. The output voltage can then be calculated using the following formula:

[0106] Vo=(N1*Ts1*Vo1) / Tcontrol (4)

[0107] Where Tcontrol = N1*Ts1+N2*Ts1. Table 2 shows examples of output voltages for different N1 and N2 values.

[0108] Table 2. Calculated values of Vo at different N1 and N2 conditions when Vo2 = 0

[0109]

[0110]

[0111] It can be seen that when the resonant converter operates at a fixed switching frequency (e.g., 500 kHz), the output voltage can be adjusted over a wide range. However, as noted in Tables 1 and 2, N1 and N2 are typically integers, and T_on and T_off are also discrete numbers. Therefore, the output voltage cannot be adjusted continuously. It can only be adjusted stepwise.

[0112] The output voltage Vo can be adjusted more accurately using the following method.

[0113] Method 1A: Adjust Fs1

[0114] In this method, the switching frequency (Fs1) is slightly adjusted during the on-mode operation (e.g., + / -3%, + / -5%, + / -7%, or + / -10%, etc.). As a result, Vo1 may vary slightly. For example, in the case of setting Vo2 = 0 in the off-mode operation (the resonant converter stops operating for N2 switching cycles), if it is assumed that a 1% reduction in frequency in the on-mode operation will increase the output voltage by 1%, then the output voltage can be adjusted by changing the switching frequency in the on-mode operation. Note that the output voltage increases when the switching frequency is reduced. Table 3 lists the output voltage variation range when N1 = 3 and N2 = 2 and Fs1 varies by + / - 5%.

[0115] Table 3. Changing the frequency to fine-tune the output voltage

[0116] Fs1% Fs1(KHz) Ts1(us) Vo1 Vo2 N1 N2 T_on(us) T_off(us) Vo -5％ 475 2.105 21.00 0 3 2 6.316 4.211 12.60 -4％ 480 2.083 20.80 0 3 2 6.250 4.167 12.48 -3％ 485 2.062 20.60 0 3 2 6.186 4.124 12.36 -2％ 490 2.041 20.40 0 3 2 6.122 4.082 12.24 -1％ 495 2.020 20.20 0 3 2 6.061 4.040 12.12 0％ 500 2.000 20.00 0 3 2 6.000 4.000 12.00 1％ 505 1.980 19.80 0 3 2 5.941 3.960 11.88 2％ 510 1.961 19.60 0 3 2 5.882 3.922 11.76 3％ 515 1.942 19.40 0 3 2 5.825 3.883 11.64 4％ 520 1.923 19.20 0 3 2 5.769 3.846 11.52 5％ 525 1.904 19.00 0 3 2 5.714 3.811 11.40

[0117] According to Table 3, if the switching frequency is 500KHz, the output voltage is 12V. When the switching frequency increases by 1%, the output voltage decreases by 1% to 11.88V, and vice versa. Therefore, the output voltage can be adjusted by changing the switching frequency.

[0118] Method 1B: Change Fs1 in open working mode

[0119] Another method is to use a slightly different switching frequency in the on-state operation mode. For example, in the on-state operation mode, the switching frequency of the first cycle can be set to Fs1, and the switching frequency of the second cycle can be set to Fs1A, such as Figure 5 The output voltage can then be regulated more precisely.

[0120] For example, reference Figure 5, Fs1=500kHz, Fs1A=505kHz. Assuming that when the switching frequency increases by 1%, the output voltage will decrease by 0.5%. Then calculate the output voltage as:

[0121] Vo=(Vo1*2us+1.005Vo1*2us / 0.99) / Tcontrol=4.03Vo1 / Tcontrol

[0122] Tcontrol=2us+2us / 0.99+2us=6.02us

[0123] Vo=0.6694Vo1 (5)

[0124] Note that in Figure 4 In the case shown, where Fs1 = 500kHz switching for 2 cycles (N1 = 2), T_on = 4us and T_off = 2us, the output voltage will be:

[0125] Vo=Vo1*2us*2 / 6us=0.6667Vo1 (6)

[0126] The difference between equations (5) and (6) is (0.6694-0.6667)Vo1=0.0027Vo1=0.27%Vo1.

[0127] Therefore, when the switching frequency in the same switching mode is slightly adjusted, the output voltage can be adjusted within an accuracy of 0.27% Vo1. Note that directly changing the switching frequency in the same switching mode is easily achievable using digital control such as a microcontroller unit (MCU).

[0128] Method 2: Adjust the shutdown mode time

[0129] Formula (4) can be rewritten as follows:

[0130] Vo=(N1*Ts1*Vo1) / (N1*Ts1+T_off) (7)

[0131] In equation (7), T_off refers to the time interval (or duration) that the converter is in the off mode of operation. Since T_off can be continuously adjusted, the output voltage Vo. Through digital control (such as MCU implementation), the time step accuracy from the MCU can be as low as 1 nanosecond (ns), so the output voltage can be adjusted very accurately, for example, 0.01% of the desired output voltage. This is sufficient to meet normal requirements. Note that the accuracy of the MCU time step is usually defined as LSB (least significant bit). In this example, LSB = 1ns.

[0132] Note that in this case, PCR is defined as:

[0133] PCR=T_on / (T_on+T_off)=T_on / Tcontrol (8.1)

[0134] T_on=N1*Ts1,Tcontrol=T_on+T_off (8.2)

[0135] Figure 6 The rectified voltage waveform Vrec with adjustment time T_off is given. It is observed that when the T_off time is changed, the average output voltage will also change.

[0136] Method 3. Adjust Fs1 and T_off simultaneously

[0137] To reduce costs, a more affordable MCU is needed. For lower-priced MCUs, the time step size (LSB) is typically larger, such as 16ns or 32ns. In this case, adjusting Fs1 and T_off can be used together to achieve precise output voltage regulation using this MCU. The following is an example.

[0138] Assume that (1) Fs1 = 500 kHz; (2) the LSB of the MCU is T_step = 16 ns; and (3) when the switching frequency increases by 1%, the output voltage decreases by 0.5%. Furthermore, assume that when the on-mode operation time is T_on = 8 us and the off-mode operation time is T_off = 8 us, the output voltage is Vo = 10 V. In other words, the on-mode operation runs for four switching cycles at a switching frequency of 500 kHz. Since the time intervals for the on-mode operation and the off-mode operation are the same, Vo1 in equation (7) is 20 V. The following formula describes this operating condition:

[0139] 10V=4*2us*20V / (4*2us+8us) (9)

[0140] If the T_off time is increased by 16ns (= 0.016us) without changing the switching frequency in the on-mode operation, the output voltage can be calculated as:

[0141] Vo_case1=4*2us*20V / (4*2us+8us+0.016us)=9.99V=10V*(1-0.1%) (10)

[0142] Therefore, when the shutdown mode time interval increases by one LSB of MCU, the output voltage will decrease by 0.1%.

[0143] Implemented by an MCU, the switching frequency is also generated from the MCU. At a switching frequency of 500 kHz and a 50% duty cycle, assuming zero dead time, Q1 (Figure 1A) will be on for 1 μs, and Q2 (Figure 1A) will be on for 1 μs. If the LSB = 16 ns, then Q1 is on for 1 μs + 16 ns = 1.016 μs, while Q2 is on for 1 μs + 16 ns = 1.016 μs. The switching frequency will then change from 500 kHz to 1 / (1.016 μs + 1.016 μs) = 492 kHz, or 1.6% lower than 500 kHz. In on-mode operation, Vo1 will increase by 0.8%, and Vo1 = 20 V * 1.008 = 20.16 V. In this case, T_on = 4 * (1.016 + 1.016) = 8.128 μs. If the T_off time is set to T_off = 8us + 16*16ns = 8.256us, or the T_off time is set to 8us plus 16LSB of the MCU clock period, the output voltage can be calculated as:

[0144] Vo_case2=8.128*20.16V / (8.128+8.256)=10.00125V=10V*(1+0.0125%) (11)

[0146] The above example shows that when Fsl is varied together with the T_off time, the output voltage can be adjusted very close to the ideal value with an error of less than 0.01%.

[0147] As can be seen from the two examples above, fine-tuning the output voltage can be achieved by adjusting the shutdown mode interval (or duration, T_off), by adjusting the switching frequency Fs1, or by adjusting both simultaneously. When changing the MCU by one LSB, assuming that a 1% change in switching frequency results in a 0.5% change in output voltage, the output voltage changes by 1.6% when using only Fs1. When T_off changes by one LSB, the output voltage changes by 0.1%, which is very accurate. When Fs1 and T_off are changed simultaneously, the output voltage error is less than 0.01%, which is sufficient to meet the output voltage regulation requirements in practical situations.

[0148] Note that MCUs with a 16ns LSB are typically low-cost MCUs. If the MCU's LSB is 1ns (many MCUs meet this specification), then changing one LSB will change the switching frequency from 500kHz to 1 / (1.001us + 1.001us) = 499.5kHz. The corresponding output voltage change will be 0.05%, which is very small.

[0149] It can be concluded that the present invention can achieve output voltage fine-tuning by adjusting the switching frequency during the on-mode operation or by adjusting the off-mode operation time interval T_off. Similarly, when both Fs1 and T_off are changed, the output voltage can be adjusted very accurately.

[0150] The above description is based on the assumption that time adjustment (or frequency adjustment) is implemented discretely by digital control. In an embodiment where analog circuits are used to implement circuit control, time adjustment is continuous. In this case, both Fs1 adjustment and T_off adjustment can be used to implement output voltage control.

[0151] A key feature of the PCM control method described above is that the time interval for the on-mode operation is an integer multiple of the switching period. The time interval for the off-mode operation can be independent of the switching period and can be any value determined based on control requirements. Of course, the off-mode time interval can also be an integer multiple of the switching period.

[0152] Dual-loop control method

[0153] In actual implementation, both the input voltage and the output voltage can have a large range of variation. For example, for power transmission (PD) applications, the input voltage can vary from 100V AC to 264V AC, and the output voltage can also vary from 5V to 20V. In order to reduce the current stress of the resonant converter (such as a parallel resonant converter), the present invention expects to use different switching frequencies Fs1 for different input voltages and use different T_off to adjust the output voltage. For example, in the case of a parallel resonant converter, when the input voltage is high, the switching frequency Fs1 can be selected to a higher value. When the input voltage is low, Fs1 can be selected to a lower value. In this way, the voltage across the resonant capacitor (such as capacitor Cr in Figure 1A) (Vcr, as shown in Figures 1A and 1B) remains relatively constant for different input voltages. The output voltage adjustment is then achieved by controlling the T off time interval.

[0154] Figure 7A and 7B The typical waveforms of Vrec corresponding to two different input voltages Vin1>Vin2 are given. The switching frequency (Fs1A) of Vin=VinA is higher ( Figure 7A ), the switching frequency (Fs1B) of Vin=Vinb is lower ( Figure 7B ). Therefore, the average voltage during the on-mode operation is roughly the same in both cases. To maintain the same PCR, as defined in equation (2), for Vin = VinA (T_off = T_off_A), the T_off time is shorter. For Vin = VinB (T_off = T_off_B), the T_off time is longer. As Figure 7A and7B As given, T_off_A<T_off_B.

[0155] Practical Considerations in Shutdown Mode

[0156] In the above analysis, it is assumed that during the shutdown mode, that is, immediately after the circuit enters the shutdown mode, the voltage VCr across Cr, or the equivalent rectified voltage Vrec, becomes zero. In actual implementation, due to the energy stored in the resonant inductor Lr and the resonant capacitor Cr, a low voltage will appear at the beginning of the shutdown mode, and the actual output voltage will be slightly higher than the value calculated above. However, because (1) the energy stored in the resonant device is much smaller than the energy stored in the output filter; and (2) the T_off time is used to accurately regulate the output voltage, the small voltage will not affect the operation of the PCM control method. Therefore, in the above analysis and the following analysis, it will be assumed that no energy is transferred to the output during the shutdown mode.

[0157] Implementation of Power Cycle Modulation (PCM) Control Method

[0158] In this embodiment, an implementation example of the above control strategy is described. In one example, digital control (e.g., using an MCU) is described. However, the control strategy can also be implemented using other digital controllers (e.g., field programmable gate arrays (FPGAs) and analog circuits).

[0159] For example, an MCU can be used, where Fs1 can be a linear or nonlinear function of Vin. When Vin increases, Fs1 increases. This can be achieved by comparing Vo with the reference voltage Vref ( Figure 8 The error voltage can be calculated using functions such as P (proportional), PI (proportional integral), or PID (proportional integral derivative), or other more complex functions. N1 can be generated based on the input voltage and output voltage.

[0160] According to one embodiment, Figure 8 Provided for implementation Figure 7A and Figure 7B The overall block diagram of the control circuit of the PCM control strategy is shown. Figure 8 During the on-mode operation, the input voltage Vin of the sampling converter (80) is sampled. s1Generator (82) determines the switching frequency Fs1 based on the input voltage. The output voltage Vout is regulated by a feedback loop, i.e., the T_off value, i.e., the time of the shutdown mode, is adjusted by T_off generator (84). In addition, N1 generator (86) determines the number of switching cycles N1 during the on mode based on both the input voltage and the output voltage. Logic gate circuit (88) receives signals corresponding to Fs1, T_off value, and N1, and generates gate drive signals Vgs_h and Vgs_1 for the upper and lower transistors (i.e., Q1 and Q2 in FIG1A ) of the converter (80).

[0161] The value of the switching period N1 during the on-mode period is determined by the control period Tcontrol. Note that the output filter of the converter is designed based on the control period Tcontrol. Figure 7A and 7B In the example shown, N1=2 is selected, and Figure 9 In the example, N1 = 3. N1 can be any value as needed. After selecting N1, T_on = Ts1 * N1, where Ts1 = 1 / Fs1, the switching period. T_off can then be determined based on the desired output voltage.

[0162] The gate logic block 88 is used to generate the gate drive signals to the resonant converter. Figure 8 The embodiment is for a half-bridge converter. Therefore, in the on-mode, the gate signals are complementary, 50 / 50, signals driving the upper and lower half-bridge switches. During the off-mode, the upper gate signal is low (Q1 is off), while the lower gate signal can be high (Q2 is on) or low (Q2 is off). Consequently, no energy is transferred to the resonant cavity. It will be apparent to one skilled in the art that other embodiments are also possible, such as for a full-bridge inverter.

[0163] In different embodiments, Fs1 is determined by Vin and Vout, or T_off is determined by Vin and Vout, or Fs1 and T_off are determined by Vin and Vout.

[0164] For different input voltage levels, the number of switching cycles can be different. For example, Figure 7A and 7B It can be seen that at higher input voltages, the switching frequency Fs1A is higher than Fs1B, and T_off_A is also shorter than T_off_B. Therefore, at higher input voltages, Tcontrol_A ( Figure 7A ) is shorter than the total control period of the lower input voltage Tcontrol_B ( Figure 7BTo make the total control period Tcontrol relatively consistent under different operating conditions, one approach is to increase the number of switching cycles during the on-mode operation, i.e., to use a larger N1, thereby increasing the off-mode operation time. Figure 9 Such an embodiment is given. In this case, the number of switching cycles during the on-mode operation is 3 (N1=3), and the off-time interval is increased accordingly. Since the switching frequency is the same, the average voltage of Vrec during the on-mode operation remains the same.

[0165] Example 1

[0166] The following PD power adapter is used as a design example to prove Figure 8 Advantages of the illustrated implementation embodiments are achieved.

[0167] Assumptions:

[0168] (1) The input voltage range is 200V to 400V.

[0169] (2) The output voltage should be regulated between 20 V and 5 V. The load current should be constant at 3 A.

[0170] (3) A parallel resonant converter is used as a power supply circuit.

[0171] (4) Select the power circuit parameters so that when Vin = 200 V, Fs = 500 kHz, and Vrec (average value) is 20 V. When Vin = 300 V, Fs = 600 kHz and Vrec (average value) = 20 V. When Vin = 400 V, Fs = 700 kHz and Vrec (average value) = 20 V.

[0172] (5) The converter is a half-bridge parallel resonant converter (as shown in Figure 1A), which is ideal and lossless.

[0173] In this example, the switching frequency Fs1 is controlled by the input voltage in the on-state mode, and the output voltage Vrec is controlled by the feedback loop that adjusts the T_off time period, as shown in FIG. Figure 8 shown.

[0174] Case 1: Vo = 20V

[0175] When Vin changes from 200 V to 400 V, the switching frequency Fs1 changes from 500 kHz to 700 kHz to maintain an average value of Vrec of 20 V, and then T_off is set to zero. In this case, the output voltage is regulated by controlling the switching frequency. Figure 10A 、 10B and 10C respectively describe the working conditions at Vin 400V, 300V and 200V.

[0176] Case 2: Vo = 15V

[0177] If switching frequency control is used, the switching frequency should be increased to above 700kHz to keep the average value of Vrec at 15V. Using PCM control, the switching frequency can be kept between 500 and 700kHz. By selecting N1=3 and a suitable T_off value, a 15V output voltage can be achieved. Figure 11 shown.

[0178] exist Figure 11 In the example, assuming the input voltage is 400 V, the switching frequency is 700 kHz, so that the average voltage of Vrec in the on-state mode is 20 V. The switching period Ts1 is Ts1 = 1 / 700 kHz = 1.43 μs.

[0179] T_on = 3 x 1.43 = 4.29 us. If T_off is selected as 1.43 us, the average output voltage will be 15V.

[0180] When the input voltage is other values, the switching frequency Fs1 will change according to the input voltage, and the T_off time can be adjusted to keep the output voltage at 15V.

[0181] This example shows that the input voltage is used to control the switching frequency and the T_off time is used to control the output voltage.

[0182] Case 3: Vo = 12V

[0183] In this case, the switching frequency is controlled by the input voltage via feedforward, and the output voltage is controlled by T_off via a feedback loop. Figure 12 For the operating waveform, assuming Vin = 400V, Fs1 = 700kHz (Ts1 = 1.43us), N1 = 3, and T_off = 2.86us, the average output voltage at the converter output will be 12V during steady-state operation.

[0184] When the input voltage is at other values, the switching frequency Fs1 is changed, and the T_off time is changed at the same time to keep the output voltage at 12V.

[0185] Case 4: Vo = 9V

[0186] In this case, the switching frequency is controlled by the input voltage via feedforward, and the output voltage is controlled by T_off via a feedback loop. Figure 13 For the operating waveform, assuming Vin = 400V, Fs1 = 700kHz (Ts1 = 1.43us), N1 = 3, and T_off = 5.69us, the average output voltage at the converter output will be 9V during steady-state operation.

[0187] When the input voltage is at other values, the switching frequency Fs1 is changed, and the T_off time is changed at the same time to keep the output voltage at 9V.

[0188] Case 5: Vo = 5V

[0189] In this case, the switching frequency is controlled by the input voltage via feedforward, and the output voltage is controlled by T_off via a feedback loop. Figure 14 The operating waveforms are given below. Assuming Vin = 400V, Fs1 = 700kHz (Ts1 = 1.43us), N1 = 3, and T_off = 12.9us, the average output voltage at the converter output will be 5V during steady-state operation.

[0190] When the input voltage is at other values, the switching frequency Fs1 is changed, and the T_off time is changed at the same time to keep the output voltage at 5V.

[0191] This example shows that when the input voltage varies between 200 and 400 V, the switching frequency can be limited to approximately 500 to 700 kHz to control the output voltage from 5 V to 20 V. Therefore, within the switching frequency range of 500 to 700 kHz, the output voltage gain can be changed by a factor of 8, from a maximum gain of 0.1 (= 20 V / 200 V) to 0.0125 (= 5 V / 400 V).

[0192] Note that the above analysis is approximate. In a practical implementation, T_off needs to be adjusted via a feedback control loop to maintain the desired output voltage. It should also be noted that in practical implementations, the input voltage feedforward control of the switching frequency Fs1 is not very precise, and the average voltage of Vrec may not be maintained at a constant value (such as the 20V discussed above) during turn-on operation. For example, Vrec may vary by 5% to 20% from the desired constant value, and in extreme cases, as much as 50%. However, this error can be compensated for through feedback control of T_off.

[0193] Another control method consists in keeping the switching frequency constant under all operating conditions. Then, under this condition, when the input voltage is Vin = 200 V, the average value of Vrec is kept at 20 V. For example, if the parameters stated above are used, the switching frequency will be 500 kHz.

[0194] Case 6: Vin = 400V, Vo = 20V

[0195] When the input voltage is Vin = 400 V and the switching frequency is maintained at Fs1 = 500 kHz, the average voltage across Vrec in the on-state operation mode will be 40 V. In this case, the T_off time should be introduced to keep the output voltage at 20 V. Figure 15The waveforms for this operating condition are shown. In this case, the switching frequency is independent of the input voltage and can be set to an ideal value based on the power supply circuit parameters. The output voltage can be adjusted by adjusting the off-cycle interval (T_off) and the number of switching cycles (N1) during the on-mode operating period.

[0196] Three control parameters

[0197] From the above description, we can see that three control variables can be used for closed-loop control. These are the number of switching cycles (N1) during the on-mode operation (T_on); the switching frequency (Fs1) during the on-mode operation; and the off-mode operation time interval (T_off). The following points can be observed:

[0198] Observation 1:

[0199] The number of switching cycles during the on-mode period can be determined based on the control period, Tcontrol. Since Fcontrol = 1 / Tcontrol, the larger Tcontrol is, the lower the control frequency Fcontrol is.

[0200] If N1 is changed without changing T_off, the output voltage of the resonant converter Vo will be different. Note that the resonant converter output voltage Vo is a DC voltage. The rectified voltage Vrec has the same DC value as Vo but contains high-frequency components. Therefore, when N1 is changed, T_off should also change.

[0201] Observation 2:

[0202] It is not critical to vary the off-frequency Fs1 very precisely for each input voltage. If Fs1 is varied in larger steps, such as from 500kHz to 505kHz to 510kHz (i.e., in 5kHz steps), the output voltage can still be regulated to the desired value by adjusting T_off through the feedback loop.

[0203] Observation 3:

[0204] If digital control is implemented using an MCU or other digital controller, T_off can be adjusted in very small time steps, such as 1ns or 16ns. Using T_off to precisely regulate the output voltage to the designed value is essential. In this case, "precisely" means the output voltage can be adjusted to within 0.1% of the desired value. For a 20V output, this means the output voltage can be adjusted to within 0.02V.

[0205] Observation 4:

[0206] The above analysis is based on a half-bridge parallel resonant converter, as shown in Figure 1A. The analysis and PCM control examples are also applicable to other types of resonant converters, such as an LCC (inductor-capacitor-capacitor) resonant converter, as shown in Figure 16. The analysis using the LCC converter yields the same results.

[0207] Realistic considerations

[0208] Note that the above analysis is based on ideal circuits and ideal conditions. In actual implementation, the following situations may occur:

[0209] (1) The voltage waveform VCr of the resonant capacitor may not be pure sinusoidal.

[0210] (2) In the on-state operating mode, the peak value of VCr in the first switching cycle may be lower than that in the second or third switching cycle.

[0211] (3) The resonant cavity of the resonant converter may continue to resonate during the shutdown mode period, so a small amount of energy may still be transferred to the output in the shutdown mode.

[0212] (4) Other non-ideal working conditions may exist.

[0213] The consequence of this non-ideal situation is that the average voltage in the on-state operation mode will be slightly different from the ideal value. However, under non-ideal operating conditions, the T_off value is adjusted by the output voltage feedback loop, as shown in Figure 8 As shown, the output voltage can still be maintained at the desired value.

[0214] 2. Power cycle modulation control of series resonant converter

[0215] The power cycle modulation (PCM) described above can also be applied to a series resonant converter (SRC, Figure 17). Note that for an SRC, the resonant current Ires is rectified and fed into the output filter (capacitor Co). The output of the resonant tank acts as a current source. The rectified current Irec is fed into the output capacitor and the load. Irec is the rectified current of the resonant current Ires, as shown in Figure 17. In the figure, diodes D1 and D2 are used to rectify the AC current to DC, as shown. MOSFETs can also be used to implement synchronous rectifiers.

[0216] Figure 18 The rectified current waveform Irec of the PCM-controlled SRC under full load conditions is shown in Figure 1. In this case, in order to provide the maximum output current, the SRC operates all the time, and the time period T_off in the shutdown mode is zero. In this way, the average value of Irec is the DC full load current, as shown in Figure 1. Figure 18 shown.

[0217] When the load current decreases, the conventional method of controlling SRC is to increase the switching frequency to reduce the average current of Irec. Figure 19 As shown in FIG, PCM control can be used by introducing a shutdown mode. Similar to the PCM control applied to PRC as described above, the operation of the SRC under PCM control is divided into two operating modes, an on mode and a off mode. During the on mode, the SRC operates at a switching frequency Fs1 for N1 switching cycles. For example, for Figure 19 In the T_on period shown, N1=2, two switching cycles are operated. During the shutdown mode of operation, the SRC is turned off during the T_off period.

[0218] In the on-state operating mode, the average rectified current is Io1. In the off-state operating mode, Irec is zero. Therefore, the average output current Io can be calculated as:

[0219] Io=Io1*T_on / (T_on+T_off)=Io1*T_on / Tcontrol (12)

[0220] Similar to the above control method, the switching frequency Fs1 can be adjusted according to the change of the input voltage, and the time interval T_off of the off-cycle operation can be adjusted according to the change of the output voltage / output current.

[0221] Since the output of the SRC is equivalent to a current source and the power supply usually provides a constant voltage, the output current can be adjusted by changing the T_off time according to equation (12). For example, under full load conditions, the output current is high and the T_off value can be set to zero to provide maximum current. When the output current is 66%, the T_off time can be adjusted to 1 / 3 of the T_on value through the feedback loop. Therefore, the output current will be 2 / 3 of the full load current, as shown in Figure 19 shown.

[0222] A PCM implementation method of SRC is as follows:

[0223] (1) Switching frequency The switching frequency Fs1 in the on-state operating mode is controlled by the input voltage.

[0224] (2) For full load or near full load operation (e.g., 70% of full load), the shutdown mode is not introduced, and the switching frequency is used to adjust the output voltage under different load currents. Based on the above situation (1), when the load current is at or near full load, the switching frequency Fs1 is adjusted to control the output voltage when the input voltage changes.

[0225] (3) When the load current is lower than the full load current, for example, about 50% to 70% of the full load current, the shutdown mode is introduced. In this case, the switching frequency Fs1 can be selected so that the average Irec current value in the on-mode is the full load current (I_FL), Io1 = I_FL, as shown in Figure 19 shown.

[0226] (4) A special case of the above case (3) is that since the maximum efficiency point of the power converter is usually designed to be achieved under approximately 70% full load current conditions, when the load current is less than 70% (for example, 35%), the switching frequency Fs1 in the on-mode can be selected to be Fs1 = Fs1A, corresponding to providing 70% of the load current (Io1a = 0.7*I_FL). The off-mode time (T_off) can then be adjusted through the feedback loop to generate the required load current. This allows a nearly flat efficiency curve to be maintained over a wide load current range. Figure 20 The relevant waveforms are shown, where I_FL refers to the full-load current. In this case, switching frequency control is used for input voltage variations and load currents between 70% and 100% of full load. That is, under these conditions, T_off is zero. When the load current is below the peak efficiency current (e.g., 70%), PCM modulation is used, and the average current value of Irec in the on-state operating mode is set to 70% of the full-load current, and T_off is introduced to regulate the output current.

[0227] It should be noted that the above description provides only one possible strategy for implementing a power cycle modulation (PCM) control strategy. One benefit of PCM control is that the output voltage or current can be varied over a wide range while maintaining a relatively small switching frequency range. Therefore, the switching frequency (Fs1) in the on-state mode can be selected to meet specific design requirements.

[0228] Figure 8 The control circuit block diagram can also be used to implement PCM control for SRC. One difference is that if the average output current generated by PCM control is higher than the load current of the SRC, the output voltage will increase, and then the T_off time will also be increased to reduce the average output current, thereby reducing the output voltage so that the output voltage is regulated to its desired value.

[0229] Expanded to a wide range of output voltage variations

[0230] As mentioned above, in PD applications, the output voltage needs to vary from 5V to 20V (a wide range) to accommodate a variety of devices. In addition, the input voltage may also vary (for example, from 120V to 220V). When SRC is used in PD controller design, the resonant current will depend on both the input voltage and the output voltage.

[0231] For example, the reflected voltage at the transformer's primary winding (W1 in Figure 17) will differ (by a factor of four) for 20V and 5V outputs. That is, the reflected voltage at the primary winding when Vo = 20V is four times greater than when Vo = 5V. Therefore, the switching frequency in the on-state mode should be adjusted based on both Vin and Vo.

[0232] The control strategy may include a feedforward control loop and / or a feedback control loop, such as Figures 21A to 21E According to one embodiment, Figure 21A A control circuit block diagram with three control loops is shown. One loop generates Fs1 based on the input and output voltages. One implementation of this loop uses Vin as a feedforward to select the value of Fs1, and then uses Vo to further adjust the actual Fs1. For example, if based on the Vin value, the switching frequency can be 500kHz. If the output voltage is 5V in this case, the actual switching frequency will be increased by some percentage, such as 40%, to reduce the resonant current. Note that when the output voltage is low, the reflected voltage of the transformer primary winding (W1) is also low, while the resonant current is high. To limit the resonant current, the switching frequency should be increased.

[0233] Figure 22 and Figure 23 Two different working conditions are given to illustrate the above control strategy. Figure 22 The working conditions are Vin=200V, Vo=20V, Figure 23 The operating conditions are Vin = 200 V, Vo = 5 V. In both cases, the load current is 50% of the full load.

[0234] exist Figure 22 In the example, assuming a switching frequency of 500kHz and an average current Irec in the on-state mode equal to the full-load current (I_FL), the required T_off is the same as T_on.

[0235] When the output voltage is 5V, if the switching frequency is kept at 500kHz, the reflected voltage of the transformer primary winding (W1) is low and the resonant current will also be high. To limit the resonant current, assume that (1) the switching frequency is increased to 700kHz (for example), and (2) the average current Irec (in the on-state operating mode) is 1.1 times the full-load current. Then adjust T_off to about 1.2 times T_on, that is, T_off = 1.2*T_on, so that the output current remains at half of the full load. In both cases, the number of switching cycles in the on-state operating mode is still 3, N1 = 3. Note that when N1 = 3, the number of half cycles is 3×2 = 6, as shown in Figure 22 shown.

[0236] The second loop is the N1 generation loop. This can be determined by the input voltage and output voltage. The selection method is similar to Figure 8 The control block diagram is shown.

[0237] The third loop is the feedback loop, which is used to adjust the T_off time to regulate the output voltage.

[0238] All three loops work together to generate the required power cycle ratio (PCR), as defined by equation (8.1), to maintain the output voltage at the desired value.

[0239] Figures 21B to 21E This is a control strategy block diagram based on other implementations. Figure 21B In the embodiment, the input voltage and the output voltage are used to select the switching frequency Fs1, T_off time and N1. Figure 21C In the embodiment of , the input voltage and the output voltage are used to select N1, and the output voltage is used to select the switching frequency Fs1 and the T_off time. Figure 21D In the embodiment of , the input voltage and the output voltage are used to select the T_off time and N1, and the output voltage is used to select the switching frequency Fs1. Figure 21E In the embodiment, the output voltage is used to select T_off time, N1 and switching frequency Fs1.

[0240] Extension to LLC resonant converter

[0241] The LLC (Inductor-Inductor-Capacitor) resonant converter (as shown in Figure 24) is a widely used converter. The LLC converter uses a parallel resonant inductor, Lp. Therefore, the primary current of the transformer is the difference between the resonant current and the Lp current, and the rectified current Irec is discontinuous, such as Figure 25 As shown. Figure 25 It can be seen that the LLC converter's rectified current, Irec, has a very short dead time. During this dead time, the primary resonant current is equal to the parallel resonant inductor current, and the transformer primary current is zero. Therefore, the secondary rectified current (Irec) is also zero.

[0242] Power cycle modulation with T_off adjustment time can also be applied to LLC converters, such as Figure 26 shown.

[0243] exist Figure 26 In the on-mode operation, the LLC converter will provide an average output current Io1. In the off-mode operation, there is no current output. Therefore, the average output current can be calculated as:

[0244] Io=Io1*T_on / Tcontrol=Io1*T_on / Tcontrol=Io1*PCR (13)

[0245] This is the same as the case of a series resonant converter.

[0246] Overview of Power Cycle Modulation

[0247] Based on the above analysis, it can be concluded that using the PCM control method described in the present invention, the converter's output voltage can be adjusted by three parameters. The first parameter is the number of switching cycles N1 when the converter is in the on-mode. The second parameter is the switching frequency Fs1 when the converter is in the on-mode. The third parameter is the time T_off when the converter is in the off-mode. Under certain conditions, T_off may be zero. The output voltage can be adjusted by Fs1, T_off, or both Fs1 and T_off.

[0248] The PCM control method embodiment is applicable to PRC and LCC resonant converters in which the resonant cavity output is equivalent to a voltage source, and SRC and LLC resonant converters in which the resonant tank cavity output is equivalent to a current source.

[0249] According to the above embodiment, the converter output voltage can be adjusted within a wider output voltage range (such as a 4:1 ratio) and a wider input voltage variation range (such as 2:1), while the switching frequency variation is relatively small, such as 1.5:1 (or a 50% variation, such as from 500kHz to 750kHz).

[0250] Example 2. Simulation

[0251] The following example shows the simulation results of implementing PCM in a parallel resonant converter. The simulation is performed using PSIM TM v.12 (Powersim Inc., Rockville, MD, USA). In the simulation, during T_off, the parallel resonant converter Q1 is off and Q2 is on. The circuit parameters are as follows:

[0252] Table 4: Circuit parameters used in simulation

[0253] PRC input voltage: Vin 200V Lr 33μH Cr 0.8nF Transformer turns ratio: N 8∶1 Lo 5μH Co 20μF Io 3A Output voltage Vo_min 5V Output voltage Vo_max 20V

[0254] Simulation results obtained by adjusting Fs1

[0255] The simulation model generated by PSM simulation software is as follows Figure 27 shown. Figure 28The simulation results for regulating the output voltage to 9V are shown. The waveforms, from top to bottom, show the gate voltage of Q1, the gate voltage of Q2, the resonant current Ires, the rectified voltage Vrec, and the output filter inductor current Isec. In this case, N1 = 1 and N2 = 1 (T_off = 0.88µs). Fs1 = I / 0.88µs = 1.14MHz. It can be seen that Vrec is non-zero during the initial period of shutdown mode, and during this short period, the energy stored in Cr is transferred to the load.

[0256] When the output voltage is high (for example, 20V), T_off can be set to zero. This condition is referred to as non-PCM operation. The output voltage is regulated by varying the switching frequency. In this case, full power of 20V at a load current of 3A is regulated, and the frequency is set to approximately 1MHz. Vgs1 is the gate signal for Q1, Vgs2 is the gate signal for Q2, and Ires is the resonant inductor current. The parallel resonant converter achieves zero-voltage switching. The waveforms of the resonant capacitor voltage and rectified current show the power transfer. When the desired output voltage approaches 20V, the duty cycle of both Vgs1 and Vgs2 is fixed at 50%, and the converter uses variable switching frequency control to control the output voltage, thereby achieving peak efficiency. This operating mode, under full power conditions, is similar to conventional resonant converter control, namely switching frequency control. That is, when the desired output voltage is near the high end of the output voltage range, the output voltage is controlled by varying the switching frequency. In this example, the output voltage range is 5V to 20V. When the desired output voltage approaches 20V, switching frequency control is used to regulate the output voltage.

[0257] Power Cycle Modulation (PCM) Operation

[0258] When the required output voltage is low (e.g. Vo = 15V), the required switching frequency will be too high and the converter operation will not be optimized. PCM will be used to control the operation of the converter. In PCM operation mode, the output voltage is regulated by controlling the power cycle ratio (PCR) defined by (2) and (2.1), or in the on-state operation mode, the fixed switch controls the output voltage by adjusting the T off time period through the frequency Fs1 and the number of switches N1. In the simulation, in the off-state operation mode, both Q1 and Q2 are turned off, and since Q1 is turned off, the converter does not draw any energy from the input source. In the on-state operation mode, the MOSFET operates at a frequency of approximately 1MHz and also operates at a fixed duty cycle of 50%, and energy is transferred to the load side. Note that in PCM control, the output voltage is controlled by two control parameters: PCR in the on-state operation mode and the switching frequency Fs1. The T_off value can be used to change the PCR.

[0259] Through PCM control, the controller selects the number of switches in the on-mode (N1) and the number of switches in the off-mode (or equivalently, T_off) based on the input voltage and the desired output voltage. The controller then counts and generates a specific number of control signals for the on-mode (for N1 switching cycles) and the off-mode (for N2 switching cycles or T_off period). Figure 28 The key waveforms of PCM control with 9V output are given. In this example, the ratio of the on-mode to the off-mode is selected to be 1:1 (N1=1, N2=1). The interval from the time when Q1 is first turned on to the time when Q2 is turned off from the last continuous switching cycle is the on-mode period. The time interval from the time when the on-mode ends to the time when Q1 is turned on again is the off-mode period T_off. The total number of on-mode switching cycles is N1, and the total number of off-mode switching cycles is N2. Figure 28 In the example shown, N1 is 1 and N2 is 1. Fs1 = 1 / 0.88 μs = 1.14 MHz.

[0260] exist Figure 28 Note that power is drawn from the input source during the on-state operating mode. During the transition from on-state operating mode to the off-state operating cycle, the rectified voltage Vrec decreases to zero as the energy stored in the resonant capacitor is transferred to the output. The resonant current becomes essentially zero (i.e., a very small value). The output voltage is maintained at 9V by adjusting the T_off time. In this case, the peak-to-peak current ripple of the output filter is 1.6A.

[0261] When the required output voltage is 15V, select N1=3, N2=1. Figure 29 The simulation waveforms for a rated output voltage of 15V are shown. It can be observed that in the on-state operating mode, higher power is delivered to the output. The T_off time is shorter. The peak-to-peak output filter current ripple is 2.6A. In this case, N1 = 3 and N2 = 3 (T_off = 1.11µs). Fs1 = 1 / 1.11µs = 900kHz.

[0262] When the required output voltage is 5V, select N1=1, N2=3. Figure 30 The simulation waveforms for a rated output voltage of 5V are shown. Based on the resonant current waveform, it reaches a resonant steady state after a brief transient. The peak-to-peak current ripple of the output filter is 5A. Based on the waveforms in these three operating modes, it can be demonstrated that a suitable LC output filter can ensure continuous filtering of the inductor current. Figure 30 The simulation results are given when the output voltage is adjusted to 5 V. In this case, N1 = 1, N2 = 3 (T_off = 3 us), and Fs1 = 1 / 1 us = 1 MHz.

[0263] From the above simulation results, it can be seen that when the switching frequency varies between 900KHz and 1.14MHz, the output voltage can be adjusted in the range of 5V to 20V.

[0264] If the required output voltage is a value between these values, then the appropriate N1 and N2 (T_off) can be selected according to the parameter design, and then the accurate output voltage can be obtained by changing Fs1 and T_off.

[0265] Note that in the above description of PCM control, it is assumed that when N1 and N2 are discrete values, Fs1 can be continuously changed. The output voltage can be continuously controlled.

[0266] Digital controller implements PCM in PD applications using parallel resonant converters

[0267] If PCM control is implemented using a microcontroller unit (MCU) or other digital circuitry, the frequency Fs1 is generated by the MCU and cannot be continuously varied. In this case, the output voltage can be adjusted by varying the off-mode operating time T_off. This allows the output voltage to be continuously varied. If the MCU clock frequency is 100MHz, the T_off resolution can be 10ns, ensuring sufficiently high output voltage resolution, which is important when the switching frequency is in the 1MHz range.

[0268] PCM control can be used to control a conventional parallel resonant converter. In one embodiment, two operating modes are available: non-PCM mode and PCM mode. Non-PCM mode varies the switching frequency to regulate the output voltage (in this case, N2 = 0 or T_off = 0), which is the same as the conventional control strategy for resonant converters. This mode is used when the output voltage is close to its maximum value (e.g., from 17V to 20V) (for example, in the case of a PD power supply design, the output voltage is 5V to 20V). PCM mode is used to regulate the output voltage when the switching frequency varies too widely to regulate the output voltage in non-PCM mode. In the case of a PD design, the output voltage is between 5V and 20V. In PCM mode, the resonant converter operates between a turn-on mode (also known as loaded operation mode), operating at peak efficiency, and a turn-off mode (also known as no-load operation mode, where no energy is drawn from the input source). The average power is balanced by the output LC filter.

[0269] The following sections describe the operation of these two modes in detail. The waveforms and operating conditions are described based on the parameter designs shown in Table 4. In this example, the output voltage is regulated from 5V to 20V. Examples such as Vo = 5V, 9V, 15V, and 20V are used in the following description. Other output voltage levels can also be achieved using the same PCM control method.

[0270] PCM control achieves two main advantages:

[0271] (1) The output voltage can be adjusted within a wide range.

[0272] (2) Because the circuit either operates at peak efficiency in the on-mode or operates losslessly in the off-mode, the converter efficiency will remain near the peak efficiency over a wide output voltage range.

[0273] Another advantage of the PCM control embodiment is that the adapter can operate at different power points with 20V as the load voltage. In this way, the open working mode can operate at a power point with peak efficiency, so better performance can be achieved. In such a design, under the same load current, the peak efficiency will be reached at a 20V output voltage, and this operating condition can be used for load operation (open working mode). For designs where the peak efficiency of the converter occurs between 5V and 15V (for example, at 12V), the converter will switch between 12V / 3A operation (open working mode) and shutdown working mode to adjust the output voltage of 5V, 9V and other voltages below 12V. Between 12V and 20V, a variable Fs1 control is used to adjust the output voltage. Therefore, operation at peak efficiency is achieved under most operating conditions, thereby achieving overall high efficiency.

[0274] Switching between on and off working modes

[0275] As described in the previous section, due to changes in operating conditions (i.e., between the presence and absence of input energy), a transition occurs between the turn-on and turn-off modes. During this transition, the energy stored in the resonant inductor and capacitor is transferred to the input source, the load, or both. This transition is undesirable from a control perspective, as it creates energy feedback issues. In actual circuit implementations, the current and voltage in the LC resonant tank will resonate during the turn-off mode. As a result, during the next turn-on mode, the high-side MOSFET Q1 may lose zero-voltage conduction during its first cycle. This results in additional losses and reduces overall efficiency. This section provides a detailed modulation method to address these two issues.

[0276] Extended on-time for energy feedback

[0277] Figure 31The waveforms illustrating the energy feedback issue after the last switching cycle of the turn-on mode are shown. It can be observed that after Q2 is turned off in the previous turn-on mode (N1 cycle), the resonant current still has a large value and will continue to flow until it reaches a steady state after decaying. Furthermore, according to the voltage waveform of the resonant capacitor Cr, VCr remains high during the transition, indicating that a certain amount of energy is stored in the resonant cavity. During the turn-off mode, this energy is transferred back to the power supply, and the voltage Vds2 will rise again. Therefore, more conduction losses are introduced in this process.

[0278] The energy feedback problem is generated because the resonant current is not zero when Q2 turns off at the end of the on-state operation mode. When Q2 turns off, the energy stored in the resonant inductor will be released to the input source. Figure 32A As shown in FIG, this problem can be solved by extending the on-time of Q2 in the last switching cycle of the turn-on mode (Q2 conduction time is longer), that is, extending the duration of the high level Vgs2. In the present invention, this is called extended on-time modulation. The controller samples the resonant inductor current in the last switching cycle of the turn-on mode and turns off Q2 when the resonant current Ires is very small (ideally, when Ires=0). Figure 32A The key waveforms for extended on-time modulation are shown. During the last switching cycle of on-time operation, the pulse width of Vgs2 is extended to keep Q2 on for a longer period. During this extended on-time, the resonant current transfers most of its energy to the secondary side. Then, when the resonant current is low (ideally zero), Q2 turns off. Because less energy is stored in the resonant cavity, Vds2 does not increase to a high value, reducing losses.

[0279] Asymmetric switching mode

[0280] During the shutdown mode, after the transition from the on-mode to the off-mode is completed, the circuit begins to resonate between the resonant inductor, the parasitic inductance in the circuit and the output capacitance (Coss) of the MOSFET. For example, N1 = 1, N2 = 3, Vo = 5V. Figure 32B As shown, the voltage across Q2 (Vds2) resonates from zero, while the voltage across Q1 (Vds1) resonates from the input voltage (200V in the simulation). This waveform is caused by the resonance between the resonant inductor and the output capacitance Coss of the two MOSFETs. Since the steady-state resonant voltage of Vds is the input voltage, it resonates close to the input voltage level. When Q1 turns on in the next on-mode operation, the voltage across Q1 will approach Vin. Therefore, Q1's zero voltage turn-on cannot be achieved during the first switching cycle of the next on-mode operation.

[0281] To address this issue, an asymmetric switching pattern is introduced during the turn-on operating mode N1. Note that during the turn-off operating mode, Vds1 will resonate at approximately the input voltage because Q1 is off and Q2 is on during the last switching cycle of the turn-on operating mode. Therefore, before the turn-off operating mode begins, Vds1 is at Vin (200V in the simulation) and Vds2 is at 0V. Therefore, they will resonate from this initial state.

[0282] In asymmetrical switching mode, the MOSFET that will be turned off during the previous turn-on operation mode is the same MOSFET that will be turned on in the next turn-on operation mode. That is, when the resonant current decreases to zero in the last switching cycle of the previous turn-on operation mode, Q1 turns off. Note that the second cycle ( Figure 33 The on-time of Vgs1 in Figure 33 The first cycle in the OFF mode is long. Therefore, Vds1 starts to oscillate from 0V in the OFF mode. Note that due to parasitic losses in the circuit, the peak voltage of Vds1 is less than Vin. If Q1 is turned on in the next ON mode when Vds1 is zero, the zero voltage turn-on of Q1 can be achieved in the first switching cycle of the next ON mode, as shown in Figure 2. Figure 33 As shown (Note Figure 32A and Figure 33 The difference in Vds1 waveform between them).

[0283] In asymmetric activation mode, N1 and N2 are no longer integers. Figure 33 The Vds waveform for a 5V output using an asymmetrical switch with N1 = 1.5 and N2 = 2.5 is shown. Vds1 resonates from 0V and can drop to zero voltage in steady state. After the shutdown mode ends, Vds1 is sampled and Q1 is turned on to initiate the next turn-on mode under zero voltage conditions. Figure 34 The key waveforms of N1=2.5 and N2=1.5 at 9V output are shown, and zero voltage turn-on is also achieved.

[0284] Therefore, to achieve zero voltage switching during the first switching cycle of the turn-on mode, Q1 is turned off during the previous turn-on mode, and then the same MOSFET (Q1) is turned on during the next turn-on mode. This achieves zero voltage switching. If the timing is incorrect, the voltage across Q1 during the first switching cycle of the next turn-on mode will be very low or close to zero. The output voltage is controlled by T_off through a feedback loop.

[0285] The above analysis is based on the parallel resonant converter. Note that these two control strategies can also be used for other resonant converters, such as LCC resonant converters (such as Figure 14As shown in FIG, SR converter, LLC resonant converter, etc. are not described here in detail.

[0286] Note that in the above description, examples, and simulations, it is assumed that both the upper transistor (Q1) and the lower transistor (Q2) are off during the off-mode operation. As mentioned above, the off-mode operation can also be achieved by turning off the upper transistor Q1 and turning on the lower transistor Q2. This implementation is advantageous when GaN (gallium nitride) switches are used for Q1 and Q2. Similarly, if Q2 remains on during the off-mode operation, Q2 should be turned off first before turning on Q1 at the beginning of the next on-mode operation.

[0287] In addition, if Figure 22 Another example embodiment for generating N1 is shown to reduce the number of switching cycles (the value of N1) during the on-mode operation when the output voltage is low and the output current is also low. In this way, the off-mode operation time period (T_off) can be reduced. For example, for a series resonant converter, the following two operating conditions can achieve the same output requirement of Vo = 5V and Io = 0.5A.

[0288] The first operating condition is to set N1 = 10, and in on-mode, with an average output current of Io1 = 2.5A and a switching frequency of Fs1 = 1MHz. Therefore, T_on = 10 * 1µs = 10µs. Then, the required time period for off-mode operation should be 40µs to achieve an average output current of 0.5A. In this case, the control time period Tcontrol_1 = 10µs + 40µs = 50µs. The output voltage ripple frequency is Fcontrol_1 = 1 / 50µs = 20kHz.

[0289] The second operating condition sets N1 to 5, and in on-mode operation, the average output current Io1 = 2.5A and the switching frequency Fs1 = 1MHz (both identical to the first operating condition). Therefore, T_on = 5*1us = 5us and T_off = 20us, resulting in Io = 0.5A. Tcontrol_2 = 25us. The output voltage ripple frequency is Fcontrol1_2 = 1 / 25us = 40kHz.

[0290] Comparing the two working conditions above, the second working condition is favorable because the control frequency is higher and the output voltage ripple is smaller. Therefore, for different input and output conditions, N1 can be different and can be optimized.

[0291] Similarly, Fs1 can be optimized based on operating conditions. For example, when the input voltage is high, a higher Fs1 should be used to limit the resonant current. Similarly, when the output voltage is low, the voltage reflected to the primary side decreases, and the resonant current is higher. Again, to limit the resonant current, the switching frequency Fs1 should be increased.

[0292] Implementation Example

[0293] Constant PCM control frequency (or control period) operation

[0294] Note that there are two time periods in PCM operation. One is the switching period of the resonant converter during the on-mode operation, i.e., Ts1 = 1 / Fs1 in this specification. The other is the PCM period, also known as the control period Tcontrol. The PCM period is defined as (e.g. Figure 6 shown):

[0295] Tcontrol=T_on+T_off (14)

[0296] To make implementation easier, Tcontrol can be a constant value. For example, Tcontrol might be fixed at 50µs. This results in an equivalent PCM frequency, or control frequency, Fcontrol, of 20kHz. Fcontrol can be thought of as the switching frequency of the switching converter.

[0297] In this case, the input voltage Vin and the output voltage Vo will be used to select (1) Fs1 (switching frequency within a switching cycle), (2) N1 (number of switching cycles within a switching cycle), and (3) the off time T_off.

[0298] The benefit of constant PCM control frequency is that audible noise can be avoided under all operating conditions. Under very light load, by setting a high switching frequency Fs1 and the number of switching cycles N1 = 1, the T_on time can be set to be very small.

[0299] Non-zero T_off time operation

[0300] In the above description, it is assumed that the minimum T_off time is 0. In this case, the maximum power cycle ratio (PCR): PCR = T_on / Tcontrol = T_on / (T_on + T_off) can be 100%.

[0301] Note that in some cases, it is more desirable to set the minimum T_off time to a smaller value, such as less than 25% of the control period, or less than 10%, or less than 5%, such as 2%. T_off_min = 0.02*Tcontrol. For example, when T_off_min = 2%*Tcontrol, T_on_max = 0.98*Tcontrol. Maximum PCR, PCR_max = 0.98*Tcontrol / Tcontrol = 98%. When using a low-cost MCU, this setting will result in more accurate PCR resolution. For low-cost MCUs, the minimum time step (time resolution) T_step is typically larger, such as 32ns or 100ns. If it is assumed that T_step = 32ns, PCR_max = 98%, and Tcontrol = 50us. Thus, T_off_min = 0.02*50us = 1us. If all other conditions remain unchanged and T_off changes from 1us to 1us + 32ns = 1.032us, the PCR will change from 0.98 to (50-1.032) / 50 = 0.97936. This represents a PCR change of (0.98-0.97936) / 0.98 = 0.065%. This indicates that by changing the T_off time by a minimum time step (32ns), the output voltage will change by 0.065%, which is acceptable.

[0302] Similarly, if the minimum time step, T_step, = 100ns = 0.1us, Tcontrol = 50us, and T_off_min = 1us, then the PCR changes from 0.98 to (50-1-0.1) / 50 = 0.978. Or, the change in PCR would be (0.98-0.978) / 0.98 = 0.2%. This is also a very small number for output voltage variation. It should be noted that a T_step of 100ns means the MCU clock frequency is only 10MHz, which can be implemented with a very low-cost MCU. Note that a 32MHz clock frequency (32ns time step) also allows for a very low-cost MCU.

[0303] Therefore, by setting T_off_min to a non-zero but small value (e.g. 2% of Tcontrol), very high output voltage resolution can be achieved even with a low-cost MCU.

[0304] Note that if T_off_min is chosen too high, the resonant converter's voltage or current rating may be too high, which is undesirable. This could be the case, for example, if T_off_min is chosen to be 0.5*Tcontrol. Then, during T_on operation, the resonant converter would need to handle twice the load power. This would overload the power supply circuit.

[0305] Fs1 and T_off are both determined by the output voltage

[0306] Note that Fs1 and T_off can be selected based on the input voltage Vin (via input voltage feedforward) and the output voltage Vo (via the output voltage error amplifier). A simplified implementation is that both Fs1 and T_off are determined by the output error voltage:

[0307] Verror=f(Vo-Vref) (15)

[0308] In the above equation, Vref is the reference voltage. The output voltage will follow the reference voltage. The function f(Vo - Vref) can be implemented using proportional-integral (PI) control, proportional-integral-derivative (PID) control, or other control functions.

[0309] If we assume that the switching frequency Fs1 is always higher than the resonant frequency of the resonant converter, the converter operates in the inductive region. In this case, as the switching frequency Fs1 increases, the output voltage decreases. If the output voltage is significantly higher than the reference voltage, the error voltage Verror will be large. If the output voltage is close to or lower than the reference voltage, the error voltage Verror will be small. Therefore, the following control method can be used:

[0310] (1) Verror < Verror_th, T_off is set to zero or set to T_off_min, and the switching frequency Fs1 is used to regulate the output voltage. Note that when Verror is small, Vo approaches Vref. Fs1 = f0(Delta_error), where Delta_error is defined by equation (14). In this case, Fs1 is controlled by Verror, which depends on Vo. That is, Fs1 is controlled by Vo.

[0311] (2) If Verror>Verror_th, then T_off is not zero (or not T_off_min). T_off>T_off_min and changes according to Verror. In this case, Fs1 is controlled by Verror, which depends on Vo. That is, Fs1 is controlled by Vo.

[0312] The present invention defines

[0313] Delta_error=Verror-Verror_th (16)

[0314] Where Verror_th is a pre-set threshold level. Then, Fs1 and T_off can be determined from the following relationship:

[0315] Fsl=f1(Delta_error) (17.1)

[0316] T_off=f2(Delta_error) (17.2)

[0317] The above implementation means that during PCM operation, the switching frequency Fs1 during the on-state operation mode is determined by Verror, which is determined by the output voltage Vo. T_off is also determined by Verror, which is determined by the output voltage. The mathematical functions f1 and f2 shown in equations (17.1) and (17.2) can be implemented as proportional, proportional-integral (PI), proportional-integral-derivative (PID), or some other functional form.

[0318] Figure 35 35 is an implementation block diagram of this embodiment. The output voltage Vout of the converter 3510 is sampled using an operational amplifier 3530 and compared with a reference voltage Vref, and then transmitted to the MCU 3520 as a voltage V1 using an isolation device such as an optocoupler 3540. V1 is subjected to analog-to-digital conversion (not shown). Verror is the PI (proportional integral) output of V1. Verror_th is a control parameter, and the threshold voltage is used together with Verror to determine the Delta_error signal. Verror_th is used to determine whether the error voltage is large or small. For example, if the output voltage is significantly different from the reference voltage, the error voltage will be large, which will cause the output voltage to be corrected quickly. The Delta_error signal is used in function block 3550 to generate Fs1 and T_off signals calculated based on functions f0, f1, and f2. Fsl and T_off are fed to the PWM generator to generate the gating signals for Q1 and Q2 of the half-bridge converter 3510.

[0319] Figure 36 is a block diagram of a simplified implementation. The output voltage Vout of the converter 3610 is sampled using an operational amplifier 3630 and compared with a reference voltage Vref. This voltage is then transmitted to the MCU 3620 as voltage V1 using an isolation device (e.g., an optocoupler 3640). V1 undergoes analog-to-digital conversion (not shown). According to this embodiment, Fs1 and T_off are selected by applying functions K1 and K2 based on the following relationship:

[0320] Fs1=K1*Delta_error+Fs_base (18.1)

[0321] T_off=K2*Delta_error+T_off_base (18.2)

[0322] Based on the control laws expressed in equations (18.1) and (18.2), as Delta_error increases, the output voltage becomes greater than the reference voltage. The control strategy is to simultaneously increase Fs1 and T_off. Increasing Fs1 will cause Vo to decrease. Increasing T_off will also cause Vo to decrease. Consequently, the output voltage will decrease, and the error voltage will decrease.

[0323] Other functions can also be used for f1 and f2 in formulas (17.1 and 17.2) to achieve output voltage regulation.

[0324] The above description shows that using the PCM control strategy, both the on-mode and off-mode operation exist simultaneously. The switching frequency Fs1 in the on-mode operation is determined by the error voltage, which in turn is determined by the output voltage. In other words, Fs1 is determined by the output voltage. The T_off time is also determined by the error voltage, which in turn is determined by the output voltage.

[0325] Special case with fixed Fs1 when Verror>Verror_th

[0326] A special case of the above control strategy is to set Fs1 to Fs1_max under the following conditions:

[0327] Fsi=Fs1_max when Verror>Verror_th (19)

[0328] Where Fs1_max is the maximum switching frequency of the converter when operating in the on-state mode. For example, Fs1_max can be equal to or greater than 2, 3, 4, or 5 times the converter's resonant frequency. The off-time, T_off, is adjusted based on Delta_error. Note that, assuming the switching frequency is higher than the resonant frequency, the output voltage will decrease as the switching frequency is increased. Setting the maximum switching frequency will limit switching losses. The output voltage can be regulated / controlled via T_off.

[0329] When Verror<Verror_th, T_off is set to zero (or T_off_min), and the switching frequency Fs1 is controlled by the error voltage.

[0330] Special Cases for Variable T_on and T_off

[0331] In the above description, it is assumed that the control period Tcontrol = T_on + T_off is constant or nearly constant. When T_off is selected, T_on changes accordingly, T_on = Tcontrol - T_off. This is considered the ideal operating condition. Other methods can also be used to determine T_on and T_off. One such embodiment is described below:

[0332] (1) During the ON mode, the switching frequency Fs1 is controlled by the error voltage Verror, which is controlled by the output voltage. That is, as described above, the switching frequency Fs1 is controlled by the output voltage Vo.

[0333] (2) The on-mode period T_on is controlled by comparing the instantaneous output voltage Vo(t) with the output voltage upper limit level Vo_up. When Vo(t) < Vo_up, the converter operates in the on-mode, and the instantaneous output voltage Vo(t) increases. When Vo(t) > Vo_up, the converter switches to the off-mode, and the instantaneous output voltage Vo(t) decreases.

[0334] (3) The off-mode period, T_off, is controlled by comparing the instantaneous output voltage Vo(t) with the output voltage lower limit, Vo_low. When Vo(t) > Vo_low, the converter operates in the off-mode, and the instantaneous output voltage Vo(t) decreases. When Vo(t) < Vo_low, the converter switches to the on-mode, and the output voltage increases.

[0335] With this control method, the converter alternately switches between an on-mode and an off-mode, and the switching frequency Fs1 during the on-mode is directly or indirectly controlled by the output voltage.

[0336] Using this control method, the instantaneous output voltage Vo(t) is always between Vo_up and Vo_low. The steady-state average output voltage Vo is determined by Vo_up and Vo-low. Note that T_on and T_off are not directly controlled, so the control period Tcontrol = T_on + T_off is not a constant value and may vary over a wide range depending on, for example, the input voltage, output voltage, load current, and power supply circuit parameters.

[0337] For example, if the load current is small, it takes longer for the instantaneous output voltage to drop from Vo_up to Vo_low during the T_off period. Similarly, if the load current is high, it takes more time for the output voltage to rise from Vo_low to Vo_up.

[0338] Note that for this embodiment, T_off cannot be set to zero because it always takes some time for the output voltage to drop from Vo_up to Vo_low. Since the T_off time is not zero, the resonant converter should be designed to handle more power than the maximum output power. For example, if (a) under full load operation, when the load consumes Po_max, and (b) the minimum T_off time is 30% of Tcontrol, the resonant converter should be designed to handle Po_max / (1-0.3)=1.43*Po_max. In other words, if the maximum load power is 65W, the power converter should be designed to handle 1.43*65=93W.

[0339] Although the above embodiment is not optimal, it can achieve the power cycle modulation operation according to the present invention.

[0340] Vin is fed forward to determine Fs1

[0341] In the above embodiment, input voltage feedforward can be used to directly increase the switching frequency during turn-on mode. Note that since the resonant converter operates in the inductive region, the switching frequency should also increase as the input voltage increases to keep the resonant current essentially constant (or with minimal variation). This minimizes the impact of input voltage variations. In other words, Fs1 can be controlled by Vin and Verror. Verror depends on the output voltage.

[0342] In the same control cycle Tcontrol, different Fs1

[0343] As mentioned above, Fs1 is assumed to remain constant during one control cycle, Tcontrol. In practice, different Fs1 values can be used within the same control cycle. For example, Fs1A, Fs1B, and Fs1C can be used during the on-mode period, T_on. This increases the converter's response time.

[0344] For example, if the input voltage suddenly increases in the middle of an on-mode period T_on, the switching frequency Fs1 can be increased immediately to keep the resonant current essentially unchanged. If the switching frequency is not changed immediately, the resonant current will increase and the output voltage will increase under transient operating conditions.

[0345] Similarly, Fs1 can also be modified by the output voltage error to achieve better transient response. The detailed implementation is not described here, but it can be understood by those skilled in the art.

[0346] The above analysis assumes that the switching frequency is higher than the resonant frequency, or that the resonant converter operates in the inductive region. As the switching frequency increases, the output voltage decreases. It should be noted that PCM control can also be used when the switching frequency is lower than the resonant frequency, or when the resonant converter operates in the capacitive region. In capacitive operation, increasing the switching frequency increases the output voltage; in other words, the control principle is reversed. This is readily understood by those skilled in the art.

[0347] Equivalent claims

[0348] Although the present invention has been described with respect to the illustrative embodiments thereof, it should be understood that various changes can be made to the embodiments without departing from the scope of the present invention. Therefore, the described embodiments are to be considered as illustrative only, and the present invention is not limited thereto.

Claims

1. A method for controlling an output voltage of a resonant power converter, comprising: Controlling the power converter according to a control period Tcontrol, the control period comprising an on-operation mode with a duration T_on and an off-operation mode with a duration T_off; Sampling the output voltage of the power converter and using the sampled output voltage to select a switching frequency Fs1 during an on-mode of operation, a number of switching cycles, and a duration T_off of an off-mode of operation; Wherein, based on the ratio of (T_on): (T_on + T_off), the output voltage Vo of the power converter will be adjusted to the corresponding selected value; The duration T_on is equal to the time corresponding to N1 switching cycles, where one switching cycle is 1 / Fs1, and N1 is a positive integer.

2. The method according to claim 1, comprising: A first voltage Vo1 is generated during the duration T_on and a second voltage Vo2 is generated during the duration T_off.

3. The method according to claim 2, comprising: A first voltage Vo1 is generated during a duration T_on using a first switching frequency, and a second voltage Vo2 is generated during a duration T_off using a second switching frequency.

4. The method according to claim 1, comprising: A minimum value T_off_min is selected within the duration of the duration T_off, wherein T_off_min is less than 25% of Tcontrol.

5. The method according to claim 4, wherein The minimum value of T_off_min is 0.

6. The method according to claim 3, wherein: The first switching frequency is greater than the second switching frequency.

7. The method according to claim 1, wherein Tcontrol only includes the time period when the working mode T_on is turned on.

8. The method according to claim 1, comprising: During the off operating mode, which corresponds to a duration T_off, the power converter is turned off.

9. The method according to claim 1, comprising: The switching frequency is regulated during the turn-on mode of operation.

10. The method according to claim 1, comprising: At least a first switching frequency and a second switching frequency are used during the turn-on mode of operation.

11. The method according to claim 1 , comprising: Sampling the input voltage and output voltage of the converter; selecting a switching frequency during a duration T_on and a number of switching cycles corresponding to the duration T_on using the sampled input voltage and output voltage; And the duration T_off is selected using the output voltage sampling.

12. The method according to claim 1, comprising: Sampling the input voltage and output voltage of the converter; The switching frequency during the duration T_on, and the number of switching cycles corresponding to the duration T_on and The duration T_off is selected using the sampled input voltage and output voltage.

13. The method according to claim 1, comprising: Sampling the input voltage and output voltage of the converter; Selecting the number of switching cycles corresponding to the T_on period using the sampled input and output voltages; And the sampled output voltage is used to select the switching frequency and duration T_off during T_on.

14. The method according to claim 1, comprising: Sampling the input voltage and output voltage of the converter; The number and duration of the switching cycles during T_on are selected using the sampled input and output voltages. The sampled output voltage is used to select the switching frequency during T_on.

15. The method according to claim 1, wherein The power converter is selected from a parallel resonant converter, a series resonant converter, an LLC resonant converter and an LCC resonant converter.

16. A controller for a power converter, wherein: The controller is to implement the method of any one of claims 1 to 15 .

17. The controller according to claim 16, wherein the controller adopts digital technology.

18. The controller according to claim 17, wherein: The power converter is selected from a parallel resonant converter, a series resonant converter, an LLC resonant converter and an LCC resonant converter.

19. A power converter comprising the controller according to claim 17.

20. The power converter according to claim 19, wherein The power converter is selected from a parallel resonant converter, a series resonant converter, an LLC resonant converter and an LCC resonant converter.

21. The power converter according to claim 19, wherein: The power converter provides an output voltage compatible with multiple devices.

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