Display panel, display device

Abstract

The present disclosure relates to the field of display technology, and proposes a display panel and a display device. The display panel includes a first display area and a second display area. The display panel also includes: a plurality of first pixel islands and a plurality of transparent bridge line segments. The first pixel island is located in the first display area. The first pixel island includes at least one first light-emitting unit, at least one first pixel driving circuit, and a plurality of transparent bridge line segments. The first pixel driving circuit is arranged in a one-to-one correspondence with the first light-emitting unit, and the first pixel driving circuit is used to provide a driving current to the first light-emitting unit corresponding thereto. The plurality of transparent bridge line segments are located in the first display area, and the first signal line segments are used to provide signals to the first pixel driving circuit. At least some of the transparent bridge line segments are used to connect the first signal line segments in different first pixel islands through vias. The first display area of ​​the display panel has a large light transmittance.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In the related art, the display panel generally includes a high pixel area and a low pixel area, and the area where the low pixel area is located can be used to integrate sensor devices such as cameras and earpieces. In the related art, the display panel generally only sets a light-emitting unit in the low pixel area, and sets the pixel driving circuit for driving the light-emitting unit in the low pixel area in the circuit integration area between the high pixel area and the low pixel area, thereby increasing the transmittance of the low pixel area. However, the circuit integration area in the display panel will form a non-display area.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field.

[0004] Public Content

[0005] According to one aspect of the present disclosure, a display panel is provided, wherein the display panel includes a first display area and a second display area, and the display panel further includes: a plurality of first pixel islands, a plurality of transparent bridge segments, the first pixel island is located in the first display area, the first pixel island includes: at least one first light-emitting unit, at least one first pixel driving circuit, a plurality of first signal segments, the first pixel driving circuit is arranged in a one-to-one correspondence with the first light-emitting unit, and the first pixel driving circuit is used to provide a driving current to the first light-emitting unit corresponding thereto. A plurality of transparent bridge segments are located in the first display area, and at least some of the transparent bridge segments are used to connect the first signal segments in different first pixel islands through vias.

[0006] In an exemplary embodiment of the present disclosure, the display panel further includes a substrate, and the first pixel island is located on one side of the substrate. The plurality of first signal line segments include a first sub-signal line segment and a second sub-signal line segment, the orthographic projection of the first sub-signal line segment on the substrate extends along a first direction; the orthographic projection of the second sub-signal line segment on the substrate extends along a second direction, and the first direction and the second direction intersect. The plurality of transparent bridge line segments include a first transparent bridge line segment and a second transparent bridge line segment, the first transparent bridge line segment includes a first sub-transparent bridge line segment, the first sub-transparent bridge line segment is located in the first display area, and the first sub-transparent bridge line segment is used to connect the first sub-signal line segments in different first pixel islands through vias. The plurality of second transparent bridge line segments include a second sub-transparent bridge line segment, the second sub-transparent bridge line segment is located in the first display area, and the second sub-transparent bridge line segment is used to connect the second sub-signal line segments in different first pixel islands through vias.

[0007] In an exemplary embodiment of the present disclosure, the display panel further includes a plurality of second light-emitting units, a plurality of second pixel driving circuits, and a plurality of second signal line segments. The plurality of second light-emitting units are located in the second display area; the plurality of second pixel driving circuits are located in the second display area, and the plurality of second pixel driving circuits are arranged one-to-one with the plurality of second light-emitting units, and the second pixel driving circuits are used to provide driving currents to the second light-emitting units corresponding thereto; the plurality of second signal line segments are located in the second display area, and are used to provide signals to the second pixel driving circuits; and at least some of the transparent bridge line segments are used to connect the first signal line segments and the second signal line segments through vias.

[0008] In an exemplary embodiment of the present disclosure, the plurality of second signal line segments include: a third sub-signal line segment and a fourth sub-signal line segment, wherein the orthographic projection of the third sub-signal line segment on the substrate extends along the first direction; and the orthographic projection of the fourth sub-signal line segment on the substrate extends along the second direction. The plurality of first transparent bridging line segments also include a third sub-transparent bridging line segment, which is located in the first display area, and the third sub-transparent bridging line segment is used to connect the first sub-signal line segment and the third sub-signal line segment through a via hole; the plurality of second transparent bridging line segments also include a fourth sub-transparent bridging line segment, which is located in the first display area, and the fourth sub-transparent bridging line segment is used to connect the second sub-signal line segment and the fourth sub-signal line segment through a via hole.

[0009] In an exemplary embodiment of the present disclosure, the first transparent bridging line segment and the first sub-signal line segment connected to each other form a first extension line, and the second transparent bridging line segment and the second sub-signal line segment connected to each other form a second extension line; the first extension line is bent and extended at the orthographic projection of the substrate, and the intersection of the first extension line at the orthographic projection of the substrate and the second extension line at the orthographic projection of the substrate is located at the intersection of the orthographic projection of the second sub-signal line segment at the orthographic projection of the substrate and the orthographic projection of the first transparent bridging line segment at the orthographic projection of the substrate.

[0010] In an exemplary embodiment of the present disclosure, the first transparent bridging line segment and the first sub-signal line segment connected to each other form a first extension line, and the second transparent bridging line segment and the second sub-signal line segment connected to each other form a second extension line; the second extension line is bent and extended at the orthographic projection of the substrate, and the intersection of the first extension line at the orthographic projection of the substrate and the second extension line at the orthographic projection of the substrate is located at the intersection of the orthographic projection of the first sub-signal line segment at the orthographic projection of the substrate and the orthographic projection of the second transparent bridging line segment at the orthographic projection of the substrate.

[0011] In an exemplary embodiment of the present disclosure, there are multiple first sub-signal line segments, and there are multiple second sub-signal line segments; the multiple first sub-signal line segments include one or more of a gate drive signal line, an enable signal line, an initial signal line, and a reset signal line; the multiple second sub-signal line segments include one or more of a data line and a power line.

[0012] In an exemplary embodiment of the present disclosure, at least part of the first pixel island includes a first connecting line; in the first pixel island, the first sub-signal line segment includes a gate drive signal line and a reset signal line, and the gate drive signal line and the reset signal line having the same timing signal are connected through the first connecting line; among the gate drive signal line and the reset signal line connected through the first connecting line, only one signal line is connected through the first transparent bridge line segment and the other signal lines corresponding to it.

[0013] In an exemplary embodiment of the present disclosure, at least part of the first pixel island includes a second connecting line; in the first pixel island, the first sub-signal line segment includes n initial signal lines, n is a positive integer greater than 1, and the n initial signal lines in the first pixel island are electrically connected through the second connecting line; among the n initial signal lines connected through the second connecting line, there are m initial signal lines connected to other signal lines corresponding to them through the first transparent bridging line segment, where m is a positive integer less than or equal to n and greater than 0.

[0014] In an exemplary embodiment of the present disclosure, the display panel further includes: a base substrate, a first pixel driving circuit, and a second pixel driving circuit, wherein the first pixel driving circuit is located in the first display area; and the second pixel driving circuit is located in the second display area. The area of ​​the first pixel driving circuit projected on the base substrate is smaller than the area of ​​the second pixel driving circuit projected on the base substrate.

[0015] In an exemplary embodiment of the present disclosure, the display panel further includes: a base substrate, a first pixel driving circuit, and a second pixel driving circuit, wherein the first pixel driving circuit is located in the first display area; and the second pixel driving circuit is located in the second display area. In at least one direction, the gap between the orthographic projections of two adjacent first pixel driving circuits on the base substrate is smaller than the gap between the orthographic projections of two adjacent second pixel driving circuits on the base substrate.

[0016] In an exemplary embodiment of the present disclosure, the display panel also includes a substrate, and the first pixel island is located on one side of the substrate; the first pixel island includes at least one first light-emitting unit and at least one first pixel driving circuit corresponding to the first light-emitting unit, and the first pixel driving circuit is used to provide a driving current to the first light-emitting unit corresponding thereto; wherein, in the same first pixel island, there is at least one first light-emitting unit, whose orthographic projection on the substrate substrate and the orthographic projection of the first pixel driving circuit corresponding thereto on the substrate substrate at least partially overlap.

[0017] In an exemplary embodiment of the present disclosure, the display panel also includes: a plurality of second light-emitting units, and a plurality of second pixel driving circuits corresponding one by one to the second light-emitting units, the second pixel driving circuit being used to provide a driving current to the second light-emitting units corresponding thereto; the plurality of second light-emitting units include: a first R light-emitting unit, a first G light-emitting unit, and a first B light-emitting unit; wherein the first R light-emitting unit, the first G light-emitting unit, and the first B light-emitting unit are alternately distributed in sequence along the same light-emitting unit row, and in the same light-emitting unit row, two first G light-emitting units distributed along the column direction are arranged between the first R light-emitting unit and the first B light-emitting unit, and in adjacent light-emitting unit rows, light-emitting units of the same color are located in different light-emitting unit columns, and in two light-emitting unit rows separated by one light-emitting unit row, light-emitting units of the same color are located in the same light-emitting unit column; the first pixel island includes: a second R light-emitting unit, a second G light-emitting unit, a third G light-emitting unit, and a second B light-emitting unit.

[0018] In an exemplary embodiment of the present disclosure, in the same first pixel island, the second G light-emitting unit is located in the first light-emitting unit row, the second R light-emitting unit and the second B light-emitting unit are adjacently arranged on the second light-emitting unit row, the third G light-emitting unit is located in the third light-emitting unit row, and the second light-emitting unit row is located between the first light-emitting unit row and the third light-emitting unit row; the second B light-emitting unit is located in the first light-emitting unit column, the second G light-emitting unit and the third G light-emitting unit are located in the second light-emitting unit column, the second R light-emitting unit is located in the third light-emitting unit column, and the second light-emitting unit column is located between the first light-emitting unit column and the third light-emitting unit column.

[0019] In an exemplary embodiment of the present disclosure, the second R light-emitting unit and the second G light-emitting unit are located in a first light-emitting unit row, the second B light-emitting unit is located in a second light-emitting unit row, the third G light-emitting unit is located in a third light-emitting unit row, and the second light-emitting unit row is located between the first light-emitting unit row and the third light-emitting unit row; the second R light-emitting unit is located in a first light-emitting unit column, the second B light-emitting unit is located in a second light-emitting unit column, the second G light-emitting unit and the third G light-emitting unit are located in a third light-emitting unit column, and the second light-emitting unit column is located between the first light-emitting unit column and the third light-emitting unit column.

[0020] In an exemplary embodiment of the present disclosure, the second R light-emitting unit, the second G light-emitting unit, and the second B light-emitting unit are located in the first light-emitting unit row, the third G light-emitting unit is located in the second light-emitting unit row, and the first light-emitting unit row and the second light-emitting unit row are adjacent to each other; the second R light-emitting unit is located in the first light-emitting unit column, the second G light-emitting unit is located in the second light-emitting unit column, the second B light-emitting unit is located in the third light-emitting unit column, and the third G light-emitting unit is located in the fourth light-emitting unit column, wherein the first light-emitting unit column, the second light-emitting unit column, the third light-emitting unit column, and the fourth light-emitting unit column are distributed sequentially in the row direction.

[0021] In an exemplary embodiment of the present disclosure, the second R light-emitting unit, the second G light-emitting unit, and the third G light-emitting unit are located in the first light-emitting unit row, the second B light-emitting unit is located in the second light-emitting unit row, and the first light-emitting unit row and the second light-emitting unit row are adjacent to each other; the second R light-emitting unit is located in the first light-emitting unit column, the second B light-emitting unit is located in the second light-emitting unit column, the second G light-emitting unit and the third G light-emitting unit are located in the third light-emitting unit column, and the second light-emitting unit column is located between the first light-emitting unit column and the third light-emitting unit column.

[0022] In an exemplary embodiment of the present disclosure, the display panel further includes: a substrate, a color filter layer, the first pixel island is located on one side of the substrate, and the first pixel island includes at least one first light-emitting unit. The color filter layer is located on the side of the first pixel island away from the substrate; the color filter layer includes a plurality of first structural parts located in the first display area, the plurality of first structural parts are arranged in a one-to-one correspondence with the plurality of first pixel islands, the first structural part covers the orthographic projection of the first pixel island corresponding to it on the substrate, and at least one side or one corner of the orthographic projection of the first structural part on the substrate is arc-shaped. The first structural part includes: a first light-shielding part and a first light-filtering part, at least one opening is formed on the first light-shielding part, and the opening on the first light-shielding part is arranged in a one-to-one correspondence with the first light-emitting unit in the first pixel island; the first light-filtering part is located in the opening of the first light-shielding part, and the orthographic projection of the first light-filtering part on the substrate covers the orthographic projection of the first light-emitting unit corresponding to it on the substrate.

[0023] In an exemplary embodiment of the present disclosure, the display panel also includes: a plurality of second light-emitting units located in the second display area, the color film layer also includes a second structural portion located in the second display area, the second structural portion includes: a second shading portion and a second filtering portion, a plurality of openings are formed on the second shading portion, and the openings on the second shading portion are arranged in a one-to-one correspondence with the second light-emitting units; the second filtering portion is located in the opening of the second shading portion, and the orthographic projection of the second filtering portion on the base substrate covers the orthographic projection of the second light-emitting unit corresponding thereto on the base substrate.

[0024] In an exemplary embodiment of the present disclosure, the pixel density of the first display area is less than or equal to the pixel density of the second display area.

[0025] In an exemplary embodiment of the present disclosure, the display panel also includes: a base substrate, a second light-emitting unit, the first pixel island is located on one side of the base substrate; the second light-emitting unit is located in the second display area; among the light-emitting units of the same color, the orthographic projection area of ​​the first light-emitting unit on the base substrate is less than or equal to the orthographic projection area of ​​the second light-emitting unit on the base substrate.

[0026] According to one aspect of the present disclosure, a display device is provided, including: the above-mentioned display panel and a sensor device, wherein the sensor device faces a first display area of ​​the display panel.

[0027] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0029] Figure 1 It is a partial structural schematic diagram of a display panel in the related art;

[0030] Figure 2 A schematic structural diagram of an exemplary embodiment of a display panel disclosed herein;

[0031] Figure 3 for Figure 2 A partial enlarged view of the

[0032] Figure 4 It is a structural schematic diagram of another exemplary embodiment of the display panel disclosed in the present invention;

[0033] Figure 5 It is a structural schematic diagram of another exemplary embodiment of the display panel disclosed in the present invention;

[0034] Figure 6 It is a structural schematic diagram of another exemplary embodiment of the display panel disclosed in the present invention;

[0035] Figure 7 It is a structural schematic diagram of another exemplary embodiment of the display panel disclosed in the present invention;

[0036] Figure 8 for Figure 3 The structural layout of the active layer in the

[0037] Fig. 9 for Figure 3 The structural layout of the first gate layer;

[0038] Fig.10 for Figure 3 The structural layout of the second gate layer;

[0039] Fig.11 for Figure 3 The structural layout of the first source and drain layer;

[0040] Fig.12 for Figure 3 The structural layout of the transparent conductive layer;

[0041] Fig.13 for Figure 3 The structural layout of the second source and drain layer;

[0042] Fig.14 for Figure 3A stacked structure layout of an active layer, a first gate layer, a second gate layer, a first source-drain layer, a transparent conductive layer, and a second active-drain layer;

[0043] Fig.15 A schematic diagram of the circuit structure of a pixel driving circuit in an exemplary embodiment of a display panel disclosed herein;

[0044] Fig.16 for Fig.15 A timing diagram of each node in a driving method of a pixel driving circuit;

[0045] Fig.17 for Figure 3 A partial magnified image of the first pixel island in the middle C area;

[0046] Fig.18 for Fig.17 The structural layout of the active layer in the

[0047] Fig.19 for Fig.17 The structural layout of the first gate layer;

[0048] Fig. 20 for Fig.17 The structural layout of the second gate;

[0049] Fig.21 for Fig.17 The structural layout of the first source and drain layer;

[0050] Fig. 22 for Fig.17 The structural layout of the transparent conductive layer;

[0051] Fig.23 for Fig.17 The structural layout of the second source and drain layer;

[0052] Fig.24 for Fig.17 A stacking layout of an active layer and a first gate layer;

[0053] Fig.25 for Fig.17 A stacking layout of an active layer, a first gate layer, and a second gate layer;

[0054] Fig.26 for Fig.17 A stacked layout of an active layer, a first gate layer, a second gate layer, and a first source and drain layer;

[0055] Fig. 27 for Fig.17 A stacked layout of an active layer, a first gate layer, a second gate layer, a first source-drain layer, and a transparent conductive layer;

[0056] Fig.28An exemplary embodiment of the display panel of the present disclosure is Fig.17 Cross-sectional view along the dashed line D. DETAILED DESCRIPTION

[0057] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the present disclosure will be more comprehensive and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted.

[0058] Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of the illustration to another component, these terms are used in this specification only for convenience, such as the orientation of the examples described in the drawings. It is understood that if the device of the illustration is turned upside down, the component described as "upper" will become the component "lower". Other relative terms, such as "high", "low", "top", "bottom", "left", "right", etc., also have similar meanings. When a structure is "on" other structures, it may mean that the structure is formed integrally on the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

[0059] The terms "a", "an", and "said" are used to indicate the presence of one or more elements / components / etc.; the terms "comprising" and "having" are used to indicate an open-ended inclusive meaning and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.

[0060] like Figure 1 As shown, it is a schematic diagram of a part of the structure of the display panel in the related art. The display panel includes a low pixel density area 01 and a circuit integration area 02, and the circuit integration area 02 can be located between the high pixel density area (not shown) and the low pixel density area 01. A plurality of light-emitting units 03 can be integrated in the low pixel density area 01, and a plurality of pixel driving circuits 04 can be integrated in the circuit integration area 02. Among them, the pixel driving circuit 04 can be used to provide a driving current to the light-emitting unit 03 through the transmission line 05. The display panel can have a large light transmittance in the low pixel density area 01. However, since the circuit integration area 02 does not emit light, the display panel will have a non-luminous area in the circuit integration area 02, thereby affecting the display effect. In addition, since the integration density of the transmission line 05 is limited by the process, the diameter of the low pixel density area 01 cannot be too large.

[0061] Based on this, the present exemplary embodiment provides a display panel such as Figure 2 ,3 As shown, Figure 2 is a schematic structural diagram of an exemplary embodiment of a display panel disclosed in the present invention. Figure 3 for Figure 2 The display panel includes a first display area 1 and a second display area 2. The display panel may further include: a plurality of first pixel islands 3, a plurality of transparent bridge segments 5, the first pixel islands 3 are located in the first display area 1, the first pixel islands 3 may include a plurality of first signal segments 41; a plurality of transparent bridge segments 5 are located in the first display area 1, at least some of the transparent bridge segments 5 are used to connect the first signal segments 41 in different first pixel islands 3 through vias. Sensor devices such as cameras, receivers, and infrared sensors may be provided at the location of the first display area.

[0062] In this exemplary embodiment, the first pixel island may include at least one first light-emitting unit and at least one first pixel driving circuit, the first pixel driving circuit and the first light-emitting unit are arranged in a one-to-one correspondence, and the first pixel driving circuit is used to provide a driving current to the first light-emitting unit corresponding thereto. The first signal line segment may include one or more of a data line, a power line, a gate drive signal line, an initial signal line, a reset signal line, and an enable signal line. The transparent bridge line segment 5 can be used to connect the same signal lines. On the one hand, the present disclosure sets the first pixel driving circuit for driving the first light-emitting unit in the first display area, thereby avoiding the presence of a non-luminous circuit integration area in the display panel; on the other hand, the present disclosure connects the first signal line segments on different pixel islands through a transparent bridge line segment located in the first display area, thereby increasing the transmittance of the first display area; on the other hand, the diameter of the first display area in the display panel is not limited. In addition, the first display area is set to any image, such as a circle, an ellipse, a rectangle, etc.

[0063] In this exemplary embodiment, Figure 3As shown, the display panel further includes a substrate 0, and the first pixel island 3 is located on one side of the substrate 0. The plurality of first signal line segments 41 may include a first sub-signal line segment 411 and a second sub-signal line segment 412, wherein the orthographic projection of the first sub-signal line segment 411 on the substrate 0 extends along a first direction X; the orthographic projection of the second sub-signal line segment 412 on the substrate 0 extends along a second direction Y, wherein the first direction X and the second direction Y intersect, for example, the first direction may be a row direction, and the second direction may be a column direction. The plurality of transparent bridge line segments 5 may include a first transparent bridge line segment 51 and a second transparent bridge line segment 52, wherein the first transparent bridge line segment 51 may include a first sub-transparent bridge line segment 511, wherein the first sub-transparent bridge line segment 511 may be located in the first display area 1, and wherein the first sub-transparent bridge line segment 511 may be used to connect the first sub-signal line segments 411 in different first pixel islands through vias. The plurality of second transparent bridging line segments 52 may include a second sub-transparent bridging line segment 522, which may be located in the first display area 1, and which may be used to connect the second sub-signal line segments 412 in different first pixel islands through vias.

[0064] In this exemplary embodiment, Figure 2 , 3 As shown, the display panel may further include a plurality of second light-emitting units 7, a plurality of second pixel driving circuits, and a plurality of second signal line segments 42. The plurality of second light-emitting units 7 may be located in the second display area 2; the plurality of second pixel driving circuits are located in the second display area 2, and the plurality of second pixel driving circuits are arranged one-to-one with the plurality of second light-emitting units 7, and the second pixel driving circuit is used to provide driving current to the second light-emitting units 7 corresponding thereto. The positive projection area of ​​the second light-emitting unit on the substrate may be equal to the positive projection area of ​​the first light-emitting unit on the substrate. The plurality of second signal line segments 42 are located in the second display area 2, and are used to provide signals to the second pixel driving circuit. At least part of the transparent bridge line segments 5 are used to connect the first signal line segment 41 and the second signal line segment 42 through vias. The second signal line segment may include one or more of a data line, a power line, a gate drive signal line, an initial signal line, a reset signal line, and an enable signal line. The transparent bridge line segment 5 may connect the first signal line segment 41 and the second signal line segment 42 of the same type.

[0065] like Figure 3As shown, the plurality of second signal line segments 42 may include: a third sub-signal line segment 423 and a fourth sub-signal line segment 424. The orthographic projection of the third sub-signal line segment 423 on the substrate 0 may extend along the first direction X; the orthographic projection of the fourth sub-signal line segment 424 on the substrate 0 may extend along the second direction Y. The plurality of first transparent bridging line segments 51 may also include a third sub-transparent bridging line segment 513. The third sub-transparent bridging line segment 513 may be located in the first display area 1. The third sub-transparent bridging line segment 513 may be used to connect the first sub-signal line segment 411 in the first display area 1 and the third sub-signal line segment 423 in the second display area through a via hole. The plurality of second transparent bridging line segments 52 may also include a fourth sub-transparent bridging line segment 524. The fourth sub-transparent bridging line segment 524 may be located in the first display area 1. The fourth sub-transparent bridging line segment 524 may be used to connect the second sub-signal line segment 412 and the fourth sub-signal line segment 424 through a via hole.

[0066] In this exemplary embodiment, Figure 3 As shown, the pixel density of the first display area 1 can be less than the pixel density of the second display area 2, wherein the area of ​​the first display area can be X, and the pixel density of the first display area 1 is less than the pixel density of the second display area 2, which can be understood as: the number of pixel units within the area range of X in the second display area is less than the number of pixel units in the first display area. For example, the number of pixel units within the area range of X in the second display area can be four times the number of pixel units in the first display area. It should be understood that in other exemplary embodiments, the pixel density of the first display area 1 can also be equal to the pixel density of the second display area 2, and accordingly, the transmittance of the first display area can be increased by reducing the layout area of ​​the first pixel driving circuit and the first light-emitting unit in the first display area. That is, in the light-emitting units of the same color, the orthogonal projection area of ​​the first light-emitting unit on the substrate substrate can be smaller than the orthogonal projection area of ​​the second light-emitting unit on the substrate substrate. In the present disclosure, the orthogonal projections of the transparent bridge line segment, the first signal line segment, and the second signal line segment on the substrate substrate can be extended in a straight line or in a bent manner.

[0067] In this exemplary embodiment, the transparent bridge segments may be located on the same conductive layer, such as Figure 3As shown, the first transparent bridge segment 51 and the first sub-signal segment 411 connected to each other can form a first extension line 61, and the first extension line 61 can transmit the signal on the first sub-signal segment 411, and the second transparent bridge segment 52 and the second sub-signal segment 412 connected to each other can form a second extension line 62, and the second extension line 62 can transmit the signal on the second sub-signal segment 412. The first extension line 61 can be bent and extended in the positive projection of the substrate 0, and the intersection of the positive projection of the first extension line 61 on the substrate and the positive projection of the second extension line 62 on the substrate is located at the intersection of the positive projection of the second sub-signal segment 412 on the substrate and the positive projection of the first transparent bridge segment 51 on the substrate. This setting can make the transparent bridge segment extending along the first direction X and the transparent bridge segment extending along the second direction Y not intersect. It should be understood that in other exemplary embodiments, the positive projection of the first extension line 61 on the substrate substrate 0 can also extend in a straight line.

[0068] It should be understood that, in other exemplary embodiments, the first transparent bridge segment and the first sub-signal segment connected to each other can form a first extension line, and the second transparent bridge segment and the second sub-signal segment connected to each other can form a second extension line; the second extension line can be bent and extended in the orthographic projection of the substrate, and the intersection of the orthographic projection of the first extension line on the substrate and the orthographic projection of the second extension line on the substrate can be located at the intersection of the orthographic projection of the first sub-signal segment on the substrate and the orthographic projection of the second transparent bridge segment on the substrate. This setting can also make the transparent bridge segment extending along the first direction X and the transparent bridge segment extending along the second direction Y not intersect. It should be understood that, in other exemplary embodiments, the second extension line can also extend along a straight line in the orthographic projection of the substrate.

[0069] In this exemplary embodiment, Figure 2 , 3As shown, the plurality of second light-emitting units 7 may include: a first R light-emitting unit R1, a first G light-emitting unit G1, and a first B light-emitting unit B1; wherein the first R light-emitting unit R1, the first G light-emitting unit G1, and the first B light-emitting unit B1 are alternately distributed in sequence along the same light-emitting unit row, and in the same light-emitting unit row, two first G light-emitting units G1 distributed along the column direction are arranged between the first R light-emitting unit R1 and the first B light-emitting unit B1, and in adjacent light-emitting unit rows, light-emitting units of the same color are located in different light-emitting unit columns, and in two light-emitting unit rows separated by one light-emitting unit row, light-emitting units of the same color are located in the same light-emitting unit column. That is, the second light-emitting units in the second display area are distributed in an RGGB pixel structure. It should be understood that in other exemplary embodiments, the second light-emitting units in the second display area may also be distributed in other pixel structures, such as a Real RGB pixel structure.

[0070] In this exemplary embodiment, Figure 2 , 3 As shown, at least one first light-emitting unit in the first pixel island may include: a second R light-emitting unit R2, a second G light-emitting unit G2, a third G light-emitting unit G3, and a second B light-emitting unit B2. In the same first pixel island, the second G light-emitting unit G2 may be located in the first light-emitting unit row, the second R light-emitting unit R2 and the second B light-emitting unit B2 may be arranged adjacent to each other on the second light-emitting unit row, the third G light-emitting unit G3 may be located in the third light-emitting unit row, and the second light-emitting unit row may be located between the first light-emitting unit row and the third light-emitting unit row. The second B light-emitting unit B2 may be located in the first light-emitting unit column, the second G light-emitting unit G2 and the third G light-emitting unit G3 may be located in the second light-emitting unit column, the second R light-emitting unit R2 may be located in the third light-emitting unit column, and the second light-emitting unit column may be located between the first light-emitting unit column and the third light-emitting unit column. In the column direction, the second G light-emitting unit G2 and the third G light-emitting unit G3 may be spaced by one light-emitting unit row. Wherein, under the arrangement of the pixel structure of the first pixel island in the first display area, the aperture ratio of the first display area can reach 67.89%, and the light transmittance can reach 36.61%.

[0071] It should be understood that in other exemplary embodiments, the first pixel island 3 may include other numbers of light-emitting units, and the light-emitting units in the first pixel island 3 may have other pixel structure arrangements. Figure 4, which is a schematic diagram of the structure of another exemplary embodiment of the display panel of the present disclosure. In the first display area 1, the second R light emitting unit R2 and the second G light emitting unit G2 are located in the first light emitting unit row, the second B light emitting unit B2 is located in the second light emitting unit row, the third G light emitting unit G3 is located in the third light emitting unit row, and the second light emitting unit row is located between the first light emitting unit row and the third light emitting unit row; the second R light emitting unit R2 is located in the first light emitting unit column, the second B light emitting unit B2 is located in the second light emitting unit column, the second G light emitting unit G2 and the third G light emitting unit G3 are located in the third light emitting unit column, and the second light emitting unit column is located between the first light emitting unit column and the third light emitting unit column. In the column direction, the second G light emitting unit G2 and the third G light emitting unit G3 can be separated by a light emitting unit row. Correspondingly, in this pixel structure distribution, the pixel driving circuits in the first pixel island are distributed in a two-by-two array. Among them, under the arrangement of the pixel structure of the first pixel island in the first display area, the aperture ratio of the first display area can reach 71.5%, and the transmittance can reach 38.55%.

[0072] For example, Figure 5 As shown, it is a schematic diagram of the structure of another exemplary embodiment of the display panel of the present disclosure. In the first display area 1, the second R light-emitting unit R2, the second G light-emitting unit G2, and the second B light-emitting unit B2 can be located in the first light-emitting unit row, and the third G light-emitting unit G3 is located in the second light-emitting unit row, and the first light-emitting unit row and the second light-emitting unit row are arranged adjacently; the second R light-emitting unit R2 is located in the first light-emitting unit column, the second G light-emitting unit G2 is located in the second light-emitting unit column, the second B light-emitting unit B2 is located in the third light-emitting unit column, and the third G light-emitting unit G3 is located in the fourth light-emitting unit column, wherein the first light-emitting unit column, the second light-emitting unit column, the third light-emitting unit column, and the fourth light-emitting unit column are distributed sequentially in the row direction. In the column direction, the second G light-emitting unit G2 and the third G light-emitting unit G3 are adjacently arranged, that is, in the column direction, the second G light-emitting unit G2 and the third G light-emitting unit G3 do not separate the light-emitting unit row. Correspondingly, in this pixel structure distribution, the pixel driving circuits in the first pixel island are distributed sequentially in the row direction. Wherein, under the arrangement of the pixel structure of the first pixel island in the first display area, the aperture ratio of the first display area can reach 72.04%, and the light transmittance can reach 38.84%.

[0073] For example, Figure 6As shown, it is a schematic diagram of the structure of another exemplary embodiment of the display panel of the present disclosure. The second R light-emitting unit R2, the second G light-emitting unit G2, and the third G light-emitting unit G3 are located in the first light-emitting unit row, wherein the second G light-emitting unit G2 and the third G light-emitting unit G3 have a smaller area of ​​positive projection on the substrate, and the second G light-emitting unit G2 and the third G light-emitting unit G3 can be considered to be located in the same light-emitting unit row. The second B light-emitting unit B2 is located in the second light-emitting unit row, and the first light-emitting unit row and the second light-emitting unit row are arranged adjacently; the second R light-emitting unit R2 is located in the first light-emitting unit column, the second B light-emitting unit B2 is located in the second light-emitting unit column, the second G light-emitting unit G2 and the third G light-emitting unit G3 are located in the third light-emitting unit column, and the second light-emitting unit column is located between the first light-emitting unit column and the third light-emitting unit column. Correspondingly, in this pixel structure distribution, the pixel driving circuits in the first pixel island are distributed in a two-by-two array. Wherein, under the arrangement of the pixel structure of the first pixel island in the first display area, the aperture ratio of the first display area can reach 75.67%, and the transmittance can reach 40.8%.

[0074] like Figure 3 , 4 As shown in , 5, and 6, the first pixel island 3 may include an RGGB pixel unit, and an RGGB pixel unit may include an R sub-pixel, two G sub-pixels, and a B sub-pixel. It should be understood that in other exemplary embodiments, the first pixel island 3 may also include other numbers of pixel units, each pixel unit may also include other numbers of sub-pixel units, and the sub-pixel units in the same pixel unit may also be arranged in other forms, for example, the pixel units in the first pixel island may be distributed in a Real RGB arrangement.

[0075] In this exemplary embodiment, Figure 7As shown, it is a schematic diagram of the structure of another exemplary embodiment of the display panel of the present disclosure. The display panel may also include a color filter layer 8, and the color filter layer 8 may be located on the side of the first pixel island 3 away from the base substrate 0; the color filter layer 8 may include a plurality of first structural parts 81 located in the first display area, and the plurality of first structural parts 81 are arranged one by one with the plurality of first pixel islands 3, and the first structural part 81 covers the orthographic projection of the first pixel island 3 corresponding to it on the base substrate, and the first structural part 81 is arc-shaped on at least one side or one corner of the orthographic projection of the base substrate. Among them, the first structural part 81 may include: a first shading part 811 and a first filter part 812, wherein the first shading part 811 may be formed by a shading material layer, for example, the first shading part 811 may be a black photoresist layer. The first filter part 812 may adopt a color filter film. At least one opening is formed on the first light-shielding portion 811, and the openings on the first light-shielding portion 811 are arranged one-to-one corresponding to the first light-emitting units in the first pixel island 3; the first filter portion 812 is located in the opening of the first light-shielding portion 811, and the orthographic projection of the first filter portion 812 on the substrate substrate can completely overlap with the orthographic projection of the corresponding opening on the first light-shielding portion 811 on the substrate substrate, and the orthographic projection of the first filter portion 812 on the substrate substrate can cover the orthographic projection of the corresponding first light-emitting unit on the substrate substrate, and the color of the first filter portion 812 can be the same as the color of the corresponding light-emitting unit. This arrangement can shield the conductive structure of the pixel driving circuit in the first pixel island through the first structural portion 81, thereby avoiding the glare phenomenon caused by diffraction of the slender leads in the pixel driving circuit. Figure 7 As shown, the first structure portion 81 may be in the shape of a water drop when projected on the substrate. It should be understood that in other exemplary embodiments, the first structure portion 81 may also be in the shape of a rounded rectangle or other structures when projected on the substrate. A plurality of first structure portions 81 may be spaced apart from each other, thereby facilitating increasing the transmittance of the first display area. Among them, the first filter portion 812 may prevent the display panel from reflecting light. It should be understood that in other exemplary embodiments, the filter portion may not be provided in the opening in the first light shielding portion 811, and the display panel may be prevented from reflecting light by a polarizer.

[0076] In this exemplary embodiment, Figure 7As shown, the color filter layer 8 may further include a second structural portion 82 located in the second display area 2, and the second structural portion 82 may include: a second light shielding portion 821 and a second filter portion 822, wherein the second light shielding portion 821 may be formed by a light shielding material layer, for example, the second light shielding portion 821 may be formed by a black photoresist layer. The second filter portion 822 may be a color filter film. A plurality of openings are formed on the second light shielding portion 821, and the openings on the second light shielding portion 821 are arranged one-to-one with the second light emitting unit; the second filter portion 822 is located in the opening of the second light shielding portion 821, and the orthographic projection of the second filter portion 822 on the substrate substrate may completely overlap with the orthographic projection of the opening corresponding to the second light shielding portion 821 on the substrate substrate, and the orthographic projection of the second filter portion 822 on the substrate substrate may cover the orthographic projection of the corresponding second light emitting unit on the substrate substrate. The second light shielding portion 821 and the first light shielding portion 811 can be integrally formed, that is, the second light shielding portion 821 and the first light shielding portion 811 can be formed by a single patterning process. The same color filter portion in the first filter portion 812 and the second filter portion 822 can be formed by a single patterning process. The second structure portion 82 can be an integral structure, and the second structure portion 82 can cover the second display area. Similarly, the second filter portion 822 can also prevent the display panel from reflecting light.

[0077] The display panel may include a circuit layer for forming a pixel driving circuit, and the circuit layer may include an active layer, a first gate layer, a second gate layer, a first source and drain layer, a transparent conductive layer, and a second source and drain layer. Figure 8-14 As shown, Figure 8 for Figure 3 The structural layout of the active layer, Fig. 9 for Figure 3 The structural layout of the first gate layer in Fig.10 for Figure 3 The structural layout of the second gate layer in the figure. Fig.11 for Figure 3 The structural layout of the first source and drain layer in the figure. Fig.12 for Figure 3 The structural layout of the transparent conductive layer in the Fig.13 for Figure 3 The structural layout of the second source and drain layer in the figure. Fig.14 for Figure 3The stacked structure layout of the active layer, the first gate layer, the second gate layer, the first source-drain layer, the transparent conductive layer, and the second source-drain layer. The substrate, the active layer, the first gate layer, the second gate layer, the first source-drain layer, the transparent conductive layer, and the second source-drain layer are stacked in sequence. Other film layers may be arranged between the adjacent film layers, for example, an insulating layer may be arranged between the adjacent film layers. The first signal line segment 41 and the second signal line segment 42 may be located in the first source-drain layer or the second source-drain layer, and the transparent bridge line segment 5 may be located in the transparent conductive layer.

[0078] In this exemplary embodiment, Fig.14 As shown, the above-mentioned active layer, the first gate layer, the second gate layer, the first source and drain layer, the transparent conductive layer, and the second source and drain layer can form the above-mentioned first pixel driving circuit 31 and the second pixel driving circuit 32. Among them, the area of ​​the first pixel driving circuit 31 projected on the substrate can be smaller than the area of ​​the second pixel driving circuit 32 projected on the substrate. This setting can reduce the shading area of ​​the first pixel driving circuit 31 to the first display area 1, thereby improving the transmittance of the first display area 1. It should be noted that the area of ​​the pixel driving circuit projected on the substrate can be understood as the area of ​​the circumscribed rectangle of the active layer part in the pixel driving circuit, and the length and width of the circumscribed rectangle are parallel to the row and column directions respectively. For example, as Figure 8 As shown, the circumscribed rectangle corresponding to the first pixel driving circuit 31 is A, and the circumscribed rectangle corresponding to the second pixel driving circuit 32 is B.

[0079] In this exemplary embodiment, in at least one direction, the gap between the orthographic projections of two adjacent first pixel driving circuits 31 on the substrate is smaller than the gap between the orthographic projections of two adjacent second pixel driving circuits 32 on the substrate. Fig.14 As shown, in the row direction, the gap between the orthographic projections of two adjacent first pixel driving circuits 31 on the substrate substrate is smaller than the gap between the orthographic projections of two adjacent second pixel driving circuits 32 on the substrate substrate. This setting can further reduce the layout area of ​​the pixel driving circuit in the first pixel island, thereby increasing the transmittance of the first display area. It should be noted that the distance between adjacent pixel driving circuits in the row direction can be understood as the distance between adjacent edges of the above-mentioned circumscribed rectangles of adjacent pixel driving circuits in the row direction.

[0080] In this exemplary embodiment, in the same first pixel island, there is at least one first light emitting unit whose orthographic projection on the substrate substrate and the orthographic projection of the first pixel driving circuit corresponding thereto on the substrate substrate at least partially overlap. This arrangement can increase the area of ​​the light-transmitting region of the first display area, thereby increasing the light transmittance of the first display area. For example, Figure 3As shown, the orthographic projection of the second R light-emitting unit R2 on the substrate substrate and the orthographic projection of the first pixel driving circuit corresponding thereto on the substrate substrate at least partially overlap; the orthographic projection of the second B light-emitting unit B2 on the substrate substrate and the orthographic projection of the first pixel driving circuit corresponding thereto on the substrate substrate at least partially overlap; the orthographic projection of the second G light-emitting unit G2 on the substrate substrate and the orthographic projection of the first pixel driving circuit corresponding thereto on the substrate substrate at least partially overlap.

[0081] like Fig.15 , which is a schematic diagram of the circuit structure of a pixel driving circuit in an exemplary embodiment of the display panel of the present disclosure. The first pixel driving circuit and the second pixel driving circuit can both be of this circuit structure. The pixel driving circuit may include: a first transistor T1, a second transistor T2, a driving transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and a capacitor C. Among them, the first electrode of the first transistor T1 is connected to the node N, the second electrode is connected to the initial signal terminal Vinit, and the gate is connected to the reset signal terminal Re1; the first electrode of the second transistor T2 is connected to the first electrode of the driving transistor T3, the second electrode is connected to the node N; the gate is connected to the gate driving signal terminal Gate; the gate of the driving transistor T3 is connected to the node N; the first electrode of the fourth transistor T4 is connected to the data signal terminal Da, the second electrode is connected to the second electrode of the driving transistor T3, and the gate is connected to the gate driving signal terminal Gate; the first electrode of the fifth transistor T5 is connected to the first power signal terminal VDD, the second electrode is connected to the second electrode of the driving transistor T3, and the gate is connected to the enable signal terminal EM; the first electrode of the sixth transistor T6 is connected to the first electrode of the driving transistor T3, and the gate is connected to the enable signal terminal EM; the first electrode of the seventh transistor T7 is connected to the initial signal terminal Vinit, the second electrode is connected to the second electrode of the sixth transistor T6, and the gate is connected to the reset signal terminal Re2. The capacitor C is connected between the gate of the driving transistor T3 and the first power signal terminal VDD. The pixel driving circuit can be connected to a light-emitting unit OLED, which is used to drive the light-emitting unit OLED to emit light, and the light-emitting unit OLED can be connected between the second electrode of the sixth transistor T6 and the second power terminal VSS. Among them, the transistors T1 - T7 may all be P-type transistors.

[0082] like Fig.16 As shown, Fig.15A timing diagram of each node in a driving method of a pixel driving circuit. Wherein, Gate represents the timing of the gate driving signal terminal Gate, Re1 represents the timing of the reset signal terminal Re1, Re2 represents the timing of the reset signal terminal Re2, EM represents the timing of the enable signal terminal EM, and Da represents the timing of the data signal terminal Da. The driving method of the pixel driving circuit may include a reset stage t1, a compensation stage t2, and a light-emitting stage t3. In the reset stage t1: the reset signal terminal Re1 outputs a low-level signal, the first transistor T1 is turned on, and the initial signal terminal Vinit inputs an initial signal to the node N. In the compensation stage t2: the reset signal terminal Re2 and the gate driving signal terminal Gate output low-level signals, the fourth transistor T4, the second transistor T2, and the seventh transistor T7 are turned on, and at the same time, the data signal terminal Da outputs a driving signal to write a voltage Vdata+Vth to the node N, wherein Vdata is the voltage of the driving signal, Vth is the threshold voltage of the driving transistor T3, and the initial signal terminal Vinit inputs an initial signal to the second electrode of the sixth transistor T6. Light-emitting stage t3: the enable signal terminal EM outputs a low-level signal, the sixth transistor T6 and the fifth transistor T5 are turned on, and the driving transistor T3 emits light under the action of the voltage Vdata+Vth stored in the capacitor C. According to the driving transistor output current formula I=(μWCox / 2L)(Vgs-Vth) 2 , where μ is carrier mobility; Cox is the gate capacitance per unit area, W is the width of the driving transistor channel, L is the length of the driving transistor channel, Vgs is the gate-source voltage difference of the driving transistor, and Vth is the threshold voltage of the driving transistor. The output current of the driving transistor in the pixel driving circuit of the present disclosure is I = (μWCox / 2L)(Vdata+Vth-Vdd-Vth) 2 The pixel driving circuit can avoid the influence of the driving transistor threshold on its output current.

[0083] The structure of the first pixel island is described in detail below in this exemplary embodiment through a partial enlarged view of the location of the first pixel island.

[0084] like Figure 17-27 As shown, Fig.17 for Figure 3 A partial enlarged view of the first pixel island in the middle C area, Fig.18 for Fig.17 The structural layout of the active layer, Fig.19 for Fig.17 The structural layout of the first gate layer in Fig. 20 for Fig.17 The structural layout of the second gate, Fig.21 for Fig.17 The structural layout of the first source and drain layer in the figure. Fig. 22 for Fig.17 The structural layout of the transparent conductive layer in the Fig.23 for Fig.17 The structural layout of the second source and drain layer in the figure. Fig.24 for Fig.17 The stacking layout of the active layer and the first gate layer, Fig.25 for Fig.17 The stacking layout of the active layer, the first gate layer, and the second gate layer, Fig.26 for Fig.17 The stacked layout of the active layer, the first gate layer, the second gate layer, and the first source and drain layer, Fig. 27 for Fig.17 The invention discloses a stacked layout of an active layer, a first gate layer, a second gate layer, a first source-drain layer, and a transparent conductive layer.

[0085] like Fig.17 , 18 As shown in Figures 24, the active layer may include a first active portion 101, a second active portion 102, a third active portion 103, a fourth active portion 104, a fifth active portion 105, a sixth active portion 106, and a seventh active portion 107. The first active portion 101 is used to form a channel portion of the first transistor T1, the second active portion 102 is used to form a channel portion of the second transistor T2, the third active portion 103 is used to form a channel portion of the driving transistor T3, the fourth active portion 104 is used to form a channel portion of the fourth transistor T4, the fifth active portion 105 is used to form a channel portion of the fifth transistor T5, the sixth active portion 106 is used to form a channel portion of the sixth transistor T6, and the seventh active portion 107 is used to form a channel portion of the seventh transistor T7.

[0086] like Fig.17 , 19 As shown in FIG. 24 , the first gate layer may include a reset signal line Re, a gate drive signal line Gate, an enable signal line EM, and a conductive portion 203. The reset signal line Re, the gate drive signal line Gate, and the enable signal line EM may form the first sub-signal line segment mentioned above. The reset signal line Re may be used to provide Fig.15 The reset signal terminal Re1 and the reset signal terminal Re2 in Fig.19 , 24 As shown, the first pixel island 3 includes three reset signal lines Re. The reset signal line Re in the middle position can be used to provide a reset signal terminal Re2 in the upper row of pixel driving circuits in the first pixel island and a reset signal terminal Re1 in the lower row of pixel driving circuits. The gate drive signal line Gate can be used to provide Fig.15 The gate drive signal terminal in the enable signal line EM can be used to provide Fig.15The enable signal terminal in the embodiment of the present invention. Part of the structure of the reset signal line can be used to form the gates of the first transistor T1 and the seventh transistor T7. Part of the structure of the gate drive signal line Gate can be used to form the gates of the second transistor T2 and the fourth transistor T4. Part of the structure of the enable signal line EM can form the gates of the fifth transistor T5 and the sixth transistor T6. The conductive portion 203 can be used to form the gate of the drive transistor T3 and an electrode of the capacitor C.

[0087] like Fig.17 , 20 As shown in FIG. 25 , the second gate layer may include an initial signal line Vint and a conductive portion 301. The initial signal line Vint may be used to provide Fig.15 The conductive portion 301 can be used to form another electrode of the capacitor C. An opening 3011 is formed on the conductive portion 301 .

[0088] like Fig.17 , 21 As shown in FIG. 26 , the first source-drain layer may include a data line Da, a plurality of conductive portions 401, 402, 403, 404, 405, and 406. The data line Da may form the second sub-signal line segment described above, and the data line Da may be used to provide Fig.15 The data signal end in. Multiple conductive parts 401 can be connected to the two ends of the reset signal line Re, the two ends of the enable signal line EM, the two ends of part of the gate drive signal line Gate, and the two ends of part of the initial signal line Vinit through vias (black squares in the figure). The conductive part 402 can be used to connect the initial signal line Vinit and the active layer on one side of the first active part 101 through vias, so as to connect the second pole and the initial signal end of the first transistor T1. The conductive part 403 can be used to connect the active layer on one side of the first active part 101 and the conductive part 203 through vias, so as to connect the first pole of the first transistor T1 and the gate of the driving transistor T3. Among them, the via for connecting the conductive part 403 and the conductive part 203 runs through the opening 3011 on the conductive part 301 to avoid short circuit between the conductive part 403 and the conductive part 301. The conductive part 404 is used to connect the conductive part 301 and the active layer on one side of the fifth active part 105 through vias, so as to connect the first pole of the fifth transistor T5 and an electrode of the capacitor C. The conductive portion 405 can be used to connect the active layer on one side of the seventh active portion 107 through a via hole to connect the second electrode of the seventh transistor. The conductive portion 406 is used to connect the initial signal line Vinit and the active layer on one side of the seventh active portion 107 through a via hole to connect the first electrode and the initial signal terminal of the seventh transistor T7.

[0089] like Fig.17 , 22As shown in Figures 27, the transparent conductive layer may include a plurality of first sub-transparent bridge segments 511, a plurality of second sub-transparent bridge segments 522, a conductive portion 501, and a conductive portion 502. The conductive portion 501 is connected to the conductive portion 404 through a via, and the conductive portion 502 is connected to the conductive portion 405 through a via. The plurality of first sub-transparent bridge segments 511 may be connected to the initial signal line, the gate drive signal line, the reset signal line, the enable signal line, and other signal lines extending in the row direction through the conductive portion 401. The second sub-transparent bridge segment 522 may be connected to the data signal line through the conductive portion 401.

[0090] like Fig.17 , 23 As shown, the second source-drain layer may include a power line VDD and a conductive portion 601. The power line VDD may be connected to the second sub-transparent bridge segment 522 through a via hole. In addition, the power line VDD may be connected to the conductive portion 501 through a via hole to connect Fig.15 The first power supply terminal VDD and the fifth transistor T5 and an electrode of the capacitor. The conductive part 601 can be connected to the conductive part 502 through a via hole, and the conductive part 601 can be used to connect the anode of the light-emitting unit. The power line VDD can form the above-mentioned second sub-signal line segment.

[0091] like Fig.17 , 21 As shown in , 26, the first source-drain layer may further include a first connection line 407. The first connection line 407 may be connected to the gate drive signal line Gate in the pixel drive circuit of the previous row and the reset signal line Re in the pixel drive circuit of the next row through via holes, respectively, wherein the gate drive signal line Gate in the pixel drive circuit of the previous row may provide a gate drive signal to the first transistor T1 in the pixel drive circuit of the previous row, and the reset signal line Re in the pixel drive circuit of the next row may provide a gate drive signal to the seventh transistor T7 in the pixel drive circuit of the previous row. Fig.16 It can be seen that the reset signal terminal Re2 and the gate drive signal terminal Gate have the same timing, so the pixel drive circuit of the previous row can provide the gate drive signal through the reset signal line Re in the next row, so that the gate drive signal line Gate in the pixel drive circuit of this row can be connected to other signal lines without the transparent bridge line segment. On the one hand, this setting can reduce the number of transparent bridge lines in the first display area, thereby increasing the transmittance of the first display area; on the other hand, this setting can increase the layout space of the first display area to facilitate layout design.

[0092] like Fig.17 , 21As shown in , 26, the first source-drain layer may further include a second connection line 408, and the second connection line 408 may be connected to a plurality of initial signal lines Vinit in the first pixel island through vias. In the same first pixel island, at least some of the initial signal lines Vinit may not be connected to other signal lines through transparent bridge segments. For example, Fig.21 , 26 As shown, the first pixel island may include three initial signal lines Vinit, and the initial signal line Vinit located in the middle may not be connected to other signal lines through a transparent bridge line segment. On the one hand, this setting can reduce the transparent signal lines in the first display area, thereby increasing the light transmittance of the first display area; on the other hand, this setting can also reduce the impedance load (RCloading) of the initial signal line Vinit.

[0093] like Fig.17 As shown, the first pixel island may include a first sub-pixel driving circuit 311 located in the first row and three second sub-pixel driving circuits 312 located in the second row, and the first sub-pixel driving circuit 311 and the second sub-pixel driving circuit 312 located in the middle position in the second row are located in the same column. The first pixel island may include three data lines Da, and the data lines Da located on both sides of the first pixel island may be bent and extended in the column direction, wherein the two data lines may be bent along a position biased toward the first sub-pixel driving circuit 311. The first pixel island may include three power lines VDD, and the power lines VDD located on both sides of the first pixel island may be bent and extended in the column direction, wherein the two power lines VDD may be bent along a position biased toward the first sub-pixel driving circuit 311. This arrangement may reduce the area of ​​the first pixel island, thereby increasing the light transmittance of the first display area. As shown Fig.17 As shown, the orthographic projections of the power line VDD and the data line Da located on the same side of the first pixel island on the substrate at least partially overlap, and this arrangement can further reduce the area of ​​the first pixel island.

[0094] like Fig.28 As shown, an exemplary embodiment of the display panel of the present disclosure is shown. Fig.17 The partial cross-sectional view of the dashed line D in the figure only shows Fig.17 The display panel may further include: a buffer layer 801, a first insulating layer 802, a second insulating layer 803, a dielectric layer 804, a passivation layer 805, a first flat layer 806, a second flat layer 807, and an anode layer 701. The substrate 0, the buffer layer 801, the active layer, the first insulating layer 802, the first gate layer, the second insulating layer 803, the second gate layer, the dielectric layer 804, the first source and drain layer, the passivation layer 805, the transparent conductive layer, the first flat layer 806, the second source and drain layer, the second flat layer 807, and the anode layer 701 may be stacked in sequence.

[0095] Among them, the first insulating layer 802 and the second insulating layer 803 can be silicon oxide layers, and the dielectric layer 804 can be a silicon nitride layer. The passivation layer and the buffer layer can both be silicon oxide layers. The first gate layer, the second gate layer, the first source and drain layer, and the second source and drain layer can all be formed by at least one metal layer. For example, the first gate layer, the second gate layer, the first source and drain layer, and the second source and drain layer can all be formed by stacking a first titanium layer, an aluminum layer, and a second titanium layer in sequence. The transparent conductive layer can be an indium tin oxide layer. The substrate substrate can be formed by an insulating material, for example, the substrate substrate can include a first polyimide (PI) layer, a first silicon oxide (SiO) layer, an amorphous silicon layer, a second polyimide (PI) layer, and a second silicon oxide layer arranged in sequence.

[0096] In this exemplary embodiment, a plurality of power supply lines in the second source-drain layer may be connected to each other. Figure 3 As shown, part of the power line VDD in the second display area can be disconnected in the first display area. On the one hand, this setting can reduce the impedance load (RC loading) of the power line VDD; on the other hand, this setting can reduce the number of transparent bridge segments in the first display area, thereby increasing the light transmittance of the first display area.

[0097] This exemplary embodiment also provides a display device, which includes: the above-mentioned display panel and a sensor device, wherein the sensor device is directly opposite to the first display area of ​​the display panel. The display device can be a display device such as a mobile phone or a tablet computer.

[0098] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing what is disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary technical means in the art that are not disclosed in the present disclosure. The specification and embodiments are to be considered merely as exemplary, and the true scope and spirit of the present disclosure are indicated by the claims.

[0099] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A display panel, wherein: The display panel includes a first display area and a second display area, and the display panel further includes: A plurality of first pixel islands, wherein the first pixel islands are located in the first display area, and the first pixel islands include: at least one first light emitting unit; at least one first pixel driving circuit, arranged in one-to-one correspondence with the first light-emitting units, the first pixel driving circuit being used to provide a driving current to the first light-emitting unit corresponding thereto; A plurality of first signal line segments, used for providing signals to the first pixel driving circuit; A plurality of transparent bridge line segments are located in the first display area, and at least some of the transparent bridge line segments are used to connect the first signal line segments in different first pixel islands through vias.

2. The display panel according to claim 1, wherein: The display panel further includes: A base substrate, wherein the first pixel island is located on one side of the base substrate; The plurality of first signal line segments include: A first signal line segment, the orthographic projection of which on the substrate extends along a first direction; A second signal line segment, the orthographic projection of which on the substrate extends along a second direction, wherein the first direction and the second direction intersect; The plurality of transparent bridge line segments include a first transparent bridge line segment and a second transparent bridge line segment, wherein the first transparent bridge line segment includes: A first sub-transparent bridge line segment, located in the first display area, the first sub-transparent bridge line segment is used to connect the first sub-signal line segments in different first pixel islands through vias; The plurality of second transparent bridge line segments include: The second sub-transparent bridge line segment is located in the first display area, and the second sub-transparent bridge line segment is used to connect the second sub-signal line segments in different first pixel islands through vias.

3. The display panel according to claim 2, wherein: The display panel further includes: A plurality of second light emitting units, located in the second display area; a plurality of second pixel driving circuits, located in the second display area, the plurality of second pixel driving circuits being arranged in one-to-one correspondence with the plurality of second light-emitting units, the second pixel driving circuits being used to provide driving currents to the second light-emitting units corresponding thereto; a plurality of second signal line segments, located in the second display area, and used for providing signals to the second pixel driving circuit; At least part of the transparent bridge line segments are used to connect the first signal line segment and the second signal line segment through vias.

4. The display panel according to claim 3, wherein: The plurality of second signal line segments include: A third signal line segment, an orthographic projection of the substrate extending along the first direction; A fourth signal line segment, an orthographic projection of the substrate extending along the second direction; The plurality of first transparent bridge line segments further include: A third sub-transparent bridging line segment, located in the first display area, the third sub-transparent bridging line segment is used to connect the first sub-signal line segment and the third sub-signal line segment through a via hole; The plurality of second transparent bridge line segments further include: A fourth sub-transparent bridging line segment is located in the first display area, and the fourth sub-transparent bridging line segment is used to connect the second sub-signal line segment and the fourth sub-signal line segment through a via hole.

5. The display panel according to any one of claims 2 to 4, wherein: The first transparent bridge line segment and the first sub-signal line segment connected to each other form a first extension line, and the second transparent bridge line segment and the second sub-signal line segment connected to each other form a second extension line; The intersection of the orthographic projection of the first extension line on the substrate and the orthographic projection of the second extension line on the substrate is located at the intersection of the orthographic projection of the second sub-signal line segment on the substrate and the orthographic projection of the first transparent bridge line segment on the substrate.

6. The display panel according to any one of claims 2 to 4, wherein: The first transparent bridge line segment and the first sub-signal line segment connected to each other form a first extension line, and the second transparent bridge line segment and the second sub-signal line segment connected to each other form a second extension line; The intersection of the orthographic projection of the first extension line on the substrate and the orthographic projection of the second extension line on the substrate is located at the intersection of the orthographic projection of the first sub-signal line segment on the substrate and the orthographic projection of the second transparent bridge line segment on the substrate.

7. The display panel according to claim 2, wherein: There are a plurality of first sub-signal line segments, and there are a plurality of second sub-signal line segments; The plurality of first signal line segments include one or more of a gate drive signal line, an enable signal line, an initial signal line, and a reset signal line; The plurality of second signal line segments include one or more of data lines and power lines.

8. The display panel according to claim 7, wherein: At least part of the first pixel islands include first connecting lines; In the first pixel island, the first sub-signal line segment includes a gate drive signal line and a reset signal line, and the gate drive signal line and the reset signal line having the same timing signal are connected through the first connecting line; Among the gate driving signal lines and the reset signal lines connected through the first connecting line, only one signal line is connected to the other corresponding signal lines through the first transparent bridge line segment.

9. The display panel according to claim 7, wherein: At least part of the first pixel islands include a second connection line; In the first pixel island, the first sub-signal line segment includes n initial signal lines, where n is a positive integer greater than 1, and the n initial signal lines in the first pixel island are electrically connected through the second connecting line; Among the n initial signal lines connected through the second connecting line, there are m initial signal lines connected to other corresponding signal lines through the first transparent bridge line segment, where m is a positive integer less than or equal to n and greater than 0.

10. The display panel according to claim 1, wherein: The display panel further includes: substrate substrate; A first pixel driving circuit, located in the first display area; A second pixel driving circuit is located in the second display area; The area of ​​the first pixel driving circuit projected on the base substrate is smaller than the area of ​​the second pixel driving circuit projected on the base substrate.

11. The display panel according to claim 1, wherein: The display panel further includes: substrate substrate; A first pixel driving circuit, located in the first display area; A second pixel driving circuit is located in the second display area; Wherein, in at least one direction, a gap between two adjacent orthographic projections of the first pixel driving circuits on the substrate is smaller than a gap between two adjacent orthographic projections of the second pixel driving circuits on the substrate.

12. The display panel according to claim 1, wherein: The display panel further includes: A base substrate, wherein the first pixel island is located on one side of the base substrate; In the same first pixel island, there is at least one first light-emitting unit, whose orthographic projection on the base substrate at least partially overlaps with the orthographic projection of the first pixel driving circuit corresponding thereto on the base substrate.

13. The display panel according to claim 3, wherein: The plurality of second light emitting units include: a first R light emitting unit, a first G light emitting unit, and a first B light emitting unit; The first R light-emitting unit, the first G light-emitting unit, and the first B light-emitting unit are alternately distributed along the same light-emitting unit row, and in the same light-emitting unit row, two first G light-emitting units distributed along the column direction are arranged between the first R light-emitting unit and the first B light-emitting unit, and in adjacent light-emitting unit rows, light-emitting units of the same color are located in different light-emitting unit columns, and in two light-emitting unit rows separated by one light-emitting unit row, light-emitting units of the same color are located in the same light-emitting unit column; The first light-emitting unit in the first pixel island includes: a second R light-emitting unit, a second G light-emitting unit, a third G light-emitting unit, and a second B light-emitting unit.

14. The display panel according to claim 13, wherein: In the same first pixel island, the second G light-emitting unit is located in a first light-emitting unit row, the second R light-emitting unit and the second B light-emitting unit are adjacently arranged on the second light-emitting unit row, the third G light-emitting unit is located in a third light-emitting unit row, and the second light-emitting unit row is located between the first light-emitting unit row and the third light-emitting unit row; The second B light emitting unit is located in the first light emitting unit column, the second G light emitting unit and the third G light emitting unit are located in the second light emitting unit column, the second R light emitting unit is located in the third light emitting unit column, and the second light emitting unit column is located between the first light emitting unit column and the third light emitting unit column.

15. The display panel according to claim 13, wherein: The second R light emitting unit and the second G light emitting unit are located in a first light emitting unit row, the second B light emitting unit is located in a second light emitting unit row, the third G light emitting unit is located in a third light emitting unit row, and the second light emitting unit row is located between the first light emitting unit row and the third light emitting unit row; The second R light emitting unit is located in the first light emitting unit column, the second B light emitting unit is located in the second light emitting unit column, the second G light emitting unit and the third G light emitting unit are located in the third light emitting unit column, and the second light emitting unit column is located between the first light emitting unit column and the third light emitting unit column.

16. The display panel according to claim 13, wherein: The second R light emitting unit, the second G light emitting unit, and the second B light emitting unit are located in a first light emitting unit row, the third G light emitting unit is located in a second light emitting unit row, and the first light emitting unit row and the second light emitting unit row are adjacently arranged; The second R light emitting unit is located in the first light emitting unit column, the second G light emitting unit is located in the second light emitting unit column, the second B light emitting unit is located in the third light emitting unit column, and the third G light emitting unit is located in the fourth light emitting unit column, wherein the first light emitting unit column, the second light emitting unit column, the third light emitting unit column, and the fourth light emitting unit column are distributed sequentially in the row direction.

17. The display panel according to claim 13, wherein: The second R light emitting unit, the second G light emitting unit, and the third G light emitting unit are located in a first light emitting unit row, the second B light emitting unit is located in a second light emitting unit row, and the first light emitting unit row and the second light emitting unit row are adjacently arranged; The second R light emitting unit is located in the first light emitting unit column, the second B light emitting unit is located in the second light emitting unit column, the second G light emitting unit and the third G light emitting unit are located in the third light emitting unit column, and the second light emitting unit column is located between the first light emitting unit column and the third light emitting unit column.

18. The display panel according to claim 1, wherein: The display panel further includes: A base substrate, wherein the first pixel island is located on one side of the base substrate; a color filter layer, the color filter layer being located on a side of the first pixel island away from the base substrate; The color filter layer includes a plurality of first structural parts located in the first display area, the plurality of first structural parts are arranged in one-to-one correspondence with the plurality of first pixel islands, the orthographic projection of the first structural part on the base substrate covers the orthographic projection of the first pixel island corresponding thereto on the base substrate, and at least one side or one corner of the orthographic projection of the first structural part on the base substrate is arc-shaped; The first structural part comprises: A first light shielding portion, wherein at least one opening is formed on the first light shielding portion, and the openings on the first light shielding portion are arranged in a one-to-one correspondence with the first light-emitting units in the first pixel island; The first filter portion is located in the opening of the first light shielding portion, and the orthographic projection of the first filter portion on the base substrate covers the orthographic projection of the first light emitting unit corresponding thereto on the base substrate.

19. The display panel according to claim 18, wherein: The display panel further includes: a plurality of second light emitting units located in the second display area, the color filter layer further includes a second structural portion located in the second display area, and the second structural portion includes: A second light shielding portion, wherein a plurality of openings are formed on the second light shielding portion, and the openings on the second light shielding portion are arranged in a one-to-one correspondence with the second light-emitting units; The second filter portion is located in the opening of the second light shielding portion, and the orthographic projection of the second filter portion on the base substrate covers the orthographic projection of the corresponding second light emitting unit on the base substrate.

20. The display panel according to claim 1, wherein: The display panel further includes: A base substrate, wherein the first pixel island is located on one side of the base substrate; A second light emitting unit, located in the second display area; The pixel density of the first display area is less than or equal to the pixel density of the second display area; Among the light-emitting units of the same color, the orthographic projection area of ​​the first light-emitting unit on the base substrate is smaller than or equal to the orthographic projection area of ​​the second light-emitting unit on the base substrate.

21. A display device, wherein: include: The display panel according to any one of claims 1 to 20; A sensor device is directly opposite to the first display area of ​​the display panel.

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