Display panel and manufacturing method thereof, and display device

By designing the first planarization layer in the peripheral area of ​​the OLED display panel closer to the display area and setting an appropriate distance design in the second peripheral area, the problem of poor display of the display area close to the corner area is solved, and the display effect is improved and Package performance.

CN113133330BActive Publication Date: 2025-02-07BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN201980002179.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-10-30
Publication Date
2025-02-07
Estimated Expiration
2040-05-23

AI Technical Summary

Technical Problem

The packaging performance of the OLED display panel is insufficient, resulting in poor display problems such as growing black spots in the display area close to the corner area.

Method used

A peripheral area structure of a display panel is designed, wherein the first planarization layer is closer to the display area than the first cofferdam, and a design with a second distance greater than the first distance is provided in the second peripheral area to prevent the organic layer from climbing Pass the cofferdam and reduce the ingress of water vapor and oxygen.

Benefits of technology

It effectively reduces the poor display problem of the display area near the corner area, improves the display effect of the display panel, and enhances the waterproof and oxygen-proof performance of the packaging layer.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a display panel and a manufacturing method thereof, and a display device, which relate to the field of display technology. The display panel includes: a display area; and a peripheral area surrounding the display area, including a first peripheral area and a second peripheral area adjacent to the first peripheral area. The peripheral area includes: a substrate; a first planarization layer located on the substrate; a first cofferdam located on the substrate, including a corner portion located in the first peripheral area and a straight edge portion located in the second peripheral area, and the first planarization layer is closer to the display area than the first cofferdam. The edge of the orthographic projection of the first planarization layer on the substrate away from the display area is the first edge, and the edge of the orthographic projection of the first cofferdam on the substrate close to the display area is the second edge; in the first peripheral area, the minimum distance between the first edge and the second edge is the first distance; in the second peripheral area, the minimum distance between the first edge and the second edge is the second distance, and the second distance is greater than the first distance.
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Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] With the development of display technology, organic light emitting diode (OLED) display panels have developed rapidly due to their own advantages.

[0003] The packaging performance of the OLED display panel will affect the display performance of the OLED display panel. Summary of the invention

[0004] According to one aspect of an embodiment of the present disclosure, a display panel is provided, comprising: a display area; and a peripheral area surrounding the display area, including a first peripheral area and a second peripheral area adjacent to the first peripheral area. The peripheral area comprises: a substrate; a first planarization layer located on the substrate; a first dam located on the substrate, including a corner portion located in the first peripheral area and a straight edge portion located in the second peripheral area, and the first planarization layer is closer to the display area than the first dam. The edge of the orthographic projection of the first planarization layer on the substrate away from the display area is the first edge, and the edge of the orthographic projection of the first dam on the substrate close to the display area is the second edge; in the first peripheral area, the minimum distance between the first edge and the second edge is the first distance; in the second peripheral area, the minimum distance between the first edge and the second edge is the second distance, and the second distance is greater than the first distance.

[0005] In some embodiments, the first cofferdam includes a first surface away from the substrate and a second surface close to the display area and adjacent to the first surface, and an angle between the second surface and the first surface is an obtuse angle.

[0006] In some embodiments, the first cofferdam includes a third surface away from the display area and adjacent to the first surface, and an angle between the third surface and the first surface is an obtuse angle.

[0007] In some embodiments, the first cofferdam includes a first portion and a second portion covering the first portion.

[0008] In some embodiments, the display area includes a second planarization layer, a third planarization layer located on the second planarization layer, a pixel defining layer located on the third planarization layer, and a spacer layer located on the pixel defining layer, the material of the second planarization layer is the same as the material of the first planarization layer; the material of the first portion is the same as the material of one of the third planarization layer and the pixel defining layer; the material of the second portion is the same as the material of one of the pixel defining layer and the spacer layer, and is different from the material of the first portion.

[0009] In some embodiments, the first cofferdam further includes a third portion covering the second portion.

[0010] In some embodiments, the material of the first portion is the same as that of the third planarization layer; the material of the second portion is the same as that of the pixel definition layer; and the material of the third portion is the same as that of the spacer layer.

[0011] In some embodiments, the material of the second planarization layer is integrally provided with the first planarization layer.

[0012] In some embodiments, the peripheral area further includes a second cofferdam located on a side of the first cofferdam away from the display area, and the second cofferdam includes a fourth portion, a fifth portion covering the fourth portion, a sixth portion covering the fifth portion, and a seventh portion covering the sixth portion. The material of the fourth portion is the same as that of the second planarization layer; the material of the fifth portion is the same as that of the third planarization layer; the material of the sixth portion is the same as that of the pixel definition layer; and the material of the seventh portion is the same as that of the spacer layer.

[0013] In some embodiments, the peripheral area also includes an encapsulation layer, and the encapsulation layer includes: a first inorganic layer, the orthographic projection of the first inorganic layer on the substrate covers the orthographic projection of the first planarization layer on the substrate, the orthographic projection of the first cofferdam on the substrate, and a portion between the first edge and the second edge; an organic layer, located on a side of the first inorganic layer away from the substrate, the orthographic projection of the organic layer on the substrate away from the edge of the display area is closer to the display area than the second edge; and a second inorganic layer, covering the surface of the organic layer and the surface of the first inorganic layer not covered by the organic layer.

[0014] In some embodiments, an orthographic projection of the organic layer on the substrate is located away from an edge of the display area and between the first edge and the second edge.

[0015] In some embodiments, an edge of an orthographic projection of the organic layer on the substrate away from the display area does not overlap with the first edge.

[0016] In some embodiments, the corner portion is adjacent to the straight side portion.

[0017] In some embodiments, the first edge includes a first corner edge and a first straight edge intersecting at M, the second edge includes a second corner edge and a second straight edge intersecting at N, and M and N are not on the same horizontal line.

[0018] In some embodiments, a ratio of a maximum distance to a minimum distance between the first edge and the second edge is less than or equal to 1.2.

[0019] In some embodiments, the corner portion is arc-shaped.

[0020] In some embodiments, the peripheral region also includes: a first insulating layer located on the substrate; a second insulating layer located on a side of the first insulating layer away from the substrate; a third insulating layer located on a side of the second insulating layer away from the first insulating layer; and a first metal layer located on a side of the third insulating layer away from the second insulating layer, and the first planarization layer is located on the first metal layer.

[0021] According to another aspect of the embodiments of the present disclosure, there is provided a display device, comprising: the display panel described in any one of the above embodiments.

[0022] According to another aspect of the embodiments of the present disclosure, a method for manufacturing a display panel is provided, comprising: forming a display area and a peripheral area surrounding the display area, the peripheral area comprising a first peripheral area and a second peripheral area adjacent to the first peripheral area. Forming the peripheral area comprises: providing a substrate; forming a first planarization layer on the substrate; and forming a first cofferdam on the substrate, the first cofferdam comprising a corner portion located in the first peripheral area and a straight edge portion located in the second peripheral area, the first planarization layer being closer to the display area than the first cofferdam. The edge of the orthographic projection of the first planarization layer on the substrate away from the display area is the first edge, and the edge of the orthographic projection of the first cofferdam on the substrate close to the display area is the second edge; in the first peripheral area, the minimum distance between the first edge and the second edge is the first distance; in the second peripheral area, the minimum distance between the first edge and the second edge is the second distance, and the second distance is greater than the first distance.

[0023] In some embodiments, forming the first cofferdam includes: forming a first portion; and forming a second portion covering the first portion.

[0024] In some embodiments, the display area includes a second planarization layer, a third planarization layer located on the second planarization layer, a pixel defining layer located on the third planarization layer, and a spacer layer located on the pixel defining layer, and the material of the second planarization layer is the same as that of the first planarization layer; the first portion and one of the third planarization layer and the pixel defining layer are formed by a first patterning process; the second portion and one of the pixel defining layer and the spacer layer are formed by a second patterning process, and the material of the second portion is different from that of the first portion.

[0025] In some embodiments, forming the first cofferdam further comprises: forming a third portion covering the second portion.

[0026] In some embodiments, the first portion and the third planarization layer are formed by the first patterning process; the second portion and the pixel definition layer are formed by the second patterning process; and the third portion and the spacer layer are formed by a third patterning process.

[0027] In some embodiments, forming the peripheral area also includes forming an encapsulation layer, and forming the encapsulation layer includes: forming a first inorganic layer, the orthographic projection of the first inorganic layer on the substrate covers the orthographic projection of the first planarization layer on the substrate, the orthographic projection of the first cofferdam on the substrate, and the portion between the first edge and the second edge; forming an organic layer located on a side of the first inorganic layer away from the substrate, the orthographic projection of the organic layer on the substrate away from the edge of the display area is closer to the display area than the second edge; and forming a second inorganic layer, covering the surface of the organic layer and the surface of the first inorganic layer not covered by the organic layer.

[0028] In some embodiments, forming the peripheral region also includes: forming a first insulating layer on the substrate; forming a second insulating layer on a side of the first insulating layer away from the substrate; forming a third insulating layer on a side of the second insulating layer away from the first insulating layer; and forming a first metal layer on a side of the third insulating layer away from the second insulating layer, the first planarization layer being formed on the first metal layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings, which constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0030] The present disclosure may be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0031] Figure 1A and Figure 1Bis a schematic top view showing a display panel according to an embodiment of the present disclosure;

[0032] Figure 1C is a diagram showing an embodiment of the present disclosure along Figure 1B A schematic cross-sectional view taken along line BB' is shown;

[0033] Figure 1D is a partially enlarged schematic diagram showing a peripheral area according to an embodiment of the present disclosure;

[0034] Figure 2 is a diagram showing another embodiment of the present disclosure. Figure 1B A schematic cross-sectional view taken along line BB' is shown;

[0035] Figure 3A is a diagram showing another embodiment according to the present disclosure Figure 1B A schematic cross-sectional view taken along line BB' is shown;

[0036] Figure 3B is a cross-sectional schematic diagram of a display area according to an embodiment of the present disclosure;

[0037] Figure 4A-4F is a schematic cross-sectional view showing structures obtained at different stages of forming a non-display area according to some embodiments of the present disclosure;

[0038] Figure 5A-5E Schematic cross-sectional views showing structures obtained at different stages of forming the second portion of the first cofferdam according to some embodiments of the present disclosure.

[0039] It should be understood that the size of each part shown in the accompanying drawings is not necessarily drawn according to the actual proportional relationship. In addition, the same or similar reference numerals represent the same or similar components. DETAILED DESCRIPTION

[0040] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. The description of the exemplary embodiments is merely illustrative and is in no way intended to limit the present disclosure and its application or use. The present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided to make the present disclosure thorough and complete and to fully express the scope of the present disclosure to those skilled in the art. It should be noted that unless otherwise specifically stated, the relative arrangement of the components and steps, the composition of the materials, the numerical expressions and the numerical values ​​set forth in these embodiments should be interpreted as being merely exemplary and not as limiting.

[0041] The words "first", "second" and similar words used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different parts. The words "include" or "comprises" and similar words mean that the elements before the word include the elements listed after the word, and do not exclude the possibility of including other elements. "Up", "down" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0042] In the present disclosure, when a specific component is described as being located between a first component and a second component, there may or may not be an intermediate component between the specific component and the first component or the second component. When a specific component is described as being connected to other components, the specific component may be directly connected to the other components without an intermediate component, or may not be directly connected to the other components but have an intermediate component.

[0043] All terms (including technical terms or scientific terms) used in the present disclosure have the same meanings as those understood by ordinary technicians in the field to which the present disclosure belongs, unless otherwise specifically defined. It should also be understood that terms defined in general dictionaries, such as general dictionaries, should be interpreted as having meanings consistent with their meanings in the context of the relevant technology, and should not be interpreted in an idealized or extremely formal sense, unless explicitly defined herein.

[0044] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0045] The inventors noticed that the display area of ​​the OLED display panel near the corner is more prone to display defects such as growing dark spots (GDS) than other areas. In the related art, in order to more effectively prevent water vapor and oxygen from entering the display area, a certain distance is set between the planarization layer in the peripheral area and the cofferdam in the peripheral area closer to the display area. However, in the process of forming the organic layer in the encapsulation layer, the organic layer is easy to climb over the cofferdam. Once cracks appear in the encapsulation layer, water vapor and oxygen can easily enter the organic layer along the cracks in the encapsulation layer.

[0046] Based on this, the embodiments of the present disclosure provide the following technical solutions.

[0047] Figure 1A and Figure 1B is a schematic top view of a display panel according to an embodiment of the present disclosure.

[0048] like Figure 1A As shown, the display panel includes a display area 10 and a peripheral area 20 surrounding the display area 10. Here, Figure 1AThe display area 10 and the peripheral area 20 are shown in simplified form. Figure 1B The structure of the peripheral area 20 is shown in detail below. Figure 1B The structure of the peripheral area 20 is described.

[0049] like Figure 1B As shown, the peripheral region 20 includes a first peripheral region 21 and a second peripheral region 22 adjacent to the first peripheral region 21 .

[0050] Figure 1C is a diagram showing an embodiment of the present disclosure along Figure 1A The cross-sectional view taken along the line BB' is shown. Here, Figure 1C The structure of the peripheral area 20 is shown in an emphasized manner, while the display area 10 is shown in a simplified manner.

[0051] It should be noted that if Figure 1B As shown, BB' can be located in the first peripheral area 21 or in the second peripheral area 22. Therefore, Figure 1C The cross-sectional view shown may represent a cross-sectional schematic diagram taken along line BB′ located in the first peripheral region 21 , or may represent a cross-sectional schematic diagram taken along line BB′ located in the second peripheral region 22 .

[0052] like Figure 1C As shown, the peripheral region 20 includes a substrate 211, a first planarization layer 202 located on the substrate 211, and a first bank 203 located on the substrate 211 and surrounding the display region 10. Here, the first planarization layer 202 is closer to the display region 10 than the first bank 203.

[0053] In some embodiments, the peripheral region 20 may further include a first insulating layer 221 located on the substrate 211, and a second insulating layer 231 located on a side of the first insulating layer 221 away from the substrate 211. It should be understood that the first insulating layer 221 and the first insulating layer 231 may extend from the display region 10 to the peripheral region 20, for example.

[0054] See also Figure 1B , the first cofferdam 203 includes a corner portion R located in the first peripheral area 21 and a straight edge portion L located in the second peripheral area 22. In some embodiments, the corner portion R and the straight edge portion L may be adjacent. Here, the corner portion R may be located at the four corners of the display area 10, or may be located at a special-shaped area of ​​the display area 10, such as a notch area. In some embodiments, the shape of the corner portion R may include but is not limited to an arc.

[0055] It should be understood that the first cofferdam 203 may include a plurality of corner portions R and a plurality of straight side portions L. Each corner portion R is adjacent to two straight side portions L, and each straight side portion L is adjacent to two corner portions R. Accordingly, the peripheral area 20 may include a plurality of first peripheral areas 21 and a plurality of second peripheral areas 22. Each first peripheral area 21 is adjacent to two second peripheral areas 22, and each second peripheral area 22 is adjacent to two first peripheral areas 21.

[0056] like Figure 1C As shown, the edge of the orthographic projection of the first planarization layer 202 on the substrate 211 away from the display area 10 is defined as the first edge 202A, and the edge of the orthographic projection of the first cofferdam 203 on the substrate 211 close to the display area 10 is defined as the second edge 203A. In addition, the minimum distance between the first edge 202A and the second edge 203A is defined as d. Here, the minimum distance d can be understood as the minimum value of the distances between each point on the first edge 202A and each point on the second edge 203A.

[0057] Here, for distinction, the distance d between the first edge 202A and the second edge 203A in the first peripheral region 21 is referred to as a first distance d1 , and the distance d between the first edge 202A and the second edge 203A in the second peripheral region 22 is referred to as a second distance d2 .

[0058] Figure 1B The first distance d1 and the second distance d2 are schematically shown. Figure 1B It can be seen that the second distance d2 is greater than the first distance d1. In some embodiments, the ratio of the maximum distance to the minimum distance between the first edge 202A and the second edge 203A is less than or equal to 1.2.

[0059] In the display panel of the above embodiment, the distance between the first edge 202A and the second edge 203A in the second peripheral area 22 is greater than the distance between the first edge 202A and the second edge 203A in the first peripheral area 21. In this way, the organic layer in the encapsulation layer of the first peripheral area 21 can be guided to the second peripheral area 21, so that the organic layer is not easy to climb over the first cofferdam 203, thereby alleviating the problem of poor display in the area near the corner of the display area 10 and improving the display effect of the display panel.

[0060] In some embodiments, see Figure 1B The peripheral area 20 may further include a second cofferdam 203' surrounding the display area 10 and located on the side of the first cofferdam 203 away from the display area 10. The height of the second cofferdam 203' may be higher than that of the first cofferdam 203, thereby more effectively preventing water vapor and oxygen from entering the display area 10.

[0061] In some embodiments, Figure 1CAs shown, the peripheral region 20 may further include an encapsulation layer 204. Here, the encapsulation layer 204 may include a first inorganic layer 214, an organic layer 224, and a second inorganic layer 234.

[0062] The orthographic projection of the first inorganic layer 214 on the substrate 211 covers the orthographic projection of the first planarization layer 202 on the substrate 211 , the orthographic projection of the first bank 203 on the substrate 211 , and a portion between the first edge 202A and the second edge 203A.

[0063] The organic layer 224 is located on the side of the first inorganic layer 214 away from the substrate 211. The edge of the orthographic projection of the organic layer 224 on the substrate 211 away from the display area 10 is closer to the display area 10 than the second edge 203A. That is, the organic layer 224 will not climb over the first cofferdam 203. In some implementations, see Figure 1C , the edge of the orthographic projection of the organic layer 224 on the substrate 211 away from the display area 10 is between the first edge 202A and the second edge 203A. In other implementations, the edge of the orthographic projection of the organic layer 224 on the substrate 211 away from the display area 10 does not overlap with the first edge 202A. In other words, the edge of the orthographic projection of the organic layer 224 on the substrate 211 away from the display area 10 is closer to the display area 10 than the first edge 202A.

[0064] The second inorganic layer 234 covers the surface of the organic layer 224 and the surface of the first inorganic layer 214 not covered by the organic layer 224. Here, the second inorganic layer 234 is in contact with the surface of the first inorganic layer 214 not covered by the organic layer 224.

[0065] As some implementations, the materials of the first inorganic layer 214 and the second inorganic layer 234 may include silicon oxide, silicon nitride, silicon oxynitride, etc. As some implementations, the material of the organic layer 224 may include hexamethyldisiloxane (HMDSO), etc.

[0066] In the above embodiment, the organic layer 224 in the encapsulation layer 204 will not climb over the first cofferdam 203, and water vapor and oxygen are not easy to enter the display area 10 through the organic layer 224. In this way, the problem of poor display near the corner of the display area is further alleviated, and the display effect of the display panel is further improved.

[0067] Figure 1D FIG. 4 is a partially enlarged schematic diagram showing a peripheral area according to an embodiment of the present disclosure.

[0068] like Figure 1DAs shown, the first edge 202A may include a first corner edge 202AR and a first straight edge 202AL. The first corner edge 202AR and the first straight edge 202AL intersect at M. In some implementations, the first corner edge 202AR is an arc. M may be understood as a point where the curvature of the first edge 202A changes suddenly.

[0069] The second edge 203A may include a second corner edge 203AR and a second straight edge 203AL. The second corner edge 203AR and the second straight edge 203AL intersect at N. In some implementations, the second corner edge 203AR may be an arc. N may be understood as a point where the curvature of the second edge 203A suddenly changes. Here, M and N are not on the same horizontal line. The horizontal line may be, for example, the row direction of the pixel arrangement in the display area.

[0070] from Figure 1D It can be seen that in the first peripheral region 21, the distance between the first corner edge 202AR and the second corner edge 203AR along the horizontal line direction remains substantially unchanged, while the distance between the first straight edge 202AL and the second corner edge 203AR along the horizontal line direction gradually increases downward from point M. In the second peripheral region 21, the distance between the first straight edge 202AL and the second straight edge 203AL along the horizontal line direction remains substantially unchanged.

[0071] Figure 2 is a diagram showing another embodiment of the present disclosure. Figure 1B The cross-sectional schematic diagram is shown along line BB'.

[0072] The following only focuses on Figure 2 The structure shown is Figure 1C The differences between the structures shown and the other similarities can be found in the above description.

[0073] like Figure 1C and Figure 2 As shown, the first cofferdam 203 may include a first surface S1, a second surface S2 adjacent to the first surface S1, and a third surface S3 adjacent to the first surface S1. Here, the first surface S1 is a surface of the first cofferdam 203 away from the substrate 211. The second surface S2 is closer to the display area 10 than the third surface S3. In other words, the third surface S3 is farther away from the display area 10 than the second surface S2.

[0074] exist Figure 1C In some embodiments, the angle α1 between the second surface S2 and the first surface S1 is an obtuse angle. In some embodiments, the angle α2 between the third surface S3 and the first surface S1 is also an obtuse angle.

[0075] exist Figure 2In the embodiment, the angle α1 between the second surface S2 and the first surface S1 is an acute angle. When the angle α1 is an acute angle, on the one hand, it is less likely for water vapor and oxygen to enter the display area 10 through the cracks of the encapsulation layer 204. On the other hand, it is less likely for the organic layer 224 in the encapsulation layer 204 to climb over the first cofferdam 203, and it is less likely for water vapor and oxygen to enter the display area 10 through the organic layer 224. Therefore, the problem of poor display in the area near the corner of the display area is further alleviated, and the display effect of the display panel is further improved.

[0076] In some embodiments, see Figure 2 The angle α2 between the third surface S3 and the first surface S1 is also an acute angle. In such a display panel, it is more difficult for water vapor and oxygen to enter the display area 10 through the cracks of the encapsulation layer 204, thereby further improving the display effect of the display panel.

[0077] Figure 3A is a diagram showing another embodiment according to the present disclosure Figure 1B The cross-sectional schematic diagram is shown along line BB'. Figure 3B 2 is a schematic cross-sectional view of a display area according to an embodiment of the present disclosure. Figure 3A and Figure 3B The structures of the peripheral area 20 and the display area 10 are described.

[0078] like Figure 3A As shown, the peripheral region 20 may include a substrate 211, a first planarization layer 202 and a first bank 203 located on the substrate 211. In some embodiments, the peripheral region 20 may further include a first insulating layer 221 located on the substrate 211, a second insulating layer 231 located on a side of the first insulating layer 221 away from the substrate 211, a third insulating layer 241 located on a side of the second insulating layer 231 away from the first insulating layer 221, and a first metal layer 251 located on a side of the third insulating layer 241 away from the second insulating layer 231. The first planarization layer 202 is located on the first metal layer 251.

[0079] In some embodiments, see Figure 3A , the first cofferdam 203 may include a first portion P1 and a second portion P2 covering the first portion P1. In other embodiments, the first cofferdam 203 may further include a third portion P3 covering the second portion P2.

[0080] In some embodiments, see Figure 3B The display area 10 includes a second planarization layer 305, a third planarization layer 307 located on the second planarization layer 305, a pixel definition layer 308 located on the third planarization layer 307, and a spacer layer located on the pixel definition layer 308. Figure 3AThe material of the first planarization layer 202 in the embodiment is the same as that of the first planarization layer 205. In some implementations, the second planarization layer 305 and the first planarization layer 202 may be integrally provided. The materials of the first planarization layer 202, the second planarization layer 305 and the third planarization layer 307 may include, for example, organic insulating materials such as polyimide (PI), polyphthalimide, polyphthalamide, acrylic resin, benzocyclobutene or phenolic resin.

[0081] The anode 319, the functional layer 329 and the cathode 339 constitute the light emitting device 309. Here, the pixel defining layer 308 is arranged on the anode 319, and the pixel defining layer 308 has an opening that exposes a portion of the anode 319. The opening may be filled with the functional layer 329 and the cathode 339. The functional layer 329 may, for example, include a light emitting layer, an electron transport layer, an electron injection layer, a hole transport layer, a hole injection layer, and the like. A mask is required when forming the light emitting layer in the opening of the pixel defining layer 308. The spacer layer is configured to support the mask. As an example, the material of the spacer layer may include organic insulating materials such as polyimide (PI), polyphthalimide, polyphthalamide, acrylic resin, benzocyclobutene or phenolic resin.

[0082] The second planarization layer 305 may cover the thin film transistor 302. The thin film transistor 302 may include an active layer 312, a fourth insulating layer 322, a gate 332, a source 342, and a drain 352. The third metal layer 306 located on the second planarization layer 305 may be connected to the drain 352 through a via hole penetrating the second planarization layer 305, and the anode 319 located on the third planarization layer 307 may be connected to the third metal layer 306 through a via hole penetrating the third planarization layer 307.

[0083] In some implementations, the active layer 312 is located on the substrate 211, the fourth insulating layer 322 is located on a side of the active layer 312 away from the substrate 211, the gate 332 is located on a side of the fourth insulating layer 322 away from the active layer 312, and the source 342 and the drain 352 are respectively connected to the active layer 312 through vias penetrating the fourth insulating layer 322. In some implementations, a buffer layer 301 may be provided on the surface of the substrate 211.

[0084] The second planarization layer 305 may also cover the capacitor 303. The capacitor 303 may include a first electrode plate 313, a fifth insulating layer 323, and a second electrode plate 333. Here, the first electrode plate 313 and the gate 332 may be formed by the same patterning process. The source 342, the drain 352, and the second electrode plate 333 may be formed by the same patterning process. In some implementations, the fifth insulating layer 323 may cover the gate 332. In some embodiments, a sixth insulating layer 304 may be provided between the second planarization layer 305 and the second electrode plate 333. For example, the sixth insulating layer 304 may extend to the surface of the fifth insulating layer 323.

[0085] In some embodiments, Figure 3A The first insulating layer 221 and Figure 3B The fourth insulating layer 322 in the embodiment may be provided integrally, Figure 3A The second insulating layer 231 in Figure 3B The fifth insulating layer 323 in the embodiment may be provided integrally, Figure 3A The third insulating layer 241 in Figure 3B The sixth insulating layer 304 in the embodiment can be integrally provided.

[0086] In some embodiments, the material of the first portion P1 may be the same as the material of one of the third planarization layer 305 and the pixel definition layer 308, the material of the second portion P2 may be the same as the material of one of the pixel definition layer 308 and the spacer layer, and the material of the second portion P2 is different from the material of the first portion P1. For example, the material of the first portion P1 may be the same as the material of the third planarization layer 305, and the material of the second portion P2 may be the same as the material of the pixel definition layer 308. For another example, the material of the first portion P1 may be the same as the material of the pixel definition layer 308, and the material of the second portion P2 may be the same as the material of the spacer layer.

[0087] In some embodiments, the material of the first portion P1 may be the same as that of the third planarization layer 305 , the material of the second portion P2 may be the same as that of the pixel defining layer 308 , and the material of the third portion P3 may be the same as that of the spacer layer.

[0088] In some embodiments, see Figure 3A, the peripheral area 20 may further include a second cofferdam 203' located on a side of the first cofferdam 203 away from the display area 10. The second cofferdam 203' may include a fourth portion P4, a fifth portion P5 covering the fourth portion P4, a sixth portion P6 covering the fifth portion P5, and a seventh portion P7 covering the sixth portion P6. The material of the fourth portion P4 may be the same as the material of the second planarization layer 305 in the display area 10, the material of the fifth portion P5 may be the same as the material of the third planarization layer 307 in the display area 10, the material of the sixth portion P6 may be the same as the material of the pixel definition layer 308 in the display area 10, and the material of the seventh portion P7 may be the same as the material of the spacer layer in the display area 10.

[0089] In certain embodiments, such as Figure 3A As shown, the peripheral region 20 may further include a passivation layer 261 on the first metal layer 251. A portion of the first bank 203 and the second bank 203' may be located on the passivation layer 261. For example, the material of the passivation layer 261 may include an inorganic material, such as silicon oxide.

[0090] In certain embodiments, such as Figure 3A As shown, the peripheral region 20 may further include a second metal layer 271 located on the first metal layer 251. The second metal layer 271 may extend to a surface of the passivation layer 261 away from the substrate 211, and may extend to a surface of the first planarization layer 202 away from the substrate 211. For example, the material of the first metal layer 251 may be the same as the material of the source 342 and the drain 352 of the thin film transistor 302 in the display region 10. For example, the material of the second metal layer 271 may be the same as the material of the third metal layer 306 in the display region 10.

[0091] In certain embodiments, such as Figure 3A As shown, the peripheral area 20 may further include a conductive layer 281 located on the second metal layer 261. For example, the material of the conductive layer 281 may be the same as the material of the anode 319 in the display area 10. A portion of the conductive layer 281 may extend between the first portion P1 and the second portion P2, and a portion may be located on the second metal layer 271.

[0092] The present disclosure also provides a method for manufacturing a display panel. The method for manufacturing a display panel includes: forming a display area having a corner and a peripheral area surrounding the display area. Here, the peripheral area includes a first peripheral area and a second peripheral area adjacent to the first peripheral area.

[0093] Figure 4A-4F Schematic cross-sectional views showing structures obtained at different stages of forming a peripheral region according to some embodiments of the present disclosure.

[0094] First, provide a substrate 211, such as Figure 4Ashown.

[0095] Next, a first planarization layer 202 is formed on the substrate 211. Figure 4B The material of the first planarization layer 202 may include, for example, a resin material.

[0096] In some implementations, before forming the first planarization layer 202, a first insulating layer 221 may be formed on the substrate 211, and then a second insulating layer 231 may be formed on the side of the first insulating layer 221 away from the substrate 211, and then a third insulating layer and a first metal layer may be formed on the side of the second insulating layer 231 away from the first insulating layer 221. The first planarization layer 202 may be formed on the first metal layer. The material of the substrate 211 may include, for example, a flexible material such as PI. The materials of the first insulating layer 221 and the second insulating layer 231 may include, for example, silicon oxide, silicon nitride, silicon oxynitride, etc. The material of the first metal layer may include, for example, aluminum, etc.

[0097] Next, a first bank 203 is formed on the substrate 211. The first planarization layer 202 is closer to a display area (not shown) located on the left side of the first planarization layer 202 than the first bank 203.

[0098] In some implementations, such as Figure 4C As shown, the first cofferdam 203 may include a first surface S1 away from the substrate 211 and a second surface S2 close to the display area 10 and adjacent to the first surface S1. The angle α1 between the second surface S2 and the first surface S1 is an acute angle. In some embodiments, a certain layer in the first cofferdam 203 and a certain layer in the display area, such as a pixel definition layer, may be formed using the same patterning process. Here, "using the same patterning process" means patterning the same material layer once.

[0099] In some implementations, the first cofferdam 203 may be formed by: first, forming a first portion; and then, forming a second portion covering the first portion.

[0100] In some implementations, the first planarization layer 202 extends from the peripheral area 20 to the display area. The display area includes a third planarization layer located on the second planarization layer, a pixel definition layer located on the third planarization layer, and a spacer layer located on the pixel definition layer. For example, the second portion is made of a different material than the first portion. The first portion of the first dam 203 and one of the third planarization layer and the pixel definition layer in the display area can be formed by a first patterning process, and the second portion of the first dam 203 and one of the pixel definition layer and the spacer layer in the display area can be formed by a second patterning process.

[0101] In other implementations, a third portion covering the second portion may also be formed. For example, the first portion of the first cofferdam 203 and the second planarization layer in the display area may be formed by a first patterning process. For example, the second portion of the first cofferdam 203 and the pixel defining layer in the display area may be formed by a second patterning process. For example, the third portion of the first cofferdam 203 and the spacer layer in the display area may be formed by a third patterning process.

[0102] After forming the first cofferdam 203, in the first peripheral region 10, the distance between the edge of the orthographic projection of the first planarization layer 202 on the substrate 211 away from the display region 10 (i.e., the first edge 202A) and the edge of the orthographic projection of the first cofferdam 203 on the substrate 211 close to the display region 10 (i.e., the second edge 203A) is the first distance d1. After forming the first cofferdam 203, in the second peripheral region 10, the distance between the first edge 202A and the second edge 203A is the second distance d2. The second distance d2 is greater than the first distance d1.

[0103] Next, the encapsulation layer 204 is formed.

[0104] Combine the following Figure 4D-4F The process of forming the encapsulation layer 204 is described.

[0105] like Figure 4D As shown, a first inorganic layer 214 is formed. For example, the first inorganic layer 214 may be formed by a process such as chemical vapor deposition (CVD).

[0106] The orthographic projection of the first inorganic layer 214 on the substrate 211 covers the orthographic projection of the first planarization layer 202 on the substrate 211 , the orthographic projection of the first bank 203 on the substrate 211 , and a portion between the first edge 202A and the second edge 203A.

[0107] like Figure 4E As shown, an organic layer 224 is formed. For example, the organic layer 224 may be formed by an inkjet printing process.

[0108] The organic layer 224 is located on a side of the first inorganic layer 214 away from the substrate 211. The edge of the orthographic projection of the organic layer 224 on the substrate 211 away from the display area 10 is closer to the display area 10 than the second edge 203A. For example, the edge of the orthographic projection of the organic layer 224 on the substrate 211 away from the display area 10 may be located between the first edge 202A and the second edge 203A.

[0109] like Figure 4F As shown, a second inorganic layer 234 is formed. For example, the second inorganic layer 234 may be formed by a process such as CVD.

[0110] Here, the second inorganic layer 234 covers the surface of the organic layer 224 and the surface of the first inorganic layer 214 not covered by the organic layer 224 .

[0111] Figure 5A-5E 2 is a schematic cross-sectional view showing the structure obtained at different stages of forming the second portion of the first cofferdam 203 according to some embodiments of the present disclosure. It should be understood that Figure 5A-5E The process of forming other parts of the first cofferdam 203 is omitted, and only the process of forming the second part P2 is shown.

[0112] First, if Figure 5A As shown, a pixel defining material layer 401 is formed on a substrate 211. Here, a first insulating layer 221, a second insulating layer 231, etc. may be formed on the substrate 211.

[0113] Next, if Figure 5B As shown, a photoresist 402 is formed on a side of the pixel defining material layer 401 away from the substrate 211 .

[0114] Then, if Figure 5C As shown, the photoresist 402 is patterned using a mask 403 to obtain a patterned photoresist 402A. Here, the mask 403 has an opening 413, and the size of the opening 413 gradually decreases in a direction from the substrate 211 to a direction away from the substrate 211.

[0115] Afterwards, if Figure 5D As shown, the pixel defining material layer 401 is etched using the patterned photoresist 402A as a mask to form a first bank 203 and a pixel defining layer (not shown) located in the display area.

[0116] Afterwards, if Figure 5E As shown, the photoresist 402A is removed.

[0117] exist Figure 5A-5E In the process shown, the second portion P2 and the pixel defining layer in the display area are formed by the same patterning process. It should be understood that in other embodiments, different patterning processes may be used to form the second portion P2 and the pixel defining layer in the display area, respectively.

[0118] The display panel provided in the embodiment of the present disclosure may be, for example, an OLED display panel.

[0119] The present disclosure also provides a display device. The display device may include a display panel of any of the above embodiments. In some embodiments, the display device may be, for example, a mobile terminal, a television, a display, a laptop, a digital photo frame, a navigator, an electronic paper, or any other product or component with a display function.

[0120] So far, various embodiments of the present disclosure have been described in detail. In order to avoid obscuring the concept of the present disclosure, some details known in the art are not described. Based on the above description, those skilled in the art can fully understand how to implement the technical solution disclosed here.

[0121] Although some specific embodiments of the present disclosure have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present disclosure. It should be understood by those skilled in the art that the above embodiments may be modified or some technical features may be replaced by equivalents without departing from the scope and spirit of the present disclosure. The scope of the present disclosure is defined by the appended claims.

Claims

1. A display panel, comprising: Display area; and The peripheral area surrounding the display area includes a first peripheral area and a second peripheral area adjacent to the first peripheral area, The surrounding area includes: Substrate, a first planarization layer located on the substrate, a first cofferdam located on the substrate, comprising a corner portion located in the first peripheral area and a straight edge portion located in the second peripheral area, the first planarization layer is closer to the display area than the first cofferdam, and the first cofferdam comprises a first portion and a second portion covering the first portion; in: An edge of the orthographic projection of the first planarization layer on the substrate away from the display area is a first edge, and an edge of the orthographic projection of the first cofferdam on the substrate close to the display area is a second edge; In the first peripheral area, the minimum distance between the first edge and the second edge is a first distance; In the second peripheral area, the minimum distance between the first edge and the second edge is a second distance, and the second distance is greater than the first distance; The display area includes a second planarization layer, a third planarization layer located on the second planarization layer, a pixel definition layer located on the third planarization layer, and a spacer layer located on the pixel definition layer, wherein the material of the second planarization layer is the same as that of the first planarization layer; The material of the first portion is the same as that of one of the third planarization layer and the pixel definition layer; A material of the second portion is the same as a material of one of the pixel defining layer and the spacer layer.

2. The display panel according to claim 1, wherein: The first cofferdam includes a first surface away from the substrate and a second surface close to the display area and adjacent to the first surface, and the angle between the second surface and the first surface is an obtuse angle.

3. The display panel according to claim 2, wherein: The first cofferdam includes a third surface away from the display area and adjacent to the first surface, and an angle between the third surface and the first surface is an obtuse angle.

4. The display panel according to claim 1, wherein: The material of the second portion is different from the material of the first portion.

5. The display panel according to claim 1, wherein: The first cofferdam also includes a third portion covering the second portion.

6. The display panel according to claim 5, wherein: The material of the first portion is the same as the material of the third planarization layer; The material of the second portion is the same as that of the pixel defining layer; The material of the third portion is the same as that of the spacer layer.

7. The display panel according to claim 1, wherein: The second planarization layer is integrally provided with the first planarization layer.

8. The display panel according to claim 1, wherein: The peripheral area further includes a second cofferdam located on a side of the first cofferdam away from the display area, the second cofferdam includes a fourth portion, a fifth portion covering the fourth portion, a sixth portion covering the fifth portion, and a seventh portion covering the sixth portion, wherein: The material of the fourth portion is the same as the material of the second planarization layer; The material of the fifth portion is the same as that of the third planarization layer; The material of the sixth portion is the same as that of the pixel defining layer; The material of the seventh portion is the same as that of the spacer layer.

9. The display panel according to claim 1, wherein: The peripheral area further includes an encapsulation layer, and the encapsulation layer includes: A first inorganic layer, wherein an orthographic projection of the first inorganic layer on the substrate covers an orthographic projection of the first planarization layer on the substrate, an orthographic projection of the first cofferdam on the substrate, and a portion between the first edge and the second edge; an organic layer, located on a side of the first inorganic layer away from the substrate, wherein an edge of the orthographic projection of the organic layer on the substrate away from the display area is closer to the display area than the second edge; and The second inorganic layer covers a surface of the organic layer and a surface of the first inorganic layer not covered by the organic layer.

10. The display panel according to claim 9, wherein: An orthographic projection of the organic layer on the substrate is away from an edge of the display area and is located between the first edge and the second edge.

11. The display panel according to claim 9, wherein: An edge of the orthographic projection of the organic layer on the substrate away from the display area does not overlap with the first edge.

12. The display panel according to claim 1, wherein: The corner portion is adjacent to the straight side portion.

13. The display panel according to claim 1, wherein: The first edge includes a first corner edge and a first straight edge intersecting at M, the second edge includes a second corner edge and a second straight edge intersecting at N, and M and N are not on the same horizontal line.

14. The display panel according to claim 1, wherein: A ratio of a maximum distance between the first edge and the second edge to the minimum distance is less than or equal to 1.

2.

15. The display panel according to claim 1, wherein: The corner portion is arc-shaped.

16. The display panel according to any one of claims 1 to 15, wherein: The surrounding area also includes: a first insulating layer located on the substrate; a second insulating layer located on a side of the first insulating layer away from the substrate; a third insulating layer located on a side of the second insulating layer away from the first insulating layer; and A first metal layer is located on a side of the third insulating layer away from the second insulating layer, and the first planarization layer is located on the first metal layer.

17. A display device comprising: A display panel as claimed in any one of claims 1 to 16.

18. A method for manufacturing a display panel, comprising: A display area and a peripheral area surrounding the display area are formed, wherein the peripheral area includes a first peripheral area and a second peripheral area adjacent to the first peripheral area, and forming the peripheral area includes: providing a substrate; forming a first planarization layer on the substrate; and forming a first cofferdam on the substrate, wherein the first cofferdam comprises a corner portion located in the first peripheral region and a straight edge portion located in the second peripheral region, and the first planarization layer is closer to the display region than the first cofferdam; in: An edge of the orthographic projection of the first planarization layer on the substrate away from the display area is a first edge, and an edge of the orthographic projection of the first cofferdam on the substrate close to the display area is a second edge; In the first peripheral area, the minimum distance between the first edge and the second edge is a first distance; In the second peripheral area, the minimum distance between the first edge and the second edge is a second distance, and the second distance is greater than the first distance; Forming the first cofferdam includes: forming a first portion and forming a second portion covering the first portion; The display area includes a second planarization layer, a third planarization layer located on the second planarization layer, a pixel definition layer located on the third planarization layer, and a spacer layer located on the pixel definition layer, wherein the material of the second planarization layer is the same as that of the first planarization layer; forming the first portion and one of the third planarization layer and the pixel definition layer by a first patterning process; The second portion and one of the pixel defining layer and the spacer layer are formed by a second patterning process.

19. The method according to claim 18, wherein: The second portion is made of a different material than the first portion.

20. The method according to claim 18, wherein: Forming the first cofferdam further comprises: A third portion is formed to cover the second portion.

21. The method of claim 20, wherein: forming the first portion and the third planarization layer by the first patterning process; forming the second portion and the pixel defining layer by the second patterning process; The third portion and the spacer layer are formed by a third patterning process.

22. The method according to claim 18, wherein: Forming the peripheral region further includes forming an encapsulation layer, and forming the encapsulation layer includes: forming a first inorganic layer, wherein the orthographic projection of the first inorganic layer on the substrate covers the orthographic projection of the first planarization layer on the substrate, the orthographic projection of the first cofferdam on the substrate, and a portion between the first edge and the second edge; forming an organic layer located on a side of the first inorganic layer away from the substrate, wherein an edge of the orthographic projection of the organic layer on the substrate away from the display area is closer to the display area than the second edge; and A second inorganic layer is formed to cover a surface of the organic layer and a surface of the first inorganic layer not covered by the organic layer.

23. The method according to any one of claims 18 to 22, wherein: Forming the peripheral area further comprises: forming a first insulating layer on the substrate; forming a second insulating layer on a side of the first insulating layer away from the substrate; forming a third insulating layer on a side of the second insulating layer away from the first insulating layer; and A first metal layer is formed on a side of the third insulating layer away from the second insulating layer, and the first planarization layer is formed on the first metal layer.

Citation Information

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