Display Substrate and Display Device

Abstract

The present application provides a display substrate and a display device. The non-display area of the display substrate includes a first grounding unit disposed between at least two adjacent binding units; wherein, the first grounding unit is electrically connected to the binding units on both sides thereof to be electrically connected to the ground wire of the COF through the binding units; a first insulating layer located above the first grounding unit; at least one first island-shaped conductive layer located above the first insulating layer; wherein, the positive projection of the first island-shaped conductive layer on the substrate at least covers a part of the positive projection of the first grounding unit on the substrate. By providing a first island-shaped conductive layer at the position of the grounding unit, the static electricity on the display substrate (especially the static electricity generated during the ESD test) is attracted and conducted to the grounding unit, effectively improving the ESD protection ability of the display panel.

Description

Technical Field

[0001] This application relates to the field of display technologies, and particularly to a display substrate and a display device. Background Art

[0002] A liquid crystal display panel generally includes a color filter (CF) substrate and a thin film transistor (TFT) array substrate. The CF substrate is placed on top of the TFT substrate, and a polarizer is provided on the CF substrate. Since the binding process is carried out after the CF substrate and the polarizer are set on the TFT substrate and the chip on film (COF) is connected, as the thickness of the binding area is much smaller than that of the display area, in order to protect the binding area, the binding area after the COF binding needs to be processed. Usually, the process is through ultraviolet curable adhesive (UV adhesive) coating process. However, due to the relatively low process precision of the UV adhesive coating, the sealing performance of the UV adhesive is poor, which may cause bubbles in the UV adhesive and / or the UV adhesive not to cover the CF, resulting in gaps between the UV adhesive or between the UV adhesive and the CF. The electrostatic discharge (ESD) on the CF substrate enters the COF binding area through the above gaps, ultimately causing the data signal line and the COF to burn out, resulting in poor display. Summary of the Invention

[0003] In view of the above problems, this application provides a display substrate and a display device, which solve the technical problem that the ESD on the display panel in the prior art enters the COF binding area through the gaps between the UV adhesive or between the UV adhesive and the CF, resulting in poor display.

[0004] In a first aspect, this application provides a display substrate, including a substrate, a display area provided on the substrate, and a non-display area located outside the display area; the non-display area includes:

[0005] At least two binding units spaced apart above the substrate, for respectively binding and connecting with a chip on film;

[0006] A first grounding unit located above the substrate and disposed between at least two adjacent binding units; wherein, the first grounding unit is electrically connected to the binding units on its two sides to be electrically connected to the ground wire of the chip on film through the binding units;

[0007] A first insulating layer located above the first grounding unit;

[0008] At least one first island-shaped conductive layer located above the first insulating layer; wherein, the orthographic projection of the first island-shaped conductive layer on the substrate at least covers a part of the orthographic projection of the first grounding unit on the substrate.

[0009] In some embodiments, in the above display substrate, the orthographic projection of the first island-shaped conductive layer on the substrate does not overlap with the orthographic projection of the bonding unit on the substrate.

[0010] In some embodiments, in the above display substrate, the non-display area further includes:

[0011] A second grounding unit disposed on one side of the first grounding unit close to or away from the display area;

[0012] Wherein, the second grounding unit is disposed at an interval from the first grounding unit; the second grounding unit is electrically connected to the bonding units on both sides thereof to be electrically connected to the ground wire of the COF through the bonding units.

[0013] In some embodiments, in the above display substrate, the non-display area further includes:

[0014] A second insulating layer located above the second grounding unit;

[0015] At least one second island-shaped conductive layer located above the second insulating layer;

[0016] Wherein, the orthographic projection of the second island-shaped conductive layer on the substrate at least covers a part of the orthographic projection of the second grounding unit on the substrate.

[0017] In some embodiments, in the above display substrate, the orthographic projection of the second island-shaped conductive layer on the substrate does not overlap with the orthographic projection of the bonding unit on the substrate.

[0018] In some embodiments, in the above display substrate, a plurality of the first island-shaped conductive layers are disposed at intervals above the first insulating layer.

[0019] In some embodiments, in the above display substrate, a plurality of the second island-shaped conductive layers are disposed at intervals above the second insulating layer.

[0020] In some embodiments, in the above display substrate, each of the bonding units includes a plurality of data signal pins and at least one ground pin;

[0021] Wherein, the data signal pins are used for being bonded and connected to the driving signal lines of the COF;

[0022] The grounding pin is used for being bound and connected with the grounding wire of the COF film; the first grounding unit is electrically connected with the grounding pins of the binding units on its two sides, so as to be electrically connected with the grounding wire of the COF film through the grounding pins.

[0023] In some embodiments, in the above display substrate, the data signal pins include:

[0024] A data signal line, a third insulating layer, a third island-shaped conductive layer, a fourth insulating layer and a pad which are sequentially stacked above the substrate;

[0025] Wherein, the pad is electrically connected with the data signal line through a contact hole penetrating through the fourth insulating layer and the third insulating layer, and the pad is used for being bound and connected with the driving signal line of the COF film.

[0026] In some embodiments, in the above display substrate, the pad and the first island-shaped conductive layer are located on the same layer.

[0027] In some embodiments, in the above display substrate, each of the binding units further includes:

[0028] At least one isolation pin located between the data signal pin and the grounding pin;

[0029] Wherein, the isolation pin is not bound and connected with the COF film and is used for isolating the data signal pin and the grounding pin.

[0030] In a second aspect, the present application provides a display device, including the display substrate according to any one of the first aspect, a COF film and a driving circuit board;

[0031] Wherein, the display substrate and the driving circuit board are electrically connected through the COF film.

[0032] In some embodiments, in the above display device, the COF film at least covers the binding units of the display substrate.

[0033] Adopting the above technical solutions, at least the following technical effects can be achieved:

[0034] The present application provides a display substrate and a display device. The non-display area of the display substrate includes a first grounding unit disposed between at least two adjacent bonding units; wherein, the first grounding unit is electrically connected to the bonding units on both sides thereof to be electrically connected to the ground wire of the chip-on-flex (COF) through the bonding units; a first insulating layer located above the first grounding unit; at least one first island-shaped conductive layer located above the first insulating layer; wherein, the positive projection of the first island-shaped conductive layer on the substrate at least covers a part of the positive projection of the first grounding unit on the substrate. By providing a first island-shaped conductive layer in a floating state at the position of the grounding unit (GND), static electricity on the display substrate (especially static electricity generated during an ESD test) is attracted, so that the static electricity is introduced into the ground through the COF and the driving circuit board, effectively improving the ESD protection ability of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings are used to provide a further understanding of the present application, and constitute a part of the specification. They are used to explain the present application together with the following specific embodiments, but do not constitute a limitation to the present application. In the accompanying drawings:

[0036] Figure 1 is a top view schematic diagram of a display substrate;

[0037] Figure 2 is Figure 1 a schematic cross-sectional structure diagram along the tangent line A-A';

[0038] Figure 3 is a schematic diagram of the conduction of ESD on a display substrate;

[0039] Figure 4 is a top view schematic diagram of a display substrate shown in an exemplary embodiment of the present application;

[0040] Figure 5 is Figure 4 a schematic cross-sectional structure diagram along the tangent line B-B';

[0041] Figure 6 is Figure 4 a schematic cross-sectional structure diagram along the tangent line C-C';

[0042] Figure 7 is a top view schematic diagram of another display substrate shown in an exemplary embodiment of the present application;

[0043] Figure 8 is Figure 7 a schematic cross-sectional structure diagram along the tangent line D-D';

[0044] Figure 9 is a top view schematic diagram of another display substrate shown in an exemplary embodiment of the present application;

[0045] Figure 10 is a top view schematic diagram of a display device shown in an exemplary embodiment of the present application;

[0046] In the drawings, like components are denoted by like reference numerals, and the drawings are not drawn to actual scale.

[0047] The reference numerals are as follows:

[0048] 11 - Substrate; 12 - Display area; 13 - Non - display area; 131 - Bonding unit; 1311 - Data signal pin; 1311a - Data signal line; 1311b - First insulating layer; 1311c - Island - shaped conductive layer; 1311d - Second insulating layer; 1311e - Pad; 1312 - First ground pin; 1313 - Second ground pin; 132 - First ground unit; 133 - Second ground unit; 134 - Conductive layer; 14 - Color filter; 15 - Sealant; 16 - UV - curable adhesive; 21 - Substrate; 22 - Display area; 23 - Non - display area; 231 - Bonding unit; 2311 - Data signal pin; 2311a - Data signal line; 2311b - Third insulating layer; 2311c - Third island - shaped conductive layer; 2311d - Fourth insulating layer; 2311e - Pad; 2312 - Ground pin; 2313 - Isolation pin; 2314 - Ground pin; 232 - First ground unit; 233 - First insulating layer; 234 - First island - shaped conductive layer; 235 - Second ground unit; 236 - Second insulating layer; 237 - Second island - shaped conductive layer; 238 - Alignment mark; 239 - Virtual rubbing pattern; 270 - Unit test pin; 24 - Color filter; 25 - Sealant; 26 - UV - curable adhesive; 30 - Chip - on - film; 40 - Driving circuit board. Detailed implementation manners

[0049] The following will describe in detail the implementation manners of the present application in conjunction with the drawings and embodiments, so as to fully understand how the present application uses technical means to solve technical problems and the implementation process of achieving corresponding technical effects, and can be implemented accordingly. Each feature in the embodiments of the present application and the embodiments can be combined with each other on the premise of not conflicting, and the formed technical solutions are all within the protection scope of the present application. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. Like reference numerals denote like elements throughout.

[0050] It should be understood that although terms such as "first", "second", "third", etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, without departing from the teachings of the present application, the first element, component, region, layer, or part discussed below may be denoted as the second element, component, region, layer, or part.

[0051] It should be understood that spatial relationship terms such as "above", "on top of", "below", "beneath", etc. may be used herein for convenience in describing the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to also include different orientations of the device during use and operation. For example, if the device in the figures is flipped, then an element or feature described as "below other elements" will be oriented "above" the other elements or features. Thus, the exemplary terms "below" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0052] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present application. As used herein, the singular forms "a", "an", and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. As used herein, the term "and / or" includes any and all combinations of the associated listed items.

[0053] Embodiments of the present application are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the present application. Thus, variations from the shapes as illustrated, for example due to manufacturing techniques and / or tolerances, are to be expected. Accordingly, embodiments of the present application should not be limited to the particular shapes of the regions shown herein but should include shape deviations resulting from, for example, manufacturing.

[0054] To fully understand the present application, detailed structures and steps will be set forth in the following description in order to explain the technical solutions proposed by the present application. The preferred embodiments of the present application are described in detail below. However, in addition to these detailed descriptions, the present application may have other embodiments.

[0055] A schematic structural diagram of a display substrate, as Figure 1And Figure 2 As shown, it includes a substrate 11, a display area 12 disposed on the substrate 11, and a non-display area 13 located outside the display area 12.

[0056] The above display substrate further includes a color filter 14 located above the display area 12, and a part of the color filter 14 extends above the non-display area 13. A seal 15 is provided between the color filter 14 and the display area 12, and the seal 15 can also extend above the non-display area 13.

[0057] The non-display area 13 includes a bonding unit 131, a conductive layer 134, a first grounding unit 132, and a second grounding unit 133.

[0058] At least two bonding units 131 are spaced above the substrate 11 for respectively bonding and connecting with a chip on film (COF). One bonding unit 131 corresponds to one COF. That is to say, this display substrate is more suitable for a large-sized display substrate and needs to be bonded and connected with at least two COFs.

[0059] The first grounding unit 132 is located above the substrate 11 and is disposed between at least two adjacent bonding units 131. Among them, the first grounding unit 132 is electrically connected to the bonding units 131 on its two sides to be electrically connected to the ground wire of the chip on film through the bonding unit 131.

[0060] The second grounding unit 133 is also located between two adjacent bonding units 131 and is on the side of the first grounding unit 132 away from or close to the display area 12. The second grounding unit 133 is spaced from the first grounding unit 132.

[0061] The above display substrate further includes an insulating layer (not shown in the figure) covering the first grounding unit 132 and the second grounding unit 133 to protect the first grounding unit 132 and the second grounding unit 133.

[0062] Each bonding unit 131 includes a plurality of data signal pins 1311, a first grounding pin 1312, and a second grounding pin 1313.

[0063] Among them, the data signal pins 1311 are used for bonding and connecting with the driving signal lines of the chip on film. That is, one end of the data signal pins 1311 is connected to the circuit of the display area 12, and the other end is connected to the driving signal lines of the chip on film, so as to transmit the driving signal output by the driving circuit board (printed circuit board PCB or flexible printed circuit FPC) to the display area 12.

[0064] The first ground pin 1312 and the second ground pin 1313 are used for binding connection with the ground wire of the COF; the first ground unit 132 and the second ground unit 133 are electrically connected to the ground pins of the binding units 131 on both sides thereof, so as to be electrically connected to the ground wire of the COF through the ground pins.

[0065] The first ground unit 132 is electrically connected to the first ground pin 1312 of the binding units 131 on both sides thereof, and the second ground unit 133 is electrically connected to the second ground pin 1313 of the binding units 131 on both sides thereof.

[0066] As Figure 2 shown, the data signal pin 1311 includes: a data signal line 1311a, a first insulating layer 1311b, an island-shaped conductive layer 1311c, a second insulating layer 1311d, and a pad 1311e which are sequentially stacked above the substrate 11.

[0067] The conductive layer 134 is made of the same material as the pad 1311e of the data signal pin 1311 and is located on the same layer.

[0068] The conductive layer 134 is in contact with the pad 1311e of the data signal pin 1311 and extends under the color filter 14 to protect the underlying data signal line 1311a from being scratched by debris generated during substrate cutting.

[0069] Wherein, the pad 1311e is electrically connected to the data signal line 1311a through a contact hole (not marked in the figure) penetrating through the second insulating layer 1311d and the first insulating layer 1311b, and the pad 1311e is used for binding connection with the driving signal line of the COF.

[0070] The island-shaped conductive layer 1311c is in a floating state and is not connected to a voltage or a data signal, and is used to prevent the underlying data signal line 1311a from being scratched by debris generated during substrate cutting.

[0071] However, the conductive layer 134 provides a path for the transmission of ESD. As Figure 3 shown, after the UV curable adhesive 16 is applied, there are bubbles in the UV curable adhesive 16 or the UV curable adhesive 16 does not cover the color filter 14, and gaps are likely to be generated inside the UV curable adhesive 16 or between the UV curable adhesive 16 and the color filter 14. ESD enters the binding unit 131 through the above gaps, the conductive layer 134, and the pad 1311e in sequence, and is finally transmitted to the driving circuit board (printed circuit board PCB or flexible printed circuit board FPC), causing damage to the data signal line 1311a and the COF, resulting in poor display.

[0072] Although the most direct improvement method is to cover the color filter 14 with the UV curable adhesive 16 to block the entry path of ESD, it cannot be achieved due to process reasons (in the process, the thickness of the UV curable adhesive covering the polarizer and CF needs to be 0.6 mm, while the thickness of the polarizer POL and CF is much lower than this value. Therefore, even if the spraying method is used for coating the adhesive, it is still impossible to ensure that there are no bubbles in the UV curable adhesive. Therefore, this method cannot fundamentally improve the display defects caused by ESD).

[0073] And the embodiment of the present application provides a display substrate. Please refer to Figure 4 and Figure 5 . The display substrate includes a substrate 21, a display area 22 disposed on the substrate 21, and a non-display area 23 located outside the display area 22.

[0074] The non-display area 23 includes a bonding unit 231, a first grounding unit 232, a first insulating layer 233, and a first island-shaped conductive layer 234.

[0075] At least two bonding units 231 are spaced apart above the substrate 21 and are used for respectively bonding and connecting with a chip on film (COF). One bonding unit 231 corresponds to one COF. That is to say, this display substrate is more suitable for large-size display substrates and needs to be bonded and connected with at least two COFs.

[0076] The first grounding unit 232 is located above the substrate 21 and is disposed between at least two adjacent bonding units 231. Among them, the first grounding unit 232 is electrically connected to the bonding units 231 on its two sides to be electrically connected to the ground wire of the chip on film through the bonding unit 231.

[0077] In some embodiments, the number of bonding units 231 can be more than two, and the first grounding unit 232 can be disposed between any two adjacent bonding units 231.

[0078] The first insulating layer 233 is located above the first grounding unit 232.

[0079] At least one first island-shaped conductive layer 234 is located above the first insulating layer 233 and is used for conducting the static electricity on the display substrate to the first grounding unit 232; among them, the orthographic projection of the first island-shaped conductive layer 234 on the substrate 21 at least covers part of the orthographic projection of the first grounding unit 232 on the substrate 21.

[0080] Since the flip-chip thin film well is bonded at the position of the bonding unit 231, the first island-shaped conductive layer 234 is in a floating state. Even after the display substrate is bonded with the flip-chip thin film and the driving circuit board and the power supply voltage is connected, the first island-shaped conductive layer 234 will not be connected to the voltage or data signal. Therefore, the first island-shaped conductive layer 234 can attract the ESD on the substrate, and the ESD can pass through the first insulating layer 233 through arc discharge, be transmitted to the first grounding unit 232, and then be transmitted to the grounding end of the driving circuit board through the ground wire of the flip-chip thin film, and finally lead to the ground. This not only shortens the transmission path of the ESD, enhances the ESD protection ability of the substrate, but also shunts the ESD, playing a role in protecting the bonding unit 231 and the flip-chip thin film (COF).

[0081] In some embodiments, the distance between the first island-shaped conductive layer 234 and the display area 22 is less than the distance between the bonding unit 231 and the display area 22, so that the ESD will be preferentially attracted by the first island-shaped conductive layer 234 and will not be conducted to the bonding unit 231 to damage the data signal line 2311a.

[0082] And after the bonding unit 231 is bonded with the flip-chip thin film (COF), the bonding unit 231 is covered by the flip-chip thin film (COF), and there will be no exposed data signal pins 2311, and the ESD will not be conducted.

[0083] In some embodiments, the first grounding unit 232 can be a metal conductive component with an integral structure, such as a conductive metal layer.

[0084] In some embodiments, the orthographic projection of the first island-shaped conductive layer 234 on the substrate 21 does not overlap with the orthographic projection of the bonding unit 231 on the substrate 21, so as to further prevent the ESD received by the first island-shaped conductive layer 234 from being transmitted to the bonding unit 231 and damaging the data signal line 2311a.

[0085] In some embodiments, a plurality of first island-shaped conductive layers 234 are arranged at intervals above the first insulating layer 233.

[0086] In some embodiments, a plurality of first island-shaped conductive layers 234 can be arranged side by side above the first insulating layer 233, which can further improve the ability of the first island-shaped conductive layer 234 to attract ESD.

[0087] In some embodiments, each bonding unit 231 includes a plurality of data signal pins 2311 and at least one grounding pin 2312.

[0088] Among them, the data signal pin 2311 is used for bonding connection with the driving signal line of the flip-chip thin film. That is to say, one end of the data signal pin 2311 is electrically connected to the display area 22, and the other end is electrically connected to the driving signal line of the flip-chip thin film.

[0089] A ground pin 2312 for binding connection with the ground wire of the COF; a first ground unit 232 is electrically connected to the ground pins 2312 of the binding units 231 on both sides thereof, so as to be electrically connected to the ground wire of the COF through the ground pins 2312, thereby realizing electrical connection with the ground end of the driving circuit board.

[0090] In some embodiments, each binding unit 231 further includes: at least one isolation pin 2313 located between the data signal pin 2311 and the ground pin 2312.

[0091] Wherein, the isolation pin 2313 is not bound to the COF and is used to isolate the data signal pin 2311 and the ground pin 2312.

[0092] Please refer to Figure 6 , in some embodiments, the data signal pin 2311 includes: a data signal line 2311a, a third insulating layer 2311b, a third island-shaped conductive layer 2311c, a fourth insulating layer 2311d, and a pad 2311e that are sequentially stacked above the substrate 21.

[0093] Wherein, the pad 2311e is electrically connected to the data signal line 2311a through a contact hole penetrating the fourth insulating layer 2311d and the third insulating layer 2311b, and the pad 2311e is used for binding connection with the driving signal line of the COF.

[0094] In some embodiments, the pad 2311e and the first island-shaped conductive layer 234 are located on the same layer, and the materials can both be indium tin oxide (ITO).

[0095] In some embodiments, the fourth insulating layer 2311d and the first insulating layer 233 are located on the same layer, and the materials can both be inorganic materials.

[0096] The third island-shaped conductive layer 2311c is in a floating state and is not connected to any voltage or data signal, and is used to prevent debris generated by cutting the substrate from scratching the underlying data signal line 2311a.

[0097] In some embodiments, the above display substrate further includes a color filter 24 at least above the display area 22.

[0098] Wherein, the interval distance between the orthographic projection of the color filter 24 on the substrate 21 and the orthographic projection of the pad 2311e on the substrate 21 is greater than a preset distance, further avoiding ESD conduction to the position of the pad 2311e.

[0099] The orthographic projection of the color filter 24 on the substrate 21 may partially overlap with the orthographic projection of the third island-shaped conductive layer 2311c on the substrate 21.

[0100] Part of the color filter 24 extends above the non-display area 23. A seal 25 is provided between the color filter 24 and the display area 22, and the seal 25 can also extend above the non-display area 23.

[0101] Please refer to Figure 7 and Figure 8 In some embodiments, the above display substrate further includes: a second grounding unit 235 disposed on one side of the first grounding unit 232 close to or away from the display area 22; wherein, the second grounding unit 235 is spaced apart from the first grounding unit 232; the second grounding unit 235 is electrically connected to the bonding units 231 on both sides thereof to be electrically connected to the ground wire of the COF through the bonding units 231.

[0102] The second grounding unit 235 can improve the grounding effect of the display substrate.

[0103] Specifically, the second grounding unit 235 is electrically connected to the grounding pins of the bonding units 231 on both sides thereof.

[0104] In some embodiments, the bonding unit 231 includes two grounding pins 2312 and 2314. The first grounding unit 232 is connected to the grounding pin 2312, and the second grounding unit 235 is connected to the grounding pin 2314. The grounding pin 2312 and the grounding pin 2314 are isolated from the data signal pin 2311 by an isolation pin 2313.

[0105] Correspondingly, the above display substrate further includes: a second insulating layer 236 located above the second grounding unit 235, and at least one second island-shaped conductive layer 237 located above the second insulating layer 236 for conducting the static electricity on the display substrate to the second grounding unit 235; wherein, the orthographic projection of the second island-shaped conductive layer 237 on the substrate 21 at least covers a part of the orthographic projection of the second grounding unit 235 on the substrate 21.

[0106] Similar to the first island-shaped conductive layer 234, since the COF is bonded at the position of the bonding unit 231, the second island-shaped conductive layer 237 is in a floating state. Even after the display substrate is bonded with the COF and the driving circuit board and connected to the power supply voltage, the second island-shaped conductive layer 237 will not be connected to the voltage or data signal. Therefore, the second island-shaped conductive layer 237 can attract the ESD on the substrate, and the ESD can pass through the second insulating layer 236 through arc discharge, be transmitted to the second grounding unit 235, and be transmitted to the ground terminal of the driving circuit board through the ground wire of the COF, and finally lead to the ground.

[0107] In some embodiments, the distance between the second island-shaped conductive layer 237 and the display area 22 is less than the distance between the bonding unit 231 and the display area 22, such that ESD will be preferentially attracted by the second island-shaped conductive layer 237 and will not be conducted to the bonding unit 231 to damage the data signal line 2311a.

[0108] When the first island-shaped conductive layer 234 cannot completely export the ESD, the remaining ESD can be exported through the second island-shaped conductive layer 237, thereby improving the electrostatic protection effect of the display substrate.

[0109] In some embodiments, the orthographic projection of the second island-shaped conductive layer 237 on the substrate 21 does not overlap with the orthographic projection of the bonding unit 231 on the substrate 21, so as to further prevent the ESD received by the second island-shaped conductive layer 237 from being transmitted to the bonding unit 231 and damaging the data signal line 2311a.

[0110] In some embodiments, a plurality of second island-shaped conductive layers 237 can be arranged side by side above the second grounding unit 235, which can further improve the ability of the second island-shaped conductive layer 237 to attract ESD.

[0111] As Figure 9 shown, in some embodiments, the above display substrate may further include: alignment marks 238, dummy rubbing patterns 239, and unit test pins 270.

[0112] The alignment marks 238 are used to achieve alignment of the bonding device during the bonding process.

[0113] The rubbing patterns 239 are used to overcome the problem of process imbalance during the rubbing process in the preparation of the display substrate and prevent rubbing mura.

[0114] The unit test pins 270 serve as test pins for cell test.

[0115] The display substrate provided by the embodiment of the present application attracts the static electricity on the display substrate (especially the static electricity generated during the ESD test) by setting the first island-shaped conductive layer 234 in a floating state at the position of the first grounding unit 232 (GND), so as to conduct the static electricity into the ground through the COF and the driving circuit board, effectively improving the ESD protection ability of the display panel.

[0116] The embodiment of the present application further provides a display device. Please refer to Figure 10 and the display device includes the display substrate described in any of the above embodiments, as well as a chip on film 30 and a driving circuit board 40.

[0117] Among them, the display substrate is electrically connected to the driving circuit board 40 through a flexible printed circuit (FPC) 30.

[0118] In some embodiments, the FPC 30 at least covers the bonding unit 231 of the display substrate. That is, the bonding unit 231 is covered by the FPC, and there will be no exposed data signal pins, and no ESD conduction will occur.

[0119] However, the FPC 30 does not cover the first island-shaped conductive layer 234 on the display substrate. When the driving circuit board 40 is connected to the power supply voltage, the first island-shaped conductive layer 234 is not connected to the voltage or data signal.

[0120] In the case where the second island-shaped conductive layer 237 is provided in the non-display area 23, the FPC 30 also does not cover the second island-shaped conductive layer 237 on the display substrate. When the driving circuit board 40 is connected to the power supply voltage, the second island-shaped conductive layer 237 is not connected to the voltage or data signal.

[0121] In some embodiments, the ultraviolet curable adhesive 26 is coated above the bonding portion of the first island-shaped conductive layer 234 and the FPC 30.

[0122] The first island-shaped conductive layer 234 is in direct contact with the ultraviolet curable adhesive 26, so it can attract the ESD transmitted through the gap inside the ultraviolet curable adhesive 26 or between the ultraviolet curable adhesive 26 and the color filter 24, and then conduct the static electricity into the ground through the FPC 30 and the driving circuit board 40, effectively improving the ESD protection ability of the display panel.

[0123] In some embodiments, the display device is a display panel, and the display panel includes the above-mentioned display substrate and a glass cover plate. Among them, the glass cover plate includes an ink area, and the ink area is provided at the edge of the glass cover plate to prevent edge light leakage.

[0124] In some embodiments, the display device may include a display panel and a housing, and the display panel is connected to the housing. For example, the display panel is embedded in the housing. The display device can be, for example, any device with a display function such as a mobile phone, a tablet computer, a television, a laptop computer, a digital photo frame, a navigator, etc.

[0125] The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application. Although the disclosed embodiments of the present application are as above, the content is only the embodiments adopted for the convenience of understanding the present application and is not used to limit the present application. Any person skilled in the art within the technical field to which the present application pertains, without departing from the spirit and scope disclosed by the present application, can make any modifications and changes in the form of implementation and details, but the protection scope of the present application shall still be subject to the scope defined by the appended claims.

Claims

1. A display substrate, characterized in that, It includes a substrate, a display area disposed on the substrate, and a non-display area located outside the display area; the non-display area includes: At least two bonding units spaced above the substrate for respectively bonding and connecting with a flip chip thin film; A first grounding unit located above the substrate and disposed between at least two adjacent bonding units; wherein, the first grounding unit is electrically connected to the bonding units on its two sides to be electrically connected to the ground wire of the flip chip thin film through the bonding units; each bonding unit includes at least one grounding pin, and the first grounding unit is electrically connected to the grounding pins of the bonding units on its two sides to be electrically connected to the ground wire of the flip chip thin film through the grounding pins; A first insulating layer located above the first grounding unit; At least one first island-shaped conductive layer located above the first insulating layer; wherein, the orthographic projection of the first island-shaped conductive layer on the substrate at least covers part of the orthographic projection of the first grounding unit on the substrate; the first island-shaped conductive layer is in a floating state.

2. The display substrate according to claim 1, wherein The orthographic projection of the first island-shaped conductive layer on the substrate does not overlap with the orthographic projection of the bonding unit on the substrate.

3. The display substrate according to claim 1, wherein The non-display area further includes: A second grounding unit disposed on one side of the first grounding unit close to or away from the display area; Wherein, the second grounding unit is spaced from the first grounding unit; the second grounding unit is electrically connected to the bonding units on its two sides to be electrically connected to the ground wire of the flip chip thin film through the bonding units.

4. The display substrate according to claim 3, wherein The non-display area further includes: A second insulating layer located above the second grounding unit; At least one second island-shaped conductive layer located above the second insulating layer; Wherein, the orthographic projection of the second island-shaped conductive layer on the substrate at least covers part of the orthographic projection of the second grounding unit on the substrate.

5. The display substrate according to claim 4, wherein The orthographic projection of the second island-shaped conductive layer on the substrate does not overlap with the orthographic projection of the bonding unit on the substrate.

6. The display substrate according to claim 1, wherein A plurality of the first island-shaped conductive layers are spaced above the first insulating layer.

7. The display substrate according to claim 4, wherein A plurality of the second island-shaped conductive layers are spaced above the second insulating layer.

8. The display substrate according to claim 1, characterized in that, Each bonding unit further includes a plurality of data signal pins; Wherein, the data signal pins are used for bonding and connecting with the driving signal lines of the flip chip thin film.

9. The display substrate according to claim 8, wherein The data signal pins include: A data signal line, a third insulating layer, a third island-shaped conductive layer, a fourth insulating layer, and a pad stacked in sequence above the substrate; Wherein, the pad is electrically connected to the data signal line through a contact hole penetrating the fourth insulating layer and the third insulating layer, and the pad is used for bonding and connecting with the driving signal lines of the flip chip thin film.

10. The display substrate according to claim 9, wherein The pad is on the same layer as the first island-shaped conductive layer.

11. The display substrate according to claim 8, wherein Each bonding unit further includes: At least one isolation pin located between the data signal pins and the grounding pins; Wherein, the isolation pin is not bonded to the flip chip thin film and is used for isolating the data signal pins and the grounding pins.

12. A display device, characterized in that, It includes a display substrate according to any one of claims 1 to 11, as well as a flip chip thin film and a driving circuit board; Among them, the display substrate and the driving circuit board are electrically connected through the flip-chip film.

13. The display device according to claim 12, characterized in that, The flip-chip film covers at least the bonding unit of the display substrate.

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