Method and apparatus for machine learning
By providing layer and network descriptions for machine learning computing hardware and utilizing storage controllers for error identification and correction, the problem of insufficient reliability of computing hardware in existing technologies is solved. Error identification and correction are realized outside the computing hardware, thereby improving the security and reliability of computing hardware.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ROBERT BOSCH GMBH
- Filing Date
- 2021-02-18
- Publication Date
- 2026-05-22
AI Technical Summary
In existing technologies, machine learning computing hardware is inadequate in error identification and correction, making it difficult to effectively improve the reliability of computing hardware and the ability to identify errors.
By providing layer and network descriptions for the computing hardware, and leveraging communication between the storage controller and the computing hardware, error identification and correction are achieved. This includes determining the tensor addresses of input values, weights, and output values, and performing verification and comparison within the storage controller to identify and correct errors.
It improves the reliability of machine learning computing hardware, enabling error identification and correction outside the computing hardware, thus enhancing the security and reliability of the computing hardware.
Smart Images
Figure CN113283595B_ABST
Abstract
Description
Technical Field
[0001] The starting point of this invention is a method and apparatus for machine learning. Background Technology
[0002] Machine learning can be based on artificial neural networks, which are implemented in computing hardware, also known as KI accelerators.
[0003] Error identification or correction in such an artificial neural network can be performed based on a checksum determined in the computing hardware.
[0004] This enables the location and correction of erroneous neuron output values, which may occur when computing the neuron function of a neural network, for example, due to an erroneous response from the computing hardware.
[0005] What is expected is further improvement in error identification or error correction for machine learning. Summary of the Invention
[0006] This is achieved by the method and apparatus according to the invention.
[0007] The method for machine learning specifies that a layer description is provided for computational hardware used in an artificial neural network. This layer description defines at least a portion of the layers of the artificial neural network, wherein the layer description defines tensors of input values, tensors of weights, and tensors of output values for at least a portion of the layer, and specifically the initial addresses of these tensors. The computational hardware sends messages including the initial addresses of the input value tensors in memory to transmit these input values; messages including the initial addresses of the weight tensors in memory to transmit these weights; or messages including the initial addresses of the output value tensors in memory to transmit these output values. Communication then occurs between the computational hardware and the memory controller in a pre-defined data format. This allows the memory controller to communicate with any computational hardware that supports this data format.
[0008] In one aspect, a network description is provided for computational hardware used in an artificial neural network. This network description includes a list of multiple layer descriptions, one of which includes multiple storage page frame descriptions. One of these storage page frame descriptions includes initial addresses of tensors representing at least a portion of the layer's input values, initial addresses of tensors representing at least a portion of the layer's weights, and initial addresses of tensors representing at least a portion of the layer's output values. The computational hardware sends a message identifying the storage page frame description in the list, and in response to this message, receives the storage page frame description, and determines the initial addresses of these tensors based on the storage page frame description. By processing the list sequentially, the computational hardware can sequentially request and analyze the storage page frame descriptions for all computations and then read input values or weights or write output values from the correct storage locations by directly accessing them.
[0009] Preferably, multiple weights are transferred from memory to the computing hardware via a storage controller for storage in the computing hardware for the artificial neural network, wherein multiple input values are transferred from memory to the computing hardware for storage in the artificial neural network via the storage controller, wherein a sum is determined based on the multiple weights during the transfer of the multiple weights from memory to the computing hardware via the storage controller, wherein a reference value is determined based on the multiple input values and the sum during the transfer of the multiple input values from memory to the computing hardware via the storage controller, wherein a checksum is determined based on the multiple output values during the receipt of multiple output values from the computing hardware at the storage controller, wherein the checksum is checked in comparison with the reference value, and wherein an error is identified or not identified based on the result of the comparison. Thus, error identification is performed outside the computing hardware. This method can be used to improve the reliability of computing hardware for machine learning and can be used to allocate reliability units and functional units for computing hardware for machine learning. The calculation of the checksum and the comparison of the checksum and the reference value are performed outside the computing hardware, i.e., in the storage controller. Through this added security mechanism, the computing hardware can, for example, be used by an external provider.
[0010] In one aspect, multiple weights are transferred from memory to computing hardware via a storage controller for storage in computing hardware for an artificial neural network, wherein multiple input values are transferred from memory to the computing hardware via the storage controller for storage in the computing hardware for the artificial neural network, wherein a sum is determined based on the multiple input values during the transfer of the multiple input values from memory to the computing hardware, wherein a reference value is determined based on the multiple weights and the sum during the transfer of the multiple weights from memory to the computing hardware via the storage controller, wherein a checksum is determined based on the multiple output values during the receipt of multiple output values from the computing hardware at the storage controller, wherein the checksum is checked in a comparison with the reference value, and wherein an error is identified or not identified based on the result of the comparison. This approach is an alternative to the error identification described previously.
[0011] Preferably, error identification is performed on at least one layer of the artificial neural network. Thus, error identification is performed on one or more layers of the network.
[0012] Preferably, during the transmission of multiple input values, a reference value is determined based on the multiple input values and a reference kernel. Thus, another part of the error identification has been performed during transmission.
[0013] Preferably, a read request for multiple weights of a layer in the artificial neural network is received, wherein the multiple weights are read from memory. In this respect, error detection is triggered by a read request to the memory controller.
[0014] Preferably, a read request for multiple input values of a layer of the artificial neural network is received, wherein the multiple input values are read from memory. In this respect, the error identification continues by a read request to the memory controller.
[0015] In one aspect, multiple output values of the layer are determined based on the multiple input values and the multiple weights. In this aspect, the method also includes computation in computing hardware.
[0016] Preferably, if no error is identified, the result value is determined based on one of the plurality of output values and according to the activation function.
[0017] If an error is detected, the storage controller can send an error signal, specifically to the host.
[0018] Preferably, if an error is identified, the storage controller triggers a recalculation of at least a portion of these output values. Error identification can typically limit the error to a subset of output values that can be corrected through recalculation.
[0019] The device is configured to implement the method. Attached Figure Description
[0020] Other advantageous embodiments are apparent from the description and accompanying drawings. In the drawings:
[0021] Figure 1 A schematic diagram of a device used for machine learning is shown;
[0022] Figure 2 The steps in the method used for machine learning are shown. Detailed Implementation
[0023] exist Figure 1 The diagram illustrates a device 100 used for machine learning.
[0024] Device 100 includes memory 102, memory controller 104, data bus 106, processor 108, and computing hardware 110.
[0025] The storage controller 104 is configured to: receive read requests for memory 102 from computing hardware 110 via data bus 106; read data from memory 102 in response to the read requests; and send this data to computing hardware 110 via data bus 106. The processor 108 is configured to communicate with the storage controller 104 via data bus 106 to implement methods for machine learning. In this example, the processor 108 pre-defines hyperparameters, weights, and input values for the artificial neural network to be used for machine learning. In this example, the processor 108 determines the machine learning result based on the output value of the artificial neural network. In this respect, it is not important whether machine learning is used to perform classification, regression, or other calculations.
[0026] In this example, communication between the computing hardware 110 and the memory 102 is specifically via the memory controller 104. Similarly, communication between the processor 108 and the memory 102 is specifically via the memory controller 104. This isolation between the processor 108, the memory controller 104, the computing hardware 110, and the memory 102 allows the error identification method and the error handling method based thereon, described below, to be implemented particularly efficiently.
[0027] In this example, communication between computing hardware 110 and memory controller 104 uses a pre-defined data format. An example of this data format is illustrated in the following tensor description:
[0028] - Address in memory
[0029] - Tensor form
[0030] - Memory partitioning
[0031] - Tensor Data
[0032] Here, "address in memory" in this example defines the initial address of the tensor in memory 102 as addr_layer.
[0033] In this example, the tensor form defines the dimensions B, W, H, and C for multiple input values or multiple output values of a layer in an artificial neural network. For example, a tensor T with B=2, W=320, H=640, and C=3. The form of tensor T is also referred to as T.shape below. For a tensor T with dimensions B=2, W=320, H=640, and C=3, this corresponds to T.shape=(B=2, W=320, H=640, C=3). In this example, the tensor form defines the dimensions Kx, Ky, Ci, and Co for multiple weights of a layer in an artificial neural network. For example, Kx=2, Ky=3, Ci=512, and Co=1024.
[0034] In this example, the dimension arrangement, or memory mapping function, defines the memory partitioning within memory 102. The memory mapping function maps a multidimensional tensor to one-dimensional memory 102. The dimension arrangement describes the rank, size, and data type of the N-dimensional field that can be stored in memory 102. The memory mapping function calculates the storage addresses of the elements in memory 102 for programs that want to access the elements of the field. A sequence of dimensions can be stored in the N-dimensional field. In this example, the first value of the sequence represents the minimum dimension. In this example, the last value of the sequence represents the maximum dimension.
[0035] For multiple input values or multiple output values, these input values or output values are defined in this example by the sequence BWHC, where the last mentioned dimension C is the maximum dimension. For multiple weights, these weights are defined in this example by the sequence KxKyCiCo.
[0036] Tensor data is data, meaning that each bit or byte, or in burst mode, is a block or multiple blocks of data.
[0037] In this example, computing hardware 110 includes storage page frames. In this example, for a tensor with multiple input values, the storage page frame Ifmap is defined according to the tensor description for the multiple input values. In this example, for a tensor with multiple output values, the storage page frame Ofmap is defined according to the tensor description for the multiple output values. In this example, for a tensor with multiple weights, the storage page frame Weights is defined according to the tensor description for the multiple weights.
[0038] In this example, computing hardware 110 is configured to determine the output value of storage page frame Ofmap based on the input values in storage page frame Ifmap and the input values in storage page frame Weights used for weighting.
[0039] In this example, the memory page frame description is defined for this allocation:
[0040] - Ifmap
[0041] Ofmap
[0042] - Weigths.
[0043] In this example, the artificial neural network is defined by layer descriptions and network descriptions.
[0044] Layer description:
[0045] - A list of storage page frame descriptions
[0046] - Operator
[0047] - Activation function.
[0048] In this example, the list of storage page frame descriptions includes all storage page frame descriptions for the methods used in machine learning. Operators define the functions of this layer, such as Conv2D, Depthwise-Separable Convolution, and Sum. Other operations can also be specified. The activation function is typically a non-linear function of this layer, such as the rectified linear unit (ReLU). Other activation functions, such as Sigmoid or tanh, can also be used.
[0049] Network description:
[0050] - List of layer descriptions
[0051] In this example, the list of layer descriptions includes all the layers that should be used in the machine learning method.
[0052] Alternatively, computing hardware can be used to implement only certain aspects of machine learning. In this case, network descriptions and / or storage page frame descriptions are used only for these specific aspects. Other computational steps can be performed independently by the processor 108.
[0053] In this example, based on Figure 2 The method is described using an implementation of Conv2D on computing hardware 110 as an example. Other operations are implemented accordingly. In this example, the rectified linear unit ReLU, implemented on the memory controller 104, is used as the activation function. Other activation functions, such as Sigmoid, can also be used.
[0054] In the following description, exemplary protocols, that is, specified formats, are shown for communication between storage controller 104, memory 102, and computing hardware 110.
[0055] In the following description, it is assumed that processor 108 determines in step 202 which operations and activation functions should be performed on memory controller 104 and which operations and activation functions should be performed on computing hardware 110.
[0056] In this example, in step 202, the layer descriptions of the layers that should be computed in the artificial neural network are determined.
[0057] In this example, in step 204, the layer descriptions of the artificial neural network layers are transmitted.
[0058] In step 206, memory 102 is configured by memory controller 104 as defined by processor 108. Memory controller 104 can also determine the required memory size defining the layer description based on the layer description. Memory controller 104 can also reserve the required memory size based on the layer description, particularly for all data structures. In this example, the layer description is written to memory 102 at the initial address addr_layer in step 208. In this example, the initial address addr_layer is sent by processor 108 and received by memory controller 104. In this example, the initial address addr_layer is used by processor 108 and memory controller 104 for transferring data between them. In this example, multiple input data, multiple output data, and multiple weights are explicitly identified based on their respective initial addresses addr_layer.
[0059] In this example, processor 108 sends an optional start signal 210 to computing hardware 110. Start signal 210 initiates computation in computing hardware 110. Start signal 210 is preferably sent after configuration is complete. Alternatively, configuration completion can be transmitted from storage controller 104 to processor 108. Timing control is also possible.
[0060] Steps 202, 204, 206, and 208 can be optional, for example, if the configuration has been implemented before the method begins.
[0061] In this example, the following steps are performed sequentially for each of the n layers, each containing multiple store page frames. The index n is the length of the list of layer descriptions in the network description. Each layer contains multiple store page frame descriptions, which are denoted below by the index m. The number of store page frame descriptions is not necessarily the same across all layers.
[0062] An exemplary description is illustrated below:
[0063] Network description:
[0064] Layer Description 1
[0065] Storage page frame description 1
[0066] ifmap(tensor description a)
[0067] ofmap(tensor description b)
[0068] weight (tensor description c) ...
[0069] Storage page frame description m
[0070] ifmap(tensor description a)
[0071] ofmap(tensor description b)
[0072] weight (tensor description c) ...
[0073] Layer description n
[0074] Storage page frame description 1
[0075] ifmap(tensor description a)
[0076] ofmap(tensor description b)
[0077] weight (tensor description c) ...
[0078] Storage page frame description m
[0079] ifmap(tensor description a)
[0080] ofmap(tensor description b)
[0081] weight (tensor description c)
[0082] Tensor description:
[0083] - The address in memory = the initial address addr_layer
[0084] - Tensor form = dimensions B, W, H, C
[0085] - Memory partitioning = rank, size, and data type of an N-dimensional field in memory.
[0086] - Tensor data=
[0087] a) Multiple input values of ifmap
[0088] b) Multiple output values ofofmap
[0089] c) Multiple weights
[0090] sequence.
[0091] In step 212, the m-th memory page frame description of the n-th layer description is requested from the list of layer descriptions at computing hardware 110. The corresponding abbreviation is:
[0092] neural_network_descriptor[n].tile[m].
[0093] In this example, the storage controller 104 requests the m-th storage page frame description of the n-th layer.
[0094] In step 214, the computing hardware 110 receives the m-th storage page frame description of the n-th layer from the list of layer descriptions. In this example, the storage controller 104 receives the m-th storage page frame description of the n-th layer. This allows the computing hardware 110 to know the initial address addr_layer of all storage page frames containing the data and operations required for this computation step.
[0095] In step 216, a read request is transmitted for multiple weights described in the m-th storage page frame of the n-th layer of the artificial neural network. In this example, the read request is sent by computing hardware 110. In this example, the read request is received by storage controller 104. In this example, the read request includes the initial address addr_layer of the multiple weights described in the m-th storage page frame of the n-th layer in memory 102 and the memory partition.
[0096] In step 218, multiple weights are read from memory 102. In this example, memory controller 104 reads memory 102 at a predetermined length by partitioning the memory through the location defined by the initial address addr_layer for the multiple weights.
[0097] In step 220, the multiple weights requested in step 216 are transferred to the computing hardware 110. In this example, for the m-th memory page frame description of the n-th layer, using... To represent the multiple weights.
[0098] In step 222, in this example, during the transmission of the plurality of weights, a reference kernel CK is determined based on the plurality of weights:
[0099] in
[0100]
[0101] Multiple weights are defined in the m-th storage page frame of the n-th layer, where Sum defines the summation of the multiple weights of the n-th layer along the dimensions of the tensors of the weights of the n-th layer, and dimension defines the dimension of the summation, which is Co in this example. In this example, the reference kernel CK has the form CK.shape = (Kx, Ky, Ci). The reference kernel CK is determined in the storage controller 104. For optimization purposes, the reference kernel CK can be stored in the memory 102.
[0102] In step 224, a read request is transmitted for multiple input values described in the m-th storage page frame of the n-th layer of the artificial neural network. In this example, the read request is sent by computing hardware 110. In this example, the read request is received by storage controller 104. In this example, the read request includes the initial address addr_layer and memory partition of the multiple input values described in the m-th storage page frame of the n-th layer in memory 102.
[0103] In step 226, multiple input values are read from memory 102. In this example, memory controller 104 reads memory 102 at a predetermined length by partitioning the memory through the location defined by the initial address addr_layer for the multiple input data.
[0104] In step 228, multiple input values are transmitted for storage in the memory page frames of the computational hardware 110 of the artificial neural network. In this example, for the description of the m-th memory page frame of the n-th layer, using... To represent the multiple input values.
[0105] In step 230, in this example, during the transmission of the plurality of input values, a reference value CAR is determined based on the plurality of input values and based on the reference kernel CK:
[0106]
[0107] in
[0108]
[0109] This defines multiple input values for the m-th memory page frame description at level n, where the reference kernel CK of the m-th memory page frame description at level n is added to the multiple input values of the m-th memory page frame description at level n in order to calculate the reference value CAR of the m-th memory page frame description at level n; that is, it is concatenated with the multiple input values of the m-th memory page frame description at level n. In this example, Conv2D represents multiple input parameters. A two-dimensional convolution with the reference kernel CK described by the m-th storage page frame of the n-th layer.
[0110] It can be stipulated that the reference value CAR is written into memory 102.
[0111] In step 232, at the computing hardware 110, multiple output values described by the m-th memory page frame of the n-th layer are determined based on multiple input values described by the m-th memory page frame of the n-th layer and multiple weights of the n-th layer. In this example, the multiple output values described by the m-th memory page frame of the n-th layer are represented by Ofmap and are determined, for example, as:
[0112]
[0113]
[0114] In this example, Conv2D represents multiple input parameters. Multiple weights described by the m-th storage page frame of the n-th layer Two-dimensional convolution.
[0115] In step 232, multiple output values described by the m-th memory page frame of the n-th layer are transmitted. In this example, the multiple output values described by the m-th memory page frame of the n-th layer are transmitted by computing hardware 110. In this example, the multiple output values described by the m-th memory page frame of the n-th layer are received at memory controller 104.
[0116] In step 234, a checksum CA is determined based on the plurality of output values.
[0117]
[0118] The checksum CA is obtained by the set of neurons N described by the m-th storage page frame of the n-th layer according to the following neuron function o. j To form:
[0119]
[0120] Where the neuron function o j In this example, it was determined to be w j,i Weighted input value x i The bias value b of each neuron j j The sum of .
[0121] In this example, the checksum is determined to be
[0122]
[0123] Sum specifies the summation of multiple values of the tensor Ofmap along the C dimension of the tensor (dimension=x, where x can be any dimension in the Ofmap tensor form).
[0124] In step 236, the checksum CA is checked in comparison with the reference value CAR.
[0125] In this example, the comparison uses a reference value o. c To be executed. If:
[0126]
[0127] An error exists either within set N or in the reference value.
[0128] In this example, the checksum CA is compared with the reference value CAR. It can be specified that the reference value CAR is read from memory 102.
[0129] In this example, an error is identified or no error is identified based on the result of the comparison. This is error identification. Error identification can be performed on one or more layers of the artificial neural network. In this example, if an error is identified, the storage controller 104 transmits an error report 238 to the processor 108.
[0130] During the determination of the checksum CA, it can be specified that: Step 240 is performed, in which the result value is determined based on one of a plurality of output values and according to the activation function.
[0131] In this case, it can be specified that in step 242, the result value is stored in memory 102. Preferably, the result value is determined for all output values that have been found to be error-free.
[0132] It can be stipulated that steps 240 and 242 should only be performed if no error is identified.
[0133] It can be stipulated that if an error is detected, the storage controller 104 will send an error signal, specifically to the host.
[0134] It can be stipulated that if an error is detected, the storage controller 104 will trigger a recalculation of these output values.
[0135] In the described manner, multiple weights and multiple input values are transferred from memory 102 to computing hardware 110 via storage controller 104 for storage in computing hardware 110 for artificial neural networks. Furthermore, multiple output values are received from computing hardware 110 at storage controller 104. This is done in the described data format.
[0136] For computing hardware 110, a network description is provided for an artificial neural network, which is a list of n layer descriptions. An exemplary layer description among the n layer descriptions includes m storage page frame descriptions. The storage page frame description of the exemplary description includes: the initial address of the tensor of the input values of the storage page frame; the initial address of the tensor of the weights of the storage page frame; and the initial address of the tensor of the output values of the storage page frame.
[0137] In this example, in step 212, the computing hardware 110 sends a message that identifies the memory page frame description in a list. In response to this message, the memory page frame description is received in step 214. The initial addresses of these tensors are then determined based on the memory page frame description.
[0138] The previously described method specifies that a layer description is provided for the computational hardware 110 used in the artificial neural network. This layer description defines at least a portion of a layer of the artificial neural network. In this example, that portion of the layer corresponds to a storage page frame. The layer description defines: a tensor of the input values of the storage page frame; a tensor of the weights of the storage page frame; and a tensor of the output values of the storage page frame. Alternatively, tensors can be defined for the entire layer.
[0139] In step 216, the computing hardware 110 sends a message to transmit these input values, the message including the initial addresses of the tensors of these input values in memory 102. In step 224, the computing hardware 110 sends a message to transmit these weights, the message including the initial addresses of the tensors of these weights in memory 102. In step 232, the computing hardware 110 sends a message to transmit these output values, the message including the initial addresses of the tensors of these output values in memory 102.
[0140] In the previously described approach, a sum CK is determined based on the multiple weights while they are being transferred from memory 102 to computing hardware 110 via storage controller 104, and a reference value CAR is determined based on the multiple input values and the sum CK while they are being transferred from memory 102 to computing hardware 110 via storage controller 104 for storage. In this case, a checksum CA is determined based on the multiple output values received from computing hardware 110 at storage controller 104. This checksum CA is checked in a comparison with the reference value CAR. In this example, an error is identified if the checksum CA deviates from the reference value CAR based on the result of this comparison. Otherwise, no error is identified.
[0141] In one alternative, a sum CK is determined based on the input values while multiple input values are transferred from memory 102 to computing hardware 110 via storage controller 104. In this alternative, a reference value CAR is determined based on the weights and the sum CA while multiple weights are transferred from memory 102 to computing hardware 110 via storage controller 104 for storage. In this case, a checksum CA is determined based on the output values and checked in a comparison with the reference value CAR while multiple output values are received from computing hardware 110 at storage controller 104. In this example, an error is identified if the checksum CA deviates from the reference value CAR based on the result of this comparison. Otherwise, no error is identified.
Claims
1. A method for performing machine learning using artificial neural networks, characterized in that, A layer description is provided for the computing hardware (110) used in the artificial neural network, the layer description defining at least a portion of the layers of the artificial neural network, wherein the layer description defines tensors of input values of at least a portion of the layers, tensors of weights of at least a portion of the layers, tensors of output values of at least a portion of the layers, and initial addresses of these tensors, wherein the computing hardware (110) sends a message (216) to transmit the input values, the message including the initial address of the input value tensor in memory (102), wherein the computing hardware (110) sends a message (224) to transmit the weights, the message including the initial address of the weight tensor in memory (102), or wherein the computing hardware (110) sends a message (232) to transmit the output values, the message including the initial address of the weight tensor in memory (102). The initial address of the tensor containing the output value in memory (102) is provided for computing hardware (110) for the artificial neural network, wherein the network description includes a list of multiple layer descriptions, wherein one of the multiple layer descriptions includes multiple storage page frame descriptions, wherein one of the multiple storage page frame descriptions includes the initial address of the tensor of the input values of at least a portion of the layer, the initial address of the tensor of the weights of at least a portion of the layer, and the initial address of the tensor of the output values of at least a portion of the layer, wherein the computing hardware (110) sends (212) a message that identifies the storage page frame description in the list, wherein in response to the message, the storage page frame description is received (214), and wherein the initial addresses of these tensors are determined based on the storage page frame description.
2. The method according to claim 1, characterized in that, Multiple weights are transferred (220) from memory (102) to computing hardware (110) via storage controller (104) for storage in computing hardware (110) for the artificial neural network, wherein multiple input values are transferred (228) from memory (102) via storage controller (104) to be stored in computing hardware (110) for the artificial neural network, wherein during the transfer of the multiple weights from memory (102) via storage controller (104) to computing hardware (110), a sum (CK) is determined (222) based on the multiple weights, wherein in the multiple During the transfer of input values from the memory (102) to the computing hardware (110) via the storage controller (104) for storage, a reference value (CAR) is determined (230) based on the plurality of input values and the sum (CK), wherein during the receipt (232) of a plurality of output values from the computing hardware (110) at the storage controller (104), a checksum (CA) is determined (234) based on the plurality of output values, wherein the checksum (CA) is checked (236) in comparison with the reference value (CAR), and wherein an error is identified (238) or not identified based on the result of the comparison.
3. The method according to claim 1, characterized in that, Multiple weights are transferred (220) from memory (102) to computing hardware (110) via storage controller (104) for storage in computing hardware (110) for the artificial neural network, wherein multiple input values are transferred (228) from memory (102) via storage controller (104) to be stored in computing hardware (110) for the artificial neural network, wherein during the transfer of the multiple input values from memory (102) via storage controller (104) to computing hardware (110), a sum (CK) is determined (222) based on the multiple input values, wherein in the During the transfer of multiple weights from the memory (102) via the storage controller (104) to the computing hardware (110), a reference value (CAR) is determined (230) based on the multiple weights and the sum (CK), wherein during the receipt (232) of multiple output values from the computing hardware (110) at the storage controller (104), a checksum (CA) is determined (234) based on the multiple output values, wherein the checksum (CA) is checked (236) in comparison with the reference value (CAR), and wherein an error is identified (238) or not identified based on the result of the comparison.
4. The method according to claim 2 or 3, characterized in that, Error identification is performed on at least one layer of the artificial neural network (238).
5. The method according to any one of claims 1 to 3, characterized in that, Receive (216) a read request for multiple weights of a layer of an artificial neural network, wherein the multiple weights are read (218) from the memory (102).
6. The method according to any one of claims 1 to 3, characterized in that, Receive (208c) a read request for multiple input values of a layer of an artificial neural network, wherein the multiple input values are read from the memory (102).
7. The method according to claim 2 or 3, characterized in that, The multiple output values of the layer (212) are determined based on the multiple input values and the multiple weights.
8. The method according to claim 2 or 3, characterized in that, If no error is identified, the result value (240) is determined based on one of the multiple output values and the activation function.
9. The method according to claim 2 or 3, characterized in that, If an error is detected, the storage controller (104) sends an error signal to the host.
10. The method according to claim 2 or 3, characterized in that, If an error is detected, the storage controller (104) triggers a recalculation of at least a portion of the output value.
11. A computer program product comprising a computer program, characterized in that, The computer program includes computer-readable instructions, which, when implemented by a computer, operate according to the method of any one of claims 1 to 10.
12. A device for machine learning, characterized in that, The device is configured to implement the method according to any one of claims 1 to 10.