Circuit for controlling a switching device to deliver power to a load

Abstract

Embodiments of the present disclosure relate to circuits for controlling switching devices to deliver power to a load. The present disclosure includes systems, methods, and techniques for controlling power delivery to a load. For example, a circuit includes a first switching device and a second switching device. The circuit is configured to activate the first switching device in response to a source voltage of a semiconductor device being below a first voltage, such that the circuit delivers a first electrical signal to the semiconductor device, where the first electrical signal includes the first voltage; and deactivate the first switching device in response to the source voltage of the semiconductor device not being below the first voltage. Additionally, the circuit is configured to activate the second switching device in response to the source voltage of the semiconductor device not being below the first voltage, such that the circuit delivers a second electrical signal to the semiconductor device.

Description

Technical Field

[0001] This disclosure relates to circuits for controlling current across a semiconductor device. Background Technology

[0002] Driver circuits are typically used to control voltage, current, or power at a load. For example, an assembly of semiconductor devices can provide electrical signals to a load such as a motor. An assembly of semiconductor devices may include one or more high-side semiconductor devices between the power source and the load, and one or more low-side semiconductor devices between the load and ground. In some cases, gate driver circuitry can control the assembly of semiconductor devices by passing electrical signals to the respective gate terminals of the assembly. Summary of the Invention

[0003] Generally, this disclosure relates to devices, systems, and techniques for controlling one or more semiconductor devices to deliver power to a load. For example, a circuitry can control a set of semiconductor devices, where each circuit in the circuitry controls a corresponding semiconductor device in the set. The semiconductor set can deliver power to a load such as a motor. The semiconductor set may include one or more “high-side” semiconductor devices located between the power source and the load, and one or more “low-side” semiconductor devices located between the load and ground. The semiconductor set can be activated and / or deactivated by circuitry to control how the load operates. In one or more examples where the load represents a motor (e.g., a brushless DC motor (BLDC)), the circuitry can activate and / or deactivate any one or any combination of semiconductor devices in the set to cause the motor to operate in one or more phases of a phase set.

[0004] In some examples, the circuit controls a semiconductor device, and the circuit includes a first switching device and a second switching device. The circuit is configured to activate the first switching device in response to a source voltage of the semiconductor device being lower than a first voltage, such that the circuit delivers a first electrical signal to the semiconductor device, wherein the first electrical signal includes the first voltage; and to deactivate the first switching device in response to a source voltage of the semiconductor device not being lower than the first voltage. Additionally, the circuit is configured to activate the second switching device in response to a source voltage of the semiconductor device not being lower than the first voltage, such that the circuit delivers a second electrical signal to the semiconductor device, wherein the second electrical signal includes a second voltage different from the first voltage; and to deactivate the second switching device in response to a source voltage of the semiconductor device being lower than the first voltage.

[0005] In some examples, the method includes: activating a first switching device via a circuit in response to a source voltage of the semiconductor device being lower than a first voltage, such that the circuit delivers a first electrical signal to the semiconductor device, wherein the first electrical signal includes the first voltage; and deactivating the first switching device via a circuit in response to a source voltage of the semiconductor device not being lower than the first voltage. Additionally, the method includes activating a second switching device via a circuit in response to a source voltage of the semiconductor device not being lower than the first voltage, such that the circuit delivers a second electrical signal to the semiconductor device, wherein the second electrical signal includes a second voltage different from the first voltage; and deactivating the second switching device via a circuit in response to a source voltage of the semiconductor device being lower than the first voltage.

[0006] In some examples, the system includes: a semiconductor device having a gate, wherein the semiconductor device is configured to receive a power signal including a power supply voltage from a power source; and circuitry including a first switching device and a second switching device. The circuitry is configured to activate the first switching device in response to a source voltage of the semiconductor device being lower than a first voltage, such that the circuitry delivers a first electrical signal to the gate of the semiconductor device, wherein the first electrical signal includes the first voltage; and to deactivate the first switching device in response to a source voltage of the semiconductor device not being lower than the first voltage. Additionally, the circuitry is configured to activate the second switching device in response to a source voltage of the semiconductor device not being lower than the first voltage, such that the circuitry delivers a second electrical signal to the gate of the semiconductor device, wherein the second electrical signal includes a second voltage different from the first voltage; and to deactivate the second switching device in response to a source voltage of the semiconductor device being lower than the first voltage.

[0007] The summary is intended to provide an overview of the subject matter described in this disclosure. It is not intended to provide an exclusive or exhaustive interpretation of the systems, devices, and methods detailed in the accompanying drawings and the following description. Further details of one or more examples of this disclosure are illustrated in the accompanying drawings and the following description. Other features, objects, and advantages will become apparent from the specification, the accompanying drawings, and the claims. Attached Figure Description

[0008] Figure 1 This is a block diagram illustrating an exemplary system for transferring power from a power source to a load according to one or more technologies of this disclosure.

[0009] Figure 2 This is a circuit diagram illustrating a system according to one or more technologies of this disclosure, the system including a first example circuit for transferring power from a power source to a load.

[0010] Figure 3 This is a circuit diagram illustrating a system according to one or more technologies of this disclosure, the system including a second example circuit for transferring power from a power source to a load.

[0011] Figure 4 This is a circuit diagram illustrating a system according to one or more technologies of this disclosure, the system including a third example circuit for transferring power from a power source to a load.

[0012] Figure 5A This is a circuit diagram illustrating a system including a first example high-side gate driver circuit according to one or more techniques of this disclosure.

[0013] Figure 5B This is a circuit diagram illustrating a system including a second example high-side gate driver circuit according to one or more techniques of this disclosure.

[0014] Figure 6 This is a conceptual diagram illustrating a series of graphs corresponding to a high-side gate driver circuit and a corresponding high-side semiconductor device according to one or more technologies of this disclosure.

[0015] Figure 7 This is a flowchart illustrating an example operation of controlling a semiconductor device according to one or more techniques of this disclosure.

[0016] Throughout the specification and accompanying drawings, the same reference numerals denote the same elements. Detailed Implementation

[0017] Some systems can use a set of gate driver circuits to control any one or any combination of semiconductor devices to deliver power to a load. In some examples, the load may represent a motor configured to operate according to one or more phases. The phase of the motor may be related to which semiconductor devices in the set of semiconductor devices are active. In some cases, each gate driver circuit in the set of gate driver circuits is configured to drive the gate terminal of the corresponding semiconductor device without the assistance of a bootstrap capacitor external to the gate driver circuit. For example, the gate driver circuit may alternate between providing a first electrical signal to the gate terminal of the semiconductor device and providing a second electrical signal to the gate terminal of the semiconductor device to ensure that the gate driver circuit can properly control the gate when the voltage amplitude of the electrical signal traveling across the semiconductor device is greater than or equal to the voltage amplitude of the first electrical signal.

[0018] Figure 1 This is a block diagram illustrating an exemplary system 100 for transferring power from a power source 110 to a load 160 according to one or more techniques of this disclosure. Figure 1As shown in the example, system 100 includes a power supply 110, circuitry 112, and a load 160. Circuitry 112 includes a power converter unit 120, a charge pump unit 130, a high-side circuitry device 140, and a low-side circuitry device 150. High-side circuitry device 140 includes a high-side gate driver circuitry 142 and a high-side semiconductor device 144. Low-side circuitry device 150 includes a low-side gate driver circuitry 152 and a low-side semiconductor device 154.

[0019] Power supply 110 is configured to deliver operating power to circuit 112. In some examples, power supply 110 includes a battery and power generation circuitry for generating operating power. In some examples, power supply 110 is rechargeable to allow for extended operation. Power supply 110 may include one or more of several different battery types, such as nickel-cadmium batteries and lithium-ion batteries. In some examples, the maximum voltage output of power supply 110 is approximately 12V. In some examples, power supply 110 provides power in the range from 10 watts (W) to 15W.

[0020] Circuit 112 may include circuit elements, including resistors, capacitors, inductors, diodes, semiconductor switches, and other semiconductor components. For example... Figure 1 As shown, circuit 112 includes a power converter unit 120 and a charge pump unit 130. Power supply 110 can provide an input signal (e.g., a power signal) to power converter unit 120, charge pump unit 130, and high-side circuit device 140, thereby powering circuit 112. Furthermore, power converter unit 120 can use the power signal to generate a first electrical signal including a first voltage and a first current. Power converter unit 120 can provide at least a portion of the first electrical signal to charge pump unit 130. Additionally or alternatively, power converter unit 120 can provide at least a portion of the first electrical signal to one or both of high-side circuit device 140 and low-side circuit device 150. In some cases, the power signal may include a power supply current and a power supply voltage.

[0021] In some cases, power converter unit 120 represents a DC-DC power converter configured to regulate one or more parameters (e.g., a first current and a first voltage) of a first electrical signal delivered to charge pump unit 130, high-side circuit device 140, low-side circuit device 150, or any combination thereof. In some examples, the DC-DC power converter includes a switching / inductor unit such as an H-bridge. An H-bridge uses a set of switches (typically semiconductor switches) to convert electrical power. In some examples, the switching / inductor unit acts as a buck-boost converter. For example, a buck-boost converter is configured to regulate the output voltage using at least two operating modes, including a buck mode and a boost mode.

[0022] In one or more examples where power converter unit 120 represents a buck-boost converter, power converter unit 120 can control the semiconductor switches of the buck-boost converter to change the mode of the buck-boost converter (e.g., change the operating mode of the buck-boost converter from buck mode to boost mode, and vice versa). Power converter unit 120 can operate in boost mode in response to a power supply voltage of a power supply signal transmitted by power supply 110 being lower than a first threshold power supply voltage. Additionally, in some cases, power converter unit 120 can operate in buck mode in response to a power supply voltage being greater than a second threshold power supply voltage. In some examples, power converter unit 120 can operate in one of a group of three modes based on the power supply voltage. The group of three modes can include: a boost mode when the power supply voltage is in the range of 8 volts (V) to 15V; a buck mode when the power supply voltage is in the range of 30V to 70V; and a mixed mode when the power supply voltage is in the range of 15V to 30V.

[0023] exist Figure 1 In the illustrated example, the semiconductor switch of the power converter unit 120 may include a transistor, a diode, or other semiconductor element. In buck mode, the buck-boost converter of the power converter unit 120 may decrease the supply voltage and increase the supply current to generate a first electrical signal output from the power converter unit 120. In boost mode, the buck-boost converter of the power converter unit 120 may increase the supply voltage and decrease the supply current to generate a first electrical signal output from the power converter unit 120. In some examples, the power converter unit 120 is configured to regulate a first current and a first voltage of the first electrical signal such that the first current and the first voltage remain substantially constant. In some examples, the power converter unit 120 may regulate a first voltage of the first electrical signal to a constant voltage value in the range of 16V to 20V. In some examples, the power converter unit 120 may regulate a first voltage of the first electrical signal to 18V.

[0024] In some examples, charge pump unit 130 may include one or more capacitors that store charge to increase or decrease voltage from the inlet to the outlet of charge pump unit 130. Thus, charge pump unit 130 may be a power converter that receives an input electrical signal and generates an output electrical signal with parameter values ​​different from the input electrical signal. In some examples, charge pump unit 130 may receive at least a portion of a first electrical signal from power converter unit 120. Additionally, in some examples, charge pump unit 130 may receive a power supply signal from power source 110. Furthermore, charge pump unit 130 may generate a second electrical signal including a second voltage and a second current. In some examples, charge pump unit 130 may transmit the second electrical signal to high-side circuit device 140. Charge pump unit 130 may boost the voltage of the received electrical signal to generate the second electrical signal.

[0025] In some examples, charge pump unit 130 represents a Dickson charge pump comprising one or more "stages," each of the stages corresponding to a multiplication factor of the voltage of the electrical signal input to the charge pump. In some examples, charge pump unit 130 represents another type of charge pump. In some examples, charge pump unit 130 includes one stage and multiplies the voltage of the input electrical signal by a factor of two. In some examples, charge pump unit 130 includes two stages and multiplies the voltage of the input electrical signal by a factor of three. In some examples, charge pump unit 130 includes three stages and multiplies the voltage of the input electrical signal by a factor of four. Thus, each additional stage included in charge pump unit 130 represents an additional multiplication factor of the voltage of the electrical signal transmitted through charge pump unit 130.

[0026] High-side circuitry 140 includes high-side gate driver circuitry 142 and high-side semiconductor device 144, and low-side circuitry 150 includes low-side gate driver circuitry 152 and low-side semiconductor device 154. Circuitry 112 can control the high-side semiconductor device 144 and the low-side semiconductor device 154 (collectively referred to as "semiconductor devices 144, 154") to deliver power from power source 110 to load 160. In some examples, the number of high-side semiconductor devices 144 may be the same as the number of low-side semiconductor devices 154. For example, each high-side semiconductor device in the set of high-side semiconductor devices 144 may be paired with a corresponding low-side semiconductor device in the set of low-side semiconductor devices 154. Each pair of low-side and high-side semiconductor devices can control the power delivered to a corresponding input in the set of inputs to load 160. In some examples, load 160 may represent a motor such as a brushless DC (BLDC) motor, which includes inputs corresponding to each operating phase of the motor. In the case where load 160 represents a BLDC motor, load 160 includes three inputs, where each input corresponds to a specific phase among the three phases of the BLDC motor.

[0027] In some cases, each of the semiconductor devices 144 and 154 may include a power switch, such as, but not limited to, any type of field-effect transistor (FET) including any or any combination of metal-oxide-semiconductor field-effect transistors (MOSFETs), bipolar junction transistors (BJTs), insulated-gate bipolar transistors (IGBTs), junction field-effect transistors (JFETs), high electron mobility transistors (HEMTs), or other elements controlled by voltage. Additionally, semiconductor devices 144 and 154 may include n-type transistors, p-type transistors, and power transistors, or any combination thereof. In some examples, semiconductor devices 144 and 154 include vertical transistors, lateral transistors, and / or horizontal transistors. In some examples, semiconductor devices 144 and 154 include other analog devices such as diodes and / or thyristors. In some examples, semiconductor devices 144 and 154 may function as switches and / or analog devices.

[0028] In some examples, each of semiconductor devices 144 and 154 includes three terminals: two load terminals and a control terminal. For a MOSFET switch, each of semiconductor devices 144 and 154 may include a drain terminal, a source terminal, and at least one gate terminal, wherein the control terminal is the gate terminal. For a BJT switch, the control terminal may be the base terminal. Current can flow between the two load terminals of each of semiconductor devices 144 and 154 based on the voltage at the respective control terminal. Therefore, current can flow across semiconductor devices 144 and 154 based on a control signal passed to the respective control terminal of semiconductor devices 144 and 154. In one example, if the voltage applied to the control terminal of a semiconductor device in semiconductor devices 144 and 154 is greater than or equal to a voltage threshold, the corresponding semiconductor device can be activated, thereby allowing the semiconductor device to conduct across the load terminals of the semiconductor device. Furthermore, when the voltage applied to the respective control terminal of a semiconductor device is lower than the threshold voltage, the semiconductor device is deactivated, thereby preventing the semiconductor device from conducting. Controller ( Figure 1 (Not shown) can be configured to independently control semiconductor devices 144 and 154, such that one, a combination, all, or no semiconductor device in semiconductor devices 144 and 154 can be activated at a certain point in time. For example, the controller can be configured to control the high-side gate driver circuit 142 and the low-side gate driver circuit 152 (collectively referred to as "gate driver circuits 142, 152") to activate or deactivate semiconductor devices 144 and 154, respectively.

[0029] Semiconductor devices 144 and 154 may comprise various material compounds, such as silicon, silicon carbide, gallium nitride, or any other combination of one or more semiconductor materials. In some examples, silicon carbide switches may experience lower switching power losses. Improvements in magnetism and faster switching (such as gallium nitride switches) may allow semiconductor devices 144 and 154 to draw short bursts of current from power supply 110. Compared to lower-frequency semiconductor devices, these higher-frequency semiconductor devices may require more precise timing to send control signals (e.g., voltage signals passed from gate driver circuits 142 and 152 to the respective control terminals of semiconductor devices 144 and 154).

[0030] In some cases, each high-side gate driver circuit 142 may be electrically connected to the gate terminal of the corresponding high-side semiconductor device 144, such that the gate driver circuit can transmit control signals to control the operation of the high-side semiconductor device. Thus, the number of high-side gate driver circuits 142 may be equal to the number of high-side semiconductor devices 144. Each high-side gate driver circuit 142 may receive at least a portion of a first electrical signal generated by the power converter unit 120 and at least a portion of a second electrical signal generated by the charge pump unit 130. In some examples, the high-side gate driver circuits 142 may alternate between providing the first electrical signal and providing the second electrical signal to the gate terminal of the corresponding high-side semiconductor device in the high-side semiconductor device 144.

[0031] In some examples, the high-side gate driver circuit can determine whether to provide a first electrical signal or a second electrical signal based on one or more parameters of the source terminal electrical signal passed through the corresponding high-side semiconductor device. For example, if the source terminal voltage of the source terminal electrical signal is less than a first voltage of the first electrical signal, the high-side gate driver circuit can provide the first electrical signal to the gate of the corresponding high-side semiconductor device. If the source terminal voltage is not less than the first voltage of the first electrical signal, the high-side gate driver circuit can switch to providing the second electrical signal to the gate of the corresponding high-side semiconductor device.

[0032] In some examples, the high-side gate driver circuit in high-side gate driver circuit 142 may alternate between providing a first electrical signal and providing a second electrical signal to the gate terminal of the corresponding high-side semiconductor device in high-side semiconductor device 144, to maintain more reliable and consistent control of the gate terminal compared to gate driver circuits that do not alternate between two or more electrical signals provided to the gate terminal. For example, some gate driver circuits controlling the high-side semiconductor device may use a bootstrap capacitor to supplement the control signal provided to the gate terminal of the semiconductor device. Such gate driver circuits may need to charge the bootstrap capacitor, which limits the amount of time the gate driver circuit can keep the corresponding semiconductor in an active state. Figure 1 The high-side gate driver circuit 142 can eliminate the need to use and spend time charging the bootstrap capacitor, thus increasing the amount of time that the high-side gate driver circuit 142 can keep the high-side semiconductor device 144 in an active state compared to a high-side gate driver circuit that includes a bootstrap capacitor.

[0033] In some cases, each low-side gate driver circuit 152 can be electrically connected to the gate terminal of the corresponding low-side semiconductor device 154, such that the low-side gate driver circuit can transmit control signals to control the operation of the low-side semiconductor device. In this way, the number of low-side gate driver circuits 152 can be equal to the number of low-side semiconductor devices 154. Each high-side gate driver circuit in the low-side gate driver circuit 152 can receive at least a portion of the first electrical signal generated by the power converter unit 120. In some examples, the low-side gate driver circuit 152 can transmit the first electrical signal to the corresponding gate terminal of the low-side semiconductor device 154 to control whether the low-side semiconductor device 154 is in an active or deactivated state.

[0034] In some examples, circuit 112 can transfer power from power source 110 to load 160. In some cases, load 160 can represent a motor such as a BLDC motor, a brushed DC motor, an AC induction motor, or other types of motor. When load 160 represents a BLDC motor, the BLDC motor can operate according to any one of the phase sets, where each phase in the phase set is associated with a corresponding input to load 160. In some examples, each input to load 160 can be provided by a corresponding pair of high-side gate driver circuits in high-side gate driver circuit 142 and low-side gate driver circuits in low-side gate driver circuit 152. Based on which pair or more of the semiconductor devices are active, load 160 can operate in one or more corresponding phases of the phase set.

[0035] Figure 2 This is a circuit diagram illustrating a system 200 according to one or more technologies of this disclosure. The system 200 includes a first example circuit 212 for transferring power from a power source 210 to a load 260. Figure 2 As shown, circuit 212 includes a power converter unit 220, a charge pump unit 230, high-side gate driver circuits 242A-242C (collectively referred to as "high-side gate driver circuit 242"), high-side semiconductor devices 244A-244C (collectively referred to as "high-side semiconductor devices 244"), low-side gate driver circuits 252A-252C (collectively referred to as "low-side gate driver circuit 252"), and low-side semiconductor devices 254A-254C (collectively referred to as "low-side semiconductor devices 254"). Power supply 210 can be... Figure 1 An example of power supply 110. Power converter unit 220 may be... Figure 1 An example of a power converter unit 120. The charge pump unit 230 may be... Figure 1 An example of the charge pump unit 130. The high-side gate driver circuit 242 may be... Figure 1 An example of a high-side gate driver circuit 142. The high-side semiconductor device 244 may be... Figure 1 An example of the high-side semiconductor device 144. The low-side gate driver circuit 252 may be... Figure 1 An example of the low-side gate driver circuit 152. The low-side semiconductor device 254 may be... Figure 1 An example of a low-side semiconductor device 154.

[0036] Circuit 212 can be configured to transfer power from power source 210 to a load 260 representing a multi-stage motor. For example, load 260 may represent a BLDC motor comprising three stages. Load 260 may include a first input 262, a second input 264, and a third input 266 (collectively referred to as "inputs 262, 264, 266"). Circuit 212 can transfer electrical signals to any one or any combination of inputs 262, 264, and 266 to cause load 260 to operate according to one of the three phases. Figure 2 As shown, high-side semiconductor device 244A and low-side semiconductor device 254A control the power transfer to the first input 262, high-side semiconductor device 244B and low-side semiconductor device 254B control the power transfer to the second input 264, and high-side semiconductor device 244C and low-side semiconductor device 254C control the power transfer to the third input 266.

[0037] The gate terminal of each semiconductor device in the high-side semiconductor device 244 can be electrically connected to a corresponding gate driver circuit in the high-side gate driver circuit 242. For example, high-side gate driver circuit 242A is electrically connected to the gate terminal of high-side semiconductor device 244A, high-side gate driver circuit 242B is electrically connected to the gate terminal of high-side semiconductor device 244B, and high-side gate driver circuit 242C is electrically connected to the gate terminal of high-side semiconductor device 244C. Each high-side gate driver circuit in the high-side gate driver circuit 242 can receive a first electrical signal from the power converter unit 220 via conductor 222, and each high-side gate driver circuit in the high-side gate driver circuit 242 can receive a second electrical signal from the charge pump unit 230 via conductor 232. Additionally, in some cases, each high-side gate driver circuit in the high-side gate driver circuit 242 can alternate between transmitting the first electrical signal and transmitting the second electrical signal to the corresponding high-side semiconductor device in the high-side semiconductor device 244 to control whether the semiconductor device is in an active or deactivated state.

[0038] The gate terminal of each semiconductor device in low-side semiconductor device 254 can be electrically connected to a corresponding gate driver circuit in low-side gate driver circuit 252. For example, low-side gate driver circuit 252A is electrically connected to the gate terminal of low-side semiconductor device 254A, low-side gate driver circuit 252B is electrically connected to the gate terminal of low-side semiconductor device 254B, and low-side gate driver circuit 252C is electrically connected to the gate terminal of low-side semiconductor device 254C. Each low-side gate driver circuit in low-side gate driver circuit 252 can receive a first electrical signal from power converter unit 220 via conductor 224.

[0039] Figure 3 This is a circuit diagram illustrating a system 300 according to one or more technologies of this disclosure. The system 300 includes a second example circuit 312 for transferring power from a power source 310 to a load 360. Figure 3 As shown, circuit 312 includes a power converter unit 320, a charge pump unit 330, high-side gate driver circuits 342A-242B (collectively referred to as "high-side gate driver circuit 342"), high-side semiconductor devices 344A-344B (collectively referred to as "high-side semiconductor devices 344"), low-side gate driver circuits 352A-352B (collectively referred to as "low-side gate driver circuit 352"), and low-side semiconductor devices 354A-354B (collectively referred to as "low-side semiconductor devices 354"). Power supply 310 can be... Figure 1 An example of power supply 110. Power converter unit 320 may be... Figure 1 An example of a power converter unit 120. The charge pump unit 330 may be... Figure 1 An example of the charge pump unit 130. The high-side gate driver circuit 342 may be... Figure 1 An example of the high-side gate driver circuit 142. The high-side semiconductor device 344 may be... Figure 1 An example of the high-side semiconductor device 144. The low-side gate driver circuit 352 may be... Figure 1 An example of the low-side gate driver circuit 152. The low-side semiconductor device 354 may be... Figure 1 An example of a low-side semiconductor device 154.

[0040] Circuit 312 can be configured to transfer power from power source 310 to load 360 representing a multi-stage motor. Load 360 may include a first input 362 and a second input 364 (collectively referred to as "inputs 362, 364"). Circuit 312 can transfer electrical signals to any one or both of inputs 362, 364. Figure 3As shown, the high-side semiconductor device 344A and the low-side semiconductor device 354A control the power transfer to the first input 362, and the high-side semiconductor device 344B and the low-side semiconductor device 354B control the power transfer to the second input 364.

[0041] The gate terminal of each semiconductor device in the high-side semiconductor device 344 can be electrically connected to a corresponding gate driver circuit in the high-side gate driver circuit 342. For example, high-side gate driver circuit 342A is electrically connected to the gate terminal of high-side semiconductor device 344A, and high-side gate driver circuit 342B is electrically connected to the gate terminal of high-side semiconductor device 344B. Each high-side gate driver circuit in the high-side gate driver circuit 342 can receive a first electrical signal from the power converter unit 320 via conductor 322, and each high-side gate driver circuit in the high-side gate driver circuit 342 can receive a second electrical signal from the charge pump unit 330 via conductor 332. Additionally, in some cases, each high-side gate driver circuit in the high-side gate driver circuit 342 can alternate between transmitting the first electrical signal and transmitting the second electrical signal to the corresponding high-side semiconductor device in the high-side semiconductor device 344 to control whether the semiconductor device is in an active or deactivated state.

[0042] The gate terminal of each semiconductor device in the low-side semiconductor device 354 can be electrically connected to a corresponding gate driver circuit in the low-side gate driver circuit 352. For example, low-side gate driver circuit 352A is electrically connected to the gate terminal of low-side semiconductor device 354A, and low-side gate driver circuit 352B is electrically connected to the gate terminal of low-side semiconductor device 354B. Each low-side gate driver circuit in the low-side gate driver circuit 352 can receive a first electrical signal from the power converter unit 320 via conductor 324.

[0043] Figure 4 This is a circuit diagram illustrating a system 400 according to one or more technologies of this disclosure. The system 400 includes a third example circuit 412 for transferring power from a power source 410 to a load 460. Figure 4 As shown, circuit 412 includes a power converter unit 420, a charge pump unit 430, a high-side gate driver circuit 442, a high-side semiconductor device, a low-side gate driver circuit 452, and a low-side semiconductor device 454. Power supply 410 can be... Figure 1 An example of power supply 110. Power converter unit 420 may be... Figure 1 An example of a power converter unit 120. The charge pump unit 430 may be... Figure 1 An example of the charge pump unit 130. The high-side gate driver circuit 442 may be... Figure 1 An example of a high-side gate driver circuit 142. The high-side semiconductor device 444 can be... Figure 1 An example of the high-side semiconductor device 144. The low-side gate driver circuit 452 may be... Figure 1 An example of a low-side gate driver circuit 152. The low-side semiconductor device 454 can be... Figure 1 An example of a low-side semiconductor device 154.

[0044] Circuit 412 can be configured to transfer power from power source 410 to load 460, which in some cases represents a motor. Load 460 may include input 462 and output 464. Circuit 412 can transfer electrical signals to input 462. Figure 4 As shown, high-side semiconductor device 444 and low-side semiconductor device 454 control the power delivery to input 462. The gate terminal of high-side semiconductor device 444 can be electrically connected to high-side gate driver circuit 442. High-side gate driver circuit 442 can receive a first electrical signal from power converter unit 420 via conductor 422, and high-side gate driver circuit 442 can receive a second electrical signal from charge pump unit 430 via conductor 432. Additionally, in some cases, high-side gate driver circuit 442 can alternate between delivering the first electrical signal and delivering the second electrical signal to high-side semiconductor device 444 to control whether semiconductor device 444 is in an active or deactivated state. The gate terminal of low-side semiconductor device 454 can be electrically connected to low-side gate driver circuit 452. Low-side gate driver circuit 452 can receive the first electrical signal from power converter unit 420 via conductor 424.

[0045] Figure 5A This is a circuit diagram illustrating a system 500A according to one or more technologies of this disclosure, the system 500A including a first example high-side gate driver circuit 542A. (See diagram below.) Figure 5A As shown, system 500A includes a high-side gate driver circuit 542A, a high-side semiconductor device 544, and a second switching device 552. The high-side gate driver circuit 542A includes a first switching device 550, a second switching device 552, a first gate driver semiconductor device 554, a second gate driver semiconductor device 556, a first resistor 564, a second resistor 568, and a comparator device 580. Additionally, the high-side gate driver circuit 542A includes pins 560, 562, 566, 570, and 572 indicating input / output electrical connections.

[0046] High-side semiconductor device 544 can be Figure 1 Any one of the high-side semiconductor devices 144 Figure 2Any one of the high-side semiconductor devices 244 Figure 3 The high-side semiconductor device 344 or any example of the high-side semiconductor device 444. The high-side gate driver circuit 542A may be an example of a gate driver circuit electrically connected to the high-side semiconductor device 544. For example, the high-side gate driver circuit 542A may be... Figure 1 Any one of the high-side gate driver circuits 142 Figure 2 Any one of the high-side gate driver circuits 242 Figure 3 One or one of the high-side gate driver circuits 342 Figure 4 Any example of the high-side gate driver circuit 442.

[0047] As in Figure 5A As seen in the example, the gate terminal 545 of the high-side semiconductor device 544 is electrically connected to a high-side gate driver circuit 542A. The high-side gate driver circuit 542A can transmit control signals to the gate terminal 545 to control whether the high-side semiconductor device 544 operates in an active or deactivated state. For example, when the high-side semiconductor device 544 operates in the active state, current can flow from pin 574 across the high-side semiconductor device 544 to pin 572. When the high-side semiconductor device 544 operates in the deactivated state, the high-side semiconductor device 544 can prevent current from flowing across it. In some examples, the current flowing across the high-side semiconductor device 544 originates from a power source (e.g., Figure 1 The power supply 110 is passed to pin 574.

[0048] In some examples, the high-side gate driver circuit 542A can receive a first electrical signal via pin 560 and a second electrical signal via pin 562. The high-side gate driver circuit 542A can receive a power converter unit (such as...) Figure 1 The power converter unit 120 receives the first electrical signal. The high-side gate driver circuit 542A can receive the signal from the charge pump unit (such as...). Figure 1 The charge pump unit 130 receives a second electrical signal. In some examples, the first electrical signal may include a first voltage and a first current, and the second electrical signal may include a second voltage and a second current. In some cases, the amplitude of the second voltage may be different from the amplitude of the first voltage. In some examples, the amplitude of the second voltage may be greater than the amplitude of the first voltage. In some examples, the high-side gate driver circuit 542A may transmit either the first electrical signal or the second electrical signal to the gate terminal 545 of the high-side semiconductor device 544 to control whether the high-side semiconductor device 544 operates in an active or deactivated state.

[0049] The high-side gate driver circuit 542A can alternately transmit a first electrical signal to the gate terminal 545 and a second electrical signal to the gate terminal 545 by controlling the first switching device 550 and the second switching device 552, respectively. For example, if the first switching device 550 is closed (e.g., capable of conducting) and the second switching device 552 is open (e.g., not conducting), the high-side gate driver circuit 542A can transmit the first electrical signal to the gate terminal 545. Alternatively, if the first switching device 550 is open and the second switching device 552 is closed, the high-side gate driver circuit 542A can transmit the second electrical signal to the gate terminal 545. In some examples, the comparator device 580 can control whether the first switching device 550 is open or closed, and the comparator device 580 can control whether the second switching device 552 is open or closed. For example, the comparator device 580 can output a first control signal to the first switching device 550 and a second control signal to the second switching device 552.

[0050] In some examples, comparator device 580 controls first switching device 550 and second switching device 552 based on a comparison between a first electrical signal received by high-side gate driver circuit 542A via first pin 560 and a source electrical signal transmitted through high-side semiconductor device 544 and pin 572. For example, comparator device 580 receives a source electrical signal including source voltage and source current via conductor 584, and comparator device 580 receives a first electrical signal including a first voltage and a first current via conductor 582.

[0051] Comparator device 580 compares the magnitude of a first voltage with the magnitude of a source voltage in real time or near real time to determine whether to maintain each of the first switching device 550 and the second switching device 552 in an off state or a closed state. For example, in response to determining that the magnitude of the source voltage (e.g., the magnitude of the voltage at pin 572) is less than the magnitude of the first voltage (e.g., the magnitude of the voltage at pin 560), comparator device 580 may maintain the first switching device 550 in a closed state and maintain the second switching device 552 in an off state, thereby causing pin 560 to provide the first voltage to pin 570 and the gate of semiconductor device 544. In response to determining that the magnitude of the source voltage (e.g., the magnitude of the voltage at pin 572) is greater than or equal to the magnitude of the first voltage (e.g., the magnitude of the voltage at pin 560), comparator device 580 maintains the first switching device 550 in an off state and maintains the second switching device 552 in a closed state, thereby causing pin 562 to provide a second voltage to pin 570 and the gate of semiconductor device 544.

[0052] If comparator device 580 detects that the amplitude of the source voltage changes from being lower than the first voltage to being equal to or greater than the first voltage, comparator device 580 can switch the second switching device from an open state to a closed state. In such an example, the first switching device 550 may not be conductive regardless of whether it is in an open or closed state. In some examples, comparator device 580 can switch the first switching device from a closed state to an open state in response to comparator device 580 detecting that the amplitude of the source voltage changes from being lower than the first voltage to being equal to or greater than the first voltage. When the first switching device 550 is open and the second switching device 552 is closed, the high-side gate driver circuit 542A can transmit a second electrical signal from pin 562 to gate terminal 545. In some examples, the amplitude of the second voltage of the second electrical signal is greater than the amplitude of the first voltage of the first electrical signal, such that the high-side gate driver circuit 542A can continue to apply voltage to gate terminal 545 while the amplitude of the source voltage is greater than or equal to the amplitude of the first voltage.

[0053] In some examples, in response to comparator device 580 detecting that the amplitude of the source voltage changes from less than the first voltage to equal to or greater than the first voltage, comparator device 580 can determine that a Miller plateau is occurring. A Miller plateau can represent a period of time in which the gate-source voltage of the high-side semiconductor device 544 remains constant or increases slightly over a period of time. In some examples, comparator 580 is configured to activate a second switching device 552 in response to determining that a Miller plateau has occurred, and to deactivate a first switching device 550 in response to determining that a Miller plateau has occurred.

[0054] If comparator device 580 detects that the amplitude of the source voltage changes from being greater than or equal to the amplitude of the first voltage to being less than the amplitude of the first voltage, comparator device 580 can switch the second switch device 552 from a closed state to an open state. Alternatively, comparator device 580 can switch the first switch device 550 from an open state to a closed state. In such an example, the second switch device 552 may not be conductive and the first switch device 550 may be conductive. When the first switch device 550 is closed and the second switch device 552 is open, the high-side gate driver circuit 542A can transmit a first electrical signal from pin 560 to gate terminal 545.

[0055] In some examples, the first gate driver semiconductor device 554 and the second gate driver semiconductor device 556 (collectively, "semiconductor devices 554, 556") may, in some cases, include power switches, such as, but not limited to, any type of FET including any one or any combination of MOSFET, BJT, IGBT, JFET, HEMT, or other elements controlled by voltage. Additionally, semiconductor devices 554, 556 may include n-type transistors, p-type transistors, and power transistors, or any combination thereof. In some examples, semiconductor devices 554, 556 include vertical transistors, lateral transistors, and / or horizontal transistors. In some examples, semiconductor devices 554, 556 include other analog devices such as diodes and / or thyristors. In some examples, semiconductor devices 554, 556 may function as switches and / or analog devices.

[0056] In some examples, the gate terminal of the first gate driver semiconductor device 554 receives a control signal representing a second electrical signal from pin 562. In some examples, the gate terminal of the second gate driver semiconductor device 556 receives the control signal from pin 562. The gate terminal of the first gate driver semiconductor device 554 may be electrically connected to a first resistor 564. The second gate driver semiconductor device 556 may be electrically connected to a second resistor 568. In some cases, if the first switching device 550 is closed and the second switching device 552 is open, the first gate driver semiconductor device 554 may conduct the first electrical signal. In some cases, if the second switching device 552 is closed and the first switching device 550 cannot conduct the first electrical signal (e.g., if the amplitude of the source voltage at pin 572 is greater than or equal to the amplitude of the first voltage of the first electrical signal), the second gate driver semiconductor device 556 may conduct the second electrical signal. In some examples, the high-side gate driver circuit 542A and the high-side semiconductor device 544 form an integrated circuit. In some examples, the high-side semiconductor device 544 is a discrete semiconductor device electrically connected to the high-side gate driver circuit 542A.

[0057] Figure 5B This is a circuit diagram illustrating a system 500B according to one or more technologies of this disclosure, the system 500B including a second example high-side gate driver circuit 542B. (As shown...) Figure 5BAs shown, system 500B includes a high-side gate driver circuit 542B, a high-side semiconductor device 544, and a second switching device 552. The high-side gate driver circuit 542B includes a first switching device 550, a second switching device 552, a first gate driver semiconductor device 554, a second gate driver semiconductor device 556, a first resistor 564, and a second resistor 568. Additionally, the high-side gate driver circuit 542B includes pins 560, 562, 566, 570, and 572 indicating input / output electrical connections.

[0058] High-side semiconductor device 544 can be Figure 1 Any one of the high-side semiconductor devices 144 Figure 2 Any one of the high-side semiconductor devices 244 Figure 3 The high-side semiconductor device 344 or any example of the high-side semiconductor device 444. The high-side gate driver circuit 542B may be an example of a gate driver circuit electrically connected to the high-side semiconductor device 544. For example, the high-side gate driver circuit 542B may be... Figure 1 Any one of the high-side gate driver circuits 142 Figure 2 Any one of the high-side gate driver circuits 242 Figure 3 One or one of the high-side gate driver circuits 342 Figure 4 Any example of the high-side gate driver circuit 442. In some examples, the high-side gate driver circuit 542B can be used with... Figure 5A The high-side gate driver circuit 542B is essentially the same as that of the high-side gate driver circuit 542A, except that the gate driver circuit 542B does not include the comparator device 580. In addition to other techniques used by the high-side gate driver circuit 542B to compare the magnitude of the source voltage at pin 572 with the magnitude of the first voltage at pin 560, the high-side gate driver circuit 542B can cause each of the first switching device 550 and the second switching device 552 to open and / or close in a manner similar to that used by the high-side gate driver circuit 542A to control the first switching device 550 and the second switching device 552.

[0059] Figure 6This is a conceptual diagram illustrating a series of graphs corresponding to high-side gate driver circuits and corresponding high-side semiconductor devices according to one or more techniques of this disclosure. For example, graph 602 represents a graph of the voltage across the high-side semiconductor device (e.g., high-side semiconductor device 544) over a period of time. Graph 604 represents the voltage of the gate-source signal during the same time period represented by graph 602. The flat region shown in graph 604 (where the gate-source voltage does not increase significantly from “VTH” within a time window) may be referred to herein as the “Miller flat region”. Graph 606 represents the magnitude of the current delivered to the gate terminal 545 of high-side semiconductor device 544. As shown in graph 606, at the end of time period t1, high-side semiconductor device 544 switches from providing a first current I1 to providing a second current I2 to the gate terminal 545. Graph 608 represents the power delivered to the gate terminal 545 during the same time period of graphs 602, 604, and 606. In some examples, “VS” represents the power supply voltage (e.g., the voltage at pin 574 in Figure 5), “V1” represents the first voltage of the first electrical signal (e.g., the voltage at pin 560 in Figure 5), and “V2” represents the second voltage of the second electrical signal (e.g., the voltage at pin 562 in Figure 5).

[0060] Figure 7 This is a flowchart illustrating example operations for controlling a semiconductor device according to one or more techniques of this disclosure. For convenience, regarding... Figure 5A System 500A is used to describe Figure 7 .However, Figure 7 The technology can be implemented by different components of the System 500A or by additional or alternative systems.

[0061] A high-side gate driver circuit 542A is configured to deliver an electrical signal to the gate terminal 545 (702) of a high-side semiconductor device 544. In some examples, the electrical signal may represent a first electrical signal received by the high-side gate driver circuit 542A via pin 560. In some examples, the electrical signal may represent a second electrical signal received by the high-side gate driver circuit 542A via pin 562. In some examples, a comparator device 580 may receive at least a portion of the first electrical signal including a first voltage, and a comparator device 580 may receive at least a portion of a source signal including a source voltage. The comparator device 580 may determine whether the source voltage is less than the first voltage (704). If the source voltage is less than the first voltage (the "Yes" branch of block 704), the comparator device 580 may activate a first switching device 550 and deactivate (706) a second switching device 552, thereby causing the high-side gate driver circuit 542A to deliver the first electrical signal to the gate terminal 545 of the high-side semiconductor device 544. If the source voltage is not less than the first voltage (the "No" branch of block 704), the comparator device 580 can deactivate the first switching device 550 and activate the second switching device 552 (706), thereby causing the high-side gate driver circuit 542A to transmit the second electrical signal to the gate terminal 545 of the high-side semiconductor device 544.

[0062] In one or more instances, the techniques described herein can be implemented using hardware, software, firmware, or any combination thereof to achieve the described functionality. Those functions implemented in software may be stored on or transmitted via a computer-readable medium as one or more instructions or code, and executed by a hardware-based processing unit. The computer-readable medium may include a computer-readable storage medium corresponding to a tangible medium such as a data storage medium, or a communication medium, including, for example, any medium that facilitates the transfer of a computer program from one place to another according to a communication protocol. In this manner, a computer-readable medium may generally correspond to: (1) a non-transitory tangible computer-readable storage medium, or (2) a communication medium such as a signal or carrier wave. The data storage medium may be any available medium accessible by one or more computers or one or more processors to retrieve instructions, code, and / or data structures to implement the techniques described herein.

[0063] Instructions can be executed by one or more processors within system 100. One or more processors may include, for example, one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuit devices. Therefore, as used herein, the term "processor" may refer to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functions described herein may be provided within dedicated hardware and / or software modules configured to perform the techniques described herein. Similarly, the techniques may be fully implemented in one or more circuit or logic elements.

[0064] The techniques disclosed herein can be implemented in a variety of devices or apparatuses including integrated circuits (ICs) or IC sets (e.g., chipsets). Various components, modules, or units are described in this invention to emphasize functional aspects of devices configured to perform the disclosed techniques, but they do not necessarily need to be implemented by different hardware units. Rather, the various units can be combined or provided by interoperable hardware units including one or more processors as described above, in conjunction with suitable software and / or firmware.

[0065] The following numbered examples illustrate one or more aspects of this disclosure.

[0066] Example 1. A circuit for controlling a semiconductor device, the circuit comprising: a first switching device; and a second switching device, wherein the circuit is configured to: activate the first switching device in response to a source voltage of the semiconductor device being lower than a first voltage, such that the circuit transmits a first electrical signal to the semiconductor device, wherein the first electrical signal includes the first voltage; deactivate the first switching device in response to a source voltage of the semiconductor device not being lower than the first voltage; activate the second switching device in response to a source voltage of the semiconductor device not being lower than the first voltage, such that the circuit transmits a second electrical signal to the semiconductor device, wherein the second electrical signal includes a second voltage, the second voltage being different from the first voltage; and deactivate the second switching device in response to a source voltage of the semiconductor device being lower than the first voltage.

[0067] Example 2. The circuit according to Example 1, wherein the circuit further includes a comparator device configured to: receive a first electrical signal including a first voltage; receive a source signal including a source voltage from a semiconductor device; and compare the amplitude of the first voltage with the amplitude of the source voltage to control a first switching device and a second switching device.

[0068] Example 3. The circuit according to Examples 1 to 2 or any combination thereof, wherein in order to activate the second switching device, the circuit is configured to output a signal from the comparator device to activate the second switching device based on the source voltage amplitude being not less than the amplitude of the first voltage.

[0069] Example 4. The circuit according to Examples 1 to 3 or any combination thereof, wherein in order to activate the first switching device, the circuit is configured to output a signal from the comparator device to activate the first switching device based on the source voltage amplitude being less than the amplitude of the first voltage.

[0070] Example 5. The circuit according to Examples 1 to 4 or any combination thereof, wherein the circuit is further configured to: determine that a Miller flat region has appeared in response to a transition of the source voltage from below a first voltage to equal to the first voltage; activate a second switching device in response to determining that a Miller flat region has appeared; and deactivate the first switching device in response to determining that a Miller flat region has appeared.

[0071] Example 6. The circuit according to Examples 1 to 5 or any combination thereof, wherein the circuit further includes a power converter device configured to: receive a power signal including a power supply voltage from a power supply; and use the power supply signal to generate a first electrical signal including a first voltage and a first current.

[0072] Example 7. The circuit according to Examples 1 to 6 or any combination thereof, wherein in order to generate the first electrical signal, the power converter device is configured to: boost the power supply voltage in response to the power supply voltage being lower than a threshold power supply voltage; and buck the power supply voltage in response to the power supply voltage not being lower than the threshold power supply voltage.

[0073] Example 8. The circuit according to Examples 1 to 7 or any combination thereof, wherein the power converter device is further configured to: adjust the first voltage of the first electrical signal to a target voltage range including the target voltage value.

[0074] Example 9. The circuit according to Examples 1 to 8 or any combination thereof, wherein the target voltage range extends from 15 volts (V) to 25V, and the target voltage value includes 18V.

[0075] Example 10. A circuit according to Examples 1 to 9 or any combination thereof, wherein the circuit further includes a charge pump device configured to: receive a power supply signal including a power supply voltage from a power supply; receive a first electrical signal including a first voltage and a first current from a power converter device; and use the power supply signal and the first electrical signal to generate a second electrical signal including a second voltage and a second current.

[0076] Example 11. The circuit according to Examples 1 to 10 or any combination thereof, wherein in order to generate the second electrical signal, the charge pump device is configured to boost the first voltage to generate a second electrical signal including a second voltage, wherein the second voltage is lower than the first voltage.

[0077] Example 12. A circuit according to Examples 1 to 11 or any combination thereof, wherein the circuit further comprises: a first set of semiconductor devices including semiconductor devices, wherein each semiconductor device in the first set of semiconductor devices is located between a power source and a load; and a second set of semiconductor devices, wherein the load is located between the power source and each semiconductor device in the second set of semiconductor devices, and wherein the first set of semiconductor devices and the second set of semiconductor devices are configured to deliver at least a portion of a power signal to the load.

[0078] Example 13. A circuit according to Examples 1 to 11 or any combination thereof, wherein a first set of semiconductor devices is included in the range of one to three semiconductor devices, and a second set of semiconductor devices is included in the range of one to three semiconductor devices.

[0079] Example 14. A method comprising: activating a first switching device via a circuit in response to a source voltage of a semiconductor device being lower than a first voltage, such that the circuit delivers a first electrical signal to the semiconductor device, wherein the first electrical signal includes the first voltage; deactivating the first switching device via a circuit in response to a source voltage of the semiconductor device being not lower than the first voltage; activating a second switching device via a circuit in response to a source voltage of the semiconductor device being not lower than the first voltage, such that the circuit delivers a second electrical signal to the semiconductor device, wherein the second electrical signal includes a second voltage, the second voltage being different from the first voltage; and deactivating the second switching device via a circuit in response to a source voltage of the semiconductor device being lower than the first voltage.

[0080] Example 15. The circuit according to Example 14 further includes: receiving a first electrical signal including a first voltage through a comparator device of the circuit; receiving a source signal including a source voltage from a semiconductor device through the comparator device; and comparing the amplitude of the first voltage with the amplitude of the source voltage through the comparator device to control a first switching device and a second switching device.

[0081] Example 16. The method according to Examples 14 to 15 or any combination thereof, wherein activating the second switching device comprises: activating the second switching device by outputting a signal from a comparator device based on the source voltage amplitude being not less than the amplitude of the first voltage.

[0082] Example 17. The method according to Examples 14 to 16 or any combination thereof, wherein activating the first switching device comprises: activating the first switching device by outputting a signal from a comparator device based on the fact that the amplitude of the source voltage is less than the amplitude of a first voltage.

[0083] Example 18. The method according to Examples 14 to 17 or any combination thereof, wherein the method further comprises: determining that a Miller flat region has appeared in response to a transition of the source voltage from below a first voltage to equal to the first voltage; activating a second switching device in response to determining that a Miller flat region has appeared; and deactivating a first switching device in response to determining that a Miller flat region has appeared.

[0084] Example 19. The method according to Examples 14 to 18 or any combination thereof, wherein the method further comprises: receiving a power signal including a power supply voltage from a power supply via a power converter device of a circuit; and using the power signal via the power converter device to generate a first electrical signal including a first voltage and a first current.

[0085] Example 20. The method according to Examples 14 to 19 or any combination thereof, wherein generating the first electrical signal includes: boosting the power supply voltage in response to the power supply voltage being lower than a threshold power supply voltage; and bucking the power supply voltage in response to the power supply voltage not being lower than the threshold power supply voltage.

[0086] Example 21. The method according to Examples 14 to 20 or any combination thereof, wherein the method further comprises: using a power converter device to adjust a first voltage of the first electrical signal to a target voltage range including the target voltage value.

[0087] Example 22. The method according to Examples 14 to 21 or any combination thereof, wherein the method further comprises: receiving a power signal including a power supply voltage from a power supply via a charge pump device; receiving a first electrical signal including a first voltage and a first current from a power converter device via a charge pump device; and using the power supply signal and the first electrical signal via the charge pump device to generate a second electrical signal including a second voltage and a second current.

[0088] Example 23. The method according to Examples 14 to 22 or any combination thereof, wherein generating the second electrical signal includes boosting the first voltage to generate a second electrical signal including the second voltage.

[0089] Example 24. The method according to Examples 14 to 23 or any combination thereof, wherein the circuit further comprises: a first set of semiconductor devices including semiconductor devices, wherein each semiconductor device in the first set of semiconductor devices is located between a power source and a load; and a second set of semiconductor devices, wherein the load is located between the power source and each semiconductor device in the second set of semiconductor devices, and wherein the method further comprises using the first set of semiconductor devices and the second set of semiconductor devices to deliver at least a portion of a power signal to the load.

[0090] Example 25. A system comprising: a semiconductor device having a gate, wherein the semiconductor device is configured to receive a power signal including a power supply voltage from a power source; and a circuit including a first switching device and a second switching device, wherein the circuit is configured to activate the first switching device in response to a source voltage of the semiconductor device being lower than a first voltage, such that the circuit delivers a first electrical signal to the gate of the semiconductor device, wherein the first electrical signal includes the first voltage; and to deactivate the first switching device in response to a source voltage of the semiconductor device not being lower than the first voltage; to activate the second switching device in response to a source voltage of the semiconductor device not being lower than the first voltage, such that the circuit delivers a second electrical signal to the gate of the semiconductor device, wherein the second electrical signal includes a second voltage, the second voltage being different from the first voltage; and to deactivate the second switching device in response to a source voltage of the semiconductor device being lower than the first voltage.

[0091] Example 26. The system according to Example 25, wherein the circuit further includes a comparator device configured to: receive a first electrical signal including a first voltage; receive a source signal including a source voltage from a semiconductor device; and compare the amplitude of the first voltage with the amplitude of the source voltage to control a first switching device and a second switching device.

[0092] Example 27. The system according to Examples 25 to 26 or any combination thereof, wherein, in order to activate the second switching device, the circuit is configured to output from the comparator device based on a source voltage amplitude not less than the amplitude of the first voltage, thereby activating the second switching device.

[0093] Example 28. A system according to Examples 25 to 27 or any combination thereof, wherein, in order to activate the first switching device, the circuit is configured to output a signal from the comparator device to activate the first switching device based on the source voltage amplitude being less than the amplitude of a first voltage.

[0094] Example 29. The system according to Examples 25 to 28 or any combination thereof, wherein semiconductor devices and circuits form an integrated circuit.

[0095] Example 30. The system according to Examples 25 to 29 or any combination thereof, wherein the semiconductor device is a discrete semiconductor device electrically connected to a circuit.

[0096] Various examples of this disclosure have been described. These and other examples are within the scope of the appended claims.

Claims

1. A circuit for controlling a semiconductor device, the circuit comprising: First switching device; as well as A second switching device, wherein the circuit is configured to: In response to the source voltage of the semiconductor device being lower than a first voltage, the first switching device is activated, such that the circuit transmits a first electrical signal to the semiconductor device, wherein the first electrical signal includes the first voltage; In response to the source voltage of the semiconductor device being not lower than the first voltage, the first switching device is deactivated; In response to the source voltage of the semiconductor device being not lower than the first voltage, the second switching device is activated so that the circuit transmits a second electrical signal to the semiconductor device, wherein the second electrical signal includes a second voltage, the second voltage being different from the first voltage; as well as In response to the source voltage of the semiconductor device being lower than the first voltage, the second switching device is deactivated. The circuit is further configured to: In response to the transition of the source voltage from below the first voltage to equal to the first voltage, it is determined that the Miller flat region has appeared; In response to determining that the Miller flat region has appeared, the second switching device is activated; as well as In response to determining that the Miller flat region has appeared, the first switching device is deactivated.

2. The circuit of claim 1, wherein the circuit further comprises a comparator device, the comparator device being configured to: Receive the first electrical signal including the first voltage; Receive a source signal including the source voltage from the semiconductor device; and The amplitude of the first voltage is compared with the amplitude of the source voltage to control the first switching device and the second switching device.

3. The circuit of claim 2, wherein, in order to activate the second switching device, the circuit is configured to output a signal from the comparator device to activate the second switching device based on the amplitude of the source voltage being not less than the amplitude of the first voltage.

4. The circuit of claim 2, wherein, in order to activate the first switching device, the circuit is configured to output a signal from the comparator device to activate the first switching device based on the fact that the amplitude of the source voltage is less than the amplitude of the first voltage.

5. The circuit of claim 1, wherein the circuit further comprises a power converter device configured to: Receive a power signal, including the power supply voltage, from the power source; and The power signal is used to generate the first electrical signal, which includes the first voltage and the first current.

6. The circuit of claim 5, wherein, in order to generate the first electrical signal, the power converter device is configured to: In response to the power supply voltage being lower than a threshold power supply voltage, the power supply voltage is boosted; and The power supply voltage is reduced in response to the power supply voltage not being lower than the threshold power supply voltage.

7. The circuit of claim 5, wherein the power converter device is further configured to: The first voltage of the first electrical signal is adjusted to be within the target voltage range that includes the target voltage value.

8. The circuit of claim 7, wherein the target voltage range extends from 15V to 25V, and the target voltage value includes 18V.

9. The circuit of claim 5, wherein the circuit further comprises a charge pump device configured to: Receive the power signal including the power supply voltage from the power supply; Receive a first electrical signal comprising the first voltage and the first current from the power converter device; and The power signal and the first electrical signal are used to generate the second electrical signal, which includes the second voltage and the second current.

10. The circuit of claim 9, wherein, in order to generate the second electrical signal, the charge pump device is configured to: The first voltage is boosted to generate a second electrical signal that includes the second voltage, wherein the second voltage is lower than the first voltage.

11. The circuit of claim 9, wherein the circuit further comprises: A first set of semiconductor devices including the semiconductor device, wherein each semiconductor device in the first set of semiconductor devices is located between the power source and the load; as well as A second set of semiconductor devices, wherein the load is located between the power source and each semiconductor device in the second set of semiconductor devices, and wherein the first set of semiconductor devices and the second set of semiconductor devices are configured as follows: At least a portion of the power signal is transmitted to the load.

12. The circuit of claim 11, wherein the first set of semiconductor devices includes a range of one to three semiconductor devices, and wherein the second set of semiconductor devices includes a range of one to three semiconductor devices.

13. A method for controlling a semiconductor device, comprising: In response to a source voltage of a semiconductor device being lower than a first voltage, a first switching device is activated by a circuit so that the circuit transmits a first electrical signal to the semiconductor device, wherein the first electrical signal includes the first voltage; In response to the source voltage of the semiconductor device being not lower than the first voltage, the first switching device is activated by the circuit; In response to the source voltage of the semiconductor device being not lower than the first voltage, the circuit activates the second switching device so that the circuit transmits a second electrical signal to the semiconductor device, wherein the second electrical signal includes a second voltage, the second voltage being different from the first voltage; as well as In response to the source voltage of the semiconductor device being lower than the first voltage, the second switching device is activated by the circuit. The method further includes: In response to the transition of the source voltage from below the first voltage to equal to the first voltage, it is determined that the Miller flat region has appeared; In response to determining that the Miller flat region has appeared, the second switching device is activated; and In response to determining that the Miller flat region has appeared, the first switching device is deactivated.

14. The method of claim 13, further comprising: The comparator device of the circuit receives the first electrical signal including the first voltage; The comparator device receives a source signal, including the source voltage, from the semiconductor device. as well as The comparator device compares the amplitude of the first voltage with the amplitude of the source voltage to control the first switching device and the second switching device.

15. The method of claim 14, wherein activating the second switching device comprises: Based on the fact that the amplitude of the source voltage is not less than the amplitude of the first voltage, the comparator device outputs a signal to activate the second switching device.

16. The method of claim 14, wherein activating the first switching device comprises: The first switching device is activated by outputting a signal from the comparator device based on the fact that the amplitude of the source voltage is less than the amplitude of the first voltage.

17. The method of claim 13, wherein the method further comprises: The power converter device through the circuit receives a power signal, including the power supply voltage, from the power supply. as well as The power converter device uses the power supply signal to generate the first electrical signal, which includes the first voltage and the first current.

18. The method of claim 17, wherein generating the first electrical signal comprises: In response to the power supply voltage being lower than a threshold power supply voltage, the power supply voltage is boosted; as well as The power supply voltage is reduced in response to the power supply voltage not being lower than the threshold power supply voltage.

19. The method of claim 17, wherein the method further comprises: The power converter device is used to adjust the first voltage of the first electrical signal to a target voltage range that includes the target voltage value.

20. The method of claim 17, wherein the method further comprises: The power signal, including the power supply voltage, is received from the power supply via a charge pump device; The first electrical signal, comprising the first voltage and the first current, is received from the power converter device via the charge pump device; as well as The charge pump device uses the power supply signal and the first electrical signal to generate a second electrical signal that includes the second voltage and the second current.

21. The method of claim 20, wherein generating the second electrical signal comprises: The first voltage is boosted to generate a second electrical signal that includes the second voltage.

22. The method of claim 20, wherein the circuit further comprises: A first set of semiconductor devices including the semiconductor device, wherein each semiconductor device in the first set of semiconductor devices is located between the power source and the load; as well as A second set of semiconductor devices, wherein the load is located between the power source and each semiconductor device in the second set of semiconductor devices, and wherein the method further comprises: The first set of semiconductor devices and the second set of semiconductor devices are used to deliver at least a portion of the power signal to the load.

23. A system for controlling a semiconductor device, comprising: A semiconductor device having a gate, wherein the semiconductor device is configured to receive a power signal including a power supply voltage from a power supply. as well as A circuit including a first switching device and a second switching device, wherein the circuit is configured to: In response to the source voltage of the semiconductor device being lower than a first voltage, the first switching device is activated such that the circuit transmits a first electrical signal to the gate of the semiconductor device, wherein the first electrical signal includes the first voltage; as well as In response to the source voltage of the semiconductor device being not lower than the first voltage, the first switching device is deactivated; In response to the source voltage of the semiconductor device being not lower than the first voltage, the second switching device is activated such that the circuit transmits a second electrical signal to the gate of the semiconductor device, wherein the second electrical signal includes a second voltage, the second voltage being different from the first voltage; as well as In response to the source voltage of the semiconductor device being lower than the first voltage, the second switching device is deactivated. The circuit is further configured to: In response to the transition of the source voltage from below the first voltage to equal to the first voltage, it is determined that the Miller flat region has appeared; In response to determining that the Miller flat region has appeared, the second switching device is activated; as well as In response to determining that the Miller flat region has appeared, the first switching device is deactivated.

24. The system of claim 23, wherein the circuit further comprises a comparator device configured to: Receive the first electrical signal including the first voltage; Receive a source signal including the source voltage from the semiconductor device; and The amplitude of the first voltage is compared with the amplitude of the source voltage to control the first switching device and the second switching device.

25. The system of claim 24, wherein, in order to activate the second switching device, the circuit is configured to output a signal from the comparator device to activate the second switching device based on the amplitude of the source voltage being not less than the amplitude of the first voltage.

26. The system of claim 24, wherein, in order to activate the first switching device, the circuit is configured to output a signal from the comparator device to activate the first switching device based on the fact that the amplitude of the source voltage is less than the amplitude of the first voltage.

27. The system of claim 23, wherein the semiconductor device and the circuit form an integrated circuit.

28. The system of claim 23, wherein the semiconductor device is a discrete semiconductor device electrically connected to the circuit.

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