Semiconductor device and method for manufacturing semiconductor device

By incorporating a Zener diode in the semiconductor device, connecting it between the emitter electrode and the sensing electrode, and forming it together with the PN structure of the temperature sensing unit, the problem of the sensing IGBT being easily damaged is solved, thereby improving the stability and reliability of the device.

CN113299643BActive Publication Date: 2026-06-30FUJI ELECTRIC CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
FUJI ELECTRIC CO LTD
Filing Date
2020-12-28
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

In existing technologies, sensing IGBTs are easily damaged, and this situation needs to be avoided.

Method used

A Zener diode is placed in a semiconductor device, connected between the emitter electrode and the sensing electrode, and formed using the same process as the PN structure of the temperature sensing unit, to ensure the stability and protection function of the Zener diode.

Benefits of technology

It effectively protects the sensing IGBT from damage, thereby improving the reliability and stability of semiconductor devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention provides a semiconductor device and a method for manufacturing the semiconductor device. Preferably, damage to the sensing IGBT is avoided. The semiconductor device includes: a semiconductor substrate; a transistor portion disposed on the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to the emitter potential of the transistor portion; a sensing electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sensing electrode. The method for manufacturing the semiconductor device includes: a step of disposing the semiconductor substrate on the transistor portion; a step of disposing the current sensing portion for detecting current flowing through the transistor portion; a step of disposing the emitter electrode set to the emitter potential of the transistor portion; a step of disposing the sensing electrode electrically connected to the current sensing portion; and a step of disposing the Zener diode electrically connected between the emitter electrode and the sensing electrode.
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Description

Technical Field

[0001] This invention relates to a semiconductor device and a method for manufacturing a semiconductor device. Background Technology

[0002] Patent document 1 discloses the arrangement of a Zener diode in a semiconductor device equipped with a sensing IGBT.

[0003] Existing technical documents

[0004] Patent Document 1: International Publication No. 2017 / 141560 Summary of the Invention

[0005] Technical issues

[0006] It is preferable to avoid damaging the sensing IGBT.

[0007] Technical solution

[0008] In a first aspect of the present invention, a semiconductor device is provided, comprising: a semiconductor substrate; a transistor portion disposed on the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to the emitter potential of the transistor portion; a sensing electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sensing electrode.

[0009] Zener diodes can be mounted on a semiconductor substrate.

[0010] A semiconductor device may have an emitter potential electrode that is set to the emitter potential and electrically connected to a Zener diode.

[0011] A semiconductor device may include a well region of a second conductivity type disposed on a semiconductor substrate and set to an emitter potential. The semiconductor device may include an interlayer insulating film disposed between the emitter potential electrode and the well region. The semiconductor device may include a contact hole disposed on the interlayer insulating film and a contact portion electrically connecting the emitter potential electrode and the well region.

[0012] The sensing electrode can be formed into a rectangle when viewed from above. The Zener diode can be positioned along at least two sides of the sensing electrode.

[0013] Zener diodes can be positioned along at least three sides of the sensing electrode.

[0014] A semiconductor device may have an electrode connection portion on the top of a semiconductor substrate that connects an emitter potential electrode to an emitter electrode.

[0015] A Zener diode may have a first conductivity type region and a second conductivity type region. The first conductivity type region and the second conductivity type region can be arranged side by side when viewed from above.

[0016] The film thickness of the first conductive region can be greater than 0.3 μm and less than 1 μm, and the film thickness of the second conductive region can be greater than 0.3 μm and less than 1 μm.

[0017] The semiconductor device may include a temperature sensing section having a diode disposed on a semiconductor substrate. The film thickness of the diode in the temperature sensing section may be approximately the same as that of a Zener diode.

[0018] The junction length of a Zener diode is greater than 0.6 mm and less than 3.0 mm.

[0019] A Zener diode may have: a well region of a second conductivity type; a first conductivity type region disposed above the well region in a semiconductor substrate; and a second conductivity type region disposed above the first conductivity type region in a semiconductor substrate.

[0020] The transistor section may include: a drift region of a first conductivity type; a base region of a second conductivity type disposed on the front side of the drift region; an emitter region of the first conductivity type having a higher doping concentration than the drift region; and a collector region of the second conductivity type having a higher doping concentration than the base region. The first conductivity type region may have the same film thickness and doping concentration as the emitter region.

[0021] In a second aspect of the present invention, a method for manufacturing a semiconductor device is provided, the method comprising: a step of providing a semiconductor substrate in a transistor section; a step of providing a current sensing section for detecting current flowing through the transistor section; a step of providing an emitter electrode, the emitter electrode being set to the emitter potential of the transistor section; a step of providing a sensing electrode electrically connected to the current sensing section; and a step of providing a Zener diode electrically connected between the emitter electrode and the sensing electrode.

[0022] The PN structure of the Zener diode can be formed using the same process as the PN structure of the diode in the temperature sensing part.

[0023] A method of manufacturing a semiconductor device may include the step of setting an emitter potential electrode that is set to an emitter potential and electrically connected to a Zener diode.

[0024] A method for manufacturing a semiconductor device may include: the step of providing a well region of a second conductivity type, the well region being disposed on a semiconductor substrate and set to an emitter potential; the step of providing an interlayer insulating film between an emitter potential electrode and the well region; the step of providing a contact hole in the interlayer insulating film; and the step of providing a contact portion in the contact hole to electrically connect the emitter potential electrode and the well region.

[0025] A method for manufacturing a semiconductor device may include the step of providing an electrode connection portion on top of a semiconductor substrate to connect an emitter potential electrode to an emitter electrode.

[0026] The region of the first conductivity type of the Zener diode can be formed using the same process as the emitter region of the first conductivity type of the transistor.

[0027] It should be noted that the above description of the invention does not list all the essential features of the invention. Furthermore, sub-combinations of these feature groups can also constitute inventions. Attached Figure Description

[0028] Figure 1A An example of a top view of the semiconductor device 100 of Embodiment 1.

[0029] Figure 1B An example of a top view of the semiconductor device 100 of Embodiment 1.

[0030] Figure 1C It means Figure 1B A diagram of an example of section a-a' in the figure.

[0031] Figure 2A An example of an enlarged view showing the upper surface of the periphery of the sensing electrode 140.

[0032] Figure 2B This is an example of an enlarged view of the sensing electrode 140 and the emitter potential electrode 142.

[0033] Figure 2C It means Figure 2B A diagram of an example of the b-b' section.

[0034] Figure 2D It means Figure 2B A diagram of an example of the c-c' section.

[0035] Figure 3A This section outlines the configuration of a semiconductor module 200 that includes a semiconductor device 100.

[0036] Figure 3B This is an example of the circuit configuration of a comparative semiconductor device.

[0037] Figure 3C This illustrates an example of the circuit configuration of the semiconductor module 200 in the embodiment.

[0038] Figure 4 This illustrates an example of the configuration of the semiconductor device 100 in Embodiment 2.

[0039] Figure 5A An example of a top view of the semiconductor device 100 of Embodiment 3.

[0040] Figure 5B express Figure 5A An example of the d-d' section.

[0041] Figure 6 This is an example of a cross-section of the temperature sensing unit 180.

[0042] Figure 7A This is an example of a manufacturing process diagram of the semiconductor device 100 of Embodiment 1 or Embodiment 2.

[0043] Figure 7B This is an example of the manufacturing process diagram of the semiconductor device 100 in Embodiment 3.

[0044] Symbol Explanation

[0045] 1…Semiconductor substrate, 12…Emitter region, 14…Base region, 15…Contact region, 16…Accumulation region, 17…Well region, 18…Drift region, 20…Buffer zone, 21…Front side, 22…Collector region, 23…Back side, 24…Collector, 25…Connection portion, 30…Dummy trench portion, 31…Extension portion, 32…Dummy insulating film, 33…Connection portion, 34…Dummy conductive portion, 38…Interlayer insulating film, 40…Gate trench 41…Extension portion, 42…Gate insulating film, 43…Connection portion, 44…Gate conductive portion, 48…Gate flow channel, 49…Gate oxide film, 50…Gate metal layer, 52…Emitter electrode, 54…Contact hole, 55…Contact hole, 56…Contact hole, 58…Contact hole, 59…Contact hole, 70…Transistor portion, 71…Mesa portion, 80…Diode portion, 81…Mesa portion, 82…Cathode region, 90… 91…Vast surface, 100…Semiconductor device, 110…Active region, 120…Peripheral region, 130…Gate pad, 140…Sensing electrode, 141…Current sensing part, 142…Emitter potential electrode, 144…Contact part, 146…Electrode connection part, 147…Oxide film, 150…Anode pad, 152…Anode wiring, 160…Cathode pad, 162…Cathode wiring, 170…Zener diode, 171…First conductivity type region, 172…Second conductivity type region, 174…Interlayer insulating film, 180…Temperature sensing part, 181…First conductivity type region, 182…Second conductivity type region, 183…First connection part, 184…Second connection part, 185…Interlayer insulating film, 186…Interlayer insulating film, 200…Semiconductor module, 210…DCB substrate, 220…Printed circuit board, 230…Copper substrate Detailed Implementation

[0046] The present invention will now be described through embodiments thereof; however, these embodiments do not limit the scope of the invention as claimed. Furthermore, not all combinations of the features described in the embodiments are necessarily required for the solution of the invention.

[0047] In this specification, one side parallel to the depth direction of the semiconductor substrate is referred to as "front" or "upper," and the other side is referred to as "back" or "lower." One of the two main surfaces of a substrate, layer, or other component is referred to as the upper surface, and the other as the lower surface. The directions of "front," "upper," "back," and "lower" are not limited to the direction of gravity or the direction when mounting the semiconductor device.

[0048] In this specification, orthogonal coordinate axes of X, Y, and Z are sometimes used to illustrate technical matters. Orthogonal coordinate axes merely determine the relative positions of constituent elements and do not limit specific directions. For example, the Z-axis does not necessarily represent the height direction relative to the ground. It should be noted that the +Z-axis direction and the -Z-axis direction are opposite to each other. When the Z-axis direction is not specified as positive or negative, it refers to a direction parallel to both the +Z-axis and -Z-axis. Furthermore, in this specification, the view from the +Z-axis direction is sometimes referred to as a top view.

[0049] In this specification, the terms "same" or "equal" may include cases with errors due to manufacturing deviations, etc. Such errors may be, for example, within 10%.

[0050] In this specification, the conductivity type of doped regions containing impurities is described as P-type or N-type. However, the conductivity type of each doped region can also be of opposite polarity. Furthermore, in this specification, P+ or N+ type indicates a higher doping concentration than P-type or N-type, while P- or N- type indicates a lower doping concentration than P-type or N-type.

[0051] In this specification, doping concentration refers to the concentration of impurities activated as donors or acceptors. In this specification, the concentration difference between donors and acceptors is sometimes used as the concentration of the majority of donors or acceptors. This concentration difference can be measured using the voltage-capacitance method (CV method). Alternatively, the carrier concentration measured by the extended resistance method (SR) can be used as the donor or acceptor concentration. Furthermore, if the donor or acceptor concentration distribution has a peak, that peak can be used as the donor or acceptor concentration in that region. If the donor or acceptor concentration is substantially uniform in the region where donors or acceptors exist, the average value of the donor or acceptor concentration in that region can be used as the donor or acceptor concentration.

[0052] Figure 1A This is an example of a top view of the semiconductor device 100 according to Embodiment 1. The semiconductor device 100 is a semiconductor chip including a transistor section 70 and a diode section 80. The semiconductor device 100 includes a temperature sensing section 180 and can be mounted in a module such as an IPM (Intelligent Power Module).

[0053] The transistor section 70 includes transistors such as IGBTs (Insulated Gate Bipolar Transistors). The diode section 80 includes diodes such as freewheeling diodes (FWDs). In this example, the semiconductor device 100 is a reverse-conducting IGBT (RC-IGBT) having both the transistor section 70 and the diode section 80 on the same chip.

[0054] The semiconductor substrate 10 can be a silicon substrate, a silicon carbide substrate, or a gallium nitride or other nitride semiconductor substrate. In this example, the semiconductor substrate 10 is a silicon substrate. The semiconductor substrate 10 has an active region 110 and an outer peripheral region 120.

[0055] The transistor section 70 is a region obtained by projecting a collector region disposed on the lower surface side of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The collector region has a second conductivity type. As an example, the collector region is of the P+ type.

[0056] The diode section 80 is a region obtained by projecting a cathode region disposed on the lower surface side of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The cathode region has a first conductivity type. As an example, the cathode region in this example is of the N+ type.

[0057] The transistor section 70 and the diode section 80 can be arranged alternately and periodically in the XY plane. In this example, the transistor section 70 and the diode section 80 have multiple transistor sections and diode sections. In the region between the transistor section 70 and the diode section 80, a gate metal layer 50 can be disposed above the semiconductor substrate 10.

[0058] It should be noted that in this example, the transistor section 70 and the diode section 80 have trench sections extending along the Y-axis direction. However, the transistor section 70 and the diode section 80 may also have trench sections extending along the X-axis direction.

[0059] The active region 110 includes a transistor section 70 and a diode section 80. The active region 110 is the region where the main current flows between the upper and lower surfaces of the semiconductor substrate 10 when the semiconductor device 100 is controlled to be in a conducting state. That is, it is the region where current flows along the depth direction inside the semiconductor substrate 10, from the upper surface to the lower surface, or from the lower surface to the upper surface. In this specification, the transistor section 70 and the diode section 80 are referred to as element sections or element regions, respectively.

[0060] It should be noted that, when viewed from above, the area sandwiched between the two component sections is also designated as the active region 110. In this example, the area sandwiched between the component sections and on which the gate metal layer 50 is disposed is also included in the active region 110.

[0061] The gate metal layer 50 is formed of a metal-containing material. For example, the gate metal layer 50 is formed of aluminum, an aluminum-silicon alloy, or an aluminum-silicon-copper alloy. The gate metal layer 50 is electrically connected to the gate conductive portion of the transistor portion 70, supplying a gate voltage to the transistor portion 70. The gate metal layer 50 is disposed in a manner that surrounds the outer periphery of the active region 110 when viewed from above. The gate metal layer 50 is electrically connected to the gate pad 130 disposed in the outer peripheral region 120. The gate metal layer 50 may be disposed along the outer peripheral end of the semiconductor substrate 10. In addition, when viewed from above, the gate metal layer 50 may be disposed around the temperature sensing portion 180 and / or between the transistor portion 70 and the diode portion 80.

[0062] The outer peripheral region 120, when viewed from above, is the area between the active region 110 and the outer peripheral end of the semiconductor substrate 10. The outer peripheral region 120 is arranged to surround the active region 110 when viewed from above. One or more metal pads for connecting the semiconductor device 100 to external devices using wires or the like can be disposed in the outer peripheral region 120. It should be noted that the outer peripheral region 120 may have an edge termination structure. The edge termination structure mitigates the electric field concentration on the upper surface side of the semiconductor substrate 10. For example, the edge termination structure may have a protective ring, a field plate, and a structure combining these to reduce the surface electric field.

[0063] A front electrode is disposed above the semiconductor substrate 10. The front electrode includes the emitter electrode 52, which will be described later. The front electrode may include a gate pad 130, a sensing electrode 140, an anode pad 150, and a cathode pad 160. The front electrode is connected to an external electrode of the semiconductor device 100 via wire bonding or the like. It should be noted that the number and location of the front electrodes are not limited to this example.

[0064] The gate pad 130 is electrically connected to the gate conductive portion of the transistor section 70 via the gate metal layer 50. The gate pad 130 is set to the gate potential. In this example, the gate pad 130 is rectangular when viewed from above.

[0065] The sensing electrode 140 is electrically connected to the current sensing unit 141. The sensing electrode 140 detects the current flowing through the current sensing unit 141. In this example, the sensing electrode 140 is rectangular when viewed from above.

[0066] The current sensing unit 141 detects the current flowing through the transistor unit 70. The current sensing unit 141 is disposed below the sensing electrode 140. The current sensing unit 141 has a structure corresponding to the transistor unit 70, simulating the operation of the transistor unit 70. A current proportional to the current flowing through the transistor unit 70 flows through the current sensing unit 141. Therefore, it is possible to monitor the current flowing through the transistor unit 70.

[0067] The anode pad 150 is electrically connected to the anode area of ​​the temperature sensing unit 180. The anode pad 150 is connected to the anode area of ​​the temperature sensing unit 180 via the anode wiring 152. In this example, the anode pad 150 is rectangular when viewed from above.

[0068] The cathode pad 160 is electrically connected to the cathode region of the temperature sensing unit 180. The cathode pad 160 is connected to the cathode region of the temperature sensing unit 180 via cathode wiring 162. In this example, the cathode pad 160 is rectangular when viewed from above.

[0069] A temperature sensing unit 180 is disposed above the active region 110. The temperature sensing unit 180 detects the temperature of the active region 110. The temperature sensing unit 180 may have a diode formed of monocrystalline or polycrystalline silicon. The temperature sensing unit 180 is used to detect the temperature of the semiconductor device 100, protecting the semiconductor chip from overheating. The temperature sensing unit 180 is connected to a constant current source. If the temperature of the semiconductor device 100 changes, the forward voltage of the current flowing through the temperature sensing unit 180 changes. The semiconductor device 100 can detect the temperature based on the change in forward voltage. The temperature sensing unit 180 has a length direction in the Y-axis direction and a width direction in the X-axis direction, but is not limited thereto.

[0070] In this example, the temperature sensing unit 180 is positioned near the center of the active region 110 when viewed from above. The temperature sensing unit 180 can also be positioned in any region of the transistor section 70 and the diode section 80. That is, a collector region of a second conductivity type or a cathode region of a first conductivity type can be provided on the lower surface side of the semiconductor substrate 10 where the temperature sensing unit 180 is located. The temperature sensing unit 180 is disposed adjacent to the transistor section 70 and the diode section 80.

[0071] Anode wiring 152 and cathode wiring 162 are positioned above the active region 110 when viewed from above. Furthermore, anode wiring 152 and cathode wiring 162 extend from the temperature sensing unit 180 to the outer peripheral region 120. In this example, anode wiring 152 and cathode wiring 162 extend from the temperature sensing unit 180 in the Y-axis direction. Anode wiring 152 and cathode wiring 162 can be made of the same material as the front electrode.

[0072] Figure 1B This is an example of a top view of the semiconductor device 100 of Embodiment 1. In this example, an enlarged view of the end of the active region 110 is shown.

[0073] The transistor section 70 is a region obtained by projecting the collector region 22, which is disposed on the back side of the semiconductor substrate 10, onto the upper surface of the semiconductor substrate 10. The collector region 22 has a second conductivity type. As an example, the collector region 22 in this example is P+ type. The transistor section 70 includes a boundary section 90 located at the boundary between the transistor section 70 and the diode section 80.

[0074] The diode section 80 is a region obtained by projecting the cathode region 82, which is disposed on the back side of the semiconductor substrate 10, onto the upper surface of the semiconductor substrate 10. The cathode region 82 has a first conductivity type. As an example, the cathode region 82 in this example is of the N+ type.

[0075] In this example, the semiconductor device 100 has a gate trench 40, a dummy trench 30, an emitter region 12, a base region 14, a contact region 15, and a well region 17 on the front side of the semiconductor substrate 10. In addition, the semiconductor device 100 in this example has an emitter electrode 52 and a gate metal layer 50 disposed on the upper part of the front side of the semiconductor substrate 10.

[0076] The emitter electrode 52 is disposed above the gate trench portion 40, the dummy trench portion 30, the emitter region 12, the base region 14, the contact region 15, and the well region 17. Additionally, the gate metal layer 50 is disposed above the gate trench portion 40 and the well region 17. In this example, the emitter electrode 52 is set to the emitter potential of the transistor portion 70.

[0077] The emitter electrode 52 and the gate metal layer 50 are formed of a metal-containing material. For example, at least a portion of the emitter electrode 52 may be formed of aluminum, an aluminum-silicon alloy, or an aluminum-silicon-copper alloy. The emitter electrode 52 may have a barrier metal formed of titanium and / or titanium compounds in a layer beneath the region formed of aluminum or the like. The emitter electrode 52 and the gate metal layer 50 are disposed separately from each other.

[0078] The emitter electrode 52 and the gate metal layer 50 are disposed above the semiconductor substrate 10, separated by an interlayer insulating film 38. The interlayer insulating film 38... Figure 1A The middle part is omitted. Contact holes 54, 55 and 56 are provided through the interlayer insulating film 38.

[0079] The contact hole 55 connects the gate metal layer 50 to the gate conductive portion within the transistor section 70. A plug made of tungsten or the like can be formed inside the contact hole 55.

[0080] The contact hole 56 connects the emitting electrode 52 to the dummy conductive part within the dummy trench portion 30. A plug made of tungsten or the like can be formed inside the contact hole 56.

[0081] The connection portion 25 electrically connects the front electrode, such as the emitter electrode 52 or the gate metal layer 50, to the semiconductor substrate 10. In one example, the connection portion 25 is disposed between the gate metal layer 50 and the gate conductive portion. The connection portion 25 is also disposed between the emitter electrode 52 and the dummy conductive portion. The connection portion 25 is made of a conductive material such as polysilicon doped with impurities. Here, the connection portion 25 is polysilicon (N+) doped with N-type impurities. The connection portion 25 is disposed above the front side of the semiconductor substrate 10 through an insulating film such as an oxide film.

[0082] The gate trench portions 40 are arranged at predetermined intervals along a predetermined arrangement direction (X-axis direction in this example). The gate trench portions 40 in this example may have: two extension portions 41 extending along an extension direction (Y-axis direction in this example) that is parallel to the front side of the semiconductor substrate 10 and perpendicular to the arrangement direction; and a connecting portion 43 connecting the two extension portions 41.

[0083] The connection portion 43 is preferably at least partially formed in a curved shape. By connecting the ends of the two extension portions 41 of the gate trench portion 40, the electric field concentration at the ends of the extension portions 41 can be mitigated. In the connection portion 43 of the gate trench portion 40, the gate metal layer 50 can be connected to the gate conductive portion.

[0084] The dummy trench portion 30 is a trench portion electrically connected to the emitter electrode 52. The dummy trench portions 30, like the gate trench portions 40, are arranged at predetermined intervals along a predetermined arrangement direction (the X-axis direction in this example). In this example, the dummy trench portions 30 may have a U-shape on the front side of the semiconductor substrate 10, similar to the gate trench portions 40. That is, the dummy trench portion 30 may have two extension portions 31 extending along the extension direction and a connecting portion 33 connecting the two extension portions 31.

[0085] The transistor section 70 in this example has a structure in which two gate trench sections 40 and three dummy trench sections 30 are arranged in a repeating pattern. That is, the transistor section 70 in this example has gate trench sections 40 and dummy trench sections 30 in a 2:3 ratio. For example, the transistor section 70 has one extension section 31 between two extension sections 41. In addition, the transistor section 70 has two extension sections 31 adjacent to the gate trench sections 40.

[0086] However, the ratio of the gate trench portion 40 to the dummy trench portion 30 is not limited to this example. The ratio of the gate trench portion 40 to the dummy trench portion 30 can be 1:1 or 2:4. Alternatively, a so-called all-gate structure can be used, in which the transistor portion 70 is entirely composed of gate trench portions 40 without any dummy trench portions 30.

[0087] Well region 17 is a second conductivity type region located closer to the front side of semiconductor substrate 10 than drift region 18 described later. Well region 17 is an example of a well region located on the edge side of semiconductor device 100. As an example, well region 17 is P+ type. Well region 17 is formed within a predetermined range from the end of the active region on the side where gate metal layer 50 is provided. The diffusion depth of well region 17 can be deeper than the depth of gate trench portion 40 and dummy trench portion 30. A portion of the gate trench portion 40 and dummy trench portion 30 on the side near gate metal layer 50 is formed in well region 17. The bottom of the ends of the extending direction of gate trench portion 40 and dummy trench portion 30 can be covered by well region 17.

[0088] Contact holes 54 are formed in the transistor section 70 above each region of the emitter region 12 and the contact region 15. Additionally, contact holes 54 are provided above the base region 14 in the diode section 80. Contact holes 54 are provided above the contact region 15 in the boundary section 90. Contact holes 54 are provided above the base region 14 in the diode section 80. None of the contact holes 54 are provided above the well regions 17 located at both ends in the Y-axis direction. Thus, one or more contact holes 54 are formed in the interlayer insulating film. The one or more contact holes 54 can be configured to extend along the extension direction.

[0089] The boundary portion 90 is a region disposed on the transistor portion 70 and adjacent to the diode portion 80. The boundary portion 90 has a contact area 15. In this example, the boundary portion 90 does not have an emitter area 12. In one example, the trench portion of the boundary portion 90 is a dummy trench portion 30. In this example, the boundary portion 90 is configured such that both ends in the X-axis direction are dummy trench portions 30.

[0090] Mesa-faces 71, 91, and 81 are mesa-faces disposed adjacent to the trench portions in a plane parallel to the front surface of the semiconductor substrate 10. A mesa-face can refer to the portion of the semiconductor substrate 10 sandwiched between two adjacent trench portions, extending from the front surface of the semiconductor substrate 10 to the deepest bottom of each trench portion. An extension portion of each trench portion can be considered as a single trench portion. That is, the area sandwiched between two extension portions can be considered as a mesa-face.

[0091] The mesa portion 71 is disposed adjacent to at least one of the dummy trench portion 30 and the gate trench portion 40 in the transistor portion 70. The mesa portion 71 has a well region 17, an emitter region 12, a base region 14 and a contact region 15 on the front side of the semiconductor substrate 10. In the mesa portion 71, the emitter region 12 and the contact region 15 are alternately disposed in the extending direction.

[0092] A mesa 91 is provided on the boundary portion 90. The mesa 91 has a contact area 15 and a well area 17 on the front side of the semiconductor substrate 10.

[0093] The mesa portion 81 is disposed in the diode portion 80 in the region sandwiched between adjacent dummy trench portions 30. The mesa portion 81 has a base region 14, a contact region 15 and a well region 17 on the front side of the semiconductor substrate 10.

[0094] The base region 14 is a region of a second conductivity type disposed on the front side of the semiconductor substrate 10 in the transistor section 70 and the diode section 80. As an example, the base region 14 is P-type. The base region 14 can be disposed on both ends of the mesa 71 and mesa 91 on the front side of the semiconductor substrate 10 in the Y-axis direction. It should be noted that... Figure 1A Only one end of the base region 14 in the Y-axis direction is shown.

[0095] Emitter region 12 is a region of the first conductivity type with a higher doping concentration than drift region 18. As an example, emitter region 12 in this example is N+ type. An example of the dopant for emitter region 12 is arsenic (As). Emitter region 12 is disposed on the front side of mesa portion 71 in contact with gate trench portion 40. Emitter region 12 can extend from one of the two trench portions sandwiching mesa portion 71 along the X-axis to the other trench portion. Emitter region 12 is also disposed below contact hole 54.

[0096] Furthermore, the emission area 12 may or may not contact the dummy groove portion 30. In this example, the emission area 12 contacts the dummy groove portion 30. The emission area 12 may also not be provided on the platform surface 91 of the boundary portion 90.

[0097] Contact region 15 is a region of the second conductivity type with a higher doping concentration than base region 14. As an example, contact region 15 in this example is P+ type. In this example, contact region 15 is disposed on the front side of mesa 71 and mesa 91. Contact region 15 can extend from one of the two trench portions sandwiching mesa 71 or mesa 91 along the X-axis to the other trench portion. Contact region 15 may or may not contact gate trench portion 40. Additionally, contact region 15 may or may not contact dummy trench portion 30. In this example, contact region 15 contacts both dummy trench portion 30 and gate trench portion 40. Contact region 15 is also disposed below contact hole 54. It should be noted that contact region 15 may also be disposed on mesa 81.

[0098] Figure 1C It means Figure 1B The figure shows an example of the a-a' section. The a-a' section is the XZ plane passing through the emitter region 12 in the transistor section 70. In this example, the semiconductor device 100 has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24 in the a-a' section. The emitter electrode 52 is formed above the semiconductor substrate 10 and the interlayer insulating film 38.

[0099] Drift region 18 is a region of a first conductivity type disposed on semiconductor substrate 10. As an example, drift region 18 in this example is N-type. Drift region 18 can be a region remaining in semiconductor substrate 10 where no other doped regions have been formed. That is, the doping concentration of drift region 18 can be the doping concentration of semiconductor substrate 10.

[0100] Buffer 20 is a region of the first conductivity type disposed below drift region 18. As an example, buffer 20 in this example is N-type. The doping concentration of buffer 20 is higher than that of drift region 18. Buffer 20 can function as a field cutoff layer to prevent the depletion layer extending from the lower surface side of base region 14 from reaching the collector region 22 of the second conductivity type and the cathode region 82 of the first conductivity type.

[0101] The collector region 22 is disposed below the buffer zone 20 in the transistor section 70. The cathode region 82 is disposed below the buffer zone 20 in the diode section 80. The boundary between the collector region 22 and the cathode region 82 is the boundary between the transistor section 70 and the diode section 80.

[0102] Collector 24 is formed on the back side 23 of semiconductor substrate 10. Collector 24 is formed of conductive material such as metal.

[0103] The base region 14 is a second conductivity type region disposed above the mesa 71, mesa 91, and mesa 81. The base region 14 is disposed in contact with the gate trench portion 40. The base region 14 may be disposed in contact with the dummy trench portion 30.

[0104] The emitter region 12 is disposed in the mesa 91 between the base region 14 and the front surface 21. The emitter region 12 is disposed in contact with the gate trench portion 40. The emitter region 12 may or may not contact the dummy trench portion 30. It should be noted that the emitter region 12 may also not be disposed in the mesa 91.

[0105] The contact area 15 is disposed above the base region 14 in the mesa 91. The contact area 15 is disposed in the mesa 91 in such a way that it contacts the gate trench portion 40. In other cross-sections, the contact area 15 may be disposed on the front surface 21 of the mesa 71.

[0106] The accumulation region 16 is a first conductivity type region located closer to the front side 21 of the semiconductor substrate 10 than the drift region 18. As an example, the accumulation region 16 in this example is N+ type. The accumulation region 16 is located in both the transistor section 70 and the diode section 80. In this example, the accumulation region 16 is also located in the boundary section 90. Therefore, the semiconductor device 100 can avoid mask misalignment of the accumulation region 16.

[0107] Furthermore, the accumulation region 16 is provided in contact with the gate trench portion 40. The accumulation region 16 may or may not be in contact with the dummy trench portion 30. The doping concentration of the accumulation region 16 is higher than that of the drift region 18. By providing the accumulation region 16, the carrier injection promotion effect (IE effect) can be improved, and the turn-on voltage of the transistor portion 70 can be reduced.

[0108] One or more gate trench portions 40 and one or more dummy trench portions 30 are disposed on the front side 21. Each trench portion extends from the front side 21 to the drift region 18. In regions where at least one of the emitter region 12, base region 14, contact region 15, and accumulation region 16 is disposed, each trench portion also penetrates these regions and reaches the drift region 18. The trench portion penetrating the doped region is not limited to being manufactured in a sequence where the trench portion is formed after the doped region is formed. The case where the doped region is formed between the trench portions after the trench portion is formed is also included in the case where the trench portion penetrates the doped region.

[0109] The gate trench portion 40 has a gate trench formed on the front side 21, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is formed to cover the inner wall of the gate trench. The gate insulating film 42 can be formed by oxidizing or nitriding the semiconductor of the inner wall of the gate trench. The gate conductive portion 44 is formed inside the gate trench at a position closer to the inner side than the gate insulating film 42. The gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon. The gate trench portion 40 is covered on the front side 21 by an interlayer insulating film 38.

[0110] The gate conductive portion 44 includes a region in the semiconductor substrate 10 that is adjacent to the base region 14 on the mesa side 71 via the gate insulating film 42 in the depth direction. If a predetermined voltage is applied to the gate conductive portion 44, a channel formed by an electron inversion layer is formed on the surface layer of the interface in the base region 14 that contacts the gate trench.

[0111] The dummy trench portion 30 may have the same structure as the gate trench portion 40. The dummy trench portion 30 has a dummy trench, a dummy insulating film 32, and a dummy conductive portion 34 formed on the front side 21. The dummy insulating film 32 is formed to cover the inner wall of the dummy trench. The dummy conductive portion 34 is formed inside the dummy trench and at a position closer to the inner side than the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy trench portion 30 is covered on the front side 21 by an interlayer insulating film 38.

[0112] An interlayer insulating film 38 is disposed on the front side 21. An emitter electrode 52 is disposed above the interlayer insulating film 38. One or more contact holes 54 are provided on the interlayer insulating film 38 for electrically connecting the emitter electrode 52 and the semiconductor substrate 10. Contact holes 55 and 56 may also be similarly configured to penetrate the interlayer insulating film 38.

[0113] Figure 2A An example of an enlarged view showing the upper surface surrounding the sensing electrode 140. The semiconductor device 100 includes a Zener diode 170.

[0114] The Zener diode 170 is an overvoltage protection diode. By providing the Zener diode 170, the semiconductor device 100 can prevent damage to the current sensing unit 141 caused by overvoltage. In this example, the Zener diode 170 is electrically connected between the emitter electrode 52 and the sensing electrode 140. The Zener diode 170 is disposed on the semiconductor substrate 10. However, since the Zener diode 170 in this example is disposed in the outer peripheral region 120, it is not necessary to reduce the area of ​​the active region 110.

[0115] In one example, the Zener diode 170 is disposed along the outer periphery of the sensing electrode 140 when viewed from above. The Zener diode 170 may be disposed along both sides of the sensing electrode 140. In this example, the Zener diode 170 is disposed along at least three sides of the sensing electrode 140.

[0116] For example, the junction length of the Zener diode 170 is more than 20% and less than 100% of the outer periphery of the sensing electrode 140. The junction length of the Zener diode 170 refers to the length of the Zener diode 170 when viewed from above. In one example, the junction length of the Zener diode 170 is more than 0.6 mm and less than 3.0 mm. By increasing the junction length of the Zener diode 170, the current flowing through the Zener diode 170 increases.

[0117] The emitter potential electrode 142 is set to the emitter potential of the transistor section 70. The emitter potential electrode 142 is electrically connected to the Zener diode 170. The emitter potential electrode 142 is disposed along the outer periphery of the sensing electrode 140 when viewed from above. In this example, the emitter potential electrode 142 is disposed covering the entire circumference of the sensing electrode 140, but it is not limited to this. The emitter potential electrode 142 may be made of the same material as the front electrodes such as the sensing electrode 140.

[0118] Figure 2B This is an example of an enlarged view of the sensing electrode 140 and the emitter potential electrode 142. A Zener diode 170 is disposed below the sensing electrode 140 and the emitter potential electrode 142. The Zener diode 170 is disposed along the outer periphery of the sensing electrode 140 and the inner periphery of the emitter potential electrode 142.

[0119] Contact portion 144 sets the emitter potential electrode 142 to the emitter potential. Contact portion 144 electrically connects the emitter potential electrode 142 to the well region 17 set to the emitter potential. Contact portion 144 is provided in the region where the Zener diode 170 is not provided. Contact portion 144 will be described later. In this example, contact portion 144 is provided along one side of sensing electrode 140, and Zener diode 170 is provided along the other three sides of sensing electrode 140. Contact portion 144 may also be provided along two or more sides of sensing electrode 140.

[0120] Figure 2C It means Figure 2BA diagram showing an example of the b-b' cross-section. The b-b' cross-section is through the XZ plane of the Zener diode 170.

[0121] The Zener diode 170 has a first conductivity type region 171 and a second conductivity type region 172. The second conductivity type region 172 includes a second conductivity type region 172a and a second conductivity type region 172b. The first conductivity type region 171 and the second conductivity type region 172 are arranged side by side when viewed from above. In this example, the first conductivity type region 171 is disposed between the second conductivity type region 172a and the second conductivity type region 172b.

[0122] The first conductivity type region 171 is a region of the first conductivity type with a higher doping concentration than the drift region 18. The first conductivity type region 171 is disposed between the second conductivity type regions 172a and 172b. For example, the first conductivity type region 171 is formed by arsenic ion implantation. It should be noted that the first conductivity type region 171 can also be formed using a process common to other regions of the first conductivity type. A common process refers to a process performed simultaneously under the same conditions.

[0123] The second conductivity region 172 is a region of the second conductivity type with a higher doping concentration than the base region 14. The second conductivity region 172a is electrically connected to the sensing electrode 140 via contact hole 58. The second conductivity region 172b is electrically connected to the emitter potential electrode 142 via contact hole 59. For example, the second conductivity region 172 is formed by boron ion implantation. It should be noted that the second conductivity region 172 can also be formed using the same process as other second conductivity regions.

[0124] In one example, the Zener diode 170 is formed by ion implantation into a semiconductor layer such as polysilicon. The first conductivity type region 171 and the second conductivity type region 172 have the same film thickness. The film thicknesses of the first conductivity type region 171 and the second conductivity type region 172 can be 0.3 μm or more and 1 μm or less, respectively. For example, the film thickness of the first conductivity type region 171 and the second conductivity type region 172 is 0.5 μm. By appropriately setting the film thickness of the Zener diode 170, it is possible to form a region of any conductivity type on the entire surface of the Zener diode 170 and then reverse a portion of it to another conductivity type.

[0125] An interlayer insulating film 38 is disposed between the emitter potential electrode 142 and the well region 17. For example, the interlayer insulating film 38 has a film thickness of 0.8 μm or more and 1.2 μm or less. A gate channel 48 set to the gate potential is disposed below the interlayer insulating film 38.

[0126] An interlayer insulating film 174 is disposed below the Zener diode 170. The interlayer insulating film 174 is disposed between the Zener diode 170 and the well region 17. For example, the thickness of the interlayer insulating film 174 is less than 0.2 μm. The interlayer insulating film 174 can be an HTO (High Temperature Oxide) film.

[0127] The gate channel 48 is a wiring disposed on the front side 21 of the semiconductor substrate 10 and set to the gate potential. For example, the gate channel 48 is formed by covering a conductive material such as polysilicon with added impurities or a metal with an insulating film such as polyimide. The film thickness of the gate channel 48 can be the same as or thicker than the semiconductor layer of the Zener diode 170. In one example, the film thickness of the gate channel 48 is 0.8 μm.

[0128] A gate oxide film 49 is disposed between the front side 21 of the semiconductor substrate 10 and the gate flow channel 48. By providing the gate oxide film 49, short circuits between the front side 21 and the gate flow channel 48 can be prevented. The thickness of the gate oxide film 49 is preferably 0.08 μm or more and 0.12 μm or less, more preferably 0.1 μm. The gate oxide film 49 can be formed using the same process as the dummy insulating film 32 and the gate insulating film 42.

[0129] Figure 2D It means Figure 2B A diagram showing an example of the c-c' section. The c-c' section is the YZ plane passing through contact portion 144.

[0130] Contact portion 144 is disposed in the contact hole of interlayer insulating film 38, electrically connecting emitter potential electrode 142 to well region 17. In this example, contact portion 144 has contact portion 144a and contact portion 144b formed in different contact holes. Contact portion 144 can also be configured to extend along the X-axis direction. The shape of contact portion 144 is not limited thereto.

[0131] In this example, the well region 17 is set to the emitter potential. Therefore, the emitter potential electrode 142, which is connected to the well region 17 via the contact portion 144, is set to the emitter potential.

[0132] Figure 3A This section outlines the configuration of a semiconductor module 200 that includes a semiconductor device 100. The semiconductor module 200 includes a DCB substrate 210, a printed circuit board 220, and a copper substrate 230.

[0133] The DCB substrate 210 includes a semiconductor device 100 on which a Zener diode 170 is disposed. Specifically, the Zener diode 170 is disposed on the DCB substrate 210 side. The printed circuit board 220 has a sensing resistor Rs. The DCB substrate 210 is disposed on a copper substrate 230 for heat dissipation. Parasitic capacitance exists between the DCB substrate 210 and the copper substrate 230.

[0134] Here, sometimes due to accidental external discharges, noise current flows through the driver / emitter wiring, generating a di / dt electromotive force. There exists a fault mode where the sensing IGBT in the current sensing section 141, with its small capacitive component, is damaged by the di / dt electromotive force. In this example, the semiconductor device 100 prevents IGBT failure by providing a Zener diode 170. Furthermore, since the Zener diode 170 is disposed on the semiconductor substrate 10 in this example, damage to the sensing IGBT can be suppressed without adding external protection circuitry.

[0135] Figure 3B This is an example of the circuit configuration of the semiconductor device used in the comparative example. Because the semiconductor device in this example does not have a Zener diode 170, the sensing IGBT may sometimes malfunction due to the gate-gate breakdown voltage when a di / dt electromotive force is generated.

[0136] The main IGBT shares the same collector and gate electrodes as the sensing IGBT. The area of ​​the active region of the sensing IGBT is smaller than the area of ​​the active region of the main IGBT. For example, the area of ​​the active region of the sensing IGBT is less than 1 / 1000 of the area of ​​the active region of the main IGBT.

[0137] For example, when a di / dt electromotive force is generated, an overvoltage occurs between the gate gate (G) and gate electrode (GE) of the main IGBT and between the gate gate (GS) of the sensing IGBT. Then, the voltage is shared between GE and GS based on the capacitance ratio of the gate capacitance Cge of the main IGBT to the gate capacitance Cgs of the sensing IGBT. If a voltage exceeding the withstand voltage between GE and GS of the sensing IGBT is generated, a failure of the sensing IGBT may occur.

[0138] Figure 3C This is an example of the circuit configuration of the semiconductor module 200 in this embodiment. In the semiconductor device of this example, even in the event of an overvoltage in the circuit, voltage concentration between the gate and source gates of the current sensing unit 141 can be avoided due to the breakdown of the Zener diode 170. As a result, the current sensing unit 141 is protected.

[0139] Figure 4 This illustrates an example of the configuration of the semiconductor device 100 in Embodiment 2. The semiconductor device 100 in this example includes an electrode connection portion 146.

[0140] An electrode connection portion 146 connects the emitter potential electrode 142 and the emitter electrode 52 above the semiconductor substrate 10. Thus, the emitter potential electrode 142 is set to the emitter potential. The electrode connection portion 146 can be made of the same material as the emitter electrode 52 or the emitter potential electrode 142. The electrode connection portion 146 can be formed using the same process as the front electrodes such as the emitter electrode 52.

[0141] In this example, the electrode connection portion 146 connects the emitter potential electrode 142 to the emitter electrode 52 at a position closer to the outer edge of the chip than the cathode pad 160. The position of the electrode connection portion 146 is not limited to this example. In the area where the electrode connection portion 146 is provided, the gate metal layer 50 may not be provided. The gate metal layer 50 interrupted by the electrode connection portion 146 can be connected via the gate flow channel 48.

[0142] Figure 5A This is an example of a top view of the semiconductor device 100 of Embodiment 3. The semiconductor device 100 in this example has a Zener diode 170 electrically connected to the emitter electrode 52 via a semiconductor substrate 10. The semiconductor device 100 in this example differs from Embodiments 1 and 2 in that it does not have an emitter potential electrode 142.

[0143] exist Figure 5A In this example, the Zener diode 170 is positioned at the end of the sensing electrode 140 on the positive side of the Y-axis when viewed from above. However, it can be positioned anywhere between the end of the sensing electrode 140 on the positive side of the Y-axis and the current sensing unit 141. The Zener diode 170 extends along the X-axis when viewed from above. However, the shape of the Zener diode 170 is not limited to this example. That is, as long as the Zener diode 170 is electrically connected between the emitting electrode 52 and the sensing electrode 140, its shape and position are not particularly limited.

[0144] Figure 5B express Figure 5A An example of a d-d' cross-section. The Zener diode 170 in this example is composed of a first conductivity type region 171 and a second conductivity type region 172 formed in the depth direction. The second conductivity type region 172 includes a second conductivity type region 172a and a second conductivity type region 172b.

[0145] A first conductivity type region 171 is disposed above the well region 17 in the semiconductor substrate 10. In this example, the first conductivity type region 171 is disposed above the second conductivity type region 172b, which is the well region 17. The first conductivity type region 171 can be formed using the same process as other first conductivity type regions. For example, the first conductivity type region 171 can be formed using the same process as the emitter region 12, having the same film thickness and doping concentration as the emitter region 12.

[0146] The second conductivity type region 172a is disposed on the semiconductor substrate 10 above the first conductivity type region 171. The second conductivity type region 172a can be formed using the same process as other second conductivity type regions. For example, the second conductivity type region 172a can be formed using the same process as the contact plug of the second conductivity type of the transistor section 70.

[0147] The second conductivity region 172b is disposed below the first conductivity region 171. The second conductivity region 172b is at least a portion of the well region 17. The second conductivity region 172b functions as the second conductivity region of the Zener diode 170.

[0148] An oxide film 147 is disposed above the front surface 21 between the well regions 17 and each other. For example, the thickness of the oxide film 147 is less than 1 μm. A gate channel 48 can be disposed on the upper surface of the oxide film 147. The gate channel 48 can be configured to extend below the sensing electrode 140 and the emitter electrode 52. The gate channel 48 can be separated from the front electrode by an interlayer insulating film 38.

[0149] Figure 6 This figure shows an example of a cross-section of the temperature sensing unit 180. The cross-section near the region where the temperature sensing unit 180 is formed is shown in particular.

[0150] The temperature sensing unit 180 includes a diode disposed on the semiconductor substrate 10. The temperature sensing unit 180 detects the temperature of the semiconductor device 100 by utilizing the change in the current-voltage characteristics of the diode according to temperature. The temperature sensing unit 180 is disposed above the semiconductor substrate 10 via an interlayer insulating film 186. Additionally, the temperature sensing unit 180 is formed above the well region 17. In this example, the temperature sensing unit 180 includes a first conductivity type region 181, a second conductivity type region 182, a first connection portion 183, a second connection portion 184, and an interlayer insulating film 185.

[0151] The first conductivity region 181 and the second conductivity region 182 constitute a PN diode. For example, the first conductivity region 181 is formed of an N-type semiconductor and functions as a cathode region. The second conductivity region 182 can be formed of a P-type semiconductor and functions as an anode region. The first conductivity region 181 and the second conductivity region 182 are disposed on an interlayer insulating film 186.

[0152] It should be noted that the film thickness of the diode in the temperature sensing unit 180 and the film thickness of the Zener diode 170 can be approximately the same. That is, the film thickness of the first conductivity type region 181 and the second conductivity type region 182 can be the same as the film thickness of the first conductivity type region 171 and the second conductivity type region 172. The first conductivity type region 181 and the second conductivity type region 182 can be formed using the same process as the first conductivity type region 171 and the second conductivity type region 172.

[0153] The first connecting portion 183 is electrically connected to the first conductive region 181. The second connecting portion 184 is electrically connected to the second conductive region 182. The first connecting portion 183 is electrically connected to the cathode pad 160 via the cathode wiring 162. The second connecting portion 184 is electrically connected to the anode pad 150 via the anode wiring 152.

[0154] An interlayer insulating film 185 is disposed on the upper surfaces of the first conductive region 181 and the second conductive region 182. Additionally, an interlayer insulating film 185 is disposed on the upper surface of an interlayer insulating film 186. The interlayer insulating film 185 has contact holes for electrically connecting the first connecting portion 183 to the first conductive region 181. The interlayer insulating film 185 also has contact holes for electrically connecting the second connecting portion 184 to the second conductive region 182. The interlayer insulating film 185 can be formed using the same process as the interlayer insulating film 38.

[0155] In this example, the temperature sensing unit 180 has a well region 17 on the back side 23 of the corresponding semiconductor substrate 10. Component areas such as a transistor section 70 and a diode section 80 can be disposed below the temperature sensing unit 180. In this example, a collector region 22 is disposed below the temperature sensing unit 180. That is, the temperature sensing unit 180 is disposed on the transistor section 70. It should be noted that the temperature sensing unit 180 can also be disposed on the diode section 80.

[0156] Figure 7A This is an example of a manufacturing process diagram for the semiconductor device 100 of Embodiment 1 or Embodiment 2. In step S100, a well region 17 is formed. In step S102, an interlayer insulating film 174 is formed. The interlayer insulating film 174 can be disposed on the entire surface of the semiconductor substrate 10. The interlayer insulating film 186 of the temperature sensing portion 180 can be formed simultaneously with the interlayer insulating film 174.

[0157] In step S104, a semiconductor layer is formed. For example, the semiconductor layer is a polysilicon layer used to form the Zener diode 170 or the temperature sensing unit 180. The semiconductor layer can be formed on the entire surface of the semiconductor substrate 10. The PN structure of the Zener diode 170 can be formed using the same process as the PN structure of the diode in the temperature sensing unit 180. That is, no new process is required for the Zener diode 170.

[0158] In step S106, a second conductivity region is formed by ion implantation into the semiconductor layer. The second conductivity region 172 and the second conductivity region 182 can be formed using a common process. In step S108, the desired regions for the first and second conductivity regions are left by patterning and etching.

[0159] In step S110, a first conductivity type region is formed by ion implantation into the semiconductor layer. The first conductivity type region can be formed by a common process, specifically first conductivity type region 171 and first conductivity type region 181. For example, first conductivity type region 171 and first conductivity type region 181 are formed by reversing the conductivity type of the regions formed in step S106 that are part of the regions formed as second conductivity type region 172 and second conductivity type region 182.

[0160] In step S112, an interlayer insulating film 38 is formed. The interlayer insulating film 185 of the temperature sensing portion 180 can be formed simultaneously with the interlayer insulating film 38. In step S114, contact holes are formed in the interlayer insulating film 38. Contact holes in the interlayer insulating film 185 can also be formed simultaneously with the contact holes in the interlayer insulating film 38. In step S116, a front electrode is formed. In step S116, the contact portion 144 can be formed using the same process as the emitter potential electrode 142.

[0161] In Embodiment 2, in the step of forming the contact hole in step S114, it is not necessary to form a contact hole for providing the contact portion 144. On the other hand, in step S116, when forming the front electrode, the electrode connection portion 146 is formed by a process common to the emitter potential electrode 142 and the emitter electrode 52.

[0162] In the manufacturing method of the semiconductor device 100 in this example, by making the formation process of the Zener diode 170 common to other processes, the Zener diode 170 can be formed without setting up a dedicated process. Therefore, it is easy to add the Zener diode 170.

[0163] Figure 7B This is an example of the manufacturing process flow diagram of the semiconductor device 100 in Embodiment 3. In step S300, a well region 17 is formed. In step S302, an emitter region 12 and a first conductivity type region are formed. As the first conductivity type region, the first conductivity type region 171 and the first conductivity type region 181 can be formed by a common process. In addition, the first conductivity type region 171 can be formed by a common process with the emitter region 12 of the transistor section 70.

[0164] In step S304, a second conductive region is formed. The second conductive region 172 and the second conductive region 182 can also be formed using a common process. In step S306, an interlayer insulating film 38 is formed. The interlayer insulating film 185 of the temperature sensing unit 180 can be formed simultaneously with the interlayer insulating film 38.

[0165] In step S308, contact holes are formed in the interlayer insulating film 38. Contact holes in the interlayer insulating film 185 may also be formed simultaneously with the contact holes in the interlayer insulating film 38. In step S310, a front electrode is formed.

[0166] The present invention has been described above using embodiments, but the technical scope of the present invention is not limited to the scope described in the above embodiments. Various changes or modifications to the above embodiments will be apparent to those skilled in the art. As can be seen from the claims, various changes or modifications are also included within the technical solution of the present invention.

[0167] It should be noted that the execution order of actions, sequences, steps, and stages in the apparatus and methods shown in the claims, specification, and drawings is not specifically defined as "before" or "beforehand." Furthermore, as long as the results of previous processes are not required in subsequent processes, they can be implemented in any order. For convenience, the use of terms such as "firstly" and "next" to describe the action flow in the claims, specification, and drawings does not imply that the actions must be performed in this order.

Claims

1. A semiconductor device, characterized in that, have: Semiconductor substrate; A transistor portion disposed on the semiconductor substrate; A current sensing unit for detecting the current flowing through the transistor unit; The emitter electrode is set to the emitter potential of the transistor portion; The sensing electrode is electrically connected to the current sensing unit; A Zener diode, which is electrically connected between the emitting electrode and the sensing electrode; An emitter potential electrode, which is set to the emitter potential and is electrically connected to the Zener diode; A second conductivity type well region is disposed on the semiconductor substrate and is set to the emitter potential; An interlayer insulating film is disposed between the emitter potential electrode and the well region; as well as The contact portion is disposed in the contact hole of the interlayer insulating film and electrically connects the emitter potential electrode to the well region.

2. The semiconductor device according to claim 1, characterized in that, The Zener diode is disposed on the semiconductor substrate.

3. The semiconductor device according to claim 1, characterized in that, When viewed from above, the sensing electrodes are rectangular. The Zener diode is disposed along at least two sides of the sensing electrode.

4. The semiconductor device according to claim 3, characterized in that, The Zener diode is disposed along at least three sides of the sensing electrode.

5. The semiconductor device according to any one of claims 1 to 4, characterized in that, The semiconductor device has an electrode connection portion above the semiconductor substrate, which connects the emitter potential electrode to the emitter electrode.

6. The semiconductor device according to any one of claims 1 to 4, characterized in that, The Zener diode has a first conductivity type region and a second conductivity type region. When viewed from above, the first conductive region and the second conductive region are arranged side by side.

7. The semiconductor device according to claim 6, characterized in that, The film thickness of the first conductive region is 0.

3. μ m or more and 1 μ Below m, the film thickness of the second conductive region is 0.

3. μ m or more and 1 μ Below m.

8. The semiconductor device according to any one of claims 1 to 4, characterized in that, The semiconductor device includes a temperature sensing unit, which has a diode disposed on the semiconductor substrate. The film thickness of the diode in the temperature sensing unit is approximately the same as that of the Zener diode.

9. The semiconductor device according to any one of claims 1 to 4, characterized in that, The junction length of the Zener diode is greater than 0.6 mm and less than 3.0 mm.

10. A semiconductor device, characterized in that, have: Semiconductor substrate; A transistor portion disposed on the semiconductor substrate; A current sensing unit for detecting the current flowing through the transistor unit; The emitter electrode is set to the emitter potential of the transistor portion; The sensing electrode is electrically connected to the current sensing unit; as well as A Zener diode is electrically connected between the emitter electrode and the sensing electrode. The Zener diode has: The well region of the second conductivity type; A first conductivity type region is disposed in the semiconductor substrate above the well region; as well as A second conductivity region is disposed above the first conductivity region in the semiconductor substrate.

11. The semiconductor device according to claim 10, characterized in that, The transistor section has: The drift region of the first conductivity type; The base region of the second conductivity type is disposed on the front side of the drift region; The emitter region of the first conductivity type has a higher doping concentration than the drift region; as well as The collector region of the second conductivity type has a higher doping concentration than the base region. The first conductivity region has the same film thickness and doping concentration as the emission region.

12. A method for manufacturing a semiconductor device, characterized in that, include: The step of setting a transistor section on a semiconductor substrate; The step of setting up a current sensing unit to detect the current flowing through the transistor unit; The step of setting the emitter electrode involves setting the emitter electrode to the emitter potential of the transistor portion; The step of setting a sensing electrode that is electrically connected to the current sensing unit; The step of setting up a Zener diode electrically connected between the transmitting electrode and the sensing electrode; The step of setting the emitter potential electrode that is set to the emitter potential and electrically connected to the Zener diode; The step of setting a well region of the second conductivity type, wherein the well region is disposed on the semiconductor substrate and is set to the emitter potential; The step of forming an interlayer insulating film between the emitter potential electrode and the well region; The step of providing contact holes in the interlayer insulating film; as well as The step of providing a contact portion in the contact hole to electrically connect the emitter potential electrode to the well region.

13. The method for manufacturing a semiconductor device according to claim 12, characterized in that, The PN structure of the Zener diode is formed using the same process as the PN structure of the diode in the temperature sensing unit.

14. The method of manufacturing a semiconductor device according to claim 12 or 13, characterized in that, The method for manufacturing the semiconductor device includes the step of providing an electrode connection portion above the semiconductor substrate for connecting the emitter potential electrode to the emitter electrode.

15. The method for manufacturing a semiconductor device according to claim 12, characterized in that, The region of the first conductivity type of the Zener diode is formed using the same process as the emitter region of the first conductivity type of the transistor.