Display panel, display device, and method for manufacturing display panel

Abstract

The present application discloses a display panel. It includes a display area and a frame area arranged around the display area, the display area includes a plurality of pixel light-emitting units arranged in an array, the display area includes a placement area and a transition area, the placement area is adjacent to the frame area, the display panel also includes a gate drive circuit located in the placement area and a plurality of first pixel circuits located in the transition area, each first pixel circuit is connected to at least two pixel light-emitting units in the placement area and / or the transition area, and the gate drive circuit is used to drive each first pixel circuit to control the corresponding at least two pixel light-emitting units to emit. In this way, by placing the gate drive circuit in the placement area of ​​the display area, the placement of the gate drive circuit is avoided from affecting the frame width, the narrow frame design of the display panel is realized, and the sensory experience of the user is improved. In addition, the present application also discloses a display device and a method for manufacturing a display panel.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, a display device, and a method for manufacturing a display panel. Background Art

[0002] As consumers' pursuit of screen sensory experience continues to improve and the panel industry's technology continues to advance, the design of narrow bezels is becoming more and more popular. However, due to the limitations of the organic film layer's easy water absorption and other characteristics of conventional OLED products, the display panel needs to ensure a certain area of ​​packaging at the bezel. At the same time, the GOA circuit used to drive the pixel circuit is also placed at the bezel position. The packaging area and the GOA circuit make the bezel area occupy a larger space, resulting in a wider bezel. Therefore, how to reduce the width of the display panel bezel has become an urgent problem to be solved. Summary of the invention

[0003] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application provides a display panel, a display device and a method for manufacturing a display panel.

[0004] The display panel of the embodiment of the present application includes a display area and a border area arranged around the display area, the display area includes a plurality of pixel light-emitting units arranged in an array, the display area includes a placement area and a transition area, the placement area is adjacent to the border area, the display panel also includes a gate driving circuit located in the placement area and a plurality of first pixel circuits located in the transition area, each of the first pixel circuits is connected to at least two of the pixel light-emitting units in the placement area and / or the transition area, and the gate driving circuit is used to drive each of the first pixel circuits to control the corresponding at least two pixel light-emitting units to emit light.

[0005] In some embodiments, the display area also includes a normal display area, and the normal display area is provided with multiple second pixel circuits, each of the second pixel circuits is connected to a pixel light-emitting unit in the normal display area, and the gate driving circuit is also used to drive each of the second pixel circuits to control a pixel light-emitting unit to emit light.

[0006] In some embodiments, the display panel includes a substrate, an anode layer, a light-emitting layer and a cathode layer arranged in sequence, the substrate, the anode layer, the light-emitting layer and the cathode layer are arranged in sequence along a vertical direction of the substrate, the anode layer, the light-emitting layer and the cathode layer together form the pixel light-emitting unit, and the gate drive circuit, the first pixel circuit and the second pixel circuit are respectively formed in the placement area, the transition area and the normal display area between the substrate and the anode layer.

[0007] In some embodiments, each group of the gate drive circuits corresponds to a row of multiple pixel light-emitting units in the placement area, each of the first pixel circuits corresponds to a pixel light-emitting unit in the transition area, and each of the second pixel circuits corresponds to a pixel light-emitting unit in the normal display area.

[0008] In some embodiments, the normal display area includes a cathode switching area and a metal layer formed on the substrate, the cathode layer and the anode layer are connected in the cathode switching area, and the metal layer is connected to the anode layer.

[0009] In some embodiments, the display panel includes a plurality of pixel switching lines connected to the first pixel circuit, and one pixel switching line connects at least two of the pixel light emitting units in the transition area and / or the placement area.

[0010] In some embodiments, the placement area and the transition area are arranged along a column direction, and the first pixel circuit controls at least two of the pixel light-emitting units in the corresponding column direction to emit light.

[0011] In some embodiments, the placement area and the transition area are arranged along a row direction, and the first pixel circuit controls at least two of the pixel light-emitting units in the corresponding row direction to emit light.

[0012] In certain embodiments, the placement zone has a width ranging from 200 to 1000 microns.

[0013] In some embodiments, the width of the border region is in the range of 150-200 microns.

[0014] In some embodiments, the border area is provided with an isolation column, and the isolation column isolates the light-emitting layer between the display area and the border area.

[0015] In some embodiments, the border area further includes a dam portion, the isolation column includes an outer isolation column and an inner isolation column, the dam portion is located in the interval between the outer isolation column and the inner isolation column, and the isolation column and the dam portion together form a packaging unit.

[0016] In some embodiments, the isolation column is made of titanium metal material, and the dam is made of organic non-metallic material.

[0017] In some embodiments, the display panel further includes data lines, and the data lines provide data signals to the first pixel circuit and the second pixel circuit along a column direction.

[0018] The display device implemented in the present application includes the display panel described in any of the above embodiments.

[0019] The method for manufacturing a display panel implemented in the present application includes:

[0020] Providing a substrate, the substrate comprising a display area and a frame area arranged around the display area, the display area comprising a placement area and a transition area, the placement area being adjacent to the frame area;

[0021] forming a first pixel circuit in the transition area of ​​the substrate and forming a gate driving circuit connected to the first pixel circuit in the placement area;

[0022] A plurality of pixel light emitting units arranged in an array are formed on the substrate, the plurality of pixel light emitting units are located in the display area, and each of the first pixel circuits is connected to at least two pixel light emitting units in the placement area and / or the transition area.

[0023] In some embodiments, the display area includes a normal display area, the normal display area is adjacent to the transition area, and the manufacturing method further includes:

[0024] A second pixel circuit is formed in the normal display area, and one of the second pixel circuits is connected to one of the pixel light emitting units in the normal display area.

[0025] In certain embodiments, the preparation method comprises:

[0026] forming a metal layer in the normal display area of ​​the substrate;

[0027] A cathode switching area where the anode layer and the cathode layer are connected is formed on the substrate, the cathode switching area is located in the normal display area and the anode layer is connected to the metal layer.

[0028] In the display panel, display device and display panel manufacturing method of the embodiments of the present application, each first pixel circuit drives at least two pixel light-emitting units to emit light in the placement area and the transition area, so that the number of first pixel circuits can be reduced and the space occupied by the first pixel circuits can be reduced, so that the gate drive circuit can be placed in the display area vacated by the first pixel circuit. In this way, the border width is avoided from being affected by the gate drive circuit, the border width of the display panel is reduced, and the user's sensory experience is improved.

[0029] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0031] Figure 1It is a module schematic diagram of a display panel according to an embodiment of the present application.

[0032] Figure 2 yes Figure 1 An enlarged schematic diagram of region II is shown in FIG.

[0033] Figure 3 It is a partial schematic diagram of a display panel according to an embodiment of the present application.

[0034] Figure 4 yes Figure 1 An enlarged schematic diagram of region IV is shown in FIG.

[0035] Figure 5 It is a schematic diagram of a normal display area of ​​an embodiment of the present application.

[0036] Figure 6 It is a partial cross-sectional schematic diagram of a display panel according to an embodiment of the present application.

[0037] Figure 7 is a schematic diagram of a display device according to an embodiment of the present application.

[0038] Figure 8-10 It is a flow chart of the manufacturing method of the implementation mode of the present application.

[0039] Description of main component symbols:

[0040] Display panel 10, frame area 11, spacer columns 111, outer spacer columns 1111, inner spacer columns 1112, dam Dam, display area 12, placement area 121, transition area 122, normal display area 123, pixel transfer area 1231, first sub-area II, second sub-area IV;

[0041] Substrate 21, gate driving circuit GOA, first pixel circuit 211, pixel switching line 2111, second pixel circuit 212, data line data, metal layer 213;

[0042] Pixel light emitting unit 22, anode layer 221, light emitting layer 222, cathode layer 223;

[0043] Encapsulation layer 23;

[0044] Display device 100. DETAILED DESCRIPTION

[0045] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0046] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0047] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0048] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0049] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the various specific processes and material examples provided by the present application, but those of ordinary skill in the art can appreciate the application of other processes and / or the use of other materials.

[0050] As people have higher and higher requirements for narrow borders of display panels, in order to reduce the width of the display panel border, the current common practice is to make the gate drive circuit (Gate on Array, GOA) on the TFT substrate of the border, which does not require a gate drive chip (IC) and can make the border very narrow.

[0051] However, on the one hand, the frame not only needs to be placed with a GOA circuit to drive the pixel circuit, but also, due to the limitations of conventional OLED products due to the characteristics of the organic film layer being easy to absorb water, the display panel also needs to ensure a certain area of ​​packaging at the frame. The frame area occupies a large space due to the packaging area and the area occupied by the GOA circuit. On the other hand, the packaging area needs to be completely isolated from the GOA circuit to avoid the occurrence of electrode short circuits, which affects the display effect of the display panel. Due to the limitations of existing processes, a certain distance needs to be maintained between the packaging area and the GOA circuit placement area, resulting in the frame of the display panel usually being above 800um. Therefore, how to further reduce the width of the display panel frame to achieve a "narrow frame" or "frameless design" has become an urgent problem to be solved.

[0052] In view of this, please refer to Figure 1 and Figure 2 The present application provides a display panel 10, which includes a display area 12 and a frame area 11 arranged around the display area 12. The display area 12 includes a plurality of pixel light-emitting units 22 arranged in an array, and the display area 12 includes a placement area 121 and a transition area 122, wherein the placement area 121 is adjacent to the frame area 11. The display panel 10 also includes a gate drive circuit GOA located in the placement area 121 and a plurality of first pixel circuits 211 located in the transition area 122, wherein each first pixel circuit 211 is connected to at least two pixel light-emitting units 22 in the placement area 121 and / or the transition area 122, and the gate drive circuit GOA is used to drive each first pixel circuit 211 to control the corresponding at least two pixel light-emitting units 22 to emit light.

[0053] In the display panel 10 of the present application, in the placement area 121 and transition area 122 of the display area 12, each first pixel circuit 211 drives at least two pixel light-emitting units 22 to emit light, so that the number of first pixel circuits 211 can be reduced and the space occupied by the first pixel circuits 211 can be reduced, so that the gate drive circuit GOA can be placed in the display area 12 vacated by the first pixel circuits 211. In this way, it is ensured that the placement area 121 and transition area 122 of the display area 12 can display, and at the same time, it is avoided that the gate drive circuit GOA is placed in the border area 11 to affect the width of the border area 11, so that the width of the border area 11 of the display panel 10 can be reduced, and the narrow border design of the display panel 10 is realized, which improves the sensory experience of the user.

[0054] Specifically, in this embodiment, the display panel 10 may be an AMOLED display panel, which refers to an active matrix driven OLED display panel. The pixel light emitting unit 22 may be an organic light-emitting diode (OLED).

[0055] The display panel 10 can be divided into two regions, namely, a frame region 11 and a display region 12, by dividing the light-emitting region and the non-light-emitting region, wherein the frame region 11 surrounds the outside of the display region 12. A plurality of pixel light-emitting units 22 are arranged in an array to form a plurality of pixel rows and a plurality of pixel columns. The display region 12 emits light through the array of pixel light-emitting units 22 to display images.

[0056] See also Figure 1 and Figure 3 The border area 11 does not display the image. Generally, the width of the border area 11 is 150-200 microns. Specifically, the width of the border area 11 refers to the width from the side of the border area 11 away from the display area 12 (the edge of the display panel 10) to the side of the border area 11 close to the display area 12.

[0057] The border area 11 includes an isolation column 111 and a dam portion Dam, and the isolation column 111 and the dam portion Dam together form a packaging unit. The packaging unit can block oxygen, moisture, etc. outside the display panel 10 to prevent them from entering the electronic devices in the display panel 10. The isolation column 111 is used to isolate the light-emitting layer between the display area 12 and the border area 11 when the display panel 10 is subjected to an evaporation process. The isolation column 111 can be made of a metal material, for example, the isolation column 111 is a titanium metal material. The isolation column 111 includes an outer isolation column 1111 and an inner isolation column 1112, and the number of the outer isolation column 1111 and the number of the inner isolation column 1112 can both include a plurality, and the plurality of outer isolation columns 1111 or the plurality of inner isolation columns 1112 are arranged at intervals along the width direction of the border area 11. In some examples, the number of the outer spacer columns 1111 may be 3, 4, 5 or more, and the number of the inner spacer columns 1112 may be 2, 3, 5 or more, and the specific number is not limited. It can be understood that the more the number of the inner spacer columns 1112 or the outer spacer columns 1111 is, the better the isolation effect of the spacer columns 111 is, but the width of the corresponding border area 11 is wider, so the number of the spacer columns 111 can be set according to the actual product needs. In addition, the inner spacer columns 1112 or the outer spacer columns 1111 can also be formed by etching a metal film such as titanium or aluminum during the evaporation process.

[0058] The dam Dam is located between the outer isolation column 1111 and the inner isolation column 1112. The dam Dam may be made of an organic non-metallic material and is used to block the PI material used in the packaging layer during the packaging process.

[0059] The display area 12 includes a placement area 121, a transition area 122 and a normal display area 123. Among them, the placement area 121 is adjacent to the frame area 11. The placement area 121 is placed with multiple groups of gate drive circuits (Gate on Array, GOA), GOA is used to output gate control signals, and each group of gate drive circuits GOA corresponds to the position where multiple pixel light-emitting units 22 are located. It can be understood that since the placement area 121 needs to accommodate the gate drive circuit GOA, the width of the placement area 121 is related to the width of the gate drive circuit GOA. In this embodiment, the width range of the placement area 121 can be 200-1000 microns, for example, the width range of the placement area 121 can be 200 microns, 250 microns, 300 microns, 350 microns, 400 microns, 500 microns, 600 microns, 800 microns or 1000 microns, etc., which is not limited here.

[0060] A plurality of first pixel circuits 211 are placed in the transition region 122, each first pixel circuit 211 corresponds to the position of a pixel light emitting unit 22, each first pixel circuit 211 is correspondingly connected to a group of gate drive circuits GOA, and the plurality of first pixel circuits 211 form a plurality of pixel circuit rows and a plurality of pixel columns. That is, in the transition region 122, the number of pixel light emitting units 22 is equal to the number of first pixel circuits 211, and a first pixel circuit 211 is correspondingly arranged at each pixel light emitting unit 22. For example, in the transition region 122, the array is arranged with 7*7 pixel light emitting units 22, and correspondingly there are 7*7 first pixel circuits 211.

[0061] The display panel 10 further includes a plurality of pixel transfer lines 2111 connected to the first pixel circuits 211, and each first pixel circuit 211 can be connected to at least two adjacent pixel light emitting units 22 in the corresponding connection transition area 122 and / or placement area 121 through a pixel transfer line 2111. The first pixel circuit 211 is used to control the correspondingly connected at least two pixel light emitting units 22 to emit light according to the gate control signal sent by the gate drive circuit GOA.

[0062] A plurality of second pixel circuits 212 are placed in the display area 12, each second pixel circuit 212 corresponds to the position of a pixel light-emitting unit 22 in the display area 12, and each second pixel circuit 212 is correspondingly connected to one or more groups of gate drive circuits GOA, and a plurality of second pixel circuits 212 form a plurality of pixel circuit rows and a plurality of pixel columns. That is, in the display area 12, a second pixel circuit 212 is correspondingly arranged at each pixel light-emitting unit 22 to drive the pixel light-emitting unit 22 to emit light. For example, in the display area 12, the array is arranged with 7*7 pixel light-emitting units 22, and there are correspondingly 7*7 second pixel circuits 212. Each second pixel circuit 212 is connected to the pixel light-emitting unit 22 to control the pixel light-emitting unit 22 to emit light.

[0063] Further, please combine again Figure 1 The display panel 10 includes a first sub-region II and a second sub-region IV. The first sub-region II is located in the top region of the display area 12 , and the second sub-region II is located in the side region of the display area 12 .

[0064] Please combine Figure 2In some embodiments, in the first sub-area II, the frame area 11, the placement area 121, the transition area 122 and the normal display area 123 are arranged in the column direction (vertically) in sequence. In the placement area 121, multiple groups of gate drive circuits GOA are arranged in rows, and each group of gate drive circuits GOA corresponds to the position of a column of pixel light-emitting units 22. Each group of gate drive circuits GOA can be connected to the first pixel circuit 211 and the second pixel circuit 212 belonging to the same row through wiring. The first pixel circuit 211 is connected to at least two vertically arranged pixel light-emitting units 22 of the placement area 121 and / or the transition area 122 through a pixel transfer line 2111, and the first pixel circuit 211 and the pixel light-emitting unit 22 connected thereto are in the same column.

[0065] Please combine Figure 4 In some embodiments, in the second sub-region IV, the frame region 11, the placement region 121, the transition region 122, and the normal display region 123 are sequentially arranged along the row direction (horizontally). In the placement region 121, multiple groups of gate drive circuits GOA are arranged in a row, each group of gate drive circuits GOA corresponds to the position of a row of pixel light-emitting units 22, and is connected to all first pixel circuits 211 and second pixel circuits 212 belonging to the same row.

[0066] Each first pixel circuit 211 is connected to at least two pixel light emitting units 22 along the row direction via a pixel switching line 2111 , and the first pixel circuit 211 and the pixel light emitting units 22 connected thereto are in the same row.

[0067] The number of pixel light-emitting units 22 connected to the first pixel circuit 211 may be 2, 3, 4 or even more, and the specific number is not limited. It can be understood that since each first pixel circuit 211 is connected to the pixel light-emitting unit 22 of the corresponding row or column to drive the pixel light-emitting unit 22 to emit light, the more the number of pixel light-emitting units 22 connected to each first pixel circuit 211, the fewer the number of first pixel circuits 211 required, and the first pixel circuit 211 is placed in the transition area 122, then the more the number of pixel light-emitting units 22 connected to the first pixel circuit 211, the smaller the width of the transition area 122, for example, in the second sub-area IV, the first pixel circuit 211 is connected to the pixel light-emitting units 22 arranged along the row direction. Unit 22, in the placement area 121 and the transition area 122, each row has 12 pixel light-emitting units 22, if each first pixel circuit 211 is connected to two pixel light-emitting units 22 of the corresponding row, then the number of first pixel circuits 211 required for each row is 6, and the width of the transition area 122 needs to be sufficient to accommodate 6 first pixel circuits 211; if each first pixel circuit 211 is connected to three pixel light-emitting units 22 of the corresponding row, then the number of first pixel circuits 211 required for each row is 4, and the width of the transition area 122 only needs to be sufficient to accommodate 4 first pixel circuits 211.

[0068] Further, the display panel 10 also includes a data line data, which is arranged in the transition area 122 and the normal display area 123, and provides data signals for the first pixel circuit 211 and the second pixel circuit 212 along the column direction. The data line data includes a plurality of data lines, each of which corresponds to a column of the first pixel circuit 211 or a column of the second pixel circuit 212. When the first pixel circuit 211 receives the data signal provided by the data line data and the gate control signal provided by the gate driving circuit GOA at the same time, it drives at least two pixel light-emitting units 22 connected thereto to emit light. When the second pixel circuit 212 receives the data signal provided by the data line data and the gate control signal provided by the gate driving circuit GOA at the same time, it drives one pixel light-emitting unit 22 connected thereto to emit light.

[0069] When the display panel 10 is an OLED display panel, usually, in the manufacturing process of the display panel, the pixel circuit is formed in the substrate, a first electrode layer is formed on the substrate, and a plurality of anodes distributed in an array are formed after the first electrode layer is patterned, and then an electroluminescence layer (EL) is formed on the anode, and a second electrode layer is formed on the EL layer as a common cathode layer, and then a cover plate is attached to the second electrode layer or a packaging layer is covered to form an OLED panel. That is, in the OLED display panel, an anode, an electroluminescence layer and a common cathode layer together form a pixel light-emitting unit 22. Among them, the anode of the pixel light-emitting unit 22 can be connected to the pixel circuit in the substrate, and a metal layer is also provided on the TFT substrate in the frame area, and the cathode layer of the pixel light-emitting unit 22 can be connected to the metal layer provided on the TFT substrate in the frame area. The VSS signal (circuit common ground terminal voltage) of the cathode layer can be transferred through the metal layer on the substrate in the frame area, so that the pixel circuit can control the pixel light-emitting unit 22.

[0070] Please combine Figure 5 and Figure 6 In the present embodiment, in order to further reduce the width of the border area 11 and realize the normal transfer of the VSS signal of the cathode of the pixel light-emitting unit 22, a cathode transfer area 1231 can be set in the normal display area 123, and the cathode transfer area 12311 is connected to the cathode of other pixel light-emitting units 22 to transmit the VSS signal.

[0071] Specifically, please combine Figure 6 , Figure 6Schematic diagram of a partial cross section of the display panel 10 in the present application. The display panel 10 also includes a substrate 21, an anode layer 221, a light-emitting layer 222, a cathode layer 223 and an encapsulation layer 23 arranged in sequence. Among them, the anode layer 221, the light-emitting layer 222 and the cathode layer 214 together constitute a pixel light-emitting unit 21, and the gate drive circuit GOA, the first pixel circuit 211 and the second pixel circuit 20 are respectively arranged in the placement area 121, the transition area 122 and the normal display area 123 between the substrate 21 and the anode layer 221. Each group of gate drive circuits GOA corresponds to a row of multiple pixel light-emitting units 22 in the placement area 121, each first pixel circuit 211 corresponds to a pixel light-emitting unit 22 in the transition area 122, and each second pixel circuit 212 corresponds to a pixel light-emitting unit 22 in the normal display area 123.

[0072] The isolation column 111 and the dam Dam are arranged on the substrate 21 and located in the frame area 11, and the encapsulation layer 23 covers the cathode layer 214, the isolation column 111 and the surface of the dam Dam. The encapsulation layer 23 and the encapsulation unit formed by the isolation column 111 and the dam Dam jointly encapsulate the pixel light-emitting unit 22. The encapsulation layer 23 may include a multi-layer structure, and the specific number of layers may be set according to different products. For example, the encapsulation layer 23 includes a first inorganic layer, an organic layer, and a second inorganic layer, wherein the dam Dam is used to block the organic layer during encapsulation.

[0073] In addition, the normal display area 123 includes a cathode transfer area 1231 formed by connecting the cathode layer 214 and the anode layer 221. The cathode transfer area 1231 is used to transmit the VSS signal of the pixel light emitting unit 22.

[0074] Furthermore, the substrate 21 is also formed with a metal layer 213, which is located in the normal display area 123. The metal layer 213 connects the anode layer 221 and the binding area at the cathode switching area 1231, and the cathode switching area 1231 leads the VSS signal of the transmission pixel light emitting unit 22 to the binding area through the metal layer 213.

[0075] See also Figure 7 The present application also provides a display device 100, comprising the display panel 10 in any of the above embodiments.

[0076] The display device 100 may be an electronic device such as a television, a computer, a mobile phone, a tablet or an electronic watch, a VR device, an AR device or other smart wearable device. For example, in some examples, the display device 100 is a mobile phone, and the display panel 10 refers to the mobile phone screen.

[0077] See also Figure 8 The present application also provides a method for manufacturing a display panel 10, the manufacturing method comprising:

[0078] 01. Provide a substrate, the substrate comprising a display area and a frame area arranged around the display area, the display area comprising a placement area and a transition area, and the placement area is adjacent to the frame area;

[0079] 02, forming a first pixel circuit in the transition area of ​​the substrate and a gate driving circuit connected to the first pixel circuit in the placement area;

[0080] 03. A plurality of pixel light-emitting units arranged in an array are formed on a substrate, wherein the plurality of pixel light-emitting units are located in a display area and each first pixel circuit is connected to at least two pixel light-emitting units in a placement area and / or a transition area.

[0081] In the manufacturing method of the present application, a first pixel circuit is formed by the transition area 122 of the substrate 21, and each first pixel circuit 211 is connected to at least two pixel light-emitting units 22 in the placement area 121 and / or the transition area 122 to drive at least two pixel light-emitting units 22 to emit light, so that the number of first pixel circuits 211 can be reduced and the space occupied by the first pixel circuits 211 can be reduced, so that the gate drive circuit can be formed in the placement area 121 vacated by the first pixel circuit 211 in the substrate 21. In this way, it is ensured that the placement area 121 and the transition area 122 of the display area 12 can display, and it is also avoided that the gate drive circuit GOA is placed on the border area 11 and affects the width of the border area 11, so that the width of the border area 11 of the display panel 10 can be reduced, thereby realizing the narrow border design of the display panel 10 and improving the user's sensory experience.

[0082] See also Fig. 9 In some embodiments, the preparation method further comprises:

[0083] 04. A second pixel circuit is formed in the normal display area of ​​the substrate, and each second pixel circuit is connected to a pixel light-emitting unit in the normal display area.

[0084] In this way, the second pixel circuit 212 can drive the pixel light emitting unit 22 in the normal display area 123 to emit light.

[0085] See also Fig.10 In some embodiments, the preparation method further comprises:

[0086] 05, forming a metal layer in the normal display area of ​​the substrate;

[0087] 06. A cathode transition area connecting the anode layer and the cathode layer is formed on the substrate. The cathode transition area is located in the normal display area and the anode layer is connected to the metal layer.

[0088] In this way, by setting the cathode transfer area 1231 in the normal display area 123 on the substrate, not only the VSS signal of the cathode of the pixel light-emitting unit 22 is normally transferred, but also the width of the border area 11 of the display panel 10 can be further reduced, thereby realizing the narrow border design of the display panel 10 and improving the user's sensory experience.

[0089] In the description of this specification, the description with reference to the terms "one embodiment", "certain embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0090] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A display panel, characterized in that: It includes a display area and a frame area arranged around the display area, the display area includes a plurality of pixel light-emitting units arranged in an array, the display area includes a placement area and a transition area, the placement area is adjacent to the frame area, the display panel also includes a gate drive circuit located in the placement area and a plurality of first pixel circuits located in the transition area, each of the first pixel circuits connects at least two of the pixel light-emitting units in the placement area and / or the transition area, the pixel light-emitting unit overlapping with the gate drive circuit has no overlap with the first pixel circuit, and the gate drive circuit is used to drive each of the first pixel circuits to control the corresponding at least two pixel light-emitting units to emit light.

2. The display panel according to claim 1, wherein: The display area also includes a normal display area, which is provided with a plurality of second pixel circuits, each of which is connected to a pixel light-emitting unit in the normal display area, and the gate driving circuit is also used to drive each of the second pixel circuits to control a pixel light-emitting unit to emit light.

3. The display panel according to claim 2, wherein: The display panel includes a substrate, an anode layer, a light-emitting layer and a cathode layer arranged in sequence, the anode layer, the light-emitting layer and the cathode layer together form the pixel light-emitting unit, and the gate drive circuit, the first pixel circuit and the second pixel circuit are respectively formed in the placement area, the transition area and the normal display area between the substrate and the anode layer.

4. The display panel according to claim 3, wherein: Each group of the gate driving circuits corresponds to a row of multiple pixel light-emitting units in the placement area, each of the first pixel circuits corresponds to a pixel light-emitting unit in the transition area, and each of the second pixel circuits corresponds to a pixel light-emitting unit in the normal display area.

5. The display panel according to claim 3, wherein: The normal display area includes a cathode switching area and a metal layer formed on the substrate, the cathode layer and the anode layer are connected in the cathode switching area, and the metal layer is connected to the anode layer.

6. The display panel according to claim 1, wherein: The display panel includes a plurality of pixel switching lines connected to the first pixel circuit, and one pixel switching line connects at least two of the pixel light emitting units in the transition area and / or the placement area.

7. The display panel according to claim 1, wherein: The placement area and the transition area are arranged along a column direction, and the first pixel circuit controls at least two of the pixel light-emitting units in the corresponding column direction to emit light.

8. The display panel according to claim 1, wherein: The placement area and the transition area are arranged along a row direction, and the first pixel circuit controls at least two of the pixel light-emitting units in the corresponding row direction to emit light.

9. The display panel according to claim 1, wherein: The width of the placement area ranges from 200 to 1000 microns.

10. The display panel according to claim 1, wherein: The width of the border area ranges from 150 to 200 microns.

11. The display panel according to claim 10, wherein: The frame area is provided with isolation columns, and the isolation columns isolate the light-emitting layer between the display area and the frame area.

12. The display panel according to claim 11, wherein: The frame area further includes a dam portion, the isolation column includes an outer isolation column and an inner isolation column, the dam portion is located in the interval between the outer isolation column and the inner isolation column, and the isolation column and the dam portion together form a packaging unit.

13. The display panel according to claim 12, wherein: The isolation column is made of titanium metal material, and the dam is made of organic non-metallic material.

14. The display panel according to claim 2, wherein: The display panel further includes data lines, and the data lines provide data signals to the first pixel circuit and the second pixel circuit along a column direction.

15. A display device, characterized in that: Comprising the display panel as described in any one of claims 1 to 14.

16. A method for manufacturing a display panel, characterized in that: The production method comprises: Providing a substrate, the substrate comprising a display area and a frame area arranged around the display area, the display area comprising a placement area and a transition area, the placement area being adjacent to the frame area; forming a first pixel circuit in the transition area of ​​the substrate and forming a gate driving circuit connected to the first pixel circuit in the placement area; A plurality of pixel light-emitting units arranged in an array are formed on the substrate, the plurality of pixel light-emitting units are located in the display area and each of the first pixel circuits is connected to at least two pixel light-emitting units in the placement area and / or the transition area, and the pixel light-emitting unit overlapping with the gate drive circuit has no overlap with the first pixel circuit.

17. The method of claim 16, wherein: The display area includes a normal display area, and the manufacturing method further includes: A second pixel circuit is formed in the normal display area of ​​the substrate, and each of the second pixel circuits is connected to one of the pixel light emitting units in the normal display area.

18. The method of claim 17, wherein: The production method comprises: forming a metal layer in the normal display area of ​​the substrate; A cathode switching area where the anode layer and the cathode layer are connected is formed on the substrate, the cathode switching area is located in the normal display area and the anode layer is connected to the metal layer.

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