A display substrate and its manufacturing method, control method and display device

By introducing a control method of photoelectric sensing circuit and driver chip into the display substrate, the problem of degradation of pixel circuits and light emitting structures is solved, and a longer service life and better display effect are achieved.

CN113345946BActive Publication Date: 2025-02-14BOE TECHNOLOGY GROUP CO LTD
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Patent Information

Application Number
CN202110602405.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-05-31
Publication Date
2025-02-14
Estimated Expiration
2041-05-31

AI Technical Summary

Technical Problem

During the use of existing display substrates, the pixel circuit and light emitting structure are prone to deterioration, resulting in short life of the display product and poor display effect.

Method used

A display substrate is designed, including a substrate, a driving chip, a driving structure layer and a light emitting structure layer. The light emitting structure layer includes a plurality of light emitting structures, and the driving structure layer includes a plurality of pixel circuits and a photoelectric sensing circuit. The light emitted from the backlight side of the light emitting structure is received through the photoelectric sensing circuit, converted into an electrical signal, and transmitted to the driving chip for controlling the driving signal provided by the pixel circuit.

Benefits of technology

Through real-time optical compensation, the life of the display substrate is extended and the display effect is improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display substrate and a manufacturing method, a control method and a display device thereof, wherein the display substrate comprises: a substrate, a driving chip, a driving structure layer and a light-emitting structure layer; the light-emitting structure layer comprises: a plurality of light-emitting structures, and the driving structure layer comprises: a plurality of pixel circuits and a plurality of photoelectric sensor circuits; the orthographic projection of the light-emitting structure on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate; the pixel circuit is configured to drive the corresponding light-emitting structure to emit light according to a driving signal; the photoelectric sensor circuit is configured to receive light emitted from the backlight side of the corresponding light-emitting structure, convert the optical signal of the emitted light into an electrical signal, and transmit the electrical signal to the driving chip; the driving chip is configured to control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensor circuit.
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Description

Technical Field

[0001] The embodiments of the present disclosure relate to, but are not limited to, the field of display technology, and specifically relate to a display substrate and a manufacturing method thereof, a control method, and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) and Quantum-dot Light Emitting Diode (QLED) are active light-emitting display devices with the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, extremely high response speed, light weight, flexibility and low cost.

[0003] With the continuous development of display technology, flexible display devices (Flexible Display) with OLED or QLED as the light-emitting structure and signal control by thin film transistors (Thin Film Transistor, referred to as TFT) have become the mainstream products in the current display field. Summary of the invention

[0004] The following is a summary of the subject matter of the detailed description of the present disclosure. This summary is not intended to limit the scope of the claims.

[0005] In a first aspect, the present disclosure provides a display substrate, comprising: a substrate, a driving chip, and a driving structure layer and a light-emitting structure layer sequentially stacked on the substrate; the light-emitting structure layer comprises: a plurality of light-emitting structures, the driving structure layer comprises: a plurality of pixel circuits and a plurality of photoelectric sensor circuits; the light-emitting structure layer comprises a backlight side and a light-emitting side arranged opposite to each other, the light-emitting side being a side of the light-emitting structure layer away from the substrate; at least one pixel circuit corresponds to at least one light-emitting structure in a one-to-one manner, and at least one photoelectric sensor circuit corresponds to at least one light-emitting structure in a one-to-one manner;

[0006] The orthographic projection of the light emitting structure on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate;

[0007] The pixel circuit is electrically connected to the corresponding light-emitting structure and is configured to drive the corresponding light-emitting structure to emit light according to a driving signal;

[0008] The photoelectric sensor circuit is configured to receive light emitted from the backlight side of the corresponding light-emitting structure, convert the optical signal of the emitted light into an electrical signal, and transmit the electrical signal to the driving chip;

[0009] The driving chip is electrically connected to a plurality of photoelectric sensor circuits and a plurality of pixel circuits respectively, and is configured to control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensor circuit.

[0010] In some possible implementations, the photoelectric sensing circuit includes: a control transistor and a photoelectric sensor;

[0011] The photoelectric sensor is electrically connected to the power line and is configured to convert the optical signal of the light emitted from the backlight side of the corresponding light-emitting structure into an electrical signal;

[0012] The control electrode of the control transistor is electrically connected to the control signal line, the first electrode of the control transistor is electrically connected to the photoelectric sensor, the second electrode of the control transistor is electrically connected to the signal output line, and the control transistor is configured to provide the signal output line with an electrical signal converted by the photoelectric sensor under the control of the control signal line;

[0013] The signal output line is electrically connected to the driving chip.

[0014] In some possible implementations, the photosensor is a PIN photodiode.

[0015] In some possible implementations, the photoelectric sensor includes: a first electrode, a photoelectric conversion layer, and a second electrode stacked in sequence;

[0016] The orthographic projection of the first electrode on the substrate and the orthographic projection of the photoelectric conversion layer on the substrate at least partially overlap, and the orthographic projection of the second electrode on the substrate and the orthographic projection of the photoelectric conversion layer on the substrate at least partially overlap.

[0017] In some possible implementations, the first electrode and the first electrode of the control transistor are the same electrode.

[0018] In some possible implementations, the first electrode is a reflective electrode, and the second electrode is a transparent electrode;

[0019] The photoelectric conversion layer is made of amorphous silicon.

[0020] In some possible implementations, the light emitting structure layer includes: a pixel definition layer, a third electrode layer, a light emitting layer and a fourth electrode layer; the third electrode layer includes: a plurality of anodes, the light emitting layer includes: at least one organic light emitting layer, and the fourth electrode layer includes: at least one cathode; each light emitting structure includes: an anode, an organic light emitting layer and a cathode;

[0021] In each light-emitting structure, the anode is located on a side of the organic light-emitting layer close to the substrate, and the cathode is located on a side of the organic light-emitting layer away from the substrate;

[0022] The orthographic projection of the organic light-emitting layer on the substrate at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate, and the orthographic projection of the cathode on the substrate at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate.

[0023] In some possible implementations, for each light-emitting structure, the anode includes: a first anode and a second anode sequentially stacked on a substrate;

[0024] The orthographic projection of the first anode on the substrate covers the orthographic projection of the second anode on the substrate, and the orthographic projection of the first anode on the substrate partially overlaps with the orthographic projection of the photosensor on the substrate;

[0025] The first area and the second area partially overlap; the first area is the overlapping area of ​​the orthographic projection of the first anode on the substrate and the orthographic projection of the photoelectric sensor on the substrate, and the second area is the area where the second anode on the substrate and the orthographic projection of the photoelectric sensor on the substrate do not overlap.

[0026] In some possible implementations, the orthographic projection of the second anode on the substrate partially overlaps with the orthographic projection of the photoelectric sensor on the substrate, or the orthographic projection of the second anode on the substrate does not overlap with the orthographic projection of the photoelectric sensor on the substrate.

[0027] In some possible implementations, the first anode is a transparent electrode, and the second anode is a reflective electrode.

[0028] In some possible implementations, when the orthographic projection of the second anode on the substrate partially overlaps with the orthographic projection of the photosensor on the substrate, the second anode includes: a transmissive via exposing the first anode;

[0029] The orthographic projection of the photosensor on the substrate covers the orthographic projection of the transmission via on the substrate.

[0030] In some possible implementations, the second anode includes: a first sub-electrode and a second sub-electrode stacked in sequence;

[0031] The orthographic projection of the first sub-electrode on the substrate coincides with the orthographic projection of the second sub-electrode on the substrate.

[0032] In some possible implementations, the first sub-electrode is a reflective electrode, and the second sub-electrode is a transparent electrode.

[0033] In some possible implementations, the power line and the first anode are disposed in the same layer.

[0034] In a second aspect, the present disclosure further provides a display device, comprising: the above-mentioned display substrate.

[0035] In a third aspect, the present disclosure further provides a method for manufacturing a display substrate, which is provided as the above-mentioned display substrate, and the method comprises:

[0036] Providing a substrate and a driver chip;

[0037] A driving structure layer is formed on the substrate; the driving structure layer includes: a plurality of pixel circuits and a plurality of photoelectric sensor circuits, and at least one pixel circuit corresponds to at least one light-emitting structure;

[0038] A light-emitting structure layer is formed on the driving structure layer, wherein the light-emitting structure layer comprises: a plurality of light-emitting structures, at least one photoelectric sensor circuit corresponds to at least one light-emitting structure in a one-to-one manner, the light-emitting structure layer comprises a backlight side and a light-emitting side which are arranged opposite to each other, the light-emitting side is a side of the light-emitting structure layer away from the substrate, and the orthographic projection of the light-emitting structure on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate;

[0039] Among them, the pixel circuit is electrically connected to the corresponding light-emitting structure, and is configured to drive the corresponding light-emitting structure to emit light according to a driving signal; the photoelectric sensor circuit is configured to receive light emitted from the backlight side of the corresponding light-emitting structure, convert the optical signal of the emitted light into an electrical signal, and transmit the electrical signal to the driving chip; the driving chip is electrically connected to multiple photoelectric sensor circuits and multiple pixel circuits, respectively, and is configured to control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensor circuit.

[0040] In some possible implementations, the pixel circuit includes a driving transistor, and forming a driving structure layer on the substrate includes:

[0041] An active layer is formed on a substrate; the active layer comprises: an active layer of a control transistor;

[0042] A first insulating layer and a first metal layer are sequentially formed on the active layer; the first metal layer comprises: a control electrode of a control transistor and a control signal line;

[0043] A second insulating layer and a second metal layer are sequentially formed on the first metal layer; the second metal layer comprises: a first electrode and a second electrode of a control transistor and a signal output line;

[0044] A sensing layer is formed on the second metal layer; the sensing layer comprises: a photoelectric conversion layer;

[0045] A transparent conductive layer is formed on the sensing layer; the transparent conductive layer comprises: a second electrode;

[0046] forming a third insulating layer and a planarizing layer in sequence on the transparent conductive layer;

[0047] The sequentially forming a second insulating layer and a second metal layer on the first metal layer comprises:

[0048] forming a second insulating layer on the first metal layer;

[0049] The first electrode and the second electrode of the driving transistor and the first electrode and the second electrode of the control transistor are formed on the second insulating layer by the same process, wherein the first electrode of the control transistor is reused as the first electrode of the photoelectric sensor.

[0050] In a fourth aspect, the present disclosure further provides a method for controlling a display substrate, which is configured to control the display substrate, the method comprising:

[0051] Receiving electrical signals transmitted by a photoelectric sensing circuit;

[0052] According to the electrical signal transmitted by the photoelectric sensing circuit, the driving signal provided to the corresponding pixel circuit is controlled.

[0053] Other aspects will be apparent upon reading and understanding the drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The accompanying drawings are used to provide an understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation on the technical solution of the present disclosure.

[0055] Figure 1 It is a structural schematic diagram of a display substrate;

[0056] Figure 2 It is a schematic diagram of a planar structure of a display substrate;

[0057] Figure 3 A schematic diagram of the structure of a display substrate provided in an embodiment of the present disclosure;

[0058] Figure 4 is a schematic diagram of an equivalent circuit of a pixel circuit;

[0059] Figure 5 A schematic diagram of a photoelectric sensor circuit provided by an exemplary embodiment;

[0060] Figure 6 A top view of a display substrate provided for an exemplary embodiment;

[0061] Figure 7 for Figure 6 Cross-section along AA direction;

[0062] Figure 8 A top view of a display substrate provided for another exemplary embodiment;

[0063] Fig. 9 for Figure 8 Cross-section along AA direction;

[0064] Fig.10 A schematic structural diagram of a first electrode provided as an exemplary embodiment;

[0065] Fig.11 A top view of an active layer provided for an exemplary embodiment;

[0066] Fig.12 A top view of a first metal layer is provided for an exemplary embodiment;

[0067] Fig.13 A top view of a second metal layer is provided for an exemplary embodiment;

[0068] Fig.14 A top view of a sensing layer provided for an exemplary embodiment;

[0069] Fig.15 A top view of a transparent conductive layer provided for an exemplary embodiment;

[0070] Fig.16A is a schematic diagram after forming an active layer;

[0071] Fig. 16B for Fig.16A Cross-section along AA direction;

[0072] Fig.17A is a schematic diagram after forming the first metal layer;

[0073] Fig. 17B for Fig.17A Cross-section along AA direction;

[0074] Fig.18A is a schematic diagram after forming a second insulating layer;

[0075] Fig.18B for Fig.18A Cross-section along AA direction;

[0076] Fig.19A is a schematic diagram after forming the second metal layer;

[0077] Fig.19B for Fig.19A Cross-section along AA direction;

[0078] Fig. 20A is a schematic diagram after forming the sensing layer;

[0079] Fig. 20B for Fig. 20A Cross-section along AA direction;

[0080] Fig.21A is a schematic diagram after forming a transparent conductive layer;

[0081] Fig. 21B for Fig.21A Cross-section along AA direction;

[0082] Fig.22A It is a schematic diagram after the flat layer is formed;

[0083] Fig. 22B for Fig.22A Cross-section along AA direction;

[0084] Fig.23A is a schematic diagram after forming the first anode;

[0085] Fig. 23B for Fig.23A Cross-section along AA direction;

[0086] Fig.24 Schematic diagram of the second anode after formation Figure 1 ;

[0087] Fig.25A Schematic diagram of the second anode after formation Figure 2 ;

[0088] Fig.25B for Fig.25A Cross-section along AA. DETAILED DESCRIPTION

[0089] The present disclosure describes multiple embodiments, but the description is exemplary rather than restrictive, and it will be apparent to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present disclosure. Although many possible feature combinations are shown in the drawings and discussed in the specific embodiments, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.

[0090] The present disclosure includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features, and elements disclosed in the present disclosure may also be combined with any conventional features or elements to form a technical solution defined by the claims. Any features or elements of any embodiment may also be combined with features or elements from other technical solutions to form another technical solution defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in the present disclosure may be implemented individually or in any appropriate combination. Therefore, the embodiments are not subject to other restrictions except for the restrictions made according to the attached claims and their equivalents. In addition, various modifications and changes may be made within the scope of protection of the attached claims.

[0091] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0092] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the embodiments of the present disclosure will be described in detail in conjunction with the accompanying drawings hereinafter. Note that the embodiments can be implemented in a number of different forms. A person of ordinary skill in the relevant technical field can easily understand the fact that the methods and contents can be transformed into various forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. In the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits the detailed description of some known functions and known components. The drawings of the embodiments of the present disclosure only involve the structures involved in the embodiments of the present disclosure, and other structures can refer to the general design.

[0093] In the drawings, the size of each component, the thickness of a layer, or the area is sometimes exaggerated for the sake of clarity. Therefore, one embodiment of the present disclosure is not necessarily limited to this size, and the shape and size of each component in the drawings do not reflect the true proportion. In addition, the drawings schematically show ideal examples, and one embodiment of the present disclosure is not limited to the shapes or values ​​shown in the drawings.

[0094] In the present specification, ordinal numbers such as “first”, “second” and “third” are provided to avoid confusion among constituent elements, and are not intended to limit the number.

[0095] In this specification, for the sake of convenience, the words and phrases indicating the orientation or positional relationship, such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which each constituent element is described. Therefore, it is not limited to the words and phrases described in the specification, and can be appropriately replaced according to the situation.

[0096] In this specification, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this disclosure can be understood according to specific circumstances.

[0097] In this specification, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to a region where current mainly flows.

[0098] In this specification, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors with opposite polarities or when the direction of current changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in this specification, the "source electrode" and the "drain electrode" may be interchanged.

[0099] In this specification, "electrical connection" includes the case where components are connected together through an element having some electrical function. There is no particular limitation on the "element having some electrical function" as long as it can transmit and receive electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0100] In this specification, "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced by "conductive film". Similarly, "insulating film" may be replaced by "insulating layer".

[0101] The term "about" in the present disclosure refers to a numerical value that is not strictly limited to allow for process and measurement errors.

[0102] A display substrate includes a plurality of sub-pixels distributed in an array, and at least one sub-pixel includes a coupled pixel circuit and a light-emitting structure. When the display substrate is displaying, the pixel circuit provides a driving current to the corresponding light-emitting structure to drive the light-emitting structure to emit light of a corresponding color. Since the pixel circuit and the light-emitting structure will degrade during the use of the display substrate, not only the life of the display product is shortened, but also the display effect of the display product is affected.

[0103] Figure 1 Schematic diagram of the structure of a display substrate. Figure 1 As shown, the display substrate may include a timing controller, a data signal driver, a scan signal driver, a light emitting signal driver and a pixel array, and the pixel array may include a plurality of scan signal lines (S1 to Sm), a plurality of data signal lines (D1 to Dn), a plurality of light emitting signal lines (E1 to Eo) and a plurality of sub-pixels Pxij.

[0104] In an exemplary embodiment, the timing controller may provide a grayscale value and a control signal suitable for the specifications of the data signal driver to the data signal driver, a clock signal, a scan start signal, etc. suitable for the specifications of the scan signal driver to the scan signal driver, and a clock signal, an emission stop signal, etc. suitable for the specifications of the light emitting signal driver to the light emitting signal driver. The data signal driver may generate a data voltage to be provided to the data signal lines D1, D2, D3, ... and Dn using the grayscale value and the control signal received from the timing controller. For example, the data signal driver may sample the grayscale value using the clock signal, and apply the data voltage corresponding to the grayscale value to the data signal lines D1 to Dn in units of pixel rows, where n may be a natural number. The scan signal driver may generate a scan signal to be provided to the scan signal lines S1, S2, S3, ... and Sm by receiving a clock signal, a scan start signal, etc. from the timing controller. For example, the scan signal driver may sequentially provide a scan signal having an on-level pulse to the scan signal lines S1 to Sm. For example, the scan signal driver may be constructed in the form of a shift register, and may generate a scan signal in a manner that a scan start signal provided in the form of a conduction level pulse is sequentially transmitted to the next level circuit under the control of a clock signal, and m may be a natural number. The luminous signal driver may generate an emission signal to be provided to the luminous signal lines E1, E2, E3, ... and Eo by receiving a clock signal, an emission stop signal, etc. from a timing controller. For example, the luminous signal driver may sequentially provide an emission signal with a cut-off level pulse to the luminous signal lines E1 to Eo. For example, the luminous signal driver may be constructed in the form of a shift register, and may generate a luminous signal in a manner that a luminous stop signal provided in the form of a cut-off level pulse is sequentially transmitted to the next level circuit under the control of a clock signal, and o may be a natural number. The pixel array may include a plurality of sub-pixels Pxij. Each sub-pixel Pxij may be connected to a corresponding data signal line, a corresponding scan signal line, and a corresponding luminous signal line, and i and j may be natural numbers. The sub-pixel Pxij may refer to a sub-pixel in which a transistor is connected to the i-th scan signal line and to the j-th data signal line.

[0105] Figure 2 FIG. 1 is a schematic diagram of a planar structure of a display substrate. Figure 2As shown, the display substrate may include a plurality of pixel units P arranged in a matrix, at least one of the plurality of pixel units P includes a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light, and the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 each include a pixel circuit and a light-emitting structure. The pixel circuits in the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 are respectively connected to the scan signal line, the data signal line, and the light-emitting signal line, and the pixel circuit is configured to receive the data voltage transmitted by the data signal line under the control of the scan signal line and the light-emitting signal line, and output a corresponding current to the light-emitting structure. The light-emitting structures in the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 are respectively connected to the pixel circuits of the sub-pixels in which they are located, and the light-emitting structures are configured to emit light of corresponding brightness in response to the current output by the pixel circuit of the sub-pixel in which they are located.

[0106] In an exemplary embodiment, the pixel unit P may include a red (R) sub-pixel, a green (G) sub-pixel, and a blue (B) sub-pixel, or may include a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel, which is not limited in the present disclosure. In an exemplary embodiment, the shape of the sub-pixel in the pixel unit may be rectangular, rhombus, pentagonal, or hexagonal. When the pixel unit includes three sub-pixels, the three sub-pixels may be arranged horizontally in parallel, vertically in parallel, or in a herringbone manner. When the pixel unit includes four sub-pixels, the four sub-pixels may be arranged horizontally in parallel, vertically in parallel, or in a square manner, which is not limited in the present disclosure.

[0107] In an exemplary embodiment, the pixel unit may emit white light, and in this case, the pixel unit may include: WOLED. When the pixel unit includes WOLED, the display substrate realizes full colorization through a color filter.

[0108] Figure 3 Schematic diagram of the structure of the display substrate provided by the embodiment of the present disclosure. Figure 3 As shown, on a plane perpendicular to the display substrate, the display substrate may include: a substrate 10, a driving chip (not shown in the figure), and a driving structure layer 20 and a light emitting structure layer 30 sequentially stacked on the substrate 10. The light emitting structure layer 30 includes: a plurality of light emitting structures 300, the driving structure layer 20 includes: a plurality of pixel circuits 210 and a plurality of photoelectric sensor circuits 220, and the light emitting structure layer 30 includes a backlight side and a light emitting side that are arranged oppositely, and the light emitting side is a side of the light emitting structure layer 10 away from the substrate 10.

[0109] like Figure 3As shown, at least one pixel circuit corresponds to at least one light emitting structure, and at least one photoelectric sensor circuit corresponds to at least one light emitting structure. The orthographic projection of the light emitting structure 300 on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit 210 on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit 220 on the substrate.

[0110] The pixel circuit is electrically connected to the corresponding light-emitting structure and is configured to drive the corresponding light-emitting structure to emit light according to a driving signal; the photoelectric sensor circuit is configured to receive light emitted from the backlight side of the corresponding light-emitting structure, convert the optical signal of the emitted light into an electrical signal, and transmit the electrical signal to the driving chip; the driving chip is electrically connected to multiple photoelectric sensor circuits and multiple pixel circuits, respectively, and is configured to control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensor circuit.

[0111] In an exemplary embodiment, the side of the light emitting structure layer 30 away from the substrate 10 is the light emitting side, that is, the display substrate in the present disclosure is a top emission display substrate. Exemplarily, the display substrate can be an OLED display substrate, a QLED display substrate or a WOLED display substrate.

[0112] In an exemplary embodiment, the substrate 10 may be a rigid substrate or a flexible substrate, wherein the rigid substrate may be, but is not limited to, one or more of glass and metal foil; the flexible substrate may be, but is not limited to, one or more of polyethylene terephthalate, polyethylene terephthalate, polyetheretherketone, polystyrene, polycarbonate, polyarylate, polyarylate, polyimide, polyvinyl chloride, polyethylene, and textile fiber.

[0113] In an exemplary embodiment, the display substrate may include other film layers, such as spacers and columns, etc., which is not limited in the present disclosure.

[0114] In an exemplary embodiment, Figure 3 As shown, the display substrate may include: sub-pixels P arranged in an array. At least one sub-pixel includes: a pixel circuit, a light-emitting structure corresponding to the pixel circuit, and a photoelectric sensor circuit corresponding to the light-emitting structure. The correspondence between the pixel circuit and the light-emitting structure means that the pixel circuit and the light-emitting structure are located in the same sub-pixel and are electrically connected to each other, and the pixel circuit drives the corresponding light-emitting structure to emit light. The correspondence between the photoelectric sensor circuit and the light-emitting structure means that the light-emitting structure and the photoelectric sensor circuit are located in the same sub-pixel, and the photoelectric sensor circuit receives light emitted from the backlight side of the corresponding light-emitting structure.

[0115] In an exemplary embodiment, the orthographic projection of the light emitting structure 300 on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit 210 on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit 220 on the substrate, which can reduce the width of the display substrate.

[0116] In an exemplary embodiment, a pixel circuit may include a plurality of transistors and a storage capacitor constituting the pixel circuit.

[0117] In an exemplary embodiment, the pixel circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C or 7T1C structure. Figure 4 is a schematic diagram of an equivalent circuit of a pixel circuit. Figure 4 As shown, the pixel circuit is a 3T1C structure. The pixel circuit may include three transistors (a first transistor T1, a second transistor T2, and a third transistor T3), a storage capacitor CST, and six signal lines (a data signal line Dn, a first scanning signal line Gn, a second scanning signal line Sn, a compensation signal line Se, a first power line VDD, and a second power line VSS).

[0118] In an exemplary embodiment, the first transistor T1 is a switch transistor, the second transistor T2 is a driving transistor, and the third transistor T3 is a compensation transistor. The control electrode of the first transistor T1 is coupled to the first scan signal line Gn, the first electrode of the first transistor T1 is coupled to the data signal line Dn, the second electrode of the first transistor T1 is coupled to the control electrode of the second transistor T2, and the first transistor T1 is used to receive the data signal transmitted by the data signal line Dn under the control of the first scan signal line Gn, so that the control electrode of the second transistor T2 receives the data signal. The control electrode of the second transistor T2 is coupled to the second electrode of the first transistor T1, the first electrode of the second transistor T2 is coupled to the first power line VDD, the second electrode of the second transistor T2 is coupled to the first electrode of the light-emitting structure L, and the second transistor T2 is used to generate a corresponding current at the second electrode under the control of the data signal received by its control electrode. The control electrode of the third transistor T3 is coupled to the second scanning signal line Sn, the first electrode of the third transistor T3 is coupled to the compensation signal line Se, the second electrode of the third transistor T3 is coupled to the second electrode of the second transistor T2, and the third transistor T3 is used to extract the threshold voltage Vth and mobility of the second transistor T2 in response to the compensation timing to compensate for the threshold voltage Vth. The first electrode of the light-emitting structure L is coupled to the second electrode of the second transistor T2, the second electrode of the light-emitting structure L is coupled to the second power line VSS, and the light-emitting element L is used to respond to the current of the second electrode of the second transistor T2 and emit light of corresponding brightness. The first electrode plate C1 of the storage capacitor CST is coupled to the second electrode of the second transistor T2, the second electrode plate C2 of the storage capacitor CST is coupled to the control electrode of the second transistor T2, and the storage capacitor CST is used to store the potential of the signal of the control electrode of the second transistor T2.

[0119] In an exemplary embodiment, the first power line VDD continuously provides a high level signal, and the second power line VSS continuously provides a low level signal.

[0120] In an exemplary embodiment, the first transistor T1 to the third transistor T3 may be P-type transistors or N-type transistors. Using the same type of transistors in the pixel circuit can simplify the process flow, reduce the process difficulty of the display substrate, and improve the product yield.

[0121] In an exemplary embodiment, the first transistor T1 to the third transistor T3 may be low-temperature polysilicon thin film transistors, or may be oxide thin film transistors, or may be low-temperature polysilicon thin film transistors and oxide thin film transistors. The active layer of the low-temperature polysilicon thin film transistor is low-temperature polysilicon (LTPS for short), and the active layer of the oxide thin film transistor is oxide. The low-temperature polysilicon thin film transistor has the advantages of high mobility and fast charging, and the oxide thin film transistor has the advantages of low leakage current.

[0122] In an exemplary embodiment, low-temperature polysilicon thin-film transistors and oxide thin-film transistors can be integrated on a display substrate to form a low-temperature polycrystalline oxide (LTPO) display substrate, which can take advantage of the advantages of both to achieve high resolution (Pixel Per Inch, PPI), low-frequency driving, reduce power consumption, and improve display quality.

[0123] In an exemplary embodiment, the first scan signal line Gn and the second scan signal line Sn extend in a horizontal direction, and the first power line VDD, the second power line VSS, the data signal line D and the compensation signal line Se extend in a vertical direction.

[0124] In an exemplary embodiment, the light emitting structure may be an OLED, or may be a QLED, or may be a white organic light emitting diode.

[0125] The display substrate provided by the embodiment of the present disclosure includes: a substrate, a driving chip, and a driving structure layer and a light-emitting structure layer stacked on the substrate in sequence; the light-emitting structure layer includes: a plurality of light-emitting structures, and the driving structure layer includes: a plurality of pixel circuits and a plurality of photoelectric sensor circuits; the light-emitting structure layer includes a light-emitting side and a backlight side arranged opposite to each other, and the light-emitting side is a side of the light-emitting structure layer away from the substrate; at least one pixel circuit corresponds to at least one light-emitting structure one-to-one, and at least one photoelectric sensor circuit corresponds to at least one light-emitting structure one-to-one; the orthographic projection of the light-emitting structure on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate; the pixel circuit is electrically connected to the corresponding light-emitting structure and is configured to drive the corresponding light-emitting structure to emit light according to a driving signal; the photoelectric sensor circuit is configured to receive light emitted from the backlight side of the corresponding light-emitting structure, convert the light signal of the emitted light into an electrical signal, and transmit the electrical signal to the driving chip; the driving chip is electrically connected to the plurality of photoelectric sensor circuits and the plurality of pixel circuits, respectively, and is configured to control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensor circuit. The driver chip in the embodiment of the present disclosure controls the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensing circuit, thereby performing real-time optical compensation for the light-emitting structure, extending the life of the display substrate, and improving the display effect of the display substrate.

[0126] Figure 5 A schematic diagram of a photoelectric sensor circuit provided by an exemplary embodiment. Figure 6 A top view of a display substrate provided by an exemplary embodiment, Figure 7 for Figure 6 The cross-section along the AA direction is Figure 8 A top view of a display substrate provided for another exemplary embodiment, Fig. 9 for Figure 8 The cross-section along the AA direction. Figures 5 to 9 As shown, an exemplary embodiment provides a photoelectric sensing circuit in a display substrate, which may include: a control transistor M and a photoelectric sensor LP. The photoelectric sensor LP is electrically connected to a power line V, and is configured to convert a light signal of light emitted from the backlight side of the corresponding light-emitting structure into an electrical signal. The control transistor M is electrically connected to a control signal line G, the photoelectric sensor LP, and a signal output line OUT, respectively, and is configured to provide the electrical signal converted by the photoelectric sensor LP to the signal output line OUT under the control of the control signal line G.

[0127] like Figures 5 to 9As shown, in an exemplary embodiment, the control transistor M may include: an active layer 211, a control electrode 212, a first electrode 213, and a second electrode 214. The control electrode 212 of the control transistor M is electrically connected to the control signal line G, the first electrode 213 of the control transistor M is electrically connected to the photosensor LP, and the second electrode 214 of the control transistor M is electrically connected to the signal output line OUT.

[0128] In an exemplary embodiment, the second electrodes of the control transistors in the photoelectric sensing circuits in the sub-pixels in the same column may be connected to the same signal output line OUT.

[0129] In an exemplary embodiment, the active layer 211 of the control transistor M may be made of metal oxide, polysilicon or amorphous silicon. The active layer of the control transistor may be made of metal oxide to reduce leakage current of the control transistor and improve the display effect of the display substrate.

[0130] In an exemplary embodiment, the active layer of the control transistor M may be disposed in the same layer as the active layer of the driving transistor and may be formed by the same process.

[0131] In an exemplary embodiment, the control transistor may be a bottom gate structure, or may be a top gate structure, which is not limited in the present disclosure. Figure 7 and Fig. 9 The description is made by taking the control transistor as a top-gate structure as an example.

[0132] In an exemplary embodiment, the control transistor M may be a P-type transistor, or may be an N-type transistor.

[0133] In an exemplary embodiment, the signal output line OUT may be electrically connected to the driving chip.

[0134] In an exemplary embodiment, the power line V can continuously provide a regulated voltage signal.

[0135] In an exemplary embodiment, the photosensor LP may be a PIN photodiode, or other devices capable of realizing photoelectric conversion.

[0136] In an exemplary embodiment, Figure 7 and Fig. 9 As shown, a photoelectric sensor in a display substrate provided by an exemplary embodiment may include: a first electrode 221, a photoelectric conversion layer 222, and a second electrode 223 stacked in sequence.

[0137] like Figure 7 and 9As shown, in an exemplary embodiment, the first electrode 221 is the same electrode as the first electrode 213 of the control transistor. In the present disclosure, the first electrode is the same electrode as the first electrode of the control transistor, which can reduce the thickness of the display substrate.

[0138] In an exemplary embodiment, the first electrode 213 of the control transistor may be disposed in the same layer as the first electrode and the second electrode of the driving transistor in the pixel circuit, and may be formed by the same process.

[0139] In an exemplary embodiment, the orthographic projection of the first electrode 221 on the substrate 10 may at least partially overlap with the orthographic projection of the photoelectric conversion layer 222 on the substrate 10 , and the orthographic projection of the second electrode 223 on the substrate 10 may at least partially overlap with the orthographic projection of the photoelectric conversion layer 222 on the substrate 10 .

[0140] In an exemplary embodiment, the orthographic projection of the first electrode 221 on the substrate 10 may coincide with the orthographic projection of the photoelectric conversion layer 222 on the substrate 10 , or may cover the orthographic projection of the photoelectric conversion layer 222 on the substrate 10 . Figures 6 to 9 The description is made by taking an example that the orthographic projection of the first electrode 221 on the substrate can coincide with the orthographic projection of the photoelectric conversion layer 222 on the substrate 10 .

[0141] In an exemplary embodiment, the orthographic projection of the photoelectric conversion layer 222 on the substrate 10 may coincide with the orthographic projection of the second electrode 223 on the substrate, or may cover the orthographic projection of the second electrode 223 on the substrate. Figures 6 to 9 The description is made by taking the example that the orthographic projection of the photoelectric conversion layer 222 on the substrate 10 can coincide with the orthographic projection of the second electrode 223 on the substrate. When the orthographic projection of the photoelectric conversion layer 222 on the substrate 10 can coincide with the orthographic projection of the second electrode 223 on the substrate, the photoelectric conversion layer 222 and the second electrode 223 can be made using the same mask, which can reduce the manufacturing cost of the display substrate.

[0142] In the present disclosure, the orthographic projection of A on the substrate may not completely overlap with the orthographic projection of B on the substrate, and misalignment due to tolerance may be allowed.

[0143] In an exemplary embodiment, Fig.10 FIG. 1 is a schematic diagram of the structure of a first electrode provided by an exemplary embodiment. Fig.10 As shown, the first electrode 221 may include: a first connection electrode 221A and a second connection electrode 221B. The first connection electrode 221A is electrically connected to the active layer 211 of the control transistor and the second connection electrode 221B.

[0144] In an exemplary embodiment, the first connection electrode and the second connection electrode can be made of the same material using the same process. The first connection electrode and the second connection electrode can be made using the same process to simplify the manufacturing process of the display substrate.

[0145] In an exemplary embodiment, when the orthographic projection of the first electrode 221 on the substrate 10 covers the orthographic projection of the photoelectric conversion layer 222 on the substrate 10, the orthographic projection of the first connection electrode 221A on the substrate 10 at least partially overlaps with the orthographic projection of the active layer 211 of the control transistor on the substrate 10. The orthographic projection of the second connection electrode 221B on the substrate 10 has no overlapping area with the orthographic projection of the active layer 211 of the control transistor on the substrate 10, and covers the orthographic projection of the photoelectric conversion layer 222 on the substrate 10.

[0146] In an exemplary embodiment, the active layer of the control transistor is disposed in the same layer as the active layer of at least one transistor in the pixel circuit, which can simplify the manufacturing process of the display substrate.

[0147] In an exemplary embodiment, the control electrode of the control transistor is arranged in the same layer as the control electrode of at least one transistor in the pixel circuit. The control electrode of the control transistor is arranged in the same layer as the control electrode of at least one transistor in the pixel circuit, which can simplify the manufacturing process of the display substrate.

[0148] In an exemplary embodiment, the first electrode and the second electrode of the control transistor are arranged in the same layer as the first electrode and the second electrode of at least one transistor in the pixel circuit. The first electrode and the second electrode of the control transistor are arranged in the same layer as the first electrode and the second electrode of at least one transistor in the pixel circuit, which can simplify the manufacturing process of the display substrate.

[0149] In an exemplary embodiment, the first electrode may be a reflective electrode. The material of the first electrode may be a metal, such as silver or aluminum. The first electrode being a reflective electrode can improve the conversion efficiency and precision of the photoelectric conversion layer.

[0150] In an exemplary embodiment, the second electrode is a transparent electrode. The second electrode can be made of transparent conductive materials such as indium tin oxide and zinc tin oxide. The second electrode is a transparent electrode so that the light emitted from the backlight side of the corresponding light-emitting structure can enter the photoelectric conversion layer.

[0151] In an exemplary embodiment, the material of the photoelectric conversion layer 222 may include: amorphous silicon.

[0152] In an exemplary embodiment, the photoelectric conversion layer 222 may include: a first doped layer, an intrinsic layer, and a second doped layer, wherein the first doped layer, the intrinsic layer, and the second doped layer overlap with the orthographic projection of the first electrode.

[0153] In an exemplary embodiment, the first doped layer may be a P-type semiconductor layer, or may be an N-type semiconductor layer. Exemplarily, the thickness of the first doped layer may be about 200 angstroms to 700 angstroms.

[0154] In an exemplary embodiment, the second doped layer may be a P-type semiconductor layer, or may be an N-type semiconductor layer. Exemplarily, the thickness of the second doped layer may be about 200 angstroms to 700 angstroms. The first doped layer and the second doped layer have different doping types.

[0155] In an exemplary embodiment, the intrinsic layer may be an intrinsic amorphous silicon layer or an intrinsic germanium layer. Exemplarily, the thickness of the intrinsic layer may be about 5000 angstroms to 15000 angstroms. The doping concentration of the intrinsic layer is very low, so that the absorption coefficient of the intrinsic layer is very small, and the incident light can easily enter the interior of the material and generate a large number of electron-hole pairs after being fully absorbed, so that the photoelectric conversion efficiency is relatively high.

[0156] In this embodiment, the working principle of the PIN device is that the intrinsic layer is used to generate a large number of electron-hole pairs after absorbing incident light. Under the action of a strong electric field, the electrons in the intrinsic layer drift toward the N-type semiconductor layer and the holes drift toward the P-type semiconductor layer, thereby forming a photocurrent and converting the optical signal into an electrical signal.

[0157] like Figures 6 to 9 As shown, in an exemplary embodiment, the light emitting structure layer 30 may include: a pixel definition layer 34, a third electrode layer, a light emitting layer and a fourth electrode layer. The third electrode layer includes: a plurality of anodes 31, the light emitting layer includes: at least one organic light emitting layer 32, and the fourth electrode layer includes: at least one cathode 33. Each light emitting structure includes: an anode, an organic light emitting layer and a cathode.

[0158] In an exemplary embodiment, in each light-emitting structure, the anode 31 is located on a side of the organic light-emitting layer 32 close to the substrate 10, and the cathode 33 is located on a side of the organic light-emitting layer 32 away from the substrate 10. The anode is connected to the drain electrode of the driving transistor through a via, the organic light-emitting layer is connected to the anode, and the cathode is connected to the organic light-emitting layer. The organic light-emitting layer emits light of corresponding colors under the drive of the anode and the cathode.

[0159] In an exemplary embodiment, the orthographic projection of the organic light-emitting layer 32 on the substrate 10 at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate 10, and the orthographic projection of the cathode 33 on the substrate 10 at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate 10. The orthographic projection of the organic light-emitting layer 32 on the substrate 10 at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate 10, and the orthographic projection of the cathode 33 on the substrate 10 at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate 10, so that the light emitted by the light-emitting structure layer can be transmitted to the photoelectric sensor circuit.

[0160] In an exemplary embodiment, the organic light emitting layer 32 may include a stacked hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), an emitting layer (EML), a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL). In an exemplary embodiment, the hole injection layers of all sub-pixels may be a common layer connected together, the electron injection layers of all sub-pixels may be a common layer connected together, the hole transport layers of all sub-pixels may be a common layer connected together, the electron transport layers of all sub-pixels may be a common layer connected together, the hole blocking layers of all sub-pixels may be a common layer connected together, the emitting layers of adjacent sub-pixels may have a small overlap, or may be isolated, and the electron blocking layers of adjacent sub-pixels may have a small overlap, or may be isolated.

[0161] In an exemplary embodiment, the organic light-emitting layers of the plurality of light-emitting structures may be the same film layer. When the organic light-emitting layers of all the light-emitting structures are the same film layer, the orthographic projection of the organic light-emitting layer 32 on the substrate 10 covers the orthographic projection of the corresponding photoelectric sensor circuit on the substrate 10 .

[0162] In an exemplary embodiment, the cathodes of the plurality of light-emitting structures may be the same electrode. The cathode may be a planar electrode. When the cathodes of all the light-emitting structures are the same electrode, the positive projection of the cathode 33 on the substrate 10 covers the positive projection of the corresponding photoelectric sensor circuit on the substrate 10.

[0163] In an exemplary embodiment, the pixel definition layer 34 may be made of polyimide, acryl or polyethylene terephthalate.

[0164] like Figures 6 to 9 As shown, in an exemplary embodiment, for each light-emitting structure, the anode 31 may include: a first anode 310 and a second anode 320 stacked in sequence. The orthographic projection of the first anode 310 on the substrate 10 partially overlaps with the orthographic projection of the photosensor on the substrate 10, and the orthographic projection of the first anode 310 on the substrate 10 covers the orthographic projection of the second anode 320 on the substrate 10.

[0165] In an exemplary embodiment, the first region and the second region partially overlap, wherein the first region is an overlapping region where the orthographic projection of the first anode on the substrate overlaps with the orthographic projection of the photoelectric sensor on the substrate, and the second region is an area where the orthographic projection of the second anode on the substrate does not overlap with the orthographic projection of the photoelectric sensor on the substrate.

[0166] In an exemplary embodiment, the orthographic projection of the first anode 310 on the substrate 10 may at least partially overlap with the orthographic projection of the control transistor M in the corresponding photoelectric sensing circuit on the substrate 10, or there is no overlapping area between the orthographic projection of the first anode 310 on the substrate 10 and the orthographic projection of the control transistor M in the corresponding photoelectric sensing circuit on the substrate 10. When the orthographic projection of the first anode 310 on the substrate 10 at least partially overlaps with the orthographic projection of the control transistor M in the corresponding photoelectric sensing circuit on the substrate 10, the light-emitting area of ​​the light-emitting structure may be increased.

[0167] In an exemplary embodiment, the orthographic projection of the second anode 320 on the substrate 10 may at least partially overlap with the orthographic projection of the control transistor M in the corresponding photoelectric sensing circuit on the substrate 10, or, the orthographic projection of the second anode 320 on the substrate 10 and the orthographic projection of the control transistor M in the corresponding photoelectric sensing circuit on the substrate 10 do not have an overlapping area.

[0168] In an exemplary embodiment, the orthographic projection of the second anode 320 on the substrate 10 partially overlaps with the orthographic projection of the photosensor LP on the substrate, or the orthographic projection of the second anode 320 on the substrate does not overlap with the orthographic projection of the photosensor LP on the substrate. Figure 6 and Figure 7 The description is made by taking the example that the orthographic projection of the second anode 320 on the substrate 10 partially overlaps with the orthographic projection of the photosensor LP on the substrate. Figure 8 and Fig. 9 The description is made by taking the example that there is no overlapping area between the orthographic projection of the second anode 320 on the substrate and the orthographic projection of the photosensor LP on the substrate.

[0169] In an exemplary embodiment, the distance between the edge of the first anode near the signal output line OUT and the signal output line OUT may be less than or equal to the distance between the edge of the photosensor near the signal output line OUT and the signal output line OUT. Figure 6 and Figure 7 The description is made by taking the example that the distance between the edge of the first anode close to the signal output line OUT and the signal output line OUT is smaller than the distance between the edge of the photosensor close to the signal output line OUT and the signal output line OUT.

[0170] In an exemplary embodiment, the distance between the edge of the first anode 310 close to the signal output line OUT and the signal output line OUT may be greater than or equal to the distance between the edge of the second anode 320 close to the signal output line OUT and the signal output line OUT. Figure 6 and Figure 7 The description is made by taking the example that the distance between the edge of the first anode 310 close to the signal output line OUT and the signal output line OUT is greater than the distance between the edge of the second anode 320 close to the signal output line OUT and the signal output line OUT.

[0171] In an exemplary embodiment, Figure 6 As shown, the distance between the edge of the first anode 310 away from the signal output line OUT and the signal output line OUT may be greater than the distance between the edge of the second anode 320 close to the signal output line OUT and the signal output line OUT.

[0172] In an exemplary embodiment, the distance between the edge of the first anode 310 away from the signal output line OUT and the signal output line OUT may be less than or equal to the distance between the edge of the second anode 320 close to the signal output line OUT and the signal output line OUT. Figure 8 The description is made by taking the example that the distance between the edge of the first anode 310 away from the signal output line OUT and the signal output line OUT is smaller than the distance between the edge of the second anode 320 close to the signal output line OUT and the signal output line OUT.

[0173] In an exemplary embodiment, an orthographic projection of the first anode 310 on the substrate may partially overlap with an orthographic projection of the first scan signal line Gn on the substrate.

[0174] In an exemplary embodiment, an orthographic projection of the second anode 320 on the substrate may partially overlap with an orthographic projection of the first scan signal line Gn on the substrate.

[0175] In an exemplary embodiment, an orthographic projection of the first anode 310 on the substrate may partially overlap with an orthographic projection of the data signal line Dn on the substrate.

[0176] In an exemplary embodiment, an orthographic projection of the second anode 320 on the substrate may partially overlap with an orthographic projection of the data signal line Dn on the substrate.

[0177] In an exemplary embodiment, the orthographic projection of the first anode 310 on the substrate may not overlap with the orthographic projection of the control signal line G on the substrate.

[0178] In an exemplary embodiment, the orthographic projection of the second anode 320 on the substrate may not overlap with the orthographic projection of the control signal line G on the substrate.

[0179] In an exemplary embodiment, the first anode 310 may be a transparent electrode. The first anode being a transparent electrode can ensure that the light emitted from the backlight side of the light emitting structure can enter the photoelectric sensor to perform optical compensation on the display substrate.

[0180] In an exemplary embodiment, the second anode 320 may be a reflective electrode, which is made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may be a single-layer structure or a multi-layer composite structure, such as Mo / Cu / Mo, etc. The second anode is a reflective electrode to improve the light utilization rate in the display substrate.

[0181] In an exemplary embodiment, Figure 6 and Figure 7 As shown, when the orthographic projection of the second anode 320 on the substrate partially overlaps with the orthographic projection of the photosensor LP on the substrate, the second anode may further include: a transmission via VA exposing the first anode 310. The orthographic projection of the photosensor LP on the substrate 10 covers the orthographic projection of the transmission via VA on the substrate. At this time, the light emitted from the backlight side of the light-emitting structure may enter the photosensor through the transmission via VA.

[0182] In an exemplary embodiment, the second anode may include a via hole so that a surface of the anode away from the substrate has protrusions and grooves, that is, the surface of the anode away from the substrate is not flat.

[0183] In an exemplary embodiment, the second anode may be a single-layer structure or a multi-layer structure. When the second anode is a single-layer structure, the second anode is a reflective electrode, and the reflective electrode is made of silver, aluminum or other metal materials.

[0184] In an exemplary embodiment, when the second anode is a multi-layer structure, such as Figure 6 As shown, the second anode 320 includes: a first sub-electrode 321 and a second sub-electrode 322 stacked in sequence. The orthographic projection of the first sub-electrode 321 on the substrate coincides with the orthographic projection of the second sub-electrode 322 on the substrate.

[0185] In an exemplary embodiment, the first sub-electrode may be a reflective electrode, and the second sub-electrode may be a transparent electrode. The first sub-electrode being a reflective electrode can ensure the light extraction efficiency of the display substrate, and the second sub-electrode being a transparent electrode can ensure that the work function of the anode is adapted to the work function of the organic light-emitting layer, thereby improving the display effect of the display substrate.

[0186] In an exemplary embodiment, the first sub-electrode can be made of a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or an alloy material of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb). It can be a single-layer structure, or a multi-layer composite structure, such as Mo / Cu / Mo, etc.

[0187] In an exemplary embodiment, the second sub-electrode may be made of a transparent conductive material, such as indium tin oxide or zinc tin oxide.

[0188] In an exemplary embodiment, the arrangement of the anode can ensure the optical compensation effect in a high-resolution display substrate, thereby improving the brightness stability and uniformity of the display substrate.

[0189] Fig.11 A top view of an active layer is provided for an exemplary embodiment. Fig.12 A top view of a first metal layer is provided for an exemplary embodiment. Fig.13 A top view of a second metal layer is provided for an exemplary embodiment. Fig.14 A top view of a sensing layer provided for an exemplary embodiment, Fig.15 A top view of a transparent conductive layer is provided for an exemplary embodiment, such as Figures 6 to 9 , Figures 11 to 15 As shown, in an exemplary embodiment, the driving structure layer 20 includes: an active layer, a first insulating layer 23, a first metal layer, a second insulating layer 24, a second metal layer, a sensing layer, a transparent conductive layer, a third insulating layer 25 and a flat layer 26 arranged in sequence along a direction perpendicular to the substrate 10. Among them, the active layer may include: an active layer 211 of a control transistor, the first metal layer may include: a control electrode 212 of the control transistor and a control signal line G, the second metal layer may include: a first electrode 213 and a second electrode 214 of the control transistor and a signal output line OUT, the sensing layer may include: a photoelectric conversion layer 222, and the transparent conductive layer may include: a second electrode 223 of the photoelectric sensor circuit.

[0190] In an exemplary embodiment, Fig.11As shown, the active layer may further include: an active layer T11 of the first transistor, an active layer T21 of the second transistor, and a second plate C2 of the storage capacitor. Exemplarily, the second plate C2 of the storage capacitor and the active layer T21 of the second transistor are an integrally formed structure. A and B are an integrally formed structure means that A and B are made of the same material and the same process.

[0191] In an exemplary embodiment, Fig.12 As shown, the first metal layer may further include: a control electrode T12 of the first transistor, a control electrode T22 of the second transistor, and a first scan signal line Gn. Exemplarily, the control electrode 212 of the control transistor and the control signal line G are an integrally formed structure. The first scan signal line Gn and the control electrode T12 of the first transistor are an integrally formed structure.

[0192] In an exemplary embodiment, Fig.13 As shown, the second metal layer may also include: a first power line VDD, a second power line VSS, a data signal line D, a first plate C1 of a storage capacitor, a first electrode T13 and a second electrode T14 of a first transistor, and a first electrode T23 and a second electrode T24 of a second transistor. Exemplarily, the signal output line OUT and the second electrode 214 of the control transistor are an integrated structure. The second electrode T14 of the first transistor and the first plate C1 of the storage capacitor are an integrated structure. The data signal line D and the first electrode T13 of the first transistor are an integrated structure. The first power line VDD and the second electrode T24 of the second transistor are an integrated structure.

[0193] In an exemplary embodiment, Figures 6 to 9 As shown, the power line V is disposed in the same layer as the first anode. The planar layer 26 and the third insulating layer 25 are provided with via holes exposing the second electrode 223 , and the power line V is electrically connected to the second electrode 223 through the via holes in the planar layer 26 and the third insulating layer 25 .

[0194] In an exemplary embodiment, the active layer may be a polycrystalline silicon layer, an amorphous silicon layer or a metal oxide layer. The metal oxide layer may be an oxide containing indium and tin, an oxide containing tungsten and indium, an oxide containing tungsten, indium and zinc, an oxide containing titanium and indium, an oxide containing titanium, indium and tin, an oxide containing indium and zinc, an oxide containing silicon, indium and tin, or an oxide containing indium or gallium and zinc. The metal oxide layer may be a single layer, a double layer or a multilayer.

[0195] In an exemplary embodiment, the first metal layer and the second metal layer can be made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and can be a single-layer structure, or a multi-layer composite structure, such as Mo / Cu / Mo, etc.

[0196] In an exemplary embodiment, the first insulating layer, the second insulating layer and the third insulating layer may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON), and may be a single layer, a multilayer or a composite layer. The first insulating layer is called a gate insulating layer, the second insulating layer is called an interlayer insulating layer, and the third insulating layer is called a passivation layer.

[0197] In an exemplary embodiment, the display substrate may further include: an encapsulation layer and a cover plate, wherein the encapsulation layer is disposed on a side of the light emitting structure layer away from the substrate, and the cover plate is disposed on a side of the encapsulation layer away from the substrate.

[0198] In an exemplary embodiment, the encapsulation layer may be a multi-layer structure. The multi-layer structure includes: a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer arranged in sequence along a direction perpendicular to the substrate. The first encapsulation layer and the third encapsulation layer may be made of inorganic materials, the second encapsulation layer may be made of organic materials, and the second encapsulation layer is arranged between the first encapsulation layer and the third encapsulation layer, which can ensure that external water vapor cannot enter the light-emitting structure layer, and can extend the service life of the display substrate.

[0199] The structure of the display substrate is explained below by an example of the preparation process of the display substrate. The "patterning process" mentioned in the present disclosure includes deposition of film layers, coating of photoresist, mask exposure, development, etching and stripping of photoresist. Deposition can be carried out by any one or more of sputtering, evaporation and chemical vapor deposition, coating can be carried out by any one or more of spraying and spin coating, and etching can be carried out by any one or more of dry etching and wet etching. "Thin film" refers to a layer of thin film made by a deposition or coating process of a certain material on a substrate. If the "thin film" does not require a patterning process during the entire production process, the "thin film" can also be called a "layer". If the "thin film" requires a patterning process during the entire production process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern". The "A and B are arranged in the same layer" mentioned in the present disclosure means that A and B are formed simultaneously by the same patterning process. Figures 16 to 25 are schematic diagrams of the production process of a display substrate provided by an exemplary embodiment. As shown in Figures 16 to 25, the production process of a display substrate provided by an exemplary embodiment may include:

[0200] (1) forming an active layer on a substrate, including: depositing an active layer thin film on the substrate, and patterning the active layer thin film through a patterning process to form an active layer. The active layer includes: an active layer 211 of a control transistor, an active layer T11 of a first transistor, an active layer T21 of a second transistor, and a second electrode C2 of a storage capacitor, as shown in FIG. 16 . Fig.16A This is a schematic diagram after the active layer is formed. Fig. 16B for Fig.16A Cross-section along AA.

[0201] (2) Forming a first metal layer, including: depositing a first insulating film on a substrate having an active layer, and patterning the first insulating film through a patterning process to form a first insulating layer 23. Depositing a first metal film on the first insulating layer, and patterning the first metal film through a patterning process to form a first metal layer. The first metal layer includes: a control electrode 212 of a control transistor, a control signal line G, a control electrode T12 of a first transistor, a control electrode T22 of a second transistor, and a first scanning signal line Gn, as shown in FIG. 17. Fig.17A is a schematic diagram after forming the first metal layer, Fig. 17B for Fig.17A Cross-section along AA.

[0202] In an exemplary embodiment, the first metal layer may also be formed by using a gate self-alignment process.

[0203] (3) forming a second insulating layer, comprising: depositing a second insulating film on the substrate having the first metal layer formed thereon, and patterning the second insulating film through a patterning process to form a second insulating layer 24, as shown in FIG. 18 ; Fig.18A is a schematic diagram after forming the second insulating layer, Fig.18B for Fig.18A Cross-section along AA.

[0204] In an exemplary embodiment, the second insulating layer 24 includes: first via holes V1 to sixth via holes V6. The first via holes V1 and the second via holes V2 expose the active layer of the first transistor, the third via hole V3 exposes the control electrode of the second transistor, the fourth via hole V4 and the fifth via hole V5 expose the active layer of the second transistor, and the sixth via hole V6 and the seventh via hole V7 expose the active layer of the control transistor.

[0205] (4) forming a second metal layer, including: depositing a second metal film on a substrate having a second insulating layer formed thereon, and patterning the second metal film through a patterning process to form a second metal layer. The second metal layer includes: a first electrode 213 and a second electrode 214 of a control transistor, a signal output line OUT, a first power line VDD, a second power line VSS, a data signal line D, a first electrode plate C1 of a storage capacitor, a first electrode T13 and a second electrode T14 of a first transistor, and a first electrode T23 and a second electrode T24 of a second transistor, as shown in FIG. 19 . Fig.19A is a schematic diagram after forming the second metal layer, Fig.19B for Fig.19A Cross-section along AA.

[0206] In an exemplary embodiment, the first electrode T13 of the first transistor is connected to the active layer of the first transistor through the first via V1, and the second electrode T14 of the first transistor is connected to the active layer of the first transistor through the second via V2. The first electrode plate C1 of the storage capacitor is connected to the control electrode of the second transistor through the third via V3. The first electrode T23 of the second transistor is connected to the active layer of the second transistor through the fourth via V4, and the second electrode T24 of the second transistor is connected to the active layer of the second transistor through the fifth via V5. The first electrode 213 of the control transistor is connected to the active layer of the control transistor through the sixth via V6, and the second electrode 214 of the control transistor is connected to the active layer of the control transistor through the seventh via V7.

[0207] (5) Forming a sensing layer, including: depositing a semiconductor film on a substrate having a second metal layer, and patterning the semiconductor film through a patterning process to form a sensing layer. The sensing layer includes: a photoelectric sensing layer 222, as shown in FIG. 20, Fig. 20A This is a schematic diagram after the sensing layer is formed. Fig. 20B for Fig. 20A Cross-section along AA.

[0208] (6) Forming a transparent conductive layer, including: coating a transparent conductive material on the substrate having the sensing layer formed thereon, and forming the transparent conductive layer by photolithography. The transparent conductive layer includes: a second electrode 223, as shown in FIG. 21, Fig.21A is a schematic diagram after forming a transparent conductive layer, Fig. 21B for Fig.21A Cross-section along AA.

[0209] (7) forming a third insulating layer and a planar layer, including: depositing a third insulating film on a substrate having a transparent conductive layer, patterning the third insulating film through a patterning process to form a third insulating layer 25. coating a planar film on the substrate having the third insulating layer, and forming a planar layer 26 through masking, exposure, and development of the planar film, as shown in FIG. 22 , Fig.22AThis is a schematic diagram after the flat layer is formed. Fig. 22B for Fig.22A Cross-section along AA.

[0210] In an exemplary embodiment, the third insulating layer and the planar layer include: an eighth via hole V8 and a ninth via hole V9. The eighth via hole V8 exposes the second electrode 223 of the photosensor. The ninth via hole V9 exposes the second electrode of the second transistor.

[0211] (8) forming a first anode, including: depositing a transparent conductive film on a substrate having a flat layer, and patterning the transparent conductive film through a patterning process to form a first anode and a power line, as shown in FIG. 23 ; Fig.23A is a schematic diagram after forming the first anode, Fig. 23B for Fig.23A Cross-section along AA.

[0212] In an exemplary embodiment, the power line is connected to the second electrode 223 of the photosensor through the eighth via hole. The first anode is connected to the second electrode of the second transistor through the ninth via hole.

[0213] (9) forming a second anode, depositing a metal film and a transparent conductive film in sequence on the substrate having the first anode formed thereon, and patterning the metal film and the transparent conductive film through a patterning process to form a second anode 320 including: a first sub-electrode and a second sub-electrode, such as Fig.24 As shown in 25, Fig.24 Schematic diagram of the second anode after formation Figure 1 , Fig.25A Schematic diagram of the second anode after formation Figure 2 , Fig.25B for Fig.25A Cross-section along AA.

[0214] (10) forming a pixel definition layer, an organic light-emitting layer and a cathode, including: coating a pixel definition film on a substrate forming a second anode, forming a pixel definition layer (Pixel Define Layer) 34 by masking, exposure and development processes, forming an organic light-emitting layer 32 in an opening region of the formed pixel definition layer and on the pixel definition layer, coating a conductive film on the substrate forming the organic light-emitting layer, patterning the conductive film by a patterning process, and forming a cathode 33, such as Figure 7 and Fig. 9 shown.

[0215] (11) Forming an encapsulation layer and a cover plate. Forming an encapsulation layer on a substrate forming a cathode, wherein the encapsulation layer includes a first encapsulation layer of an inorganic material, a second encapsulation layer of an organic material, and a third encapsulation layer of an inorganic material. The first encapsulation layer is disposed on the second electrode, the second encapsulation layer is disposed on the first encapsulation layer, and the third encapsulation layer is disposed on the second encapsulation layer, thereby forming a laminated structure of inorganic material / organic material / inorganic material.

[0216] The embodiment of the present disclosure further provides a display device, including: a display substrate.

[0217] In an exemplary embodiment, the display device may be a monitor, a television, a mobile phone, a tablet computer, a navigator, a digital photo frame, a wearable display product, or any product or component having any display function.

[0218] The display substrate is the display substrate provided by any of the aforementioned embodiments, and the implementation principle and effect are similar, which will not be repeated here.

[0219] The embodiment of the present disclosure further provides a method for manufacturing a display substrate, which is configured to manufacture a display substrate. The method for manufacturing a display substrate provided by the embodiment of the present disclosure includes the following steps:

[0220] Step S11, providing a substrate and a driving chip.

[0221] Step S12: forming a driving structure layer on the substrate.

[0222] In an exemplary embodiment, the driving structure layer includes: a plurality of pixel circuits and a plurality of photoelectric sensing circuits, and at least one pixel circuit corresponds to at least one light-emitting structure.

[0223] Step S13: forming a light-emitting structure layer on the driving structure layer.

[0224] In an exemplary embodiment, the light-emitting structure layer includes: a plurality of light-emitting structures, at least one photoelectric sensor circuit corresponds one-to-one to at least one light-emitting structure, the side of the light-emitting structure layer away from the substrate is the light-emitting side, the orthographic projection of the light-emitting structure on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate.

[0225] The pixel circuit is electrically connected to the corresponding light-emitting structure and is configured to drive the corresponding light-emitting structure to emit light according to a driving signal; the photoelectric sensor circuit is configured to receive light emitted from the backlight side of the corresponding light-emitting structure, convert the optical signal of the emitted light into an electrical signal, and transmit the electrical signal to the driving chip; the driving chip is electrically connected to multiple photoelectric sensor circuits and multiple pixel circuits, respectively, and is configured to control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensor circuit.

[0226] The display substrate is the display substrate provided by any of the aforementioned embodiments, and the implementation principle and effect are similar, which will not be repeated here.

[0227] In an exemplary embodiment, step S12 may include: forming an active layer on a substrate; the active layer includes: an active layer of a control transistor; forming a first insulating layer and a first metal layer in sequence on the active layer; the first metal layer includes: a control electrode and a control signal line of the control transistor; forming a second insulating layer and a second metal layer in sequence on the first metal layer; the second metal layer includes: a first electrode and a second electrode of the control transistor and a signal output line; forming a sensing layer on the second metal layer; the sensing layer includes: a photoelectric conversion layer; forming a transparent conductive layer on the sensing layer; the transparent conductive layer includes: a second electrode; and forming a third insulating layer and a planar layer in sequence on the transparent conductive layer.

[0228] In an exemplary embodiment, forming a second insulating layer and a second metal layer in sequence on the first metal layer includes: forming a second insulating layer on the first metal layer; forming a first electrode and a second electrode of a driving transistor and a first electrode and a second electrode of a control transistor on the second insulating layer using the same process, wherein the first electrode of the control transistor is reused as a first electrode of a photoelectric sensor.

[0229] In an exemplary embodiment, forming the second insulating layer on the first metal layer includes: depositing a second insulating film on the first metal layer, and patterning the second insulating film through a patterning process to form the second insulating layer.

[0230] In an exemplary embodiment, forming the first and second electrodes of the driving transistor and the first and second electrodes of the control transistor on the second insulating layer using the same process includes: depositing a second metal film on the second insulating layer, and patterning the second metal film through a patterning process to form the first and second electrodes of the driving transistor and the first and second electrodes of the control transistor.

[0231] In an exemplary embodiment, step S13 may include: forming an anode on the planar layer; forming a pixel definition layer on the anode; and forming an organic light emitting layer and a cathode on the pixel definition layer.

[0232] In an exemplary embodiment, after step S13, the method for manufacturing a display substrate may further include: sequentially forming an encapsulation layer and a cover plate on the cathode.

[0233] In an exemplary embodiment, forming the anode on the planar layer may include: forming a first anode on the planar layer; and forming a second anode including a first sub-electrode and a second sub-electrode on the first anode.

[0234] The present disclosure also provides a method for controlling a display substrate, which is configured to control a display substrate. The method for controlling a display substrate provided by the present disclosure may include:

[0235] Step S21, receiving an electrical signal transmitted by a photoelectric sensor circuit;

[0236] Step S22: Control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensing circuit.

[0237] The display substrate is the display substrate provided by any of the aforementioned embodiments, and the implementation principle and effect are similar, which will not be repeated here.

[0238] The drawings in the present disclosure only relate to the structures involved in the embodiments of the present disclosure, and other structures may refer to the general design.

[0239] For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness and size of the layer or microstructure are exaggerated. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element, or there may be intermediate elements.

[0240] Although the embodiments disclosed in the present disclosure are as above, the contents described are only embodiments adopted to facilitate understanding of the present disclosure and are not intended to limit the present disclosure. Any technician in the field to which the present disclosure belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in the present disclosure, but the scope of patent protection of the present disclosure shall still be subject to the scope defined in the attached claims.

Claims

1. A display substrate, characterized in that: include: A substrate, a driving chip, and a driving structure layer and a light-emitting structure layer sequentially stacked on the substrate; The light-emitting structure layer comprises: a plurality of light-emitting structures, and the driving structure layer comprises: a plurality of pixel circuits and a plurality of photoelectric sensor circuits; the light-emitting structure layer comprises a backlight side and a light-emitting side which are arranged opposite to each other, and the light-emitting side is a side of the light-emitting structure layer away from the substrate; at least one pixel circuit corresponds to at least one light-emitting structure in a one-to-one manner, and at least one photoelectric sensor circuit corresponds to at least one light-emitting structure in a one-to-one manner; The orthographic projection of the light emitting structure on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate; The pixel circuit is electrically connected to the corresponding light-emitting structure and is configured to drive the corresponding light-emitting structure to emit light according to a driving signal; The photoelectric sensor circuit receives light emitted from the backlight side of the corresponding light-emitting structure, converts the optical signal of the emitted light into an electrical signal, and transmits the electrical signal to the driving chip; The driving chip is electrically connected to the plurality of photoelectric sensor circuits and the plurality of pixel circuits, respectively, and is configured to control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensor circuit; The photoelectric sensing circuit comprises: a control transistor and a photoelectric sensor; the control transistor comprises: a first electrode and a second electrode, and the photoelectric sensor comprises: a first electrode, a photoelectric conversion layer and a second electrode stacked in sequence; The first electrode is the same electrode as the first electrode of the control transistor.

2. The display substrate according to claim 1, characterized in that: The control transistor further includes: a control electrode; The photoelectric sensor is electrically connected to the power line and is configured to convert the optical signal of the light emitted from the backlight side of the corresponding light-emitting structure into an electrical signal; The control electrode of the control transistor is electrically connected to the control signal line, the first electrode of the control transistor is electrically connected to the photoelectric sensor, the second electrode of the control transistor is electrically connected to the signal output line, and the control transistor is configured to provide the signal output line with an electrical signal converted by the photoelectric sensor under the control of the control signal line; The signal output line is electrically connected to the driving chip.

3. The display substrate according to claim 2, characterized in that: The photoelectric sensor includes a PIN photodiode.

4. The display substrate according to any one of claims 2 or 3, characterized in that: The orthographic projection of the first electrode on the substrate and the orthographic projection of the photoelectric conversion layer on the substrate at least partially overlap, and the orthographic projection of the second electrode on the substrate and the orthographic projection of the photoelectric conversion layer on the substrate at least partially overlap.

5. The display substrate according to claim 4, characterized in that: The first electrode is a reflective electrode, and the second electrode is a transparent electrode; The photoelectric conversion layer is made of amorphous silicon.

6. The display substrate according to claim 2, characterized in that: The light emitting structure layer comprises: a pixel definition layer, a third electrode layer, a light emitting layer and a fourth electrode layer; the third electrode layer comprises: a plurality of anodes, the light emitting layer comprises: at least one organic light emitting layer, and the fourth electrode layer comprises: at least one cathode; each light emitting structure comprises: an anode, an organic light emitting layer and a cathode; In each light-emitting structure, the anode is located on a side of the organic light-emitting layer close to the substrate, and the cathode is located on a side of the organic light-emitting layer away from the substrate; The orthographic projection of the organic light-emitting layer on the substrate at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate, and the orthographic projection of the cathode on the substrate at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate.

7. The display substrate according to claim 6, characterized in that: For each light-emitting structure, the anode includes: a first anode and a second anode stacked in sequence; The orthographic projection of the first anode on the substrate covers the orthographic projection of the second anode on the substrate, and the orthographic projection of the first anode on the substrate partially overlaps with the orthographic projection of the photosensor on the substrate; The first area and the second area partially overlap; the first area is the overlapping area of ​​the orthographic projection of the first anode on the substrate and the orthographic projection of the photoelectric sensor on the substrate, and the second area is the area where the second anode on the substrate and the orthographic projection of the photoelectric sensor on the substrate do not overlap.

8. The display substrate according to claim 7, characterized in that: The orthographic projection of the second anode on the substrate partially overlaps with the orthographic projection of the photosensor on the substrate, or the orthographic projection of the second anode on the substrate and the orthographic projection of the photosensor on the substrate do not have an overlapping area.

9. The display substrate according to claim 7 or 8, characterized in that: The first anode is a transparent electrode, and the second anode is a reflective electrode.

10. The display substrate according to claim 8, characterized in that: When the orthographic projection of the second anode on the substrate partially overlaps with the orthographic projection of the photosensor on the substrate, the second anode includes: a transmissive via exposing the first anode; The orthographic projection of the photosensor on the substrate covers the orthographic projection of the transmission via on the substrate.

11. The display substrate according to claim 7 or 8, characterized in that: The second anode comprises: a first sub-electrode and a second sub-electrode stacked in sequence; The orthographic projection of the first sub-electrode on the substrate coincides with the orthographic projection of the second sub-electrode on the substrate.

12. The display substrate according to claim 11, characterized in that: The first sub-electrode is a reflective electrode, and the second sub-electrode is a transparent electrode.

13. The display substrate according to claim 7, characterized in that: The power line is arranged at the same layer as the first anode.

14. A display device, characterized in that: include: A display substrate as claimed in any one of claims 1 to 13.

15. A method for manufacturing a display substrate, characterized in that: The method is configured to manufacture a display substrate as claimed in any one of claims 1 to 13, the method comprising: Providing a substrate and a driver chip; A driving structure layer is formed on the substrate; the driving structure layer includes: a plurality of pixel circuits and a plurality of photoelectric sensor circuits, and at least one pixel circuit corresponds to at least one light-emitting structure; A light-emitting structure layer is formed on the driving structure layer, wherein the light-emitting structure layer comprises: a plurality of light-emitting structures, at least one photoelectric sensor circuit corresponds to at least one light-emitting structure in a one-to-one manner, the light-emitting structure layer comprises a backlight side and a light-emitting side which are arranged opposite to each other, the light-emitting side is a side of the light-emitting structure layer away from the substrate, and the orthographic projection of the light-emitting structure on the substrate at least partially overlaps with the orthographic projection of the corresponding pixel circuit on the substrate, and at least partially overlaps with the orthographic projection of the corresponding photoelectric sensor circuit on the substrate; Among them, the pixel circuit is electrically connected to the corresponding light-emitting structure, and is configured to drive the corresponding light-emitting structure to emit light according to a driving signal; the photoelectric sensor circuit is configured to receive light emitted from the backlight side of the corresponding light-emitting structure, convert the optical signal of the emitted light into an electrical signal, and transmit the electrical signal to the driving chip; the driving chip is electrically connected to multiple photoelectric sensor circuits and multiple pixel circuits, respectively, and is configured to control the driving signal provided to the corresponding pixel circuit according to the electrical signal transmitted by the photoelectric sensor circuit.

16. The method according to claim 15, characterized in that The pixel circuit includes a driving transistor, and forming a driving structure layer on the substrate includes: An active layer is formed on a substrate; the active layer comprises: an active layer of a control transistor; A first insulating layer and a first metal layer are sequentially formed on the active layer; the first metal layer comprises: a control electrode of a control transistor and a control signal line; A second insulating layer and a second metal layer are sequentially formed on the first metal layer; the second metal layer comprises: a first electrode and a second electrode of a control transistor and a signal output line; A sensing layer is formed on the second metal layer; the sensing layer comprises: a photoelectric conversion layer; A transparent conductive layer is formed on the sensing layer; the transparent conductive layer comprises: a second electrode; forming a third insulating layer and a planarizing layer in sequence on the transparent conductive layer; The sequentially forming a second insulating layer and a second metal layer on the first metal layer comprises: forming a second insulating layer on the first metal layer; The first electrode and the second electrode of the driving transistor and the first electrode and the second electrode of the control transistor are formed on the second insulating layer by the same process, wherein the first electrode of the control transistor is reused as the first electrode of the photoelectric sensor.

17. A method for controlling a display substrate, characterized in that: The method is configured to control a display substrate according to any one of claims 1 to 13, the method comprising: Receiving an electrical signal transmitted by a photoelectric sensing circuit; According to the electrical signal transmitted by the photoelectric sensing circuit, the driving signal provided to the corresponding pixel circuit is controlled.

Citation Information

Patent Citations

  • Display substrate, preparation method thereof and display device

    CN111370458A