A Class D amplifier

Abstract

The present invention discloses a class D amplifier, comprising: a loop filter, a control signal generator, a first power driver and a first feedback circuit, configured to establish a first loop for signal amplification; a stabilization circuit, configured to combine with the loop filter and the control signal generator to establish a second loop, so as to stabilize the loop filter and the control signal generator before enabling the first loop; and a pre-charging circuit, configured to pre-charge the positive output terminal and the negative output terminal of the first power driver, respectively, the positive output terminal and the negative output terminal being the first positive feedback terminal and the first negative feedback terminal, respectively. The implementation of the present invention can eliminate popping and clicking noises.

Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and further to a class D amplifier. Background Art

[0002] Class D audio amplifiers are basically switching amplifiers or pulse width modulation (PWM) amplifiers. In this type of amplifier, the Metal-Oxide-Silicon (MOS) transistors of the power driver are fully turned on or fully turned off, which greatly reduces the power loss in the output stage. A highly efficient amplifier is achieved.

[0003] Class D amplifiers are commonly used in audio applications. However, due to the PWM control of the MOS of the power driver, a large current may be suddenly injected into the load (e.g., speaker). Conventional Class D amplifiers may cause severe pop-click noise. Pop-click noise is a critical issue in audio systems, especially for headphones. How to eliminate pop-click noise is an important issue in the field of Class D amplifiers. Summary of the invention

[0004] The present invention provides a class D amplifier which can eliminate pop and click noises.

[0005] The class D amplifier provided by the present invention may include: a loop filter, a control signal generator, a first power supply driver and a first feedback circuit, which are configured to establish a first loop for signal amplification; a stabilization circuit, which is configured to combine with the loop filter and the control signal generator to establish a second loop to stabilize the loop filter and the control signal generator before enabling the first loop; and a pre-charging circuit, which is configured to pre-charge the positive output terminal and the negative output terminal of the first power supply driver, respectively, the positive output terminal and the negative output terminal being the first positive feedback terminal and the first negative feedback terminal, respectively.

[0006] As described above, the class D amplifier provided by the present invention includes a pre-charging circuit to pre-charge the positive output terminal and the negative output terminal of the first power driver respectively to suppress the voltage drop between the positive output terminal and the negative output terminal, thereby eliminating popping and clicking noises. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 A class D amplifier is described in accordance with an exemplary embodiment of the present invention.

[0008] Figure 2 The circuits of the first power driver 108 , the second power driver 112 , and the pre-charge circuit 116 are shown according to an exemplary embodiment of the present invention.

[0009] Figure 3 is a flow chart depicting the enable / disable mechanism of different circuit blocks.

[0010] Figure 4 The circuits of the first power driver 108 , the second power driver 112 , and the pre-charge circuit 116 are shown according to an exemplary embodiment of the present invention.

[0011] Figure 5 is a flow chart depicting the enable / disable mechanism of different circuit blocks. DETAILED DESCRIPTION

[0012] Certain words are used in the specification and claims to refer to specific components. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same component. The specification and claims do not use differences in names as a way to distinguish components, but use differences in the functions of components as the criteria for distinction. "Including" and "including" mentioned throughout the specification and claims are open-ended terms, so they should be interpreted as "including but not limited to". "Substantially" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and basically achieve the technical effect. In addition, the term "coupled" includes any direct and indirect electrical connection means. Therefore, if the text describes a first device coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means. The following is a preferred way to implement the present invention, the purpose of which is to illustrate the spirit of the present invention rather than to limit the scope of protection of the present invention. The scope of protection of the present invention shall be subject to the definition of the claims.

[0013] The following description is the best embodiment of the present invention. These descriptions are used to illustrate the general principles of the present invention and should not be used to limit the present invention. The scope of protection of the present invention should be determined based on the claims of the present invention.

[0014] Figure 1 A class D amplifier driving a speaker 102 includes a loop filter 104 , a control signal generator 106 , a first power driver 108 , a first feedback circuit 110 , a second power driver 112 , a second feedback circuit 114 and a precharge circuit 116 .

[0015] In one embodiment of the present invention, the control signal generator 106 may be a pulse width modulation (PWM) signal generator to generate the control signal, and the control signal may be a pulse width modulation (PWM) signal. The loop filter 104, the control signal generator 106, the first power driver 108 and the first feedback circuit 110 are configured to establish a first loop for signal amplification. The analog input signal between the positive input terminal Vip and the negative input terminal Vin of the class D amplifier is amplified by the first loop and output from the first power driver 108 to drive the speaker 102. The speaker 102 is coupled to the positive output terminal Vop (first positive feedback terminal) and the negative output terminal Von (first negative feedback terminal) of the first power driver 108.

[0016] The second power driver 112 and the second feedback circuit 114 form a settling circuit. The settling circuit (including the second power driver 112 and the second feedback circuit 114) is configured to be combined with the loop filter 104 and the control signal generator 106 to establish a second loop to stabilize the loop filter 104 and the control signal generator 106 before enabling the first loop for signal amplification.

[0017] The pre-charge circuit 116 is configured to pre-charge the positive output terminal Vop and the negative output terminal Von. By pre-charging, the sudden voltage drop between the positive output terminal Vop and the negative output terminal Von is suppressed, thereby eliminating popping and clicking noises. Therefore, the speaker 102 does not output high-pitched noise when it is turned on.

[0018] In an exemplary embodiment, the precharge circuit 116 precharges the positive output terminal Vop and the negative output terminal Von to a common voltage. Thus, before enabling the first loop for signal amplification, the voltage drop between the positive output terminal Vop and the negative output terminal Von is suppressed to zero. Pop and click noises are completely eliminated.

[0019] In an exemplary embodiment, when the first loop for signal amplification is enabled (eg, the enable signal mainEn is asserted), the second loop for circuit stabilization is disabled (eg, the enable signal AuxEn is deasserted).

[0020] When the second loop is enabled, the second power driver 112 is controlled by the control signal generator 106 to output a second feedback signal via a second positive feedback terminal Vap and a second negative feedback terminal Van, and the second feedback circuit 114 couples the second feedback signal to the loop filter 104 to establish negative feedback for circuit stability. The resistor Rap couples the second positive feedback terminal Vap to the input terminal of the class-D amplifier to be combined with the negative input signal Vin and then fed to the negative input terminal of the loop filter 104. The resistor Ran couples the second negative feedback terminal Van to the input terminal of the class-D amplifier to be combined with the positive input signal Vip and then fed to the positive input terminal of the loop filter 104.

[0021] There are many designs of pre-charge circuit 116.

[0022] In an exemplary embodiment, the common mode terminal 'cm' of the second power driver 112 is coupled to the positive output terminal Vop and the negative output terminal Von via the pre-charging circuit 116 to pre-charge the positive output terminal Vop and the negative output terminal Von to a common voltage.

[0023] Figure 2 According to an exemplary embodiment of the present invention, a circuit of a first power driver 108, a second power driver 112 and a pre-charge circuit 116 is shown. The second power driver 112 has resistors R1 and R2 connected in series between a second positive feedback terminal Vap and a second negative feedback terminal Van. The connection terminal between the resistors R1 and R2 is a common mode terminal 'cm' of the second power driver 112. The resistance of the resistor R1 may be equal to the resistance of the resistor R2. The pre-charge circuit 116 has resistors Rpc1 and Rpc2 and switches Spc1 and Spc2. When the pre-charge circuit 116 is enabled (for example, the enable signal PreC_En is set to be valid), the switches Spc1 and Spc2 are closed to couple the common mode voltage at the common mode terminal 'cm' of the second power driver 112 to the positive output terminal Vop and the negative output terminal Von. Therefore, the positive output terminal Vop and the negative output terminal Von are pre-charged to a common voltage, thereby eliminating the popping and clicking noises of the speaker 102.

[0024] As shown, the architecture of the second power driver 112 may be similar to the architecture of the first power driver 108 .

[0025] The first power driver 108 includes four metal oxide silicon transistors (MOS) Mm1, Mm2, Mm3 ​​and Mm4. When the first loop is enabled, the enable signal mainEn is set to be valid and the disable signal mainEnB is set to be invalid. The control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n generated by the control signal generator 106 are coupled to the gates of MOS Mm1, Mm2, Mm3 ​​and Mm4 respectively. MOS Mm1 is configured to couple the positive output terminal Vop to the power terminal according to the control signal PWMA_p. MOS Mm2 is configured to couple the positive output terminal Vop to the ground terminal according to the control signal PWMA_n. MOS Mm3 is configured to couple the negative output terminal Von to the power terminal according to the control signal PWMB_p. MOS Mm4 is configured to couple the negative output terminal Von to the ground terminal according to the control signal PWMB_n. In one embodiment, when the first loop is enabled, MOS Mm1 couples the positive output terminal Vop to the power supply terminal according to the control signal PWMA_p. MOS Mm3 couples the negative output terminal Von to the power supply terminal according to the control signal PWMB_p. In another embodiment, when the first loop is enabled, MOS Mm2 couples the positive output terminal Vop to the ground terminal according to the control signal PWMA_n. MOS Mm4 couples the negative output terminal Von to the ground terminal according to the control signal PWMB_n. The control signal PWMA_p may be equal to the control signal PWMA_n. The control signal PWMB_p may be equal to the control signal PWMB_n.

[0026] The second power driver 112 includes four MOS Ma1, Ma2, Ma3 and Ma4. When the second loop is enabled, the enable signal AuxEn is set to valid, and the disable signal AuxEnB is set to invalid. The control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n are coupled to the gates of MOS Ma1, Ma2, Ma3 and Ma4 respectively. MOS Ma1 is configured to couple the second positive feedback terminal Vap to the power supply terminal according to the control signal PWMA_p. MOS Ma2 is configured to couple the second positive feedback terminal Vap to the ground terminal according to the control signal PWMA_n. MOS Ma3 is configured to couple the second negative feedback terminal Van to the power supply terminal according to the control signal PWMB_p. MOS Ma4 is configured to couple the second negative feedback terminal Van to the ground terminal according to the control signal PWMB_n. In one embodiment, MOS Ma1 couples the second positive feedback terminal Vap to the power supply terminal according to the control signal PWMA_p. MOS Ma3 couples the second negative feedback terminal Van to the power terminal according to the control signal PWMB_p. In another embodiment, MOS Ma2 couples the second positive feedback terminal Vap to the ground terminal according to the control signal PWMA_n. MOS Ma4 couples the second negative feedback terminal Van to the ground terminal according to the control signal PWMB_n.

[0027] Figure 3 is a flow chart depicting the enable / disable mechanism of different circuit blocks. In step S302, the loop filter 104 and the control signal generator 106 are enabled. In step S304, the second loop is enabled (e.g., the enable signal AuxEn is asserted and the disable signal AuxEnB is deasserted). In step S306, the pre-charge circuit 116 is enabled (e.g., the enable signal PreC_En is asserted) to couple the common mode terminal cm of the second power driver 112 to the positive output terminal Vop and the negative output terminal Von. In step S308, the first loop is enabled (e.g., the enable signal mainEn is asserted and the disable signal mainEnB is deasserted) and the second loop is disabled (e.g., the enable signal AuxEn is deasserted and the disable signal AuxEnB is asserted). In step S310, the pre-charge circuit 116 is disabled (e.g., the enable signal PreC_En is deasserted).

[0028] In another exemplary embodiment, the time to enable the first loop depends on the state of the control signal generated by the control signal generator 106. After the positive output terminal Vop and the negative output terminal Von are precharged to the common terminal, if the control signal generator 106 operates the second power driver 112 to set both the second positive feedback terminal Vap and the second negative feedback terminal Van to the common voltage, the first loop is enabled (for example, the enable signal mainEn is asserted and the disable signal mainEnB is deasserted), and the second loop is disabled (for example, the enable signal AuxEn is deasserted and the disable signal AuxEnB is asserted).

[0029] Figure 4 According to an exemplary embodiment of the present invention, a circuit of a first power driver 108, a second power driver 112 and a pre-charge circuit 116 is shown. As shown in the figure, in this exemplary embodiment, the second power driver 112 does not provide a common voltage. Instead, a high level voltage (at the power supply terminal) or a low level voltage (at the ground terminal) is coupled to the positive output terminal Vop and the negative output terminal Von by operating the pre-charge circuit 116. The resistors R1 and R2 of the second power driver 112 can be replaced by any impedance device.

[0030] The pre-charge circuit 116 includes switches Sh1 and Sh2. Switch Sh1 is coupled between the gate of MOS Mm1 and the ground terminal. Switch Sh2 is coupled between the gate of MOS Mm3 and the ground terminal. Switches Sh1 and Sh2 are both controlled by a pre-charge control signal Set_H. In the pre-charge stage, the pre-charge control signal Set_H is set to be valid, and the gates of MOS Mm1 and Mm3 are coupled to the ground terminal. Therefore, p-type MOS Mm1 and Mm3 are turned on, and the positive output terminal Vop and the negative output terminal Von are coupled to the power supply terminal. In this case, the positive output terminal Vop and the negative output terminal Von are pre-charged to a high voltage level. After pre-charging, the time to enable the first loop depends on the state of the control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n. When the control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n are all low, the first loop is enabled (for example, the enable signal mainEn is set to valid, and the disable signal mainEnB is set to invalid). When the control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n are all low, the second positive feedback terminal Vap and the second negative feedback terminal Van are coupled to the power supply terminal (that is, set to a common voltage). The common voltage is fed to the class D amplifier as an initial input. Because the first loop is enabled in this case, the positive output terminal Vop and the negative output terminal Von are maintained at a high voltage level (due to the conduction of MOS Mm1 and Mm3). There is no voltage drop between the pre-charge state and the initial state. Popping and clicking noises are completely eliminated from the speaker 102.

[0031] Figure 4Another design for precharging is further shown. The precharging circuit 116 includes switches Sl1 and Sl2. Switch Sl1 is coupled between the gate of MOS Mm2 and the power supply terminal. Switch Sl2 is coupled between the gate of MOS Mm4 and the power supply terminal. Switches Sl1 and Sl2 are both controlled by the precharging control signal Set_L. In the precharging stage, the precharging control signal Set_L is set to be valid, and the gates of MOS Mm2 and Mm4 are coupled to the power supply terminal. Therefore, n-type MOS Mm2 and Mm4 are turned on, and the positive output terminal Vop and the negative output terminal Von are coupled to the ground terminal. In this case, the positive output terminal Vop and the negative output terminal Von are precharged to a low voltage level. After precharging, the time to enable the first loop depends on the state of the control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n. When the control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n are all high, the first loop is enabled (for example, the enable signal mainEn is set to valid, and the disable signal mainEnB is set to invalid). When the control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n are all high, the second positive feedback terminal Vap and the second negative feedback terminal Van are coupled to the ground terminal (that is, set to a common voltage). The common voltage is fed to the class D amplifier as an initial input. Since the first loop is enabled in this case, the positive output terminal Vop and the negative output terminal Von are maintained at a low level (because MOS Mm2 and Mm4 are turned on). There is no voltage drop between the pre-charge state and the initial state. Popping and clicking noises are completely eliminated from the speaker 102.

[0032] Figure 5is a flow chart depicting the enable / disable mechanism of different circuit blocks. In step S502, the loop filter 104 and the control signal generator 106 are enabled. In step S504, the second loop is enabled (e.g., the enable signal AuxEn is asserted and the disable signal AuxEnB is deasserted). In step S506, the precharge circuit 116 is enabled (e.g., the precharge control signal Set_H / Set_L is asserted) to precharge both the positive output terminal Vop and the negative output terminal Von to the power supply level / ground level. In step S508, the states of the control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n are checked to determine when to enable the first loop. In the case where the positive output terminal Vop and the negative output terminal Von are precharged to the power supply level, step S508 checks whether all the control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n are low. If yes, then step S510 is executed to enable the first loop (e.g., the enable signal mainEn is set to be valid and the disable signal mainEnB is set to be invalid), disable the second loop (e.g., the enable signal AuxEn is set to be invalid and the disable signal AuxEnB is set to be valid), and then the pre-charge control signal Set_H is set to be invalid. In the case where the positive output terminal Vop and the negative output terminal Von are pre-charged to the ground level, step S508 checks whether all control signals PWMA_p, PWMA_n, PWMB_p and PWMB_n are high. If yes, then step S510 is executed to enable the first loop (e.g., the enable signal mainEn is set to be valid and the disable signal mainEnB is set to be invalid), disable the second loop (e.g., the enable signal AuxEn is set to be invalid and the disable signal AuxEnB is set to be valid), and then the pre-charge control signal Set_L is set to be invalid.

[0033] Slight modifications to the circuits of the first / second power drivers 108 / 112 and the pre-charge circuit 116 are allowed.

[0034] Although the present invention is disclosed as above with preferred embodiments, it is not intended to limit the scope of the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the definition of the claims.

Claims

1. A class D amplifier, It is characterized in that include: The loop filter, the control signal generator, the first power driver and the first feedback circuit are configured to establish a first loop for signal amplification; a stabilization circuit configured to establish a second loop in combination with the loop filter and the control signal generator to stabilize the loop filter and the control signal generator before enabling the first loop; and A pre-charging circuit is configured to pre-charge the positive output terminal and the negative output terminal of the first power driver respectively, wherein the positive output terminal and the negative output terminal are respectively the first positive feedback terminal and the first negative feedback terminal; Wherein, the stabilization circuit comprises: A second power driver configured to output a feedback signal under the control of the control signal generator when the second loop is enabled; and The second feedback circuit is configured to couple the feedback signal to the loop filter when the second loop is enabled.

2. The class D amplifier according to claim 1, Features: The precharge circuit precharges the positive output terminal and the negative output terminal of the first power driver to a common voltage.

3. The class D amplifier according to claim 2, Features: When the first loop is enabled, the second loop is disabled.

4. The class D amplifier according to claim 1, It is characterized in that The second power driver comprises: A second positive feedback terminal and a second negative feedback terminal are configured to output the feedback signal to be transmitted by the second feedback circuit; and A first resistor and a second resistor are connected in series between the second positive feedback terminal and the second negative feedback terminal. The connection terminal between the first resistor and the second resistor is the common mode terminal of the second power driver.

5. The class D amplifier according to claim 2, It is characterized in that The second power driver comprises: A second positive feedback terminal and a second negative feedback terminal, used to output the feedback signal to be transmitted by the second feedback circuit; An impedance device is coupled between the second positive feedback terminal and the second negative feedback terminal.

6. The class D amplifier according to claim 5, Features: The first power driver includes a first metal oxide silicon transistor, a second metal oxide silicon transistor, a third metal oxide silicon transistor and a fourth metal oxide silicon transistor; When the first loop is enabled, the first metal oxide silicon transistor is controlled according to the first control signal generated by the control signal generator to couple the positive output terminal of the first power driver to a power terminal; When the first loop is enabled, the third metal oxide silicon transistor is controlled according to a third control signal generated by the control signal generator to couple the negative output terminal of the first power driver to the power terminal; or When the first loop is enabled, the second metal oxide silicon transistor is controlled according to the second control signal generated by the control signal generator to couple the positive output terminal of the first power driver to the ground terminal; When the first loop is enabled, the fourth metal oxide silicon transistor is controlled according to a fourth control signal generated by the control signal generator to couple the negative output terminal of the first power driver to the ground terminal.

7. The class D amplifier according to claim 6, Features: The common mode terminal of the second power driver is coupled to the positive output terminal and the negative output terminal of the first power driver via the pre-charging circuit to pre-charge the positive output terminal and the negative output terminal of the first power driver to the common voltage.

8. The class D amplifier according to claim 6, Features: By operating the pre-charging circuit, the positive output terminal and the negative output terminal of the first power driver are coupled to the power terminal or the ground terminal for pre-charging; After the positive output terminal and the negative output terminal of the first power driver are coupled to the power terminal for precharging, if the first control signal, the second control signal, the third control signal and the fourth control signal are all at low levels, the first loop is enabled; After the positive output terminal and the negative output terminal of the first power driver are coupled to the ground terminal for precharging, if the first control signal, the second control signal, the third control signal and the fourth control signal are all high level, the first loop is enabled.

9. The class D amplifier according to claim 6, Features: The second power driver includes a fifth metal oxide silicon transistor, a sixth metal oxide silicon transistor, a seventh metal oxide silicon transistor and an eighth metal oxide silicon transistor; When the second loop is enabled, the fifth metal oxide silicon transistor is controlled by the first control signal to couple the second positive feedback terminal to the power supply terminal; When the second loop is enabled, the seventh metal oxide silicon transistor is controlled by the third control signal to couple the second negative feedback terminal to the power terminal; or When the second loop is enabled, the sixth metal oxide silicon transistor is controlled by the second control signal to couple the second positive feedback terminal to the ground terminal; When the second loop is enabled, the eighth MOS transistor is controlled by the fourth control signal to couple the second negative feedback terminal to the ground terminal.

10. The class D amplifier according to claim 9, Features: The second feedback circuit includes a third resistor and a fourth resistor; When the second loop is enabled, the third resistor couples the second positive feedback terminal to the negative input terminal of the loop filter, and the fourth resistor couples the second negative feedback terminal to the positive input terminal of the loop filter; and A positive input terminal of the class-D amplifier is coupled to the positive input terminal of the loop filter, and a negative input terminal of the class-D amplifier is coupled to the negative input terminal of the loop filter.

11. The class D amplifier according to claim 7, Features: After the positive output terminal and the negative output terminal of the first power driver are pre-charged to the common voltage, if the control signal generator operates the second power driver to set the second positive feedback terminal of the second power driver and the second negative feedback terminal of the second power driver to the common voltage, the first loop is enabled and the second loop is disabled.

12. The class D amplifier according to claim 8, It is characterized in that The pre-charging circuit comprises: A first switch coupled between the gate of the first MOS transistor and the ground terminal; and a second switch coupled between the gate of the third MOS transistor and the ground terminal, Wherein, when the positive output terminal and the negative output terminal of the first power driver are pre-charged, the first switch and the second switch are turned on.

13. The class D amplifier according to claim 8, It is characterized in that The pre-charging circuit comprises: A first switch coupled between the gate of the second MOS transistor and the power supply terminal; and a second switch coupled between the gate of the fourth MOS transistor and the power supply terminal, Wherein, when the positive output terminal and the negative output terminal of the first power driver are pre-charged, the first switch and the second switch are turned on.

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