Vector string search instructions

Abstract

Instructions for performing a vector string search are provided. An instruction to be processed is obtained, wherein the instruction is defined as a string search instruction for locating an occurrence of a substring within a string. The instruction is processed, wherein the processing includes searching a string specified in one operand of the instruction using a substring specified in another operand of the instruction. Based on the search locating a first complete match of the substring within the string, an indication of a complete match condition and the position of the first complete match in the string are returned, and based on the search locating only a partial match of the substring at the end of the string, an indication of a partial match condition and the position of the partial match in the string are returned.

Description

Background Art

[0001] One or more aspects relate generally to facilitating processing within a computing environment, and particularly to facilitating processing associated with finding a substring within a string.

[0002] Finding substrings in a string is a common task in computer processing. For example, in database queries, or generally in any text processing or parsing application, tools for finding substrings in a string can be used. The basic approach is to check the substring at each position. Unfortunately, this can be very inefficient and brings huge overhead to the process. Moreover, some languages ​​(such as C) have the concept of a zero-terminated string where the search should stop. This is usually handled with complementary tests of characters and branches in the code, which results in additional processing overhead. Summary of the invention

[0003] The disadvantages of the prior art are overcome and additional advantages are provided by providing a computer program product for facilitating processing within a computing environment. The computer program product includes a computer-readable storage medium that can be read by a processing circuit and stores instructions for performing a method. The method includes obtaining an instruction to be processed, the instruction being a defined string search instruction for locating the occurrence of a substring within a string. The method further includes processing the instruction. The processing includes searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction. Based on the search locating the first complete match of the substring within the string, a complete match condition indication and the position of the first complete match in the string are returned. Based on the search locating only a partial match of the substring at the end of the string, a partial match condition indication and the position of the partial match in the string are returned. Advantageously, the string search instruction is a new string search instruction that can locate the first occurrence of the substring within the string and return its position, and can locate a partial match of the substring at the end of the string where applicable, and return a partial match condition indication and the position of the partial match in the string. The string search instruction can therefore facilitate processing within the computing environment. In addition, the string search instruction supports a register-controlled length limit for the search.

[0004] In one or more embodiments, based on the search locating a mismatch of a substring within the string, an indication of the mismatch condition is returned along with a search completion position n, where n is the length of the string in bytes.

[0005] In one or more implementations, processing also includes determining a mode for the search, the search including a non-zero terminated search mode and a zero terminated search mode. For example, the determination can be based on whether a zero search flag in a field of the instruction is set to indicate that a string or substring may contain zero terminations that truncate the string or substring, respectively, for searching. Advantageously, the disclosed string search instructions can therefore support register-controlled length limits, as well as zero-terminated string searches, such as via modifier bits or mode flags in the instruction.

[0006] In one or more implementations, the processing further includes: determining that the string includes a zero termination based on the search mode being a zero-terminated search mode, and based on this, setting a zero-terminated found indicator. In one embodiment, the processing further includes: terminating the string based on the search reaching a zero termination within the string without a match, and returning a non-match with a zero-terminated condition indication and a search completion position n with reference to the zero-terminated found indicator, where n is the length of the string in bytes. Advantageously, a condition indicator or code can therefore be returned to distinguish between finding a first complete match, finding a partial match, and not finding a match with or without zero termination. In addition, as noted, the string search instruction can be utilized in conjunction with zero termination using a register controlled length limit.

[0007] In one or more embodiments, the determination may further include determining that the length of the string before the zero termination within the string is less than the substring length. And based on the length being smaller, the determination includes determining whether a portion of the substring matches the string before the zero termination.

[0008] In one or more implementations, the processing further includes continuing the search based on the length of the substring being a multiple of the byte size of the elements within the string, wherein the byte size is determined by a field of the instruction. In one or more implementations, the search is based in part on the byte size of the elements within the string, wherein the search includes stepping through the string based on elements, and wherein the size of the elements is, for example, 1 byte, 2 bytes, or 4 bytes per element.

[0009] In one or more embodiments, the string search instruction is an architectural hardware machine instruction of an instruction set architecture. For example, the architectural hardware machine instruction is a vector string search instruction that facilitates processing within the computing environment.

[0010] Computer systems and computer-implemented methods related to one or more aspects are also described and claimed herein. Additionally, services related to one or more aspects are also described and may be claimed herein.

[0011] Additional features and advantages are realized through the techniques of the present invention.Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] One or more aspects are particularly pointed out and distinctly claimed as examples in the claims at the end of the specification. The above and objects, features and advantages of one or more aspects will become apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0013] Figure 1A An example of a computing environment is shown to incorporate and use one or more aspects of the present invention;

[0014] Figure 1B According to one or more aspects of the present invention, Figure 1A Further details of the processor;

[0015] Figure 2 Another example of a computing environment that includes and uses one or more aspects of the present invention is shown;

[0016] Figure 3 An example of a vector string search instruction used in accordance with one or more aspects of the present invention is shown;

[0017] Figure 4 One embodiment of a process related to execution of a vector string search instruction according to one or more aspects of the present invention is shown;

[0018] Figure 5 Another embodiment of a process related to execution of a vector string search instruction according to one or more aspects of the present invention is shown;

[0019] Figure 6A-6B An example of facilitating processing within a computing environment according to one or more aspects of the present invention is shown;

[0020] Fig. 7A Another example of a computing environment that incorporates and uses one or more aspects of the present invention is shown;

[0021] Figure 7B According to one or more aspects of the present invention, Fig. 7A Further details of the memory;

[0022] Figure 8 One embodiment of a cloud computing environment is shown; and

[0023] Fig. 9 An example of an abstract model layer is shown. DETAILED DESCRIPTION

[0024] According to one aspect of the present invention, the ability to facilitate processing within a computing environment is provided. As an example, a single instruction (e.g., a single architecture hardware machine instruction at a hardware / software interface) is provided to perform a function (also referred to as an operation), such as a string search. The instruction is part of a general-purpose processor instruction set architecture (ISA), which is distributed by a program (e.g., a user program) on a general-purpose processor. By using ISA instructions to perform string searches, execution time within a processor such as a general-purpose processor is reduced.

[0025] In one example, when processed, a string search instruction searches for a string specified in one operand of the instruction using a substring specified in another operand of the instruction. Based on the search finding a first full match of the substring within the string, a full match condition indication is returned, as well as the position of the first full match in the string, and based on the search finding only a partial match of the substring at the end of the string, a partial match condition indication is returned, as well as the position of the partial match of the string.

[0026] In one or more embodiments, the search includes a non-zero termination search mode and a zero termination search mode, and the process determines whether the string can contain a zero termination based on whether a zero search flag in a field of the instruction is set. Based on the search being in the zero termination search mode, and based on the search reaching a zero termination within the string without a match, the search is terminated and a non-match with a zero termination condition indication and a search completion position of n are returned, where n is the length of the string in bytes.

[0027] See also Figure 1A One embodiment of a computing environment that includes and uses one or more aspects of the present invention is described. Computing environment 100 includes, for example, a processor 102 (e.g., a central processing unit), a memory 104 (e.g., a main memory; also known as system memory, main storage, central storage, storage), and one or more input / output (I / O) devices and / or interfaces 106 coupled to each other by, for example, one or more buses 108 and / or other connections.

[0028] In one example, processor 102 is based on a processor provided by International Business Machines Corporation of Armonk, New York. hardware architecture, and is such as IBM A portion of a server such as a server, which is also provided by International Business Machines Corporation and implements the z / Architecture hardware architecture. One embodiment of the z / Architecture hardware architecture is described in a publication entitled "z / Architecture Principles of Operation" (IBM Publication No. SA22-7832-11, 12th Edition, September 2017), which is hereby incorporated by reference in its entirety. However, the z / Architecture hardware architecture is only one example architecture; other architectures and / or other types of computing environments may include and / or use one or more aspects of the present invention. In one example, a processor executes an operating system, such as the z / Architecture also provided by International Business Machines Corporation. operating system.

[0029] Processor 102 includes multiple functional components for executing instructions. Figure 1B As depicted in , these functional components include, for example, an instruction fetch component 120 for fetching instructions to be executed; an instruction decode unit 122 for decoding the fetched instructions and obtaining operands of the decoded instructions; an instruction execution component 124 for executing the decoded instructions; a memory access component 126 for accessing memory for instruction execution when necessary; and a write-back component 130 for providing the results of the executed instructions. According to one or more aspects of the present invention, one or more of these components may include at least a portion of one or more other components used in the string search process as described herein or be able to access one or more other components. The one or more other components include, for example, a search string component 136.

[0030] See also Figure 2 Another example of a computing environment for incorporating and using one or more aspects of the present invention is described below. In one example, the computing environment is based on the z / Architecture hardware architecture; however, the computing environment may be based on other architectures provided by International Business Machines Corporation or other companies.

[0031] Reference Figure 2 In one example, a computing environment includes a central electronic complex (CEC) 200. The CEC 200 includes a number of components, such as a memory 202 (also known as system memory, main memory, main storage, central storage, storage) coupled to one or more processors (also known as central processing units (CPUs)) 204 and an input / output subsystem 206.

[0032] The memory 202 includes, for example, one or more logical partitions 208, a hypervisor 210 that manages the logical partitions, and processor firmware 212. An example of the hypervisor 210 is the Processor Resource / System Manager (PR / SM) provided by International Business Machines Corporation of Armonk, New York. TM ) hypervisor. As used herein, firmware includes, for example, microcode for a processor. It includes, for example, hardware-level instructions and / or data structures used in the implementation of higher-level machine code. In one embodiment, it includes, for example, proprietary code typically delivered as microcode, including trusted software or microcode specific to the underlying hardware, and controls operating system access to system hardware.

[0033] Each logical partition 208 is capable of acting as a separate system. That is, each logical partition can be independently reconfigured, run a client operating system 220 such as the z / OS operating system or another operating system, and operate with different programs 222. An operating system or application running in a logical partition appears to have access to the complete system, but in reality, only a portion of it is available.

[0034] Memory 202 is coupled to processors (e.g., CPUs) 204, which are physical processor resources that can be assigned to logical partitions. For example, logical partition 208 includes one or more logical processors, each of which represents all or a share of physical processor resources 204 that can be dynamically assigned to a logical partition. In one example, processor 204 includes a search string component 260 to perform a search process, as described herein.

[0035] Further, the memory 202 is coupled to an I / O subsystem 206. The I / O subsystem 206 may be part of the central electronic complex or separate therefrom. It directs the flow of information between the main memory 202 and an input / output control unit 230 and input / output (I / O) devices 240 coupled to the central electronic complex.

[0036] Many types of I / O devices may be used. One particular type is a data storage device 250. The data storage device 250 may store one or more programs 252, one or more computer-readable program instructions 254, and / or data, etc. The computer-readable program instructions may be configured to perform the functions of embodiments of aspects of the present invention.

[0037] Computer readable program instructions configured to carry out the functions of embodiments of aspects of the present invention may also or instead be included in memory 202. Many variations are possible.

[0038] The central electronic complex 200 may include and / or be coupled to removable / non-removable, volatile / non-volatile computer system storage media. For example, it may include and / or be coupled to non-removable non-volatile magnetic media (commonly referred to as a "hard drive"), a disk drive for reading from and writing to a removable non-volatile disk (e.g., a "floppy disk"), and / or an optical drive for reading from or writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media). It should be understood that other hardware and / or software components may be used in conjunction with the central electronic complex 200. Examples include, but are not limited to, microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archival storage systems, among others.

[0039] Further, the central electronic complex 200 can operate with numerous other general purpose or special purpose computing system environments or configurations. Examples of well-known computing systems, environments, and / or configurations that may be suitable for use with the central electronic complex 200 include, but are not limited to, personal computer (PC) systems, server computer systems, thin clients, thick clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments that include any of the above systems or devices, and the like.

[0040] Although different examples of computing environments are described herein, one or more aspects of the invention can be used with many types of environments.The computing environments provided herein are examples only.

[0041] According to one aspect of the present invention, a computing environment such as computing environment 100 or central electronic complex (CEC) 200 executes an instruction to perform a string search. The instruction is, for example, a vector string search instruction. In one or more embodiments, the instruction is a part of a vector tool. The vector tool provides, for example, a fixed-size vector ranging from one to sixteen elements. Each vector includes data operated on by a vector operation / instruction. In one embodiment, if a vector is composed of multiple elements, each element is processed in parallel with other elements. Until the processing of all elements is completed, the instruction completion occurs.

[0042] Vector data appears in storage, for example, in the same left-to-right sequence as other data formats. Bits of the data format numbered 0-7 constitute the byte in the leftmost (lowest numbered) byte position in storage, bits 8-15 constitute the byte in the next sequential position, etc. In further examples, vector data may appear in storage in another order, such as from right to left.

[0043] For example, refer to Figure 3 , the vector string search (Vector String Search, VSS) instruction 300 includes an operation code field 302a (e.g., bits 0-7), 302b (e.g., bits 40-47) indicating a vector string search operation; a first vector register field 304 (e.g., bits 8-11) for specifying a first vector register (V1); a second vector register field 306 (e.g., bits 12-15) for specifying a second vector register (V2); a third vector register field 308 (e.g., bits 16-19) for specifying a third vector register (V3); a first mask field (M5) 310 (e.g., bits 20-23); a second mask field (M6) 312 (e.g., bits 24-27); a fourth vector register field 314 (e.g., bits 32-35) for specifying a fourth vector register (V4); and an RXB field 316 (e.g., bits 36-39). In one example, each of the fields 304-316 is separate and independent from the operation code field. Furthermore, in one embodiment, they are separate and independent from each other; however, in other embodiments, more than one field may be combined. Additional information regarding the use of these fields is described below.

[0044] In one example, the register extension bits or RXB include the most significant bits of each of the vector register designation operands. Bits for register designations not specified by the instruction will be reserved and set to zero.

[0045] In one example, the RXB field includes four bits (eg, bits 0-3), and the respective bits are defined as follows:

[0046] 0 - Most significant bit of the first vector register designation of the instruction.

[0047] 1 - The most significant bit of the instruction's second vector register designation (if any).

[0048] 2 - The most significant bit of the instruction's third vector register designation (if any).

[0049] 3 - The most significant bit of the instruction's fourth vector register designation, if any.

[0050] Each bit is set by, for example, the assembler to 0 or 1, depending on the register number. For example, for registers 0-15, the bit is set to 0, for registers 16-31, the bit is set to 1, and so on.

[0051] In one embodiment, each RXB bit is an extension bit for a specific position in an instruction that includes one or more vector registers. For example, in one or more vector instructions, bit 0 of RXB is an extension bit for positions 8-11, which is assigned to, for example, V1; bit 1 of RXB is an extension bit for positions 12-15, which is assigned to, for example, V2; and so on.

[0052] In another embodiment, the RXB field includes additional bits, and more than one bit is used as an extension for each vector or position.

[0053] In processing Figure 3 During an instruction of , the string specified in the second operand (V2) is searched for the substring specified in the third operand (V3). The length of the substring in the third operand (V3) may depend on the zero search (ZS) flag in the M6 ​​field. When the ZS flag is 0 (indicating a non-zero termination search mode), the length in bytes is specified as an unsigned binary integer in bits 56-63 of the fourth operand (V4). When the ZS flag is 1 (indicating a zero termination search mode), the length in bytes is specified by the lesser of: the unsigned binary integer in bits 56-63 of the fourth operand (V4), and the number of leftmost bytes of the operand that contain non-zero values ​​within the element (from 0 to 16). Detailed embodiments of the non-zero termination process and the zero termination process are respectively described in Figure 4 and Figure 5 and described below.

[0054] If the zero search (ZS) flag in the M6 ​​field is 1, and the position of the zero element contained in the third operand is less than the length specified by the fourth operand, the position of the leftmost byte of the zero element is used as the length of the substring. If the ZS flag is 0, the length specified in the fourth operand is used. More specifically, if the zero search flag in the M6 ​​field is 1, the substring length is determined by the smallest of the number of the leftmost non-zero bytes in the fourth operand and the substring. If the zero search flag is 0, the substring length is determined by the fourth operand. Note that, as explained herein, the effect of the zero search flag being 1 is that the search string (in V2) is "virtually" shortened from its full length to the number of the leftmost non-zero bytes in the search string.

[0055] The leftmost byte position in the second operand calculates the first intermediate result, wherein the element from left to right of the substring matches the element with the length of the substring in the second operand. If there is this position, there is a complete match, so. Otherwise, the longest left-to-right partial string of the substring that matches the rightmost element of the second operand is calculated as the intermediate result. If this matching is found, it is called a partial match, so. Otherwise, there is no matching, and the intermediate position result is n, where n is the length of the string in bytes (e.g., 16 in the following example).

[0056] If the zero search (ZS) flag in the M6 ​​field is 1, and the index of the first substring match position is greater than the position of the leftmost byte of the leftmost zero element in the second operand, the match is ignored. If a match is found that is not ignored, the starting position of the match in bytes in the second operand is stored, for example, in byte element 7 of the first operand (V1), otherwise the value 16 is stored. All other bytes of the first operand may be set to 0. In one or more embodiments, byte element 7 of the fourth operand (V4) specifies the length of the substring in bytes and is in the range of 0 to 16.

[0057] The M5 field specifies the size of the elements in the vector register operand. If a reserved value is specified, a specified exception is recognized. For example, M5 may include a value of 0 indicating a 1-byte element size, a value of 1 indicating a 2-byte element size (halfword), or a value of 2 indicating a 4-byte element size (word). If the M5 field specifies a halfword or word element size, and the length of the substring in bytes is not a multiple of this element size, then processing ends, or is adjusted to an appropriate multiple of the element size.

[0058] In one or more embodiments, the M6 ​​field can be a 4-bit field, with bits 0, 1, and 3 reserved, and bit 2 indicating a zero-terminated search. If bit 2 is 1, the position of the leftmost 0-byte element marks the string length, i.e., the string includes a zero-terminated position.

[0059] Example result condition code:

[0060] 0-No match or partial match of the substring was found, the ZS flag is 0 or no zero byte was detected in the second operand.

[0061] 1-A substring mismatch was found, the ZS flag is 1, and a zero byte was detected in the second operand.

[0062] 2- Find an exact match.

[0063] 3- Find a partial match by not having an exact match.

[0064] As another example, Figure 4 One embodiment of instruction processing in a non-zero termination search mode according to one or more aspects of the present invention is described. Figure 4 and Figure 5In the example of , Vx[y] represents the yth byte element of the xth operand, V[i:k] represents the concatenated bytes from i to k of operand V, and M5 represents the value of the M5 field. For example, the substring length is read via the fourth vector register field, and the variable k is initialized to zero (substr_len=V4[7]; k=0) 400. The value of the first mask field (M5) is obtained, and the process determines whether the value is zero indicating a 1-byte element size (M5=0?) 402. If "yes", the number of bytes of each element (or character) is saved to the char_size variable (char_size=1) 404. Assuming that M5 does not contain a zero value, the process determines whether it contains a 1 value (M5=1?) 406. If "yes", the M5 field represents a 2-byte element size (halfword), and char_size is set to 2 (char_size=2) 408. Otherwise, processing determines whether the M5 field specifies a value of 2 (M5=2?) 410, indicating an element size of 4 bytes (words), and if so, char_size is set to 4 (char_size=4) 412. In one or more implementations, based on the M5 field specifying a value other than 0, 1, or 2, an exception (spec excpt) occurs 411, and the search is handled by another method than specified herein.

[0065] In one or more implementations, the process determines if the substring length is equal to zero (substr_len=0?) 414. If so, a special case is identified where, for example, a higher language procedure is used to determine the search and match. Based on this indication, a complete match condition indication (CC2 (Complete Match)) 416 is returned.

[0066] Assuming the substring length is greater than zero, the process determines whether the substring length is a multiple of the character size (substr_len % char_size = 0?) 418, where % represents the remainder after "substr_len" is divided by "char_size". If there is a remainder, meaning that the substring length is not an integer multiple of the character size, the process ends (end) 420 because a non-deterministic result is obtained.

[0067] Assuming the substring length is a multiple of the element (or character) size, a loop is entered to test the elements in the string to determine if a match exists. Specifically, the process determines whether the variable k is equal to the total number of bytes in the string, where 16 is represented by way of example only (k=16?) 422. From the current position k in the string, the substring length is added, and the process determines whether the combination is less than 16 (k+substr_len<=16?) 424. If "yes", the full length of the substring is searched to find the string (V2[k:k+substr_len-1]=V3[0:substr_len-1]?) 426, where V2[k:k+substr_len-1] represents the concatenated bytes k to substr_len-1 of the string to be compared with the substring specified in the third operand V3. If "yes", meaning that the substring matches a particular byte in the string, then a complete match condition indication (V1[0:6; 8:15]=zero; V1[7]=k; CC2(complete match)) 416 with the position of the first complete match in the string is returned, where (as mentioned) the complete match condition indication may refer to condition code 2 (CC2) in one or more embodiments, and the first vector register is set to zero, with bit 7 (in one example only) set equal to k to specify the position of the first complete match in the string.

[0068] Assuming there is no match according to the query 426, the process increments the variable k by the previously determined element size (char_size) (k=k+char_size) 428. This results in traversing the string in a step-wise manner based on the element size.

[0069] If k reaches the end of the string, 16 in this example, without a match, then a mismatch condition indication (V1[0:6;8:15]=zero, V1[7]=16; CC0 (mismatch)) 434 with element position n is returned from the query (k=16?), where n is the last byte of the string. For example, and as mentioned, the mismatch condition indication may be condition code 0 (CC0), and the position left in the search may be returned as bit 7 of the first vector V1 (for example only).

[0070] According to the query (k+substr_len<=16?) 424, if the value of k+substr_len is not less than 16424, the substring will no longer fit into the element of the string being searched, and only a partial match is possible. The process determines whether there is a partial match with the remainder of the string being searched (V2[k:15]=V3[0:15-k]?) 430. If "no", the process loops back to increment k by the element size (k=k+char_size) 428. If "yes", a partial match is identified, and a partial match condition indication (V1[0:6;8:15]=zero;V1[7]=k;CC3(partial match)) 432 with the position of the partial match in the string is returned. For example, as described above, the partial match condition code CC3 and the position of the partial match in the string can be indicated. .

[0071] Figure 5 One embodiment of instruction processing in zero-terminated search mode according to one or more aspects of the present invention is depicted. In this example, the substring length is read, for example, from the fourth vector register field, and variables str_len, i, k, and eos are initialized to zero (substr_len=V4[7], str_len=0, i=0, k=0, eos=0) 500. The value of the first mask field (M5) is obtained, and the process determines whether the value is zero, which indicates an element size of 1 byte (M5=0?) 502. If "yes", the number of bytes of each element (or character) is saved to the char_size variable (char_size=1) 504. Assuming that M5 does not contain a zero value, the process determines whether it contains a 1 value (M5=1?) 506. If "yes", the M5 field indicates a 2-byte element size (halfword), and char_size is set to 2 (char_size=2) 508. Otherwise, processing determines whether the M5 field specifies a value of 2 (M5=2?) 510, which indicates a 4-byte element size (word), and, if so, char_size is set to 4 (char_size=4) 512. In one or more implementations, based on M5 specifying a value other than 0, 1, or 2, an exception (specexpt) occurs 511, and the search is processed by another method other than that specified herein.

[0072] In one or more implementations, the process determines whether the substring includes a zero terminator (i < 16 and V3[i:i+char_size-1]!=0?) 514, where valid values ​​for i are integer multiples of the character size. The process increments until a zero character is identified, or, for example, i=16 in this example (i=i+char_size) 516. A determination is made as to whether a zero terminator with position i is found in the substring at a position less than the substring length (i<substr_len?) 518. If "yes", the substring character length is changed to be equal to i (substr_len=i) 520.

[0073] In one or more implementations, the process determines if the substring length is equal to zero (substr_len=0?) 522. If so, a special case is identified where, for example, higher language processing is used to determine the search and match. Based on this indication, a complete match condition indication (CC2 (Complete Match)) 524 is returned.

[0074] Assuming the substring length is greater than zero, the process determines whether variable k = 16 (in this example) (k = 16?) 526. Assuming "no", the process determines whether a zero termination is found in the string (V2[k: k = char_size-1] = 0?) 528. If "no", the variable k is incremented by the element size (k = k + char_size) 532, and the process is repeated. Assuming a zero termination is found in the string, the variable (eos = 1) is set 534, and the string length variable is set to the location k where the zero termination is located (str_len = k, k = 0) 536.

[0075] In one or more embodiments, the process determines whether the substring length is a multiple of the character size (substr_len % char_size 0?) 538, where the % represents the remainder of "substr_len" divided by "char_size". If there is a remainder, meaning that the substring length is not an integer multiple of the character size, the process ends (end) 540 because a non-deterministic result is obtained.

[0076] Assuming that the substring length is a multiple of the element (or character) size, a loop is entered to test the elements in the string to determine if a match exists. Specifically, the process determines whether the variable k is less than the string length (k < str_len?) 542. Assuming this, the process determines whether the variable eos is equal to zero, or whether the current position k plus the length of the substring is less than or equal to the string length (eos = 0 or k + substr_len <= str_len?) 544. If "yes", the process determines whether the current position k plus the length of the substring is less than or equal to the string length (k + substr + len <= str_len?) 546. If "yes", the full length of the substring is searched into the string (V2 [k: k + substr_len-1] = V3 [0: substr_len-1]?) 552. If "yes", meaning that the substring matches a particular byte in the string, then an exact match condition indication is returned with the position of the first exact match within the string (V1[0:6;8:15]=zeros, V1[7]=k, CC2 (exact match)) 524. Note that in one example, the position is returned with the first vector register set to all zeros except, for example, byte 7 equal to k, to specify the position or offset of the first exact match in the string.

[0077] Assuming the query 552 does not match, the process increments the variable k by the previously determined element size (char_size) (k=k+char_size) 554 .

[0078] From query 546, if k plus the substring length is greater than the remaining string length, the process looks for a partial match of the substring at the end of the string (V2[k:15]=V3[0:15-k]?) 548. If there is a partial match, a partial match condition indication is returned with the position of the partial match in the string (V1[0:6;8:15]=zero, V1[7]=k, CC3 (partial match)) 550.

[0079] If k reaches the end of the string (query 542), or according to query 544, if the end-of-string variable (eos) is not zero, and k+substr_len is greater than the string length 544, the process determines whether the end-of-string variable is set (eos=1?) 556. If "no", a non-match condition indication is returned, along with element position n, where n is the length of the string in bytes (16 in this example) (V1[0:6;8:15]=zero, V1[7]=16, CC0 (no match)) 560. Otherwise, a non-match with a zero termination condition indication is returned, along with element position n (V1[0:6;8:15]=zero, V1[7]=16, CC1 (no match, zero character)) 558.

[0080] refer to Figure 6A-6BFurther details of one embodiment that facilitates processing within a computing environment related to one or more aspects of the present invention are described.

[0081] refer to Fig. 6A In one embodiment, an instruction to be processed is obtained, wherein the instruction is defined as a string search instruction for locating an occurrence of a substring within a string (600). The instruction is executed on a processor of a computing environment (602), and based on executing the instruction, processing searches a string specified in one operand of the instruction using a substring specified in another operand of the instruction (604). Based on the search locating a first complete match of the substring within the string, an indication of a complete match condition and a position of the first complete match in the string are returned (606). Based on the search locating only a partial match of the substring when the string is terminated, an indication of a partial match condition and a position of the partial match in the string are returned (608).

[0082] In one or more implementations, processing further includes, based on the search locating a mismatch of the substring within the string, returning an indication of the mismatch condition and an indication of a search completion position n, where n is the length of the string in bytes (610).

[0083] refer to Figure 6B In one or more embodiments, processing further includes determining a search mode, wherein the search includes a non-zero termination search mode and a zero termination search mode, and the determination is based on whether a zero search flag in a field of the instruction is set to indicate that the string or substring may include a zero termination to truncate the string or substring, respectively, for searching (612). For example, processing includes, based on the search mode being a zero termination search mode, determining that the string includes a zero termination, and based on this, setting a zero termination found indicator (614). Additionally, processing may include, based on the search reaching a zero termination within the string without a match, terminating the string and referring to the zero termination found indicator, returning a non-match with an indication of the zero termination condition and a search completion position n, where n is the length of the string in bytes (616).

[0084] In one or more implementations, determining may further include determining that a length of the string before the zero termination within the string is less than a substring length, and based thereon, determining whether a portion of the substring matches the string before the zero termination (618).

[0085] In one embodiment, the search may be performed based on the length of the substring being a multiple of the size of the elements within the string, where the size is determined by a field of the instruction (620). Additionally, the search may be based in part on the size of the elements within the string, where the search includes stepping through the string based on the elements, where the size may be 1 byte, 2 bytes, or 4 bytes (622).

[0086] In one or more embodiments, the string search instruction is an architected hardware machine instruction (624) of an instruction set architecture. For example, the architected hardware machine instruction may be a vector string search instruction (626).

[0087] Other variations and embodiments are possible.

[0088] Aspects of the present invention may be used by many types of computing environments. Fig. 7A Another embodiment of a computing environment for incorporating and using one or more aspects of the present invention is described. In this example, the computing environment 10 includes, for example, a local central processing unit (CPU) 12, a memory 14, and one or more input / output devices and / or interfaces 16 coupled to each other by, for example, one or more buses 18 and / or other connections. As an example, the computing environment 10 may include a processor provided by International Business Machines Corporation of Armonk, New York. processors; HP Superdome with Intel Itanium II processors, provided by Hewlett-Packard Company, Palo Alto, California, USA; and / or other machines based on architectures provided by International Business Machines Corporation, Hewlett-Packard, Intel Corporation, Oracle, or others. IBM, z / Architecture, IBM Z, z / OS, PR / SM, and PowerPC are trademarks or registered trademarks of International Business Machines Corporation in at least one jurisdiction. Intel and Itanium are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the U.S. and other countries.

[0089] The local central processing unit 12 includes one or more local registers 20, such as one or more general purpose registers and / or one or more special purpose registers used during processing within the environment. These registers include information representing the state of the environment at any particular point in time.

[0090] In addition, the local central processing unit 12 executes instructions and codes stored in the memory 14. In a specific example, the central processing unit executes emulator code 22 stored in the memory 14. This code enables a computing environment configured in one architecture to simulate another architecture. For example, the emulator code 22 allows a machine based on an architecture other than the z / Architecture hardware architecture (such as a PowerPC processor, HP Superdome server, or other) to simulate the z / Architecture hardware architecture and execute software and instructions developed based on the z / Architecture hardware architecture.

[0091] refer to Figure 7BDescribe further details related to the emulator code 22. The client instructions 30 stored in the memory 14 include software instructions (e.g., related to machine instructions) developed for execution in an architecture different from the architecture of the local CPU 12. For example, the client instructions 30 may have been designed to be executed on a processor based on the z / Architecture hardware architecture, but instead emulated on the local CPU 12, which may be, for example, an Intel Itanium II processor. In one example, the emulator code 22 includes an instruction acquisition routine 32 to obtain one or more client instructions 30 from the memory 14, and optionally provide local buffering for the obtained instructions. It also includes an instruction conversion routine 34 to determine the type of the client instruction that has been obtained and convert the client instruction into one or more corresponding native instructions 36. This conversion includes, for example, identifying the function to be performed by the client instruction and selecting a native instruction to perform the function.

[0092] Further, the emulator code 22 includes an emulation control routine 40 to cause native instructions to be executed. The emulation control routine 40 may cause the local CPU 12 to execute a routine of native instructions that emulates one or more previously acquired guest instructions, and at the end of this execution, return control to the instruction fetch routine to emulate the acquisition of the next guest instruction or set of guest instructions. The execution of the native instructions 36 may include loading data from the memory 14 into registers; storing data from registers back to memory; or performing some type of arithmetic or logic operation as determined by the conversion routine.

[0093] Each routine is implemented, for example, in software that is stored in memory and executed by the local central processing unit 12. In other examples, one or more of the routines or operations are implemented in firmware, hardware, software, or some combination thereof. The registers of the emulated processor may be emulated using the registers 20 of the local CPU or by using locations in memory 14. In an embodiment, the client instructions 30, the native instructions 36, and the emulator code 22 may reside in the same memory or may be distributed between different memory devices.

[0094] The computing environments described above are merely examples of computing environments that may be used. Other environments may be used, including but not limited to other non-partitioned environments, other partitioned environments, and / or other simulation environments; embodiments are not limited to any one environment.

[0095] Each computing environment can be configured to include one or more aspects of the present invention. For example, each computing environment can be configured to provide flow processing according to one or more aspects of the present invention.

[0096] One or more aspects may relate to cloud computing.

[0097] It should be understood that although the present disclosure includes detailed descriptions about cloud computing, the implementation of the teachings cited herein is not limited to cloud computing environments. Instead, embodiments of the present invention can be implemented in conjunction with any other type of computing environment now known or later developed.

[0098] Cloud computing is a service delivery model for enabling convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services) that can be quickly provisioned and released with minimal management effort or interaction with a service provider. The cloud model can include at least five characteristics, at least three service models, and at least four deployment models.

[0099] Features are as follows:

[0100] On-demand self-service: Cloud consumers can unilaterally provision computing capabilities, such as server time and network storage, automatically on demand without requiring manual interaction with the service provider.

[0101] Broad Network Access: Functionality is provided over the network and accessed through standard mechanisms that facilitate use by heterogeneous thin-client or thick-client platforms (e.g., mobile phones, laptops, and PDAs).

[0102] Resource pooling: Providers' computing resources are pooled to serve multiple consumers using a multi-tenant model, with different physical and virtual resources dynamically allocated and reallocated as needed. Location independence is present in the sense that consumers typically have no control or knowledge over the exact location of the provided resources, but may be able to specify a location at a higher level of abstraction (e.g., country, state, or data center).

[0103] Rapid elasticity: Capabilities can be provisioned quickly and elastically in certain situations to scale up and down quickly and released quickly to scale down quickly. To the consumer, the capabilities available for provisioning often appear to be unlimited and can be purchased at any time and in any quantity.

[0104] Measured services: Cloud systems automatically control and optimize resource usage by leveraging metering capabilities at some level of abstraction appropriate to the type of service (e.g., storage, processing, bandwidth, and active user accounts). Resource usage can be monitored, controlled, and reported, providing transparency to both providers and consumers of the services being used.

[0105] The service model is as follows:

[0106] Software as a Service (SaaS): The capability provided to consumers is to use the provider's applications running on the cloud infrastructure. These applications are accessible from different client devices through a thin client interface such as a web browser (e.g., web-based email). The consumer does not manage or control the underlying cloud infrastructure including networks, servers, operating systems, storage, or even individual application functionality, with the possible exception of limited user-specific application configuration settings.

[0107] Platform as a Service (PaaS): The capability provided to consumers is to deploy consumer-created or acquired applications on the cloud infrastructure, where the applications are created using programming languages ​​and tools supported by the provider. Consumers do not manage or control the underlying cloud infrastructure including networks, servers, operating systems, or storage, but have control over the deployed applications and possibly the configuration of the application hosting environment.

[0108] Infrastructure as a Service (IaaS): The capabilities provided to consumers are processing, storage, networking, and other basic computing resources on which consumers can deploy and run arbitrary software, including operating systems and applications. Consumers do not manage or control the underlying cloud infrastructure, but have control over the operating system, storage, deployed applications, and possibly limited control over selected networking components (e.g., host firewalls).

[0109] The deployment model is as follows:

[0110] Private Cloud: Cloud infrastructure is operated solely for an organization. It can be managed by the organization or a third party and can exist on-premises or off-premises.

[0111] Community cloud: The cloud infrastructure is shared by multiple organizations and supports a specific community with common concerns (e.g., mission, security requirements, policy, and compliance considerations). It can be managed by the organization or a third party and can exist on-premises or off-premises.

[0112] Public cloud: Cloud infrastructure is available to the general public or large industry groups and is owned by an organization that sells cloud services.

[0113] Hybrid cloud: A cloud infrastructure composed of two or more clouds (private, community, or public) that remain unique entities but are bound together by standardized or proprietary technologies that enable data and application portability (e.g., cloud bursting for load balancing between clouds).

[0114] The cloud computing environment is service-oriented, focusing on statelessness, low coupling, modularity, and semantic interoperability. At the core of cloud computing is the infrastructure that includes a network of interconnected nodes.

[0115] See now Figure 8, depicting an illustrative cloud computing environment 50. As shown, the cloud computing environment 50 includes one or more cloud computing nodes 52, and local computing devices used by cloud consumers (such as personal digital assistants (PDAs) or cell phones 54A, desktop computers 54B, laptop computers 54C, and / or automotive computer systems 54N) can communicate with the cloud computing nodes 52. The nodes 52 can communicate with each other. They can be physically or virtually grouped (not shown) in one or more networks, such as in the private cloud, community cloud, public cloud, or hybrid cloud described above, or a combination thereof. This allows the cloud computing environment 50 to provide infrastructure, platforms, and / or software as a service, for which cloud consumers do not need to maintain resources on local computing devices. It should be understood that the types of computing devices 54A-N shown in FIG. 7 are intended to be illustrative only, and that the computing nodes 52 and the cloud computing environment 50 can communicate with any type of computerized device over any type of network and / or network addressable connection (e.g., using a web browser).

[0116] See now Fig. 9 , showing the cloud computing environment 50 ( Figure 8 ) provides a set of functional abstraction layers. It should be understood in advance that Fig. 9 The components, layers and functions shown in are intended to be illustrative only, and embodiments of the present invention are not limited thereto. As shown, the following layers and corresponding functions are provided:

[0117] The hardware and software layer 60 includes hardware and software components. Examples of hardware components include: host 61; server 62 based on RISC (Reduced Instruction Set Computer) architecture; server 63; blade server 64; storage 65; and network and networking components 66. In some embodiments, software components include network application server software 67 and database software 68.

[0118] Virtualization layer 70 provides an abstraction layer from which the following examples of virtual entities can be provided: virtual servers 71 ; virtual storage 72 ; virtual networks 73 , including virtual private networks; virtual applications and operating systems 74 ; and virtual clients 75 .

[0119] In one example, the management layer 80 may provide the functionality described below. Resource provisioning 81 provides dynamic acquisition of computing resources and other resources for performing tasks within a cloud computing environment. Metering and pricing 82 provides cost tracking when resources are utilized within a cloud computing environment, and bills or invoices for the consumption of these resources. In one example, these resources may include application software licenses. Security provides authentication for cloud consumers and tasks, as well as protection of data and other resources. User portal 83 provides access to the cloud computing environment for consumers and system administrators. Service level management 84 provides cloud computing resource allocation and management so that the required service levels are met. Service level agreement (SLA) planning and fulfillment 85 provides pre-arrangement and procurement of cloud computing resources for future requirements for cloud computing resources anticipated according to the SLA.

[0120] The workload layer 90 provides examples of functions that can utilize the cloud computing environment. Examples of workloads and functions that can be provided from this layer include: mapping and navigation 91; software development and lifecycle management 92; virtual classroom education delivery 93; data analysis processing 94; transaction processing 95; and string search processing 96.

[0121] The various aspects of the present invention may be systems, methods and / or computer program products at any possible level of technical detail integration. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon, the computer-readable program instructions being used to cause a processor to perform aspects of the present invention.

[0122] A computer-readable storage medium may be a tangible device that can retain and store instructions for use by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device (such as a punch card) or a raised structure in a groove with instructions recorded thereon), and any suitable combination of the above. As used herein, a computer-readable storage medium should not be interpreted as a transient signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagated by a waveguide or other transmission medium (e.g., a light pulse by a fiber optic cable), or an electrical signal transmitted by a wire.

[0123] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a corresponding computing / processing device, or downloaded to an external computer or external storage device via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network). The network may include copper transmission cables, optical transmission fibers, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives computer-readable program instructions from the network and forwards these computer-readable program instructions to be stored in a computer-readable storage medium in the corresponding computing / processing device.

[0124] The computer-readable program instructions for performing the operation of the present technical solution can be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, configuration data of integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and procedural programming languages, such as "C" programming language or similar programming languages. The computer-readable program instructions can be executed completely on the user's computer, partially on the user's computer, executed as an independent software package, partially on the user's computer, partially on a remote computer, or completely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer through any type of network (including a local area network (LAN) or a wide area network (WAN)), or can be connected to an external computer (for example, by using the Internet of an Internet service provider). In some embodiments, an electronic circuit (including, for example, a programmable logic circuit, a field programmable gate array (FPGA) or a programmable logic array (PLA)) can execute a computer-readable program instruction to personalize the electronic circuit by using the state information of the computer-readable program instructions, so as to perform various aspects of the present technical solution.

[0125] Various aspects of the technical solution are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the technical solution. It should be understood that each box in the flowchart and / or block diagram and the combination of boxes in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0126] These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine that, when executed by a processor of the computer or other programmable data processing apparatus, creates a device for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that can instruct a computer, a programmable data processing apparatus, and / or other device to function in a particular manner, such that a computer-readable storage medium having instructions stored therein includes an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0127] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other apparatus that causes a series of operating steps to be performed on a computer, other programmable apparatus, or other device to produce a computer-implemented process, so that the instructions executed on the computer, other programmable apparatus, or other device implement the functions and actions specified in one or more blocks in the flowchart and / or block diagram.

[0128] The flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to the different embodiments of the present technical solution. To this end, each box in the flowchart or block diagram can represent a part of a module, segment or instruction, which includes one or more executable instructions for realizing the specified logical function. In some alternative embodiments, the functions marked in the box may not occur in the order marked in the figure. For example, depending on the functions involved, the two boxes shown in succession can actually be executed substantially at the same time, or these boxes can sometimes be executed in the opposite order. It will also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented by a system based on special-purpose hardware, and the system based on special-purpose hardware performs a specified function or action or performs a combination of special-purpose hardware and computer instructions.

[0129] In addition to the above, one or more aspects may be provided, committed, deployed, managed, serviced, etc. by a service provider that provides customer environment management. For example, the service provider may create, maintain, support computer code and / or computer infrastructure that performs one or more aspects for one or more customers. In return, the service provider may receive payment from the consumer, for example, under a subscription and / or fee agreement. Additionally or alternatively, the service provider may receive payment from the sale of advertising content to one or more third parties.

[0130] In one aspect, an application program for executing one or more embodiments may be deployed. As an example, deployment of an application program includes providing a computer infrastructure operable to execute one or more embodiments.

[0131] As another aspect, a computing infrastructure may be deployed including integrating computer readable code into a computing system, wherein the code in combination with the computing system is capable of performing one or more embodiments.

[0132] As another aspect, a process for integrating a computing infrastructure may be provided, the process comprising integrating a computer readable code into a computer system. The computer system comprises a computer readable medium, wherein the computer medium comprises one or more embodiments. The code combined with the computer system is capable of executing one or more embodiments.

[0133] Although various embodiments are described above, these are only examples. For example, computing environments of other architectures may be used to include and use one or more embodiments. Further, different instructions or operations may be used. In addition, different types of indicators may be specified. Many variations are possible.

[0134] Further, other types of computing environments can benefit and can be used. As an example, a data processing system suitable for storing and / or executing program code is available, which includes at least two processors that are directly or indirectly coupled to a memory element through a system bus. The memory element includes, for example, a local memory, a mass storage device, and a temporary storage of at least some program codes that is provided to reduce the number of times that code must be retrieved from a mass storage device during execution.

[0135] Input / output or I / O devices (including but not limited to keyboards, displays, pointing devices, DASD, tapes, CDs, DVDs, thumb drives and other storage media, etc.) may be coupled to the system either directly or through intervening I / O controllers. Network adapters may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modems and Ethernet cards are just a few of the available types of network adapters.

[0136] The terms used herein are only used for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that when the terms "comprise" and / or "comprising" are used in this specification, they specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0137] All means or steps in the following claims plus corresponding structures, materials, actions, and equivalents of functional elements (if any) are intended to include any structure, material, or action for performing a function in conjunction with other claimed elements as specifically claimed. A description of one or more embodiments has been given for purposes of illustration and description, but is not intended to be exhaustive or limited to the disclosed forms. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments are selected and described in order to best explain various aspects and practical applications, and to enable those of ordinary skill in the art to understand different embodiments with different modifications suitable for the intended specific use.

Claims

1. A computer program product for facilitating processing within a computing environment, the computer program product comprising: A computer readable storage medium readable by a processing circuit and storing instructions for executing a method comprising: obtaining an instruction to be processed, the instruction being defined as a string search instruction for locating an occurrence of a substring within a string; Processing the instruction, the processing comprising: determining a mode for the search, the search comprising a non-zero terminated search mode and a zero terminated search mode, and the determination is based on whether a zero search flag in a field of the instruction is set to indicate that the string or substring may contain a zero termination that truncates the string or substring, respectively, for the search; searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction, wherein the search is continued based on a length of the substring being a multiple of a size of elements within the string, the size being determined by a field of the instruction; Based on the search locating a first exact match for the substring within the string, returning an indication of an exact match condition and a position of the first exact match within the string; and Based on the search locating only a partial match of the substring at the end of the string, an indication of a partial match condition is returned along with the position of the partial match in the string.

2. The computer program product of claim 1 , wherein the processing further comprises, based on the searching, locating a mismatch of the substring within the string, returning a mismatch condition indication and a search completion position n, where n is the length of the string in bytes.

3. The computer program product of claim 1, wherein the processing further comprises, based on the search pattern being the null-termination search pattern, determining that the string includes the null-termination, and based thereon, setting a null-termination found indicator.

4. A computer program product according to claim 3, wherein the processing further includes, based on the search reaching a zero termination within the string without a match, terminating the search, and returning a non-match with a zero termination condition indication and a search completion position n with reference to the zero termination found indicator, where n is the length of the string in bytes.

5. The computer program product of claim 3, wherein the determining further comprises determining that a length of the string before the zero termination within the string is less than the substring length, and based thereon, determining whether a portion of the substring matches the string before the zero termination.

6. The computer program product of claim 1, wherein the search is based in part on a size of elements within the string, the search comprising stepping through the string based on an element, wherein the size is selected from the group consisting of 1 byte, 2 bytes, or 4 bytes.

7. The computer program product of claim 1, wherein the string search instruction is an architected hardware machine instruction of an instruction set architecture.

8. The computer program product of claim 7, wherein the architected hardware machine instruction is a vector string search instruction.

9. A computer system for facilitating processing within a computing environment, the computer system comprising: Memory; as well as A processor coupled to the memory, wherein the computer system is configured to perform a method comprising: obtaining an instruction to be processed, the instruction being defined as a string search instruction for locating an occurrence of a substring within a string; Processing the instruction, the processing comprising: determining a mode for the search, the search comprising a non-zero terminated search mode and a zero terminated search mode, and the determination is based on whether a zero search flag in a field of the instruction is set to indicate that the string or substring may contain a zero termination that truncates the string or substring, respectively, for the search; searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction, wherein the search is continued based on a length of the substring being a multiple of a size of elements within the string, the size being determined by a field of the instruction; Based on the search locating a first exact match of the substring within the string, returning an indication of an exact match condition and a position of the first exact match within the string; as well as Based on the search locating only a partial match of the substring at the end of the string, an indication of a partial match condition is returned along with the position of the partial match in the string.

10. The computer system of claim 9, wherein the processing further comprises, based on the searching locating a mismatch of the substring within the string, returning a mismatch condition indication and a search completion position n, n being the length of the string in bytes.

11. The computer system of claim 9, wherein the processing further comprises, based on the search pattern being the zero-terminated search pattern, determining that the string includes the zero-terminated string, and setting a zero-terminated found indicator based thereon.

12. A computer system according to claim 11, based on the search reaching a zero termination within the string without a match, terminating the search, and returning a non-match with a zero termination condition indication and a search completion position n with reference to the zero termination found indicator, where n is the length of the string in bytes.

13. The computer system of claim 11, wherein the determining further comprises determining that a length of the string before the zero termination within the string is less than the substring length, and based thereon, determining whether a portion of the substring matches the string before the zero termination.

14. The computer system of claim 9 further comprising wherein the search is based in part on a byte size of elements within the string, the search comprising stepping through the string based on an element, wherein the byte size is selected from the group consisting of 1 byte, 2 bytes, or 4 bytes.

15. A computer-implemented method for facilitating processing within a computing environment, the computer-implemented method comprising: obtaining an instruction to be processed, the instruction being defined as a string search instruction for locating an occurrence of a substring within a string; Processing the instruction, the processing comprising: determining a mode for the search, the search comprising a non-zero terminated search mode and a zero terminated search mode, and the determination is based on whether a zero search flag in a field of the instruction is set to indicate that the string or substring may contain a zero termination that truncates the string or substring, respectively, for the search; searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction, wherein the search is continued based on a length of the substring being a multiple of a size of elements within the string, the size being determined by a field of the instruction; Based on the search locating a first exact match of the substring within the string, returning an indication of an exact match condition and a position of the first exact match within the string; as well as Based on the search locating only a partial match of the substring at the end of the string, an indication of a partial match condition is returned along with the position of the partial match in the string.

16. The computer-implemented method of claim 15, wherein the logic further comprises, based on the search locating a mismatch of the substring within the string, returning a mismatch condition indication and a search completion position n, where n is the length of the string in bytes.

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