Method of manufacturing a mask, mask manufactured thereby, and method of manufacturing a display device
By forming an organic material layer on a mask substrate and etching through holes in the mask sheet, and then forming a conductive layer on the mask sheet and fixing it to the frame, the problem of insufficient deposition uniformity in large display devices is solved, and uniform deposition of display devices is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SAMSUNG DISPLAY CO LTD
- Filing Date
- 2021-01-25
- Publication Date
- 2026-05-22
AI Technical Summary
In the manufacturing of large display devices, the deposition uniformity of existing masks is insufficient, resulting in uneven quality of the display devices.
An organic material layer is formed on a mask substrate and a hard mask is patterned. A mask sheet with through holes is etched to form the through holes. Then, a conductive material layer is formed on the mask sheet and a conductive layer is etched to form the conductive layer. The conductive layer is separated from the through holes and has a grid or island shape, and is fixed on a frame.
This improved the deposition uniformity of large display devices, ensuring consistent quality.
Smart Images

Figure CN113437246B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for manufacturing a mask, a mask manufactured therefrom, and a method for manufacturing a display device using the mask, and more specifically, to a method for manufacturing a mask with improved deposition uniformity, a mask manufactured therefrom, and a method for manufacturing a display device using the mask. Background Technology
[0002] Typically, multiple layers are formed during the manufacturing of display devices, including organic light-emitting diode (OLED) displays, using methods such as deposition. For example, in the manufacturing process of OLED displays, a deposition apparatus is used to form hole injection layers, hole transport layers, light-emitting layers, electron transport layers, or electron injection layers on a substrate. During this process, a mask is used to deposit material onto predetermined portions of the substrate. Of course, depending on the circumstances, a mask can also be used to deposit metal layers onto predetermined portions of the substrate when forming metal layers. Summary of the Invention
[0003] However, in conventional mask manufacturing methods, mask manufacturing methods, and display device manufacturing methods using the mask, there is a problem of reduced deposition uniformity when using large-area masks that can be used in large display devices.
[0004] This invention addresses a variety of problems, including those described above, and aims to provide a method for manufacturing a mask that improves deposition uniformity in the manufacture of large display devices, a mask manufactured accordingly, and a method for manufacturing a display device using the mask. However, this subject matter is merely exemplary, and the scope of the invention is not limited thereto.
[0005] According to one aspect of the present invention, a method for manufacturing a mask is provided, comprising the following steps: forming an organic material layer on a mask substrate; patterning a hard mask on the organic material layer; etching the organic material layer to form a mask sheet including through holes; removing the hard mask disposed on the mask sheet; forming a conductive material layer on the mask sheet; and etching the conductive material layer to form a conductive layer.
[0006] In this embodiment, in the step of etching the organic material layer to form a mask sheet including through holes, the mask sheet can be formed by a dry etching process.
[0007] In this embodiment, in the step of forming a conductive material layer on the mask sheet, the conductive material layer may include at least one of Al, Ti, Mo, Cu, ITO, IZO and IGZO.
[0008] In this embodiment, in the step of etching the conductive material layer to form a conductive layer, the conductive layer can be formed by a dry etching process.
[0009] In this embodiment, the conductive layer can have a first thickness of 1500 angstroms from the upper surface of the mask. Up to 2500 Angers
[0010] In this embodiment, the conductive layer may be separated from the through-hole and has a mesh shape.
[0011] In this embodiment, at least a portion of the conductive layer may be separated from the through-hole and has an island shape.
[0012] In this embodiment, after the step of etching the conductive material layer to form the conductive layer, the following steps may be included: fixing the frame to the conductive layer; and removing the mask substrate.
[0013] In this embodiment, the conductive layer can be fixed to the frame by electrostatic force.
[0014] In this embodiment, the frame may be spaced apart from the through hole and has a grid shape.
[0015] In this embodiment, at least a portion of the frame may be separated from the through hole and has an island shape.
[0016] According to another aspect of the invention, a mask is provided, comprising: a frame; a mask sheet including a through hole; and a conductive layer spaced apart from the through hole in a plane and disposed between the frame and the mask sheet, and fixed to the frame.
[0017] In this embodiment, the conductive layer may include at least one of Al, Ti, Mo, Cu, ITO, IZO and IGZO.
[0018] In this embodiment, the conductive layer can have a first thickness of 1500 angstroms from the upper surface of the mask. Up to 2500 Angers
[0019] In this embodiment, the conductive layer may be separated from the through-hole and has a mesh shape.
[0020] In this embodiment, at least a portion of the conductive layer may be separated from the through-hole and has an island shape.
[0021] In this embodiment, the conductive layer can be fixed to the frame by electrostatic force.
[0022] In this embodiment, the frame may be spaced apart from the through hole and has a grid shape.
[0023] In this embodiment, at least a portion of the frame may be separated from the through hole and has an island shape.
[0024] According to another aspect of the present invention, a method for manufacturing a display device is provided, comprising the following steps: forming a pixel electrode; forming a light-emitting layer or an intermediate layer on the pixel electrode using a mask as described above; and forming a counter electrode on the light-emitting layer or the intermediate layer.
[0025] Other aspects, features, and advantages beyond those described above will become clear from the following specific details, claims, and drawings used to implement the invention.
[0026] According to an embodiment of the present invention configured as described above, a method for manufacturing a mask that can improve deposition uniformity in the manufacture of a large display device, a mask manufactured therefrom, and a method for manufacturing a display device using the mask can be realized. Of course, the scope of the present invention is not limited to these effects. Attached Figure Description
[0027] Figure 1 This is a perspective view schematically illustrating a display device according to an embodiment of the present invention.
[0028] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment of the present invention.
[0029] Figure 3 This is a schematic perspective view of a mask according to an embodiment of the present invention.
[0030] Figure 4 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention.
[0031] Figure 5 This is a schematic perspective view of a mask according to an embodiment of the present invention.
[0032] Figure 6 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention.
[0033] Figure 7 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention.
[0034] Figure 8 This is a schematic perspective view of a mask according to an embodiment of the present invention.
[0035] Figure 9 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention.
[0036] Figure 10 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention.
[0037] Figure 11 This is a schematic perspective view of a mask according to an embodiment of the present invention.
[0038] Figure 12 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention.
[0039] Figures 13 to 19 This is a schematic cross-sectional view illustrating a method for manufacturing a mask according to an embodiment of the present invention.
[0040] [Symbol Explanation]
[0041] 1: Display device 210: Pixel electrode
[0042] 220: Intermediate layer 230: Counter electrode
[0043] 401: Mask substrate; 410: Mask sheet
[0044] 411: Through hole; 415: Hard mask
[0045] 420: Conductive layer; 430: Framework Detailed Implementation
[0046] This invention can be modified in various ways and can have multiple embodiments. Specific embodiments are illustrated in the accompanying drawings and described in detail in the specific description. The effects and features of this invention, as well as the methods for achieving them, will be explained by referring to the accompanying drawings. Figure 1 As will become clear from the detailed embodiments described below. However, the invention is not limited to the embodiments disclosed below, but can be implemented in many different forms.
[0047] In the following embodiments, terms such as "first" and "second" are not used in a limiting sense, but are used for the purpose of distinguishing one constituent element from other constituent elements.
[0048] In the following embodiments, the singular expression includes the plural expression unless otherwise explicitly indicated in the context.
[0049] In the following embodiments, terms such as "comprising" or "having" indicate the presence of features or constituent elements described in the specification, without pre-excluding the possibility of adding more than one other feature or constituent element.
[0050] In the following embodiments, when referring to a portion of a membrane, region, constituent element, etc., located on or above another portion, it includes not only the case where it is located immediately above the other portion, but also the case where other membranes, regions, constituent elements, etc. exist in between.
[0051] For ease of explanation, the sizes of the constituent elements in the accompanying drawings may be exaggerated or reduced. For example, for ease of explanation, the sizes and thicknesses of the various components shown in the drawings are arbitrarily depicted, and therefore the invention is not necessarily limited to the content shown in the drawings.
[0052] In this specification, "A and / or B" means that it is A, is B, or is a combination of A and B. Furthermore, in this specification, "at least one of A and B" means that it is A, is B, or is a combination of A and B.
[0053] In the following embodiments, the meaning of wiring "extending along a first direction or a second direction" not only means extending in a straight line shape, but also includes extending in a zigzag or curved shape along the first direction or the second direction.
[0054] In the following embodiments, when "on a plane" is mentioned, it refers to the situation when viewing the object portion from above; when "on a cross-section" is mentioned, it refers to the situation when viewing the object portion from the side, forming a cross-section by vertical cutting. In the following embodiments, when "overlap" is mentioned, it includes overlap between "on a plane" and "on a cross-section".
[0055] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. When describing with reference to the accompanying drawings, the same or corresponding constituent elements will be given the same reference numerals.
[0056] Figure 1 This is a schematic perspective view of a display device 1 according to an embodiment of the present invention.
[0057] Reference Figure 1 The display device 1 may include: a display area DA; and a non-display area NDA disposed around the display area DA. The non-display area NDA may surround the display area DA. The display device 1 may provide an image using light emitted from a plurality of pixels P disposed in the display area DA, and the non-display area NDA may be an area where no image is displayed.
[0058] Although the organic light-emitting display device is described below as an example of a display device 1 according to an embodiment of the present invention, the display device of the present invention is not limited thereto. As an embodiment, the display device 1 of the present invention may be an inorganic light-emitting display device (inorganic light-emitting display, inorganic electroluminescent display) or a quantum dot light-emitting display, etc. For example, the light-emitting layer provided on the display elements of the display device 1 may include organic materials, inorganic materials, quantum dots, organic materials and quantum dots, or inorganic materials and quantum dots.
[0059] Although Figure 1 A display device 1 with a flat display surface is shown, but the present invention is not limited thereto. As one embodiment, the display device 1 may also include a three-dimensional display surface or a curved display surface.
[0060] When the display device 1 includes a three-dimensional display surface, the display device 1 includes multiple display areas pointing in different directions to each other; for example, it may also include a polygonal prism-shaped display surface. As an embodiment, when the display device 1 includes a curved display surface, the display device 1 can be implemented in various forms such as a bendable, foldable, or rollable display device.
[0061] Figure 1 A display device 1 applicable to mobile phone terminals is shown. Although not shown, a mobile phone terminal can be constructed by arranging electronic modules, camera modules, power modules, etc., mounted on a motherboard together with the display device 1 in a bracket / housing, etc. In particular, the display device 1 according to the present invention can be applied not only to large electronic devices such as televisions and monitors, but also to small and medium-sized electronic devices such as tablet computers, car navigation systems, game consoles, and smartwatches.
[0062] Although Figure 1 The illustration shows a case where the display area DA of the display device 1 is quadrilateral, but the shape of the display area DA can be circular, elliptical, or a polygon such as a triangle or pentagon.
[0063] Display device 1 includes a plurality of pixels P arranged in display area DA. Each of the plurality of pixels P may include an organic light-emitting diode (OLED). Each of the plurality of pixels P may emit light, for example, red, green, blue or white, through the organic light-emitting diode OLED. Pixel P in this specification can be understood as a pixel that emits light of any color among red, green, blue, and white, as described above.
[0064] Figure 2 This is a schematic cross-sectional view of a display device 1 according to an embodiment of the present invention. More specifically, Figure 2 Equivalent to along Figure 1 A cross-sectional view taken from the I-I' line.
[0065] Reference Figure 2 Display elements may be arranged on the substrate 100. The display elements may include thin-film transistors (TFTs) and organic light-emitting diodes (OLEDs).
[0066] The substrate 100 may comprise glass or a polymer resin. The polymer resin may include polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate, etc. The substrate 100 comprising the polymer resin may have foldable, rollable, or bendable properties. The substrate 100 may be a multilayer structure comprising a layer containing the aforementioned polymer resin and an inorganic layer (not shown).
[0067] A buffer layer 101 may be disposed on the substrate 100. The buffer layer 101 may be located on the substrate 100 to block or reduce the penetration of foreign matter, moisture or external gases from the lower part of the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 101 may include inorganic materials such as oxides or nitrides, organic materials or organic-inorganic composites, and may be configured as a single layer or multiple layers of inorganic and organic materials.
[0068] Thin-film transistors (TFTs) can be disposed on the buffer layer 101. The TFT may include: a semiconductor layer 134; a gate electrode 136 overlapping the semiconductor layer 134; and a connection electrode electrically connected to the semiconductor layer 134. The TFT can be connected to an organic light-emitting diode (OLED) to drive the OLED.
[0069] The semiconductor layer 134 may include: a channel region 131 disposed on the buffer layer 101 and overlapping the gate electrode 136; and a source region 132 and a drain region 133 disposed on both sides of the channel region 131 and including a higher concentration of impurities than the channel region 131. The impurities may include N-type impurities or P-type impurities. The source region 132 and the drain region 133 may be electrically connected to a connection electrode.
[0070] Semiconductor layer 134 may include oxide semiconductors and / or silicon semiconductors. When semiconductor layer 134 is formed of an oxide semiconductor, it may, for example, include an oxide of at least one substance selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). For example, semiconductor layer 134 may be indium tin zinc oxide (ITZO: InSnZnO), indium gallium zinc oxide (IGZO: InGaZnO), etc. When semiconductor layer 134 is formed of a silicon semiconductor, it may, for example, include amorphous silicon (a-Si) or low-temperature polycrystalline silicon (LTPS: Low Temperature Poly-Silicon) formed by crystallizing amorphous silicon (a-Si).
[0071] A first insulating layer 103 may be disposed on the semiconductor layer 134. The first insulating layer 103 may include silicon oxide (SiO2) or silicon nitride (SiN) as the semiconductor layer 134. x The first insulating layer 103 may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials, selected from the group consisting of silicon nitride oxide (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2).
[0072] A gate electrode 136 may be disposed on the first insulating layer 103. The gate electrode 136 may be formed as a single layer or multiple layers of a metal selected from one or more of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu). The gate electrode 136 may be connected to a gate line that applies an electrical signal to the gate electrode 136.
[0073] A second insulating layer 105 may be disposed on the gate electrode 136. The second insulating layer 105 may include silicon oxide (SiO2) or silicon nitride (SiN) as the insulating layer. x The second insulating layer 105 may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials, selected from the group consisting of silicon nitride oxide (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2).
[0074] A storage capacitor Cst may be disposed on the first insulating layer 103. The storage capacitor Cst may include a lower electrode 144 and an upper electrode 146, which overlaps with the lower electrode 144. The lower electrode 144 and the upper electrode 146 of the storage capacitor Cst may overlap by placing a second insulating layer 105 therebetween.
[0075] The lower electrode 144 of the storage capacitor Cst may overlap with the gate electrode 136 of the thin-film transistor TFT, and the lower electrode 144 of the storage capacitor Cst may be integrally arranged with the gate electrode 136 of the thin-film transistor TFT. As an embodiment, the storage capacitor Cst may not overlap with the thin-film transistor TFT, and the lower electrode 144 of the storage capacitor Cst may be a constituent element independent of the gate electrode 136 of the thin-film transistor TFT.
[0076] The upper electrode 146 of the storage capacitor Cst may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may be a single layer or multiple layers of the aforementioned materials.
[0077] A third insulating layer 107 may be disposed on the upper electrode 146 of the storage capacitor Cst. The third insulating layer 107 may include silicon oxide (SiO2) or silicon nitride (SiN2). xThe third insulating layer 107 may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials, selected from the group consisting of silicon nitride oxide (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2).
[0078] A source electrode 137 and a drain electrode 138, serving as connection electrodes, may be disposed on the third insulating layer 107. The source electrode 137 and the drain electrode 138 may comprise conductive materials including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or a single layer comprising the aforementioned materials. The source electrode 137 and the drain electrode 138 may be configured as a Ti / Al / Ti multilayer structure.
[0079] A first planarization layer 111 may be disposed on the source electrode 137 and the drain electrode 138. The first planarization layer 111 may be formed as a single layer or multiple layers from a film composed of organic or inorganic substances. As an embodiment, the first planarization layer 111 may include general-purpose polymers such as benzocyclobutene (BCB), polyimide (PI), hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS), polymer derivatives with phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, and blends thereof. In addition, the first planarization layer 111 may include silicon oxide (SiO2), silicon nitride (SiN), etc. x Materials such as silicon nitride oxide (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2) can be used. After forming the first planarization layer 111, chemical mechanical polishing can be performed to provide a flat upper surface.
[0080] A contact metal layer CM may be disposed on the first planarization layer 111. The contact metal layer CM may include aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or a single layer. The contact metal layer CM may be configured as a Ti / Al / Ti multilayer structure.
[0081] A second planarization layer 113 may be disposed on the contact metal layer CM. The second planarization layer 113 may be formed as a single layer or multiple layers from a film composed of organic or inorganic substances. As an embodiment, the second planarization layer 113 may include general-purpose polymers such as benzocyclobutene (BCB), polyimide (PI), hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS), polymer derivatives with phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, and blends thereof. Furthermore, the second planarization layer 113 may include silicon oxide (SiO2), silicon nitride (SiN), etc. x Materials such as silicon nitride oxide (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2) can be used. After forming the second planarization layer 113, chemical mechanical polishing can be performed to provide a flat upper surface. As an embodiment, the second planarization layer 113 can be omitted.
[0082] An organic light-emitting diode (OLED) including a pixel electrode 210, an intermediate layer 220, and a counter electrode 230 can be disposed on the second planarization layer 113. The pixel electrode 210 is electrically connected to the contact metal layer CM through a contact hole penetrating the second planarization layer 113. The contact metal layer CM is electrically connected to the source electrode 137 and the drain electrode 138, which serve as the connection electrodes of the thin-film transistor (TFT), through a contact hole penetrating the first planarization layer 111. Therefore, the organic light-emitting diode (OLED) can be electrically connected to the thin-film transistor (TFT).
[0083] A pixel electrode 210 may be disposed on the second planarization layer 113. The pixel electrode 210 may be a (semi-)transparent electrode or a reflective electrode. The pixel electrode 210 may be equipped with a reflective film formed using aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), copper (Cu), and their compounds, and a transparent or semi-transparent electrode layer formed on the reflective film. The transparent or semi-transparent electrode layer may be equipped with at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). The pixel electrode 210 can be configured as a structure stacked in an ITO / Ag / ITO manner.
[0084] A pixel defining film 180 may be disposed on the second planarization layer 113. The pixel defining film 180 may have an opening that exposes at least a portion of the pixel electrode 210. The area exposed through the opening of the pixel defining film 180 may be defined as a light-emitting region EA. The light-emitting region EA is surrounded by a non-light-emitting region NEA, which may surround the light-emitting region EA. That is, the display area DA may include multiple light-emitting regions EA and non-light-emitting regions NEA surrounding these multiple light-emitting regions EA.
[0085] The pixel defining film 180 can prevent arcing or other phenomena at the edge of the pixel electrode 210 by increasing the distance between the pixel electrode 210 and the counter electrode 230 on the upper part of the pixel electrode 210. The pixel defining film 180 can be an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO), and phenolic resin, and can be formed by methods such as spin coating.
[0086] An intermediate layer 220 may be disposed on the pixel electrode 210, which is at least partially exposed by the pixel defining film 180. The intermediate layer 220 may include a light-emitting layer 220b, and a first functional layer 220a and a second functional layer 220c may be selectively disposed below and above the light-emitting layer 220b.
[0087] As one embodiment, the intermediate layer 220 can utilize the mask 400 described later. Figure 3The light-emitting layer 220b of the intermediate layer 220 can be formed on the pixel electrode 210, which is at least partially exposed by the pixel defining film 180. More specifically, the light-emitting layer 220b of the intermediate layer 220 can be formed using the mask 400 described later. Figure 3 The pixel electrode 210 is formed on the pixel defining film 180, where at least a portion is exposed.
[0088] The first functional layer 220a may include a hole injection layer (HIL) and / or a hole transport layer (HTL), and the second functional layer 220c may include an electron transport layer (ETL) and / or an electron injection layer (EIL).
[0089] The luminescent layer 220b may include an organic material containing a fluorescent or phosphorescent substance that emits red, green, blue, or white light. The luminescent layer 220b may be a low-molecular-weight organic material or a high-molecular-weight organic material.
[0090] When the light-emitting layer 220b comprises low-molecular-weight organic materials, the intermediate layer 220 may have a structure in which hole injection layer, hole transport layer, light-emitting layer, electron transport layer, and electron injection layer are stacked in a single or composite structure. The low-molecular-weight organic materials may include various organic substances such as copper phthalocyanine (CuPc), N,N'-di(naphthyl-1-yl)-N,N'-diphenyl-benzidine (NPB), and tris-8-hydroxyquinoline aluminum (Alq3). These layers can be formed by vacuum deposition.
[0091] When the light-emitting layer 220b comprises a high-molecular-weight organic material, the intermediate layer 220 can generally have a structure including a hole transport layer and the light-emitting layer 220b. In this case, the hole transport layer may include PEDOT, and the light-emitting layer 220b may include high-molecular-weight materials such as poly-phenylene vinylene (PPV) and polyfluorene. This light-emitting layer 220b can be formed by screen printing, inkjet printing, laser-induced thermal imaging (LITI), or similar methods.
[0092] Counter electrodes 230 may be arranged on the intermediate layer 220. The counter electrodes 230 may be arranged on the intermediate layer 220 and may be arranged in a manner that covers the entire intermediate layer 220. The counter electrodes 230 may be arranged on the upper part of the display area DA and may be arranged in a manner that covers the entire display area DA. That is, the counter electrodes 230 may be integrally formed on the entire display panel using an open mask to cover multiple pixels P arranged in the display area DA.
[0093] The counter electrode 230 may include a conductive material with a low work function. For example, the counter electrode 230 may include a (semi-)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), and / or alloys thereof. Alternatively, the counter electrode 230 may further include a layer such as ITO, IZO, ZnO, or In2O3 on the (semi-)transparent layer comprising the aforementioned materials.
[0094] Figure 3 This is a schematic perspective view of a mask according to an embodiment of the present invention. Figure 4 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention. Figure 4 Equivalent to along Figure 3 A cross-sectional view taken from line II-II'.
[0095] Reference Figure 3 and Figure 4 According to one embodiment, a mask 400 may include a mask sheet 410, a conductive layer 420, and a frame 430. More specifically, the mask 400 may include: a mask sheet 410 including a plurality of through holes 411; a conductive layer 420, spaced apart from the through holes 411 in a plane and disposed between the frame 430 and the mask sheet 410; and a frame 430, coupled to the conductive layer 420.
[0096] According to one embodiment, a mask 400 may include a plurality of through holes 411. This mask 400 can be understood as having a plurality of through holes 411 formed on a mask sheet 410 comprising organic material. The mask sheet 410 may include organic material. As an embodiment, the mask sheet 410 may include polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate, etc. For example, the mask sheet 410 may be configured as a polyimide film.
[0097] The mask sheet 410 can have a thickness of 5 μm to 15 μm in the z-axis direction, and can be deformed in various ways, for example, it can have a thickness of 5 μm to 20 μm, and a thickness of 7 μm to 13 μm, etc.
[0098] A conductive layer 420 may be disposed on the mask 410. The conductive layer 420 is spaced apart from a plurality of through holes 411 defined on the mask 410 in a plane and may be disposed on the mask 410. As an embodiment, the conductive layer 420 may have a shape surrounding the mask 410 in a plane and may be disposed on the mask 410.
[0099] The conductive layer 420 may comprise at least one material selected from Al, Ti, Mo, Cu, ITO, IZO, and IGZO. The conductive layer 420 may have a first thickness t1 along the z-axis from the upper surface of the mask 410. In this case, the first thickness t1 of the conductive layer 420 may be 1000 angstroms. Up to 3000 And it can undergo various deformations; for example, it can be 1500 angstroms. Up to 3000 And it can be 1000 angstroms Up to 2500 Angers For example, the first thickness t1 of the conductive layer 420 can be 1500 angstroms. Up to 2500 Angers
[0100] A frame 430 may be disposed on the conductive layer 420. The frame 430 may be spaced apart from a plurality of through holes 411 defined on the mask 410 in a plane and disposed on the conductive layer 420. As an embodiment, the frame 430 may have a shape in a plane surrounding the mask 410 and the conductive layer 420 and be disposed on the conductive layer 420. The conductive layer 420 may be fixed to the frame 430. More specifically, the conductive layer 420 may be fixed to the frame 430 by electrostatic force.
[0101] Figure 5 This is a schematic perspective view of a mask according to an embodiment of the present invention. Figure 6 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention. Figure 7 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention. Figure 6 It is along Figure 5 A cross-sectional view taken from line III-III'. Figure 7 Equivalent to along Figure 5 A cross-sectional view taken from the IV-IV' line.
[0102] Figures 5 to 7 The embodiment is similar to the one in that the conductive layer 420 has a grid shape. Figure 3 and Figure 4 The embodiments differ. Figures 5 to 7 In its composition, the term "targeting" is omitted. Figure 3 and Figure 4 The following explanation focuses on the differences between the similar compositions.
[0103] Reference Figures 5 to 7 The conductive layer 420 may have a grid shape. The conductive layer 420 may have a grid shape and is disposed on the mask 410. The conductive layer 420 may be disposed on the mask 410 and spaced apart from a plurality of through holes 411 defined on the mask 410. The conductive layer 420 has a grid shape, thereby allowing it to be disposed on the mask 410 without overlapping with the plurality of through holes 411 defined on the mask 410.
[0104] Figure 8 This is a schematic perspective view of a mask according to an embodiment of the present invention. Figure 9 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention. Figure 10 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention.
[0105] Figures 8 to 10 The embodiment is similar to the one in that at least a portion of the conductive layer 420 has an island shape. Figure 3 and Figure 4 The embodiments differ. Figures 8 to 10 In its composition, the term "targeting" is omitted. Figure 3 and Figure 4 The following explanation focuses on the differences between the similar compositions.
[0106] Reference Figures 8 to 10 At least a portion of the conductive layer 420 may have an island shape. At least a portion of the conductive layer 420 may have an island shape and be disposed on the mask 410. For example, at least a portion of the conductive layer 420 disposed on the mask 410 may be patterned in a spaced-apart manner to form an island shape. The conductive layer 420 having an island shape on a plane may have various shapes such as circular, elliptical, and quadrilateral.
[0107] A conductive layer 420 is disposed on a mask 410 and may be spaced apart from a plurality of through holes 411 defined on the mask 410. At least a portion of the conductive layer 420 has an island shape, thereby allowing the conductive layer 420 to be disposed on the mask 410 without overlapping with the plurality of through holes 411 defined on the mask 410. Although Figure 8 The illustration shows a case where at least a portion of a conductive layer 420 with an island shape is arranged between each through hole 411, but at least a portion of the conductive layer 420 with an island shape can be arranged between every two through holes 411, and can be modified in various ways, for example, it can be arranged between every four through holes 411, etc.
[0108] Figure 11 This is a schematic perspective view of a mask according to an embodiment of the present invention. Figure 12 This is a schematic cross-sectional view of a mask according to an embodiment of the present invention. Figure 12 Equivalent to along Figure 11 A cross-sectional view taken from line VII-VII'.
[0109] Figure 11 and Figure 12 The embodiment is similar to the one in that the frame 430 has a grid shape. Figure 3 and Figure 4 The embodiments differ. Figure 11 and Figure 12 In its composition, the term "targeting" is omitted. Figure 3 and Figure 4 The following explanation focuses on the differences between the similar compositions.
[0110] Reference Figure 11 and Figure 12The frame 430 may have a grid shape. The frame 430 may have a grid shape and be disposed on the conductive layer 420. The frame 430 may be disposed on the conductive layer 420 and spaced apart from a plurality of through holes 411 defined on the mask 410. The grid shape of the frame 430 allows it to be disposed on the conductive layer 420 without overlapping with the plurality of through holes 411 defined on the mask 410, and allows for a more stable bond between the conductive layer 420 and the frame 430.
[0111] Although not shown, at least a portion of the frame 430 may have an island shape. At least a portion of the frame 430 may have an island shape and be arranged on the conductive layer 420. For example, at least a portion of the frame 430 arranged on the conductive layer 420 may be patterned in a spaced-apart manner to form an island shape. The frame 430 having an island shape on a plane may have various shapes such as circular, elliptical, and quadrilateral.
[0112] At least a portion of the island-shaped frame 430 can be arranged between each through hole 411 and can be deformed in various ways, for example, it can be arranged between every two through holes 411 and between every four through holes 411, etc.
[0113] Figures 13 to 19 This is a schematic cross-sectional view illustrating a method for manufacturing a mask according to an embodiment of the present invention.
[0114] The following is for reference Figures 13 to 19 The mask manufacturing method will be explained in turn.
[0115] A method for manufacturing a mask according to one embodiment may include the following steps: forming an organic material layer 410M on a mask substrate 401 and patterning a hard mask 415 on the organic material layer 410M; etching the organic material layer 410M to form a mask sheet 410 including a through hole 411; removing the hard mask 415 disposed on the mask sheet 410; forming a conductive material layer 420M on the mask sheet 410; and etching the conductive material layer 420M to form a conductive layer 420.
[0116] Furthermore, after the step of etching the conductive material layer 420M to form the conductive layer 420, the following steps may also be included: fixing the frame 430 to the conductive layer 420; and removing the mask substrate 401.
[0117] Reference Figure 13First, an organic material layer 410M can be formed on the mask substrate 401. The organic material layer 410M may include organic materials. As an embodiment, the organic material layer 410M may include polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate, etc. For example, the organic material layer 410M may include polyimide.
[0118] Reference Figure 14 After the step of forming an organic material layer 410M on the mask substrate 401, the step of patterning a hard mask 415 on the organic material layer 410M can also be performed.
[0119] In the step of patterning the hard mask 415 on the organic material layer 410M, indium zinc oxide (IZO) can be formed on the organic material layer 410M using a sputtering device, and the indium zinc oxide (IZO) can be patterned into the hard mask 415 using a photoresist. More specifically, after forming indium zinc oxide (IZO) on the organic material layer 410M using a sputtering device and coating the entire indium zinc oxide (IZO) with photoresist, only a portion of the photoresist is exposed and developed to form a pattern layer, and the indium zinc oxide (IZO) is etched to pattern the hard mask 415. At this time, the indium zinc oxide (IZO) can be patterned into the hard mask 415 through a wet etching process. During the wet etching process, the indium zinc oxide (IZO) in the parts where no pattern layer is formed is etched, while the indium zinc oxide (IZO) in the parts where the pattern layer is formed can remain and form a hard mask 415.
[0120] Reference Figure 15After the step of patterning the hard mask 415 on the organic material layer 410M, the step of etching the organic material layer 410M to form a mask sheet 410 including through holes 411 can also be performed.
[0121] In the step of etching the organic material layer 410M to form a mask sheet 410 including through holes 411, the organic material layer 410M can be etched by a dry etching process. At this time, the organic material layer 410M below the patterned hard mask 415 is not etched, while the portion of the organic material layer 410M not patterned on the hard mask 415 is etched, thereby forming the mask sheet 410. The hard mask 415 may remain on the patterned mask sheet 410.
[0122] The mask 410 can be patterned by dry etching of the organic material layer 410M. The unetched portion of the organic material layer 410M can serve as the mask 410, and the portion etched by dry etching in the organic material layer 410M can be defined as a through hole 411.
[0123] Reference Figure 16 After etching the organic material layer 410M to form a mask sheet 410 including through holes 411, a step of removing the hard mask 415 disposed on the mask sheet 410 can also be performed.
[0124] In the step of removing the hard mask 415 disposed on the mask sheet 410, the hard mask 415 remaining on the patterned mask sheet 410 can be removed. For example, in order to remove the hard mask 415 remaining on the patterned mask sheet 410 without removing the patterned mask sheet 410, a wet etching process can be used.
[0125] Reference Figure 17 After removing the hard mask 415 disposed on the mask sheet 410, a step of forming a conductive material layer 420M on the mask sheet 410 can also be performed.
[0126] In the step of forming a conductive material layer 420M on the mask 410, the conductive material layer 420M may include at least one material selected from Al, Ti, Mo, Cu, ITO, IZO, and IGZO. As an embodiment, the conductive material layer 420M may also be formed in a through-hole 411 defined in the mask 410.
[0127] Reference Figure 18 After the step of forming a conductive material layer 420M on the mask 410, the step of etching the conductive material layer 420M to form the conductive layer 420 can also be performed.
[0128] In the step of etching the conductive material layer 420M to form the conductive layer 420, a photoresist can be applied to the entire conductive material layer 420M, and then only a portion of the photoresist can be exposed and developed to form a pattern layer, followed by etching the conductive material layer 420M to form the conductive layer 420. Alternatively, the conductive material layer 420M can be dry-etched to form the conductive layer 420. During the dry etching process, the portions of the conductive material layer 420M that do not form a pattern layer are etched, while the portions that do form a pattern layer remain, thus forming the conductive layer 420.
[0129] The conductive layer 420 can have a first thickness t1 along the z-axis direction from the upper surface of the mask 410. In this case, the first thickness t1 of the conductive layer 420 can be 1000 angstroms. Up to 3000 And it can undergo various deformations; for example, it can be 1500 angstroms. Up to 3000 And it can be 1000 angstroms Up to 2500 Angers For example, the first thickness t1 of the conductive layer 420 can be 1500 angstroms. Up to 2500 Angers
[0130] The conductive layer 420 may be formed to be spaced apart from the through-hole 411 defined in the mask 410. As one embodiment, the conductive layer 420 may have a shape surrounding the mask 410 in a plane. Although not shown, the conductive layer 420 may be spaced apart from the through-hole 411 defined in the mask 410, and the conductive layer 420 may have various shapes, such as a mesh shape and an island shape.
[0131] Reference Figure 19 After the step of etching the conductive material layer 420M to form the conductive layer 420, the steps of fixing the frame 430 to the conductive layer 420 and removing the mask substrate 401 can also be performed.
[0132] In the step of fixing the frame 430 to the conductive layer 420, the conductive layer 420 can be fixed to the frame 430 by electrostatic force. As an embodiment, the frame 430 may have a shape surrounding the conductive layer 420 in a plane. Although not shown, the frame 430 may be spaced from the through hole 411 defined in the mask sheet 410, and may have various shapes, such as a grid shape or an island shape.
[0133] After the step of securing the frame 430 to the conductive layer 420, the mask substrate 401 can be removed from the mask sheet 410. As an embodiment, the frame 430 can also be secured to the conductive layer 420 after the mask substrate 401 is removed from the mask sheet 410.
[0134] For fine metal masks (FMM), if a large-area mask is used, the mask may deform or sag due to the load, which may cause pattern distortion.
[0135] Furthermore, for masks equipped with organic materials and hard masks including IZO, during the dry etching process of organic materials using hard masks, undercut may occur due to isotropic etching, resulting in a decrease in deposition uniformity due to the tip of the hard mask.
[0136] According to an embodiment of the present invention, a method for manufacturing a mask and a mask manufactured therefrom can prevent or minimize mask deformation or sagging due to load by removing a hard mask disposed on a mask sheet comprising organic material and patterning a conductive layer, and can also prevent or minimize pattern distortion due to said deformation or sagging, and can also prevent or minimize the decrease in deposition uniformity due to the tip of the hard mask.
[0137] Furthermore, by removing the hard mask arranged on the mask sheet and patterning the conductive layer, the intermediate layer or light-emitting layer of the display device can be accurately formed in a pre-set pattern when forming on the substrate, thereby improving the deposition uniformity. Moreover, the conductive layer can be freely patterned on the mask sheet including organic materials, so the frame can be equipped in various shapes.
[0138] While the present invention has been described with reference to the embodiments shown in the accompanying drawings, these are merely exemplary, and those skilled in the art will understand that various modifications and equivalent embodiments can be implemented accordingly. Therefore, the true scope of protection of the present invention should be determined based on the technical concept of the appended claims.
Claims
1. A method for manufacturing a mask, comprising the following steps: An organic material layer is formed on a mask substrate, and a hard mask is patterned on the organic material layer; The organic material layer is etched to form a mask including through holes; Remove the hard mask arranged on the mask sheet; A conductive material layer is formed on the mask sheet; Etching the conductive material layer to form a conductive layer; as well as The frame is fixed in the conductive layer by electrostatic force.
2. The method for manufacturing a mask as described in claim 1, wherein, In the step of etching the organic material layer to form a mask including through holes, The mask sheet is formed by a dry etching process.
3. The method for manufacturing a mask as described in claim 1, wherein, In the step of forming a conductive material layer on the mask, The conductive material layer includes at least one of Al, Ti, Mo, Cu, ITO, IZO, and IGZO.
4. The method for manufacturing a mask as described in claim 1, wherein, In the step of etching the conductive material layer to form the conductive layer The conductive layer is formed by a dry etching process.
5. The method for manufacturing a mask as described in claim 1, wherein, The conductive layer has a first thickness from the upper surface of the mask sheet, the first thickness being 1500 angstroms to 2500 angstroms.
6. The method for manufacturing a mask as described in claim 1, wherein, The conductive layer is separated from the through-hole and has a mesh shape.
7. The method for manufacturing a mask as described in claim 1, wherein, At least a portion of the conductive layer is separated from the through-hole and has an island shape.
8. The method for manufacturing a mask as described in claim 1, wherein, Following the step of fixing the conductive layer frame, the following steps are also included: Remove the mask substrate.
9. The method for manufacturing a mask as described in claim 1, wherein, The frame is separated from the through hole and has a grid shape.
10. The method for manufacturing a mask as claimed in claim 1, wherein, At least a portion of the frame is separated from the through hole and has an island shape.
11. A mask equipped with: frame; Mask, including through holes; and A conductive layer, spaced apart from the through-hole on a plane, is disposed between the frame and the mask sheet and fixed to the frame. in, The conductive layer is fixed to the frame by electrostatic force.
12. The mask as claimed in claim 11, wherein, The conductive layer includes at least one of Al, Ti, Mo, Cu, ITO, IZO and IGZO.
13. The mask as claimed in claim 11, wherein, The conductive layer has a first thickness from the upper surface of the mask sheet, the first thickness being 1500 angstroms to 2500 angstroms.
14. The mask as claimed in claim 11, wherein, The conductive layer is separated from the through-hole and has a mesh shape.
15. The mask as claimed in claim 11, wherein, At least a portion of the conductive layer is separated from the through-hole and has an island shape.
16. The mask as claimed in claim 11, wherein, The frame is separated from the through hole and has a grid shape.
17. The mask as claimed in claim 11, wherein, At least a portion of the frame is separated from the through hole and has an island shape.
18. A method for manufacturing a display device, comprising the following steps: Forming pixel electrodes; A light-emitting layer or an intermediate layer is formed on the pixel electrode using the mask according to any one of claims 11 to 17; and A counter electrode is formed on the light-emitting layer or the intermediate layer.