Optical Image Stabilization Circuit, Optical Image Stabilization Device, and Operating Method Thereof

By using a single gyroscope sensor in the electronic device with the main OIS circuit and the sub-OIS circuit, the problem of sensor data synchronization and OIS control operation synchronization in multiple camera modules is solved, and more stable OIS control and cost reduction are achieved.

CN113542582BActive Publication Date: 2025-07-29SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Application Number
CN202011040104.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-04-14
Filing Date
2020-09-28
Publication Date
2025-07-29
Estimated Expiration
2040-09-28

AI Technical Summary

Technical Problem

When multiple camera modules are built into electronic devices, the use of multiple gyroscope sensors increases manufacturing costs, and there are problems with sensor data synchronization and OIS control operation synchronization.

Method used

The configuration of a single gyroscope sensor is adopted with the main OIS circuit and the sub-OIS circuit. The main OIS circuit outputs control signals and interrupt signals to control the main OIS operation. The sub-OIS circuit is synchronized with the main OIS circuit and controls the sub-OIS operation based on the control signals and interrupt signals, and realizes the sharing and synchronization of sensor data through a serial peripheral interface and memory.

Benefits of technology

Synchronization of sensor data and OIS control operations between multiple OIS circuits is achieved, reducing component count, reducing costs, and improving space utilization efficiency.

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Abstract

The present disclosure provides an optical image stabilization circuit, an optical image stabilization device, and an operation method thereof. The optical image stabilization (OIS) device includes a single sensor configured to provide sensor data. The OIS circuit includes a main OIS circuit and a sub-OIS circuit. The main OIS circuit is configured to output a control signal to the single sensor, receive sensor data from the single sensor, output an interrupt signal to initiate a control operation, and control the main OIS operation. The sub-OIS circuit is configured to synchronize with the main OIS circuit based on the control signal input together with the sensor data, and control the sub-OIS operation based on the interrupt signal.
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Description

[0001] This application claims the benefit of priority of Korean Patent Application No. 10-2020-0045219, filed on Apr. 14, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes. Technical Field

[0002] The following description relates to an optical image stabilization (OIS) circuit having synchronization between a single sensor and multiple drivers, an OIS device, and an operating method thereof. Background Art

[0003] A camera module may generally include an OIS circuit, and the OIS circuit may detect camera shake information and may move a lens or an image sensor in a direction opposite to the detected camera shake direction, thereby being able to obtain a clear image without the harmful effects of camera shake.

[0004] Existing OIS circuits may use sensor data received from a gyro sensor to stabilize the operation of a camera module.

[0005] The OIS circuit may implement a serial peripheral interface (SPI) bus / Inter-Integrated Circuit (I2C) bus to receive sensor data from the gyro sensor.

[0006] In addition, a typical OIS circuit is configured with a single driver IC connected to a single gyro sensor. In an example of a system implementing multiple gyro sensors, multiple driver ICs may be connected to multiple gyro sensors one-to-one.

[0007] In an example of applying two OIS circuits to two camera modules, two gyro sensors may be required.

[0008] Recently, since it has become desirable to multifunctionalize electronic devices and implement high performance, a greater number of camera modules may be built into electronic devices (such as vehicles, smartphones, etc.).

[0009] As previously described, when multiple camera modules are built into an electronic device, the use of multiple gyro sensors increases the manufacturing cost, which may be problematic.

[0010] To solve such a problem, it may be considered to use a single gyro sensor instead of implementing multiple gyro sensors. However, the use of a single gyro sensor may cause problems related to synchronization of sensor data and synchronization of OIS control operations that may occur between multiple OIS circuits connected to the single gyro sensor. Summary of the Invention

[0011] The present invention content is provided to introduce selected concepts further described in the following detailed implementation in a simplified form. The present invention content is neither intended to identify the key features or essential features of the claimed subject matter, nor intended to be used as an aid in determining the scope of the claimed subject matter.

[0012] In one general aspect, an optical image stabilization (OIS) circuit is applied to an OIS device including a single sensor configured to provide sensor data. The OIS circuit includes: a main OIS circuit configured to output a control signal to the single sensor, receive sensor data from the single sensor, output an interrupt signal to initiate a control operation, and control the main OIS operation; and a sub - OIS circuit configured to synchronize with the main OIS circuit based on the control signal input together with the sensor data, and control the sub - OIS operation based on the interrupt signal.

[0013] The main OIS circuit includes: a serial peripheral interface (SPI) master configured to perform SPI communication with an SPI slave in the single sensor; and a memory configured to store the sensor data received through the SPI communication.

[0014] The main OIS circuit may further include a timer configured to generate the interrupt signal.

[0015] The control signal of the main OIS circuit may further include a clock signal and a chip selector signal.

[0016] The sub - OIS circuit may further include a first sub - OIS circuit to an Nth sub - OIS circuit, and the first sub - OIS circuit to the Nth sub - OIS circuit may be enabled based on the chip selector signal and configured to receive the sensor data from the single sensor based on the clock signal.

[0017] In one general aspect, an optical image stabilization (OIS) device includes: a single sensor configured to provide sensor data; a main OIS circuit configured to output a control signal to the single sensor, receive sensor data from the single sensor, output an interrupt signal to initiate a control operation, and control the main OIS operation; and a sub - OIS circuit configured to synchronize with the main OIS circuit based on the control signal input together with the sensor data, and control the sub - OIS operation based on the interrupt signal.

[0018] The main OIS circuit may include: a serial peripheral interface (SPI) master configured to perform SPI communication with an SPI slave in the single sensor; and a memory configured to store the sensor data received through the SPI communication.

[0019] The single sensor may include a gyro sensor, and the gyro sensor includes an SPI slave device configured to perform SPI communication with the main OIS circuit.

[0020] The main OIS circuit may further include a timer configured to generate an interrupt signal.

[0021] The control signal of the main OIS circuit may include a clock signal and a chip selector signal.

[0022] The sub-OIS circuit may include a first sub-OIS circuit to an Nth sub-OIS circuit, and the first sub-OIS circuit to the Nth sub-OIS circuit are enabled based on the chip selector signal and are configured to receive the sensor data from the single sensor based on the clock signal.

[0023] In one general aspect, an operating method of an optical image stabilization (OIS) device includes: outputting a control signal from a main OIS circuit to a single sensor and inputting sensor data output from the single sensor into the main OIS circuit; inputting the sensor data output from the single sensor into a sub-OIS circuit based on the control signal; cyclically generating, by the main OIS circuit, an interrupt signal to start a control operation so as to control a main OIS operation based on the interrupt signal; and controlling a sub-OIS operation by the sub-OIS circuit based on the interrupt signal.

[0024] The serial peripheral interface (SPI) slave device in the single sensor may perform SPI communication with a serial peripheral interface master device in the main OIS circuit.

[0025] The timer in the main OIS circuit may generate the interrupt signal to start the control operation.

[0026] The control signal of the main OIS circuit may include a clock signal and a chip selector signal.

[0027] The sub-OIS circuit may include a first sub-OIS circuit to an Nth sub-OIS circuit, and the first sub-OIS circuit to the Nth sub-OIS circuit are enabled based on the chip selector signal and receive the sensor data output from the single sensor based on the clock signal.

[0028] In one general aspect, an optical image stabilization (OIS) device includes: an OIS circuit including a main OIS circuit and one or more sub-OIS circuits; and a single sensor configured to receive a control signal from the main OIS circuit and send sensor data to the main OIS circuit and the one or more sub-OIS circuits; wherein the main OIS circuit includes a timer configured to generate an interrupt signal, and wherein the one or more sub-OIS circuits are synchronized with the main OIS circuit to receive the sensor data simultaneously in response to the control signal and perform sub-OIS control operations based on the interrupt signal.

[0029] The timer of the main OIS circuit may be configured to generate the interrupt signal to initiate the sub-OIS control operations.

[0030] The sub-OIS control operations may include operations for controlling a lens actuator.

[0031] The single sensor may be a gyro sensor.

[0032] Other features and aspects will be apparent from the following detailed description, the drawings, and the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a block diagram schematically showing an example configuration of an OIS device according to one or more embodiments.

[0034] Figure 2 is a block diagram schematically showing an example configuration of an OIS circuit according to one or more embodiments.

[0035] Figure 3 schematically shows Figure 1 an example configuration of a main OIS circuit of

[0036] Figure 4 schematically shows Figure 1 an example configuration of a sub-OIS circuit of

[0037] Figure 5 shows an example of Figure 1 sensor data synchronization in an OIS device of

[0038] Figure 6 shows an example of Figure 1 OIS control operation synchronization in an OIS device of

[0039] Figure 7 is a flowchart showing an operation method of an OIS device according to one or more embodiments.

[0040] Throughout the drawings and the detailed description, unless otherwise described or provided, the same reference numerals will be understood to refer to the same elements, features, and structures. The drawings may not be drawn to scale, and for clarity, illustration, and convenience, the relative dimensions, proportions, and depictions of elements in the drawings may be exaggerated. Detailed Description

[0041] The following detailed description is provided to assist the reader in obtaining a comprehensive understanding of the methods, apparatuses, and / or systems described herein. However, various changes, variations, and equivalents of the methods, apparatuses, and / or systems described herein will be apparent after understanding the disclosure of this application. For example, the order of operations described herein is merely exemplary and is not limited to the order set forth herein, but rather changes that will be apparent after understanding the disclosure of this application may be made, except for operations that must occur in a particular order. Additionally, descriptions of features that are known after understanding the disclosure of this application may be omitted for increased clarity and brevity, noting that the omission of a feature and its description is not intended to admit it as common general knowledge.

[0042] The features described herein may be implemented in different forms and will not be construed as limited to the examples described herein. Rather, the examples described herein are provided only to illustrate some of the many possible ways of implementing the methods, apparatuses, and / or systems described herein that will be apparent after understanding the disclosure of this application.

[0043] Although terms such as "first," "second," and "third" may be used herein to describe various members, components, regions, layers, or portions, these members, components, regions, layers, or portions will not be limited by these terms. Rather, these terms are only used to distinguish one member, component, region, layer, or portion from another. Thus, the first member, first component, first region, first layer, or first portion referred to in the examples described herein may also be referred to as the second member, second component, second region, second layer, or second portion without departing from the teachings of the examples.

[0044] As used herein, the term "and / or" includes any one of the related listed items and any combination of any two or more of them.

[0045] Throughout the specification, when an element such as a layer, region, or substrate is described as being "on" another element, "connected to" another element, or "coupled to" another element, the element can be directly "on" the other element, directly "connected to" the other element, or directly "coupled to" the other element, or there can be one or more other elements therebetween. In contrast, when an element is described as being "directly on" another element, "directly connected to" another element, or "directly coupled to" another element, there can be no other elements therebetween.

[0046] The terms used herein are for the purpose of describing various examples only and are not intended to limit the disclosure. Unless the context clearly dictates otherwise, the singular forms are also intended to include the plural forms. The terms "comprising", "including", and "having" list the presence of the stated features, quantities, operations, components, elements, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains after understanding the disclosure of this application. Terms (such as those defined in a common dictionary) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the disclosure of this application, and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0048] Figure 1 is a block diagram schematically showing a configuration of an exemplary OIS device according to one or more embodiments.

[0049] Referring to Figure 1 , the OIS device 10 according to one or more embodiments may include a single sensor 50 and an OIS circuit 70.

[0050] The single sensor 50 may provide sensor data SD. As a non-limiting example, the single sensor 50 can be an angular velocity sensor, and as a non-limiting example, the single sensor 50 can be a gyroscope sensor.

[0051] Figure 2 is a block diagram schematically showing an exemplary configuration of an OIS circuit according to one or more embodiments.

[0052] Referring to Figure 1 and Figure 2 , the OIS circuit 70 may include a main OIS circuit 100 and a sub OIS circuit 200.

[0053] The main OIS circuit 100 can be configured to output a control signal SC to receive sensor data SD from a single sensor 50, output an interrupt signal Sitp to initiate a control operation, and control the main OIS operation. Specifically, the main OIS circuit 100 can generate a control signal SC and send the generated control signal SC to the single sensor 50. Then the control signal SC can be sent to the sub-OIS circuit 200 together with the sensor data SD.

[0054] The sub-OIS circuit 200 can be configured to synchronize with the main OIS circuit 100 in response to the control signal SC input together with the sensor data SD output from the single sensor 50, and control the sub-OIS operation based on the interrupt signal Sitp. Here, it should be noted that the use of the term "can" for examples or embodiments (e.g., what can be included or implemented for an example or embodiment) means that there is at least one example or embodiment including or implementing such a feature, and all examples and embodiments are not limited thereto.

[0055] In an example, the sub-OIS circuit 200 can include a first sub-OIS circuit 200-1 to an Nth sub-OIS circuit 200-N. The first sub-OIS circuit 200-1 to the Nth sub-OIS circuit 200-N can synchronize with the main OIS circuit 100 in response to the control signal SC. The control signal SC can be input together with the sensor data SD output from the single sensor 50 to perform a sub-OIS control operation corresponding to the interrupt signal Sitp.

[0056] In the drawings, repeated descriptions of the same components and functions will be omitted, and only the differences between them may be described.

[0057] Figure 3 is a block diagram schematically showing Figure 1 the configuration of an example main OIS circuit.

[0058] Referring to Figure 3 , the main OIS circuit 100 can include a digital circuit 110, a controller 120, and a drive and detection circuit 130.

[0059] The digital circuit 110 can receive the sensor data SD output from the single sensor 50 and provide the received sensor data SD to the controller 120.

[0060] The controller 120 can control the OIS operation and drive of the lens actuator 100-ACT based on the detection signal and the sensor data SD.

[0061] The drive and detection circuit 130 can drive the lens actuator 100-ACT based on the control of the controller 120 and provide a detection signal for the position of the lens actuator 100-ACT to the controller 120.

[0062] In the example, the digital circuit 110 may include a Serial Peripheral Interface (SPI) master 111, a memory 112, and a timer 113.

[0063] The SPI master 111 performs SPI communication with an SPI slave 51 included in a single sensor 50, provides a control signal SC to the single sensor 50, and receives sensor data from the single sensor 50.

[0064] The memory 112 may store sensor data SD received from the single sensor 50 through SPI communication performed in the SPI master 111.

[0065] To synchronize the OIS control operation, the timer 113 may generate an interrupt signal Sitp and output the interrupt signal Sitp to the controller 120 of the main OIS circuit 100 and the sub OIS circuit 200.

[0066] Figure 4 is shown Figure 1 the configuration of an exemplary sub OIS circuit.

[0067] Referring to Figure 4 , as previously described, the sub OIS circuit 200 may include a first sub OIS circuit 200-1 to an Nth sub OIS circuit 200-N.

[0068] Each of the first sub OIS circuit 200-1 to the Nth sub OIS circuit 200-N may include a digital circuit 210, a controller 220, and a drive and detection circuit 230.

[0069] The digital circuit 210 may receive sensor data SD from the single sensor 50 and provide the received sensor data SD to the controller 220.

[0070] The controller 220 may control the OIS operation and driving of the lens actuator 200-ACT based on the detection signal and the sensor data SD.

[0071] The drive and detection circuit 230 may drive the lens actuator 200-ACT based on the control of the controller 220 and provide a detection signal for the position of the lens actuator 200-ACT to the controller 220.

[0072] In the example, the digital circuit 210 may include a Serial Peripheral Interface (SPI) slave 211 and a memory 212.

[0073] When the SPI master device 111 reads the sensor data SD, the SPI slave device 211 connected to the SPI master device 111 of the main OIS circuit 100 and the SPI slave device 51 included in the single sensor 50 synchronizes with the SPI master device 111 and captures the sensor data SD.

[0074] The memory 212 can store the sensor data SD captured in the SPI slave device 211.

[0075] Figure 5 Shows Figure 1 Sensor data synchronization in an example OIS device.

[0076] Refer to Figure 5 , the main OIS circuit 100 can be connected to the single sensor 50 via the chip selector signal (SSX) terminal, the clock signal (SCLK) terminal, the master output slave input (MOSI) terminal, and the master input slave output (MISO) terminal.

[0077] The main OIS circuit 100 can also be connected to the first sub-OIS circuit 200-1 to the Nth sub-OIS circuit 200-N via the chip selector signal (SSX) terminal and the clock signal (SCLK) terminal, and the master input slave output (MISO) terminal of the SPI master device 110 of the main OIS circuit 100 can be connected to the master output slave input (MOSI) terminals of the first sub-OIS circuit 200-1 to the Nth sub-OIS circuit 200-N.

[0078] Therefore, the main OIS circuit 100 can provide the chip selector signal SSX and the clock signal SCLK included in the control signal SC to the single sensor 50 to receive the sensor data SD.

[0079] The single sensor 50 can operate according to the chip selector signal SSX and the clock signal SCLK to provide the sensor data SD through the master input slave output (MISO) terminal.

[0080] The main OIS circuit 100 can receive the sensor data SD through the master input slave output (MISO) terminal.

[0081] During this process, the first sub-OIS circuit 200-1 to the Nth sub-OIS circuit 200-N can synchronize with the single sensor 50 according to the chip selector signal SSX and the clock signal SCLK to operate, and can synchronize with the main OIS circuit 100 to capture (receive) the sensor data SD through the master output slave input (MOSI) terminal.

[0082] In the example, the first sub-OIS circuit 200-1 to the Nth sub-OIS circuit 200-N can be enabled based on the chip selector signal SSX, and can receive the sensor data SD from a single sensor 50 based on the clock signal SCLK.

[0083] In addition, in an OIS device including a single main OIS circuit 100, a single sensor 50, and a plurality of sub-OIS circuits 200-1 to 200-N, the main OIS circuit 100 reads the received sensor data SD, and when the main OIS circuit 100 is communicating, the plurality of sub-OIS circuits 200-1 to 200-N can capture or receive the sensor data SD on the data line without participating in the communication of the main OIS circuit 100.

[0084] According to such an operation, the sub-driver IC does not interrupt or participate in the communication between the main driver IC and the sensor, and the main OIS circuit 100 can share the sensor data with a plurality of sub-OIS circuits simultaneously.

[0085] Figure 6 Shown is Figure 1 the synchronization of the OIS control operations in the OIS device.

[0086] Referring to Figure 6 , the main OIS circuit 100 can be connected to a single sensor 50 via the chip selector signal (SSX) terminal, the clock signal (SCLK) terminal, the master out slave in (MOSI) terminal, and the master in slave out (MISO) terminal.

[0087] The timer 113 of the main OIS circuit 100 is connected to the first sub-OIS circuit 200-1 to the Nth sub-OIS circuit 200-N, and can cyclically generate an interrupt signal Sitp and provide the generated interrupt signal Sitp to the first sub-OIS circuit 200-1 to the Nth sub-OIS circuit 200-N.

[0088] Therefore, the main OIS circuit 100 can control the main OIS based on the cyclically generated interrupt signal Sitp, and the first sub-OIS circuit 200-1 to the Nth sub-OIS circuit 200-N can be synchronized with the main OIS circuit 100 to perform corresponding sub-OIS control operations based on the interrupt signal Sitp.

[0089] In addition, the main OIS circuit 100 can include a timer 113 that cyclically generates an interrupt signal Sitp, while the sub-OIS circuit may not include a timer. The main OIS circuit 100 can synchronize the OIS control operations in response to the interrupt signal by sharing a single timer with the sub-OIS circuits 200-1 to 200-N.

[0090] In an example, multiple sub-OIS circuits may wait for an interrupt signal passively input from a main OIS circuit and perform corresponding OIS control operations once the interrupt signal is received.

[0091] Through such a process, compared with the main OIS circuit, the sub-OIS circuit may not include a timer and thus may have reduced current or power consumption.

[0092] Figure 7 is a flowchart showing an operation method of an example OIS device according to one or more embodiments.

[0093] Regarding the operation method of the OIS device, according to one or more embodiments, the same operations as those described with reference to Figures 1 to 6 may be applied. Therefore, repeated detailed descriptions may be omitted.

[0094] Referring to Figure 7 and referring to Figures 1 to 6 in operation S110, the main OIS device 100 outputs a control signal SC to receive sensor data SD from a single sensor 50.

[0095] As an example, the SPI slave device 51 included in the single sensor 50 may perform SPI communication with the main OIS circuit 100.

[0096] In operation S210, the sub-OIS circuit 200 may also receive the sensor data SD output from the single sensor 50 based on the control signal SC.

[0097] In operation S120, the main OIS circuit 100 cyclically generates an interrupt signal Sitp to start a control operation, thereby controlling the main OIS operation based on the interrupt signal Sitp.

[0098] In an example, the timer 113 included in the main OIS circuit 100 may generate an interrupt signal Sitp to start a control operation.

[0099] In operation S220, the sub-OIS circuit 200 controls the sub-OIS operation based on the received interrupt signal Sitp.

[0100] In operation S130, the main OIS circuit 100 may control the main OIS operation, while in operation S230, the sub-OIS circuit 200 may control the corresponding sub-OIS operation.

[0101] In addition, by sharing the sensor data output from a single sensor 50 between the main OIS circuit and the sub-OIS circuit, more efficient operation can be enabled. A timer that generates an interrupt signal may be included in the main OIS circuit. As disclosed above, a single timer is used to notify the sub-OIS circuit of the calibration time point of the OIS control operation. Thus, the main OIS circuit and the sub-OIS circuit can be synchronized.

[0102] In addition, the main OIS circuit can determine the SPI operation speed and the time for cyclic reading, and thus read the sensor data from the single sensor based on the determined time through 3-wire communication or 4-wire communication. Thus, the read sensor data can be stored in the memory and subsequently used to prepare the corresponding OIS control operation.

[0103] For the OIS control operation, a control period can be determined, which is determined by an internal timer and results in the cyclic generation of an interrupt signal.

[0104] When the interrupt signal is generated, the main OIS circuit can start the main OIS control operation and move the lens using the corresponding lens actuator. The sub-OIS circuit that receives the interrupt signal from the main OIS circuit can be synchronized with the main OIS circuit based on the interrupt signal at the same time and can perform the corresponding OIS control operation. By performing the control operation, multiple OIS circuits can be synchronized.

[0105] In an example of a basic OIS device in which multiple OIS circuits independently include oscillators, the oscillator frequencies cannot be the same as each other, which can be problematic. It can also be problematic that it may not be possible to verify the time when power is applied and the time of circuit operation.

[0106] As described above, in the example embodiment, the interface between the main OIS circuit and the sub-OIS circuit can be effectively configured to provide the functions of a typical OIS device, and by sharing and using the sensor data, the effective implementation of the camera module can be feasible in terms of miniaturized size and lower cost.

[0107] A typical camera module has a structure in which a sensor and an OIS circuit are connected one-to-one, so the complexity increases. However, the OIS device of the example embodiment can solve the problems regarding size and cost.

[0108] In addition, in the example embodiment, the technical problems that occur when the use of multiple OIS driver ICs increases due to the increase in the number of camera modules and the technical problems that occur when sharing a single piece of gyroscope data can be solved, and the synchronization of the update cycles of the gyroscope data and the OIS control can be solved.

[0109] In addition, multiple OIS circuits can be effectively utilized. It is advantageous to use a single sensor to share sensor data because the number of components used to form the camera module can be reduced, and this can be economically beneficial. The reduction in the number of components used can be related to the size of the camera module and is thus advantageous in terms of space utilization.

[0110] In an example, the controllers 120 and 220 according to one or more embodiments can be implemented as a computing environment in which a processor (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), etc.), a memory (e.g., a volatile memory (e.g., RAM, etc.), a non-volatile memory (e.g., ROM, flash memory, etc.)), an input device (e.g., a keyboard, a mouse, a pen, a voice input device, a touch input device, an infrared camera, a video input device, etc.), an output device (e.g., a display, a speaker, a printer, etc.), and a communication connection device (e.g., a modem, a network interface card (NIC), an integrated network interface, a radio frequency transmitter / receiver, an infrared port, a USB connection, etc.) are interconnected (e.g., peripheral component interconnect, USB, firmware (IEEE 1394), an optical bus structure, a network, etc.).

[0111] The computing environment can be implemented as a personal computer, a server computer, a handheld or laptop device, a mobile device (a mobile phone, a personal digital assistant (PDA), a media player, etc.), a multiprocessor system, a consumer electronic device, a minicomputer, a mainframe computer, a distributed computing environment including any of the above systems or devices, etc., but is not limited thereto.

[0112] According to each exemplary embodiment, in multiple OIS circuits, sensor data and OIS control operations can be synchronized between the OIS circuits. Therefore, the OIS control operation of the camera module can be performed more stably, and more stable control of the actuator is feasible.

[0113] In addition, according to one or more embodiments, in multiple OIS circuits, sensor data and OIS control operations can be synchronized between the OIS circuits by sharing sensor data between the OIS circuits.

[0114] According to one or more embodiments, in an OIS device including multiple OIS circuits, the implementation of a single sensor to which the multiple OIS circuits are commonly connected can simplify the component configuration and thus reduce costs. Additionally, when built into a camera module, the implementation of a single sensor is advantageous in minimizing space utilization.

[0115] Although the present disclosure includes specific examples, it will be apparent after understanding the disclosure of the present application that various changes in form and detail may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered in a descriptive sense only and not for purposes of limitation. The description of a feature or aspect in each example is to be considered applicable to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed in a different order and / or if components in the described systems, architectures, devices, or circuits are combined in a different manner and / or replaced or supplemented with other components or their equivalents.

[0116] Accordingly, the scope of the present disclosure is not limited by the specific embodiments, but is defined by the claims and their equivalents, and all variations within the scope of the claims and their equivalents are to be construed as being included in the present disclosure.

Claims

1. An optical image stabilization circuit, which is applied to an optical image stabilization device including a single sensor configured to provide sensor data. The optical image stabilization circuit includes a main optical image stabilization circuit and a sub-optical image stabilization circuit. The main optical image stabilization circuit is configured to: Output control signals to the single sensor and the sub-optical image stabilization circuit, and receive sensor data from the single sensor; Output an interrupt signal to initiate a control operation; And Control the main optical image stabilization operation; The sub-optical image stabilization circuit is configured to: synchronize with the main optical image stabilization circuit based on the control signal received from the main optical image stabilization circuit and receive the sensor data from the single sensor, and control the sub-optical image stabilization operation based on the interrupt signal.

2. The optical image stabilization circuit according to claim 1, wherein, The main optical image stabilization circuit includes: A serial peripheral interface master device configured to perform serial peripheral interface communication with a serial peripheral interface slave device in the single sensor; and A memory configured to store sensor data received through the serial peripheral interface communication.

3. The optical image stabilization circuit according to claim 2, wherein, The main optical image stabilization circuit further includes a timer configured to generate the interrupt signal.

4. The optical image stabilization circuit according to claim 2, wherein, The control signal of the main optical image stabilization circuit includes a clock signal and a chip selector signal.

5. The optical image stabilization circuit according to claim 4, wherein, The sub-optical image stabilization circuit includes a first sub-optical image stabilization circuit to an Nth sub-optical image stabilization circuit, and Wherein, the first sub-optical image stabilization circuit to the Nth sub-optical image stabilization circuit are enabled based on the chip selector signal and are configured to receive the sensor data from the single sensor based on the clock signal.

6. An optical image stabilization device, including a single sensor, a main optical image stabilization circuit and a sub-optical image stabilization circuit, The single sensor is configured to provide sensor data; The main optical image stabilization circuit is configured to: Output control signals to the single sensor and the sub-optical image stabilization circuit, and receive sensor data from the single sensor; Output an interrupt signal to initiate a control operation; And Control the main optical image stabilization operation; The sub-optical image stabilization circuit is configured to synchronize with the main optical image stabilization circuit based on the control signal received from the main optical image stabilization circuit and receive the sensor data from the single sensor, and control the sub-optical image stabilization operation based on the interrupt signal.

7. The optical image stabilization device according to claim 6, wherein, The main optical image stabilization circuit includes: A serial peripheral interface master device configured to perform serial peripheral interface communication with a serial peripheral interface slave device in the single sensor; and A memory configured to store sensor data received through the serial peripheral interface communication.

8. The optical image stabilization device according to claim 6, wherein, The single sensor includes a gyroscope sensor, and the gyroscope sensor includes a serial peripheral interface slave device configured to perform serial peripheral interface communication with the main optical image stabilization circuit.

9. The optical image stabilization device according to claim 7, wherein, The main optical image stabilization circuit further includes a timer configured to generate the interrupt signal.

10. The optical image stabilization device according to claim 7, wherein, The control signal of the main optical image stabilization circuit includes a clock signal and a chip selector signal.

11. The optical image stabilization device according to claim 10, wherein, The sub-optical image stabilization circuit includes a first sub-optical image stabilization circuit to an Nth sub-optical image stabilization circuit, and wherein, the first sub-optical image stabilization circuit to the Nth sub-optical image stabilization circuit are enabled based on the chip selector signal and are configured to receive the sensor data from the single sensor based on the clock signal.

12. A method for operating an optical image stabilization device, the method comprising: Outputting a control signal from a main optical image stabilization circuit to a single sensor, and inputting the sensor data output from the single sensor into the main optical image stabilization circuit; Inputting the sensor data output from the single sensor into a sub-optical image stabilization circuit based on the control signal; Cyclically generating an interrupt signal by the main optical image stabilization circuit to initiate a control operation, thereby controlling the main optical image stabilization operation based on the interrupt signal; And Controlling a sub-optical image stabilization operation by the sub-optical image stabilization circuit based on the interrupt signal.

13. The operating method according to claim 12, wherein, The serial peripheral interface slave device in the single sensor performs serial peripheral interface communication with the serial peripheral interface master device in the main optical image stabilization circuit.

14. The operating method according to claim 12, wherein, The timer in the main optical image stabilization circuit generates the interrupt signal to initiate the control operation.

15. The operating method according to claim 12, wherein, The control signal of the main optical image stabilization circuit includes a clock signal and a chip selector signal.

16. The operating method according to claim 15, wherein, The sub-optical image stabilization circuit includes a first sub-optical image stabilization circuit to an Nth sub-optical image stabilization circuit, and wherein, the first sub-optical image stabilization circuit to the Nth sub-optical image stabilization circuit are enabled based on the chip selector signal and receive the sensor data output from the single sensor based on the clock signal.

17. An optical image stabilization device, comprising: An optical image stabilization circuit, including a main optical image stabilization circuit and one or more sub-optical image stabilization circuits; And A single sensor, configured to receive a control signal from the main optical image stabilization circuit and send sensor data to the main optical image stabilization circuit and the one or more sub-optical image stabilization circuits based on the control signal; wherein, the main optical image stabilization circuit includes a timer, the timer is configured to generate an interrupt signal, and wherein, the one or more sub-optical image stabilization circuits are synchronized with the main optical image stabilization circuit based on the control signal received from the main optical image stabilization circuit to simultaneously receive the sensor data from the single sensor and perform a sub-optical image stabilization control operation based on the interrupt signal.

18. The optical image stabilization device according to claim 17, wherein, The timer of the main optical image stabilization circuit is configured to generate the interrupt signal to initiate the sub-optical image stabilization control operation.

19. The optical image stabilization device according to claim 18, wherein, The sub-optical image stabilization control operation includes an operation for controlling a lens actuator.

20. The optical image stabilization device according to claim 19, wherein, The single sensor is a gyro sensor.

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