Method for manufacturing a composite substrate and composite substrate

Abstract

The application provides a preparation method of a composite substrate and the composite substrate, and the preparation method comprises the following steps: providing a III-V single crystal substrate, the III-V single crystal substrate has a III polar surface and a V polar surface; and forming a nanowire layer on the V polar surface of the III-V single crystal substrate. The composite substrate comprises a III-V single crystal substrate, the III-V single crystal substrate has a III polar surface and a V polar surface; and a nanowire layer, the nanowire layer is arranged on the V polar surface of the III-V single crystal substrate. By arranging the nanowire layer on the V polar surface of the III-V single crystal substrate, the application effectively alleviates the poor ohmic contact problem of the N polar surface of the GaN substrate, reduces the contact resistance, improves the thermal stability of the ohmic contact of the N polar surface, and improves the reliability of the device.

Description

Technical Field

[0001] This invention relates to the field of semiconductors, and more particularly to a method for preparing a composite substrate and the composite substrate itself. Background Technology

[0002] Gallium nitride (GaN) is an ideal substrate material for fabricating GaN-based optoelectronic and microelectronic devices. Currently, GaN-based devices with Ga polarity have achieved rapid development and are widely used in semiconductor lighting, laser displays, power electronics, and microwave radio frequency fields.

[0003] The ohmic contact of the N-polar surface is an important issue for GaN-based devices, mainly because: (1) In recent years, GaN-based vertical structure devices have received widespread attention because vertical structure devices can avoid the problems of edge electric field concentration faced by conventional planar devices and reduce the influence of surface states on device performance, which is an important direction for the development of GaN-based devices. One electrode of the vertical structure device must be fabricated on the N-polar surface of the gallium nitride single crystal substrate. (2) Compared with Ga polar GaN, N-polar GaN has different polarities, surface dangling bonds and surface reconstruction methods, which can realize many new device structures and obtain performance that Ga polar devices do not have. N-polar high electron mobility transistor (HEMT) devices can reduce short-channel effects and improve the high-frequency characteristics of the device. The incorporation efficiency of impurities such as In and Al is higher during the growth of N-polar materials, and it is easier to control the composition of GaN-based ternary and quaternary compounds. In solar cells, the polarization electric field inside the N-polar device can promote the separation of photogenerated electrons and holes and improve the efficiency of the solar cell. One electrode of the N-polar device must also be fabricated on the N-polar surface of the gallium nitride single crystal substrate.

[0004] However, N-polar ohmic contacts face problems such as high contact resistance and poor thermal stability. Generally, ohmic contacts on N-polar surfaces deteriorate or even fail after annealing at temperatures above 300 degrees Celsius. This is mainly because Al in the electrode material at the interface easily diffuses into GaN to form AlN, which then creates two-dimensional cavitation gas near the interface due to piezoelectric polarization, leading to a deterioration in ohmic properties. Since high-temperature processes are frequently used in device fabrication, such as annealing and wire bonding, it is essential to improve the thermal stability of N-polar ohmic contacts to avoid performance degradation caused by high temperatures. Summary of the Invention

[0005] The technical problem to be solved by this invention is to address the poor ohmic contact of the N-polar surface of GaN-based devices, improve the thermal stability of the ohmic contact of the N-polar surface, reduce the contact resistance, improve the reliability of the device, and provide a method for preparing a composite substrate and the composite substrate.

[0006] To address the aforementioned problems, the present invention provides a method for preparing a composite substrate, comprising: providing a III-V group single crystal substrate, wherein the III-V group single crystal substrate has a III-group polar surface and a V-group polar surface; and forming a nanowire layer on the V-group polar surface of the III-V group single crystal substrate.

[0007] To address the aforementioned problems, the present invention provides a composite substrate comprising: a III-V group single crystal substrate having a III-V polar facet and a V-V polar facet; and a nanowire layer disposed on the V-V polar facet of the III-V group single crystal substrate.

[0008] This invention effectively alleviates the problem of poor ohmic contact on the N-polar surface of GaN substrates by setting a nanowire layer on the V-polar surface of a III-V single-crystal substrate, reducing contact resistance, improving the thermal stability of the N-polar ohmic contact, and improving the reliability of the device. Attached Figure Description

[0009] Appendix Figure 1 The diagram shown is a schematic representation of a specific embodiment of the present invention.

[0010] Appendix Figure 2A-2B The diagram shown is a schematic representation of the process described in a specific embodiment of the present invention.

[0011] Appendix Figures 3A-3B The diagram shown is a schematic representation of the process described in a specific embodiment of the present invention. Detailed Implementation

[0012] The preparation method of the composite substrate and the specific embodiments of the composite substrate provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0013] Appendix Figure 1 The diagram shown is a schematic diagram of a specific embodiment of the present invention, including: step S10, providing a III-V group single crystal substrate, the III-V group single crystal substrate having a III group polar surface and a V group polar surface; step S11, forming a nanowire layer on the V group polar surface of the III-V group single crystal substrate.

[0014] Appendix Figure 2A-2B The diagram shown is a schematic representation of the process described in a specific embodiment of the present invention. In this embodiment, the III-V single-crystal substrate is a GaN substrate, and the V-group polar surface is an N-group polar surface. In other embodiments, other III-V materials may also be used.

[0015] Appendix Figure 2AReferring to step S10, a III-V group single-crystal substrate 201 is provided, wherein the III-V group single-crystal substrate 201 has a III-group polar surface and a V-group polar surface. In a specific embodiment of the present invention, the thickness of the III-V group single-crystal substrate 201 is 10μm-500μm, and it is made of undoped GaN material. The III-V group single-crystal substrate 201 is mainly used to increase the width of the depletion region of the device, thereby increasing the breakdown voltage of the device.

[0016] Appendix Figure 2B Referring to step S11, a nanowire layer 202 is formed on the group V polar surface of the group III-V single crystal substrate 201. In a specific embodiment of the present invention, the thickness of the nanowire layer 202 is 10 μm-100 μm, and GaN material is used. The nanowire layer 202 is formed by a method selected from hydride vapor phase epitaxy, metal-organic chemical vapor deposition, molecular beam epitaxy, ammonothermal method, and Na flux method, or a combination of several of these methods.

[0017] In other specific embodiments of the present invention, the materials of the III-V single crystal substrate 201 and the nanowire layer 202 can be binary III-V semiconductor materials, ternary, quaternary, and multi-component III-V semiconductor materials formed by multiple III elements and multiple V elements, or binary, ternary, and multi-component III-V semiconductor materials with different band gaps formed by III elements and V elements, such as GaN, AlN, InN, GaAs, InP, etc., and the III-V single crystal substrate 201 and the nanowire layer 202 can be made of the same III-V material or different III-V materials.

[0018] Upon completion of the above technical solution, the attached document will be obtained. Figure 2BThe composite substrate shown includes: a III-V group single crystal substrate 201, which has a III-V polar surface and a V-V polar surface; and a nanowire layer 202 disposed on the V-V polar surface of the III-V group single crystal substrate 201. In a specific embodiment of the present invention, the thickness of the III-V group single crystal substrate 201 is 10 μm-500 μm and it is made of undoped GaN material, and the thickness of the nanowire layer 202 is 10 μm-100 μm and it is made of GaN material. In other specific embodiments of the present invention, the materials of the III-V single crystal substrate 201 and the nanowire layer 202 can be binary III-V semiconductor materials, ternary, quaternary, and multi-component III-V semiconductor materials formed by multiple III elements and multiple V elements, or binary, ternary, and multi-component III-V semiconductor materials with different band gaps formed by III elements and V elements, such as GaN, AlN, InN, GaAs, InP, etc., and the III-V single crystal substrate 201 and the nanowire layer 202 can be made of the same III-V material or different III-V materials.

[0019] Appendix Figures 3A-3B The diagram shown is a schematic representation of the process described in another specific embodiment of the present invention.

[0020] Appendix Figure 3A A group III-V single-crystal substrate 301 is provided, wherein the group III-V single-crystal substrate 301 has a group III polar surface and a group V polar surface. In a specific embodiment of the present invention, the thickness of the group III-V single-crystal substrate 301 is 10 μm-500 μm, and it is made of undoped GaN material. The group III-V single-crystal substrate 301 is mainly used to increase the width of the depletion region of the device, thereby increasing the breakdown voltage of the device.

[0021] Appendix Figure 3B Referring to step S11, a nanowire layer 302 is formed on the group V polar surface of the group III-V single crystal substrate 301. In one specific embodiment of the present invention, the thickness of the nanowire layer 302 is 10 μm-100 μm, and GaN material is used. The nanowire layer 302 can be formed by electrochemical etching, that is, a series of periodic nanostructures are prepared on the N polar surface of the GaN single crystal substrate by electrochemical etching. In one specific embodiment of the present invention, a metal electrode can also be deposited on the surface of the above nanostructure to further reduce the contact resistance.

[0022] In other specific embodiments of the present invention, the materials of the III-V single crystal substrate 301 and the nanowire layer 302 can be binary III-V semiconductor materials, ternary, quaternary, and multi-component III-V semiconductor materials formed by multiple III elements and multiple V elements, or binary, ternary, and multi-component III-V semiconductor materials with different band gaps formed by III elements and V elements, such as GaN, AlN, InN, GaAs, InP, etc., and the III-V single crystal substrate 301 and the nanowire layer 302 can be made of the same III-V material or different III-V materials.

[0023] Appendix Figure 3B The composite substrate shown includes: a III-V group single crystal substrate 301, wherein the III-V group single crystal substrate 301 is made of single crystal material and the III-V group single crystal substrate 301 includes an N polarity surface; and a nanowire layer 302, wherein the nanowire layer is disposed on the N polarity surface of the substrate.

[0024] The above technical solution transforms the ohmic contact on the N-polar surface of the GaN substrate into an ohmic contact on the non-polar surface by depositing a nanowire layer on the V-polar surface of a III-V single-crystal substrate. This effectively alleviates the problem of Al in the electrode material at the interface easily diffusing into GaN to form AlN, which in turn forms two-dimensional cavitation gas near the interface due to piezoelectric polarization, leading to deterioration of ohmic properties. It also reduces contact resistance, improves the thermal stability of the N-polar ohmic contact, and thus enhances the reliability of the device.

[0025] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for preparing a composite substrate, characterized in that, include: A III-V group single crystal substrate is provided, the III-V group single crystal substrate having a III group polar surface and a V group polar surface, the III-V group single crystal substrate is made of undoped GaN material, and the thickness of the III-V group single crystal substrate is 10μm-500μm; A nanowire layer is directly formed on the V-type polar surface of the III-V single crystal substrate. The nanowire layer is made of GaN material and is used to transform the ohmic contact on the V-type polar surface into an ohmic contact on the non-polar surface, thereby reducing the contact resistance of the V-type polar surface. A metal electrode is deposited on the surface of the nanowire layer.

2. The method according to claim 1, characterized in that, The thickness of the nanowire layer is 10μm-100μm.

3. The method according to claim 1, characterized in that, The nanowire layer is formed by a method selected from one or a combination of several of the following: hydride vapor phase epitaxy, metal-organic chemical vapor deposition, molecular beam epitaxy, ammonothermal method, and Na flux method.

4. The method according to claim 1, characterized in that, The nanowire layer was formed using an electrochemical etching method.

5. A composite substrate, characterized in that, include: III-V group single crystal substrate, wherein the III-V group single crystal substrate has a III-group polar surface and a V-group polar surface, the III-V group single crystal substrate is made of undoped GaN material, and the thickness of the III-V group single crystal substrate is 10μm-500μm; A nanowire layer is directly disposed on the V-type polar surface of the III-V single crystal substrate. The nanowire layer is made of GaN material. The nanowire layer is used to transform the ohmic contact on the V-type polar surface into an ohmic contact on the non-polar surface, thereby reducing the contact resistance of the V-type polar surface. A metal electrode is deposited on the surface of the nanowire layer.

6. The composite substrate according to claim 5, characterized in that, The thickness of the nanowire layer is 10μm-100μm.

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