Display device and method of manufacturing the same

Abstract

A display device includes a first substrate including at least one first open portion, a pixel disposed on the first substrate, at least one first heat dissipation layer disposed in the at least one first open portion, an insulating layer disposed under the first substrate and including at least one second open portion overlapping the at least one first open portion, and a second heat dissipation layer disposed in the at least one second open portion.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to and the benefit of Korean Patent Application No. 10-2020-0068133, filed on June 5, 2020, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The disclosure relates to a display device and a manufacturing method thereof. BACKGROUND

[0004] Electronic devices such as a smart phone, a digital camera, a notebook computer, a navigation device, or a smart TV, etc. that provide an image to a user include a display device for displaying an image. The display device generates an image, and provides the generated image to the user through a display screen.

[0005] The display device includes a display panel including a pixel, and a driving unit electrically connected to the display panel to drive the pixel. Each of the plurality of pixels includes an image display element and a driving element electrically connected to the image display element. The driving element drives the image display element, and the image display element generates a predetermined light to display an image to a user.

[0006] If the pixel is driven, heat can be generated in the display panel, and the heat can reduce the efficiency and the lifespan of the pixel. Accordingly, there is a need to develop a technology to dissipate the heat generated in the display panel to the outside. SUMMARY

[0007] The disclosure provides a display device capable of enhancing a heat dissipation function and a manufacturing method thereof.

[0008] In an embodiment, the display device can include a first substrate including at least one first opening portion, a pixel disposed on the first substrate, at least one first heat dissipation layer disposed in the at least one first opening portion, an insulating layer disposed under the first substrate and including at least one second opening portion overlapping the at least one first opening portion, and a second heat dissipation layer disposed in the at least one second opening portion.

[0009] The second heat dissipation layer can be disposed under the first substrate and overlap the insulating layer.

[0010] The second heat dissipation layer can contact the at least one first heat dissipation layer in the at least one second opening portion.

[0011] The second heat dissipation layer can be disposed to have a stepped structure from a bottom surface of the insulating layer to a bottom surface of the at least one first heat dissipation layer.

[0012] Each of the at least one first heat dissipation layer can have a thickness greater than a thickness of the second heat dissipation layer.

[0013] The display device can further include an etch stop layer disposed between the first substrate and the pixels.

[0014] The at least one first heat dissipation layer, the second heat dissipation layer, and the etch stop layer can include a metallic material.

[0015] In a plan view, the at least one first open portion, the at least one second open portion, and the at least one first heat dissipation layer can have a circular shape, a polygonal shape, or an elliptical shape.

[0016] The pixels can include a light emitting area and a non-light emitting area adjacent to the light emitting area. In a plan view, the at least one first heat dissipation layer can overlap the light emitting area.

[0017] The display device can further include a second substrate disposed on the first substrate, a color filter disposed under the second substrate and overlapping the light emitting area in a plan view, and a quantum dot layer disposed under the color filter and overlapping the light emitting area in a plan view. The quantum dot layer can be disposed on the pixels.

[0018] The at least one first open portion can include a plurality of first open portions, the at least one second open portion can include a plurality of second open portions, and the at least one first heat dissipation layer can include a plurality of first heat dissipation layers.

[0019] In an embodiment, the method of manufacturing the display device can include forming an insulating layer under a first substrate, the first substrate including a first removal portion and a first peripheral portion adjacent to the first removal portion, forming pixels on the first substrate, removing a second removal portion of the insulating layer overlapping the first removal portion in a plan view, removing the first removal portion, forming a first heat dissipation layer in a first open portion of the first substrate, the first open portion being formed by removing the first removal portion, and forming a second heat dissipation layer in a second open portion of the insulating layer, the second open portion being formed by removing the second removal portion.

[0020] Forming the first heat dissipation layer in the first open portion can include an inkjet printing process or a dispersion process.

[0021] Forming the second heat dissipation layer in the second open portion can include a sputtering process.

[0022] Forming the second heat dissipation layer can include forming the second heat dissipation layer under the first substrate to overlap the insulating layer.

[0023] Forming the second heat dissipation layer can include forming the second heat dissipation layer to contact the first heat dissipation layer in the second open portion and to have a step structure on a bottom surface of the insulating layer under the first heat dissipation layer.

[0024] The first heat dissipation layer can have a thickness greater than a thickness of the second heat dissipation layer.

[0025] The manufacturing method can further include forming an etching stop layer on the first substrate. Forming the pixel can include disposing the pixel on the etching stop layer on the first substrate.

[0026] The pixel can include a light emitting area and a non-light emitting area adjacent to the light emitting area. In a plan view, the first heat dissipation layer can overlap the light emitting area.

[0027] The manufacturing method can further include irradiating the first removal portion with a laser beam. BRIEF DESCRIPTION OF DRAWINGS

[0028] Additional appreciation according to embodiments of the present application will become more apparent by describing embodiments of the present application in detail, with reference to the attached drawings, in which:

[0029] Figure 1 is a schematic perspective view of a display device according to an embodiment;

[0030] Figure 2 is a schematic plan view showing Figure 1 is a schematic cross-sectional view of a cross section of the display device shown in

[0031] Figure 3 is a schematic cross-sectional view of a cross section of the display panel shown in Figure 2

[0032] Figure 4 is a schematic cross-sectional view of a cross section of a pixel disposed in Figure 3 the circuit element layer and the display element layer shown in

[0033] Figure 5 is a schematic cross-sectional view of a cross section of a portion of the display panel shown in Figure 3

[0034] Figure 6 is a schematic plan view showing a planar arrangement of the first heat dissipation layer shown in Figure 5

[0035] Figure 7 and Figure 8 are schematic plan views showing various shapes of the first heat dissipation layer;

[0036] Figures 9 to 17 is a schematic view showing a method for manufacturing a display device according to an embodiment;

[0037] Figure 18 is a schematic view showing a configuration of a display panel according to another embodiment. DETAILED DESCRIPTION​​​

[0038] It will be understood that when an element or layer is referred to as being "on" or "connected to" or "coupled to" another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer or intervening third element can be present.

[0039] In the drawings, like reference numerals refer to like elements throughout. Also, in the drawings, the thickness of lines, layers, or regions can be exaggerated for clarity.

[0040] The term "and / or" includes any and all combinations of one or more of the associated items.

[0041] Terms such as first and second can be used to describe various components, but the components should not be limited by such terms. The terms are only used to distinguish one element from another. For example, a first component could be termed a second component, or, similarly, a second component could be termed a first component, without departing from the scope of the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0042] In addition, terms such as "below", "under", "above", and "on" are used to explain the relative spatial relationships between items shown in the drawings. It will be understood that spatial relationships terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures.

[0043] Unless otherwise defined or implied herein, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0044] It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

[0045] Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings.

[0046] Figure 1 is a schematic perspective view of a display device DD according to an embodiment.

[0047] Referring toFigure 1 The display device DD can have a rectangular shape including a long side extending in a first direction DR1 and a short side extending in a second direction DR2 intersecting the first direction DR1. However, the display device DD is not limited thereto and can have various shapes such as a circular shape and a polygonal shape.

[0048] Hereinafter, a direction substantially perpendicularly intersecting a plane defined by the first direction DR1 and the second direction DR2 is defined as a third direction DR3. The meaning of the phrase "viewed in a plane" or "in a plan view" is defined as viewing an object in the third direction DR3.

[0049] A top surface of the display device DD can be defined as a display surface DS and can include a surface defined by the first direction DR1 and the second direction DR2. An image IM generated in the display device DD can be provided to a user through the display surface DS.

[0050] The display surface DS can include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA displays an image, and the non-display area NDA can not display an image. The non-display area NDA can surround or be adjacent to the display area DA and define a boundary of the display device DD printed in a predetermined color.

[0051] The display device DD can be used in large electronic devices such as televisions, monitors, and outdoor billboards. The display device DD can be a small or medium-sized electronic device such as a personal computer, a laptop computer, a personal digital assistant, a vehicle navigator, a game machine, a smart phone, a tablet, or a camera, etc. However, these are presented only as examples, and the display device DD can be employed in other electronic devices without departing from the inventive concept.

[0052] Figure 2 is a schematic cross-sectional view showing a cross section of the display device DD shown in Figure 1

[0053] For example, Figure 2 shows a cross section of the display device DD viewed in the first direction DR1.

[0054] Referring to Figure 2 , the display device DD can include a display panel DP, an input sensing part ISP, a window WIN, an adhesive layer AL, and a heat dissipation layer RHL. The display panel DP can be of a rigid type, but is not limited thereto and can be of a flexible type.

[0055] ​The display panel DP according to the embodiment can be an emissive display panel. For example, the display panel DP can be an organic light emitting display panel or a quantum dot light emitting display panel. The light emitting layer of the organic light emitting display panel can include an organic light emitting material. The light emitting layer of the quantum dot light emitting display panel can include quantum dots or quantum rods, etc. Hereinafter, the display panel DP will be described as an organic light emitting display panel.

[0056] The input sensing portion ISP can be provided on the display panel DP. The input sensing portion ISP can include a sensor (not shown) for sensing an external input in an electrostatic capacitance manner. When the display device DD is manufactured, the input sensing portion ISP can be directly manufactured on the display panel DP. However, the embodiment is not limited thereto, and the input sensing portion ISP can be manufactured as a panel separate from the display panel DP, and can be attached to the display panel DP by means of an adhesive. The input sensing portion ISP can be omitted.

[0057] The window WIN can be provided on the input sensing portion ISP. The window WIN can protect the display panel DP and the input sensing portion ISP from external scratches or impacts. An adhesive layer AL can be provided between the input sensing portion ISP and the window WIN to stack them on each other.

[0058] The heat dissipation layer RHL can be provided under the display panel DP. The heat dissipation layer RHL can dissipate heat generated in the display panel DP. A specific configuration of the heat dissipation layer RHL will be described in detail.

[0059] Figure 3 is a schematic cross-sectional view illustrating a cross section of the display panel DP shown in FIG. 1A. Figure 2 is a schematic cross-sectional view illustrating a cross section of the display panel DP shown in FIG. 1A.

[0060] For example, Figure 3 is a schematic cross-sectional view illustrating a cross section of the display panel DP viewed in the first direction DR1.

[0061] Referring to Figure 3 , the display panel DP can include a first substrate SUB1, a second substrate SUB2, a circuit element layer DP-CL, a display element layer DP-OLED, a thin film encapsulation layer TFE (see, for example, FIG. 1A), Figure 4 , a color filter layer CFL, a light conversion layer LCL, a filler FL, and a sealant SAL.

[0062] The second substrate SUB2 can be provided on the first substrate SUB1 to face the first substrate SUB1 or to overlap the first substrate SUB1. The circuit element layer DP-CL, the display element layer DP-OLED, the thin film encapsulation layer TFE, the color filter layer CFL, the light conversion layer LCL, the filler FL, and the sealant SAL can be provided between the first substrate SUB1 and the second substrate SUB2.

[0063] Each of the first substrate SUB1 and the second substrate SUB2 can include glass, but is not limited thereto, and can include a flexible plastic material such as polyimide (PI). In a plan view, the first substrate SUB1 can include a display area DA and a non-display area NDA surrounding or adjacent to the display area DA.

[0064] A circuit element layer DP-CL can be disposed on the first substrate SUB1. A display element layer DP-OLED can be disposed on the circuit element layer DP-CL. The display element layer DP-OLED can be disposed in the display area DA.

[0065] A pixel can be disposed in the circuit element layer DP-CL and the display element layer DP-OLED. Each of a plurality of pixels can include a transistor disposed in the circuit element layer DP-CL and a light emitting element disposed in the display element layer DP-OLED and electrically connected to the transistor. Hereinafter, the configuration of the pixel will be described in detail.

[0066] A thin film encapsulation layer TFE can be disposed on the circuit element layer DP-CL to cover or overlap the display element layer DP-OLED. The thin film encapsulation layer TFE can protect the pixel from moisture, oxygen, and external foreign substances.

[0067] A color filter layer CFL can be disposed under the second substrate SUB2. In a plan view, the color filter layer CFL can overlap the display area DA. A light conversion layer LCL can be disposed under the color filter layer CFL. In a plan view, the light conversion layer LCL can overlap the display area DA.

[0068] In a plan view, the sealant SAL can overlap the non-display area NDA. The sealant SAL can be disposed between the first substrate SUB1 and the second substrate SUB2. The first substrate SUB1 and the second substrate SUB2 can be laminated to each other by means of the sealant SAL. The sealant SAL can include a UV curable material.

[0069] A filling material FL can be disposed between the light conversion layer LCL and the thin film encapsulation layer TFE. The filling material FL can extend toward the non-display area NDA to contact the sealant SAL. The filling material FL can include silicon, an epoxy resin, and an acrylic thermosetting material.

[0070] Light generated in the display element layer DP-OLED can be provided to the light conversion layer LCL. The light conversion layer LCL can convert the color of the light provided from the display element layer DP-OLED. The color changed light can be output to the outside through the color filter layer CFL and the second substrate SUB2.

[0071] The color filter layer CFL can prevent reflection of external light provided from the outside to the display panel DP. This function of the color filter layer CFL will be described in detail below.

[0072] Figure 4 is a schematic cross-sectional view showing a cross section of a pixel PX in the circuit element layer DP-CL and the display element layer DP-OLED shown in Figure 3

[0073] Referring to Figure 4 , the pixel PX can be provided on the first substrate SUB1 and include a transistor TR and a light emitting element OLED. The light emitting element OLED can include a first electrode AE, a second electrode CE, a hole control layer HCL, an electron control layer ECL, and a light emitting layer EML. The first electrode AE can be an anode, and the second electrode CE can be a cathode.

[0074] The transistor TR and the light emitting element OLED can be provided on the first substrate SUB1. Although one transistor TR is shown, the pixel PX can include a plurality of transistors and at least one capacitor for driving the light emitting element OLED.

[0075] The display area DA can include a plurality of light emitting areas PA corresponding to the plurality of pixels PX, respectively, and a non-light emitting area NPA adjacent to the light emitting areas PA. The light emitting element OLED can be provided in the light emitting area PA.

[0076] The etching stop layer ETL can be provided on the first substrate SUB1. The etching stop layer ETL can include a metal material such as molybdenum. The function of the etching stop layer ETL will be described in detail below.

[0077] The buffer layer BFL can be provided on the etching stop layer ETL, and the buffer layer BFL can be an inorganic layer. A semiconductor pattern can be provided on the buffer layer BFL. The semiconductor pattern can include polysilicon. However, embodiments are not limited thereto. For example, the semiconductor pattern can include amorphous silicon or a metal oxide.

[0078] The semiconductor pattern can have different properties depending on whether it is doped or not. The semiconductor pattern can include a doped region and a non-doped region. The doped region can be doped with an N-type dopant or a P-type dopant. The doped region has a higher electrical conductivity than the non-doped region and can substantially function as a source electrode and a drain electrode. The non-doped region substantially corresponds to an active layer (or a channel) of the transistor.

[0079] ​The source S, the active layer A, and the drain D of the transistor TR can be formed of a semiconductor pattern. The first insulating layer INS1 can be disposed on the semiconductor pattern. The gate G of the transistor TR can be disposed on the first insulating layer INS1. The second insulating layer INS2 can be disposed on the gate G. The third insulating layer INS3 can be disposed on the second insulating layer INS2.

[0080] The connection electrode CNE can be disposed between the transistor TR and the light emitting element OLED to electrically connect them to each other. The connection electrode CNE can include a first connection electrode CNE1 and a second connection electrode CNE2.

[0081] The first connection electrode CNE1 can be disposed on the third insulating layer INS3 and can be electrically connected to the drain D through a first contact hole CH1 defined in the first to third insulating layers INS1 to INS3. The fourth insulating layer INS4 can be disposed on the first connection electrode CNE1. The fifth insulating layer INS5 can be disposed on the fourth insulating layer INS4. The second connection electrode CNE2 can be disposed on the fifth insulating layer INS5 and can be electrically connected to the first connection electrode CNE1 through a second contact hole CH2 defined in the fourth and fifth insulating layers INS4 and INS5.

[0082] The sixth insulating layer INS6 can be disposed on the second connection electrode CNE2. Layers from the buffer layer BFL to the sixth insulating layer INS6 can be defined as a circuit element layer DP-CL. The first to sixth insulating layers INS1 to INS6 can be inorganic layers or organic layers.

[0083] The first electrode AE can be disposed on the sixth insulating layer INS6. The first electrode AE can be electrically connected to the second connection electrode CNE2 through a third contact hole CH3 defined in the sixth insulating layer INS6. A pixel definition layer PDL for exposing a predetermined portion of the first electrode AE can be disposed on the first electrode AE and the sixth insulating layer INS6. In the pixel definition layer PDL, an opening portion PX_OP can be defined to expose the predetermined portion of the first electrode AE.

[0084] A hole control layer HCL can be disposed on the first electrode AE and the pixel definition layer PDL. The hole control layer HCL can be commonly disposed in the light emitting area PA and the non-light emitting area NPA. The hole control layer HCL can include a hole transport layer and a hole injection layer.

[0085] A light emitting layer EML can be disposed on the hole control layer HCL. The light emitting layer EML can be disposed in an area corresponding to the opening portion PX_OP. The light emitting layer EML can include an organic material and / or an inorganic material. The light emitting layer EML can generate first light. The first light can be blue light.

[0086] An electron control layer ECL can be disposed on the light emitting layer EML and the hole control layer HCL. The electron control layer ECL can be commonly disposed in the light emitting area PA and the non-light emitting area NPA. The electron control layer ECL can include an electron transport layer and an electron injection layer.

[0087] A second electrode CE can be disposed on the electron control layer ECL. The second electrode CE can be commonly disposed in the plurality of pixels PX. Layers disposed with the light emitting element OLED can be defined as a display element layer DP-OLED.

[0088] A thin film encapsulation layer TFE can be disposed on the second electrode CE to cover or overlap the pixel PX. The thin film encapsulation layer TFE can include a first encapsulation layer EN1 disposed on the second electrode CE, a second encapsulation layer EN2 disposed on the first encapsulation layer EN1, and a third encapsulation layer EN3 disposed on the second encapsulation layer EN2.

[0089] The first encapsulation layer EN1 and the third encapsulation layer EN3 can be inorganic layers, and the second encapsulation layer EN2 can be an organic layer. The first encapsulation layer EN1 and the third encapsulation layer EN3 can protect the pixel PX from moisture / oxygen. The second encapsulation layer EN2 can protect the pixel PX from foreign substances such as dust particles.

[0090] A first voltage can be applied to the first electrode AE by a transistor TR, and a second voltage having a lower level than the first voltage can be applied to the second electrode CE. Holes and electrons injected into the light emitting layer EML can combine to form an exciton, and the light emitting element OLED can emit light while the exciton transitions to a ground state.

[0091] Figure 5 is a schematic cross-sectional view showing a cross-section of a portion of the display panel DP shown in Figure 3 FIG. 1A.

[0092] Figure 5 Cross-sections of the display panel DP corresponding to three light emitting areas PA1, PA2, and PA3 are shown, and transistors TR disposed in the circuit element layer DP-CL and light emitting elements OLED disposed in the display element layer DP-OLED are omitted.

[0093] Referring to Figure 5 , a pixel layer PXL can be disposed on the first substrate SUB1. The pixel layer PXL can include the aforementioned circuit element layer DP-CL and the display element layer DP-OLED. An etching stop layer ETL can be disposed between the first substrate SUB1 and the pixel layer PXL.

[0094] The display area DA can include a first light emitting area PA1, a second light emitting area PA2, a third light emitting area PA3, and a respective non-light emitting area NPA around or adjacent to the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3.

[0095] Figure 4 The light emitting area PA illustrated in FIG. 1A can be any one of the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3 illustrated in FIG. 1B. The aforementioned light emitting element OLED can be disposed in the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3. The first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3 can generate the first light L1. For example, the first light L1 can be blue light. Figure 5

[0096] The color filter layer CFL can include a first color filter CF1, a second color filter CF2, a third color filter CF3, a black matrix BM, a low-refraction layer LRL, and a first insulating layer IL1. Although one first color filter CF1, one second color filter CF2, and one third color filter CF3 are illustrated, a plurality of first color filters CF1, a plurality of second color filters CF2, and a plurality of third color filters CF3 can be provided.

[0097] The light conversion layer LCL can include a first quantum dot layer QDL1, a second quantum dot layer QDL2, a light transmission layer LTL, a bank layer BNK, and a second insulating layer IL2. Although one first quantum dot layer QDL1, one second quantum dot layer QDL2, and one light transmission layer LTL are illustrated, a plurality of first quantum dot layers QDL1, a plurality of second quantum dot layers QDL2, and a plurality of light transmission layers LTL can be provided.

[0098] The first color filter CF1, the second color filter CF2, and the third color filter CF3 can be disposed under the second substrate SUB2. In a plan view, the first color filter CF1 can overlap the first light emitting area PA1, the second color filter CF2 can overlap the second light emitting area PA2, and the third color filter CF3 can overlap the third light emitting area PA3. The first color filter CF1 can include a red color filter. The second color filter CF2 can include a green color filter. The third color filter CF3 can include a blue color filter.

[0099] The black matrix BM can be disposed under the second substrate SUB2. In a plan view, the black matrix BM can overlap the non-display area NPA. The black matrix BM can be disposed between the first color filter CF1, the second color filter CF2, and the third color filter CF3.

[0100] ​A low-refraction layer LRL can be disposed under the second substrate SUB2 to cover or overlap the first color filter CF1, the second color filter CF2, and the third color filter CF3, and the black matrix BM. The low-refraction layer LRL can have a refractive index smaller than that of the first quantum dot layer QDL1, the second quantum dot layer QDL2, and the light transmission layer LTL. The low-refraction layer LRL can include an organic layer and scattering particles disposed in the organic layer and for scattering light. A first insulating layer IL1 can be disposed under the low-refraction layer LRL. The first insulating layer IL1 can be an inorganic layer.

[0101] A bank layer BNK can be disposed under the first insulating layer IL1. In a plan view, the bank layer BNK can overlap the non-display area NPA. In the bank layer BNK, an opening portion QOP can be defined and overlap the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3. The bank layer BNK can have a black color.

[0102] The first quantum dot layer QDL1 and the second quantum dot layer QDL2, and the light transmission layer LTL can be disposed in the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3, respectively. The first quantum dot layer QDL1 and the second quantum dot layer QDL2, and the light transmission layer LTL can be disposed on the display element layer DP-OLED.

[0103] The first quantum dot layer QDL1 and the second quantum dot layer QDL2, and the light transmission layer LTL can be disposed in the plurality of opening portions QOP, respectively. Accordingly, in a plan view, the first quantum dot layer QDL1 and the second quantum dot layer QDL2, and the light transmission layer LTL can overlap the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3, respectively. The first quantum dot layer QDL1 can overlap the first light emitting area PA1, the second quantum dot layer QDL2 can overlap the second light emitting area PA2, and the light transmission layer LTL can overlap the third light emitting area PA3.

[0104] A second insulating layer IL2 can be disposed under the bank layer BNK, the first quantum dot layer QDL1 and the second quantum dot layer QDL2, and the light transmission layer LTL. The second insulating layer IL2 can be an inorganic layer.

[0105] The first light L1 generated in the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3 can be provided to the first quantum dot layer QDL1 and the second quantum dot layer QDL2, and the light transmission layer LTL. The first light L1 generated in the first light emitting area PA1 can be provided to the first quantum dot layer QDL1. The first light L1 generated in the second light emitting area PA2 can be provided to the second quantum dot layer QDL2. The first light L1 generated in the third light emitting area PA3 can be provided to the light transmission layer LTL.

[0106] The first quantum dot layer QDL1 can convert the first light L1 into second light L2. The second quantum dot layer QDL2 can convert the first light L1 into third light L3. For example, the second light L2 can be red light, and the third light L3 can be green light. The first quantum dot layer QDL1 can include first quantum dots (not shown), and the second quantum dot layer QDL2 can include second quantum dots (not shown). The light transmission layer LTL can include light scattering particles (not shown).

[0107] The first quantum dot can convert the first light L1 having a blue wavelength into second light L2 having a red wavelength. The second quantum dot can convert the first light L1 having a blue wavelength into third light L3 having a green wavelength. The first quantum dot and the second quantum dot can scatter the second light L2 and the third light L3.

[0108] The light transmission layer LTL can transmit the first light L1 without performing a light conversion operation. The first light L1 can be scattered by the light scattering particles in the light transmission layer LTL to be emitted.

[0109] The first quantum dot layer QDL1 can emit the second light L2, the second quantum dot layer QDL2 can emit the third light L3, and the light transmission layer LTL can emit the first light L1. Accordingly, a predetermined image can be displayed by means of the second light L2, the third light L3, and the first light L1 respectively displaying red, green, and blue colors.

[0110] The first light L1, the second light L2, and the third light L3 emitted from the light conversion layer LCL can be transmitted through the low-refraction layer LRL, the first color filter CF1, the second color filter CF2, and the third color filter CF3, and the second substrate SUB2 to be provided to a user. The first light L1, the second light L2, and the third light L3 can be refracted in the low-refraction layer LRL and then scattered more by the scattering particles disposed in the low-refraction layer LRL to be emitted.

[0111] A portion of the first light L1 can not be converted by the first quantum dot but can be transmitted through the first quantum dot to be provided to the first color filter CF1. In other words, there can be the first light L1 that does not come into contact with the first quantum dot and is not converted into the second light L2. The first color filter CF1 can block light of any other color. The first light L1 that is not converted in the first quantum dot layer QDL1 can be blocked by the first color filter CF1 having a red color filter, and can not be emitted to the upper portion.

[0112] A portion of the first light L1 can not be converted by the second quantum dot, but can be transmitted through the second quantum dot to provide to the second color filter CF2. In other words, there can be the first light L1 which does not contact the second quantum dot and is not converted into the third light L3. The second color filter CF2 can block any other color of light. The first light L1 which is not converted in the second quantum dot layer QDL2 can be blocked by the second color filter CF2 having a green color filter, and can not be emitted to the upper portion.

[0113] External light can be provided above the display device DD toward the display panel DP. The external light can be white light. The white light can include red light, green light, and blue light. If the first color filter CF1, the second color filter CF2, and the third color filter CF3 are not used, the external light can be reflected by a metal layer (e.g., a wire) inside the display panel DP, and then provided to an external user without being changed. In this case, the external light can be seen by the user as light reflected by a mirror.

[0114] The first color filter CF1, the second color filter CF2, and the third color filter CF3 can prevent the external light from being reflected. For example, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can transmit the external light of red, green, and blue colors, respectively.

[0115] In an embodiment, the green light and the blue light of the external light provided to the first color filter CF1 can be blocked by the first color filter CF1 including a red color filter. Accordingly, the external light provided to the first color filter CF1 can be filtered by the first color filter CF1 to be the same red light as the light emitted from the first quantum dot layer QDL1.

[0116] The red light and the blue light of the external light provided to the second color filter CF2 can be blocked by the second color filter CF2 including a green color filter. Accordingly, the external light provided to the second color filter CF2 can be filtered by the second color filter CF2 to be the same green light as the light emitted from the second quantum dot layer QDL2.

[0117] The red light and the green light of the external light provided to the third color filter CF3 can be blocked by the third color filter CF3 including a blue color filter. Accordingly, the external light provided to the third color filter CF3 can be filtered by the third color filter CF3 to be the same blue light as the light emitted from the light transmission layer LTL. Accordingly, the external light can be blocked by the first color filter CF1, the second color filter CF2, and the third color filter CF3, and reflection of the external light can be reduced.

[0118] The black matrix BM can block unnecessary light in the non-light emitting area NPA. For example, the black matrix BM can prevent the first light L1, the second light L2, and the third light L3 from being mixed in the non-light emitting area NPA. The bank layer BNK can have a black color, and can have the same light blocking function as the black matrix BM.

[0119] The first opening portions OP1 can be defined in the first substrate SUB1. The plurality of first opening portions OP1 can respectively overlap the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3. However, embodiments are not limited thereto. The plurality of first opening portions OP1 can respectively partially overlap or not overlap the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3. The plurality of first opening portions OP1 can be arranged at equal intervals, but are not limited thereto. The plurality of first opening portions OP1 can be arranged at irregular intervals.

[0120] The heat dissipation layer RHL can include a first heat dissipation layer RHL1, a second heat dissipation layer RHL2, and an insulating layer INS. The insulating layer INS can be disposed under the first substrate SUB1. The insulating layer INS can include an organic layer. The insulating layer INS can have a thickness smaller than that of the first substrate SUB1. The thickness of the insulating layer INS and the thickness of the first substrate SUB1 can be defined as a thickness measured in the third direction DR3.

[0121] A second opening portion OP2 overlapping the first opening portion OP1 can be defined in the insulating layer INS. Accordingly, the plurality of second opening portions OP2 can respectively overlap the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3.

[0122] The first heat dissipation layer RHL1 can be disposed in the first opening portion OP1. Accordingly, in a plan view, the plurality of first heat dissipation layers RHL1 can respectively overlap the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3.

[0123] The second heat dissipation layer RHL2 can be disposed under the insulating layer INS and the first heat dissipation layer RHL1. The second heat dissipation layer RHL2 can be disposed under the first substrate SUB1 to cover or overlap the insulating layer INS. The second heat dissipation layer RHL2 can be disposed in the second opening portion OP2 to be in contact with the first heat dissipation layer RHL1 in the second opening portion OP2.

[0124] The second heat dissipation layer RHL2 can be continuously disposed along a bottom surface of the first heat dissipation layer RHL1, an inner side surface IS of the insulating layer INS in which the second opening portion OP2 is defined, and a bottom surface LS of the insulating layer INS. However, embodiments are not limited thereto, and if the second heat dissipation layer RHL2 is in contact with the first heat dissipation layer RHL1 in the second opening portion OP2, a plurality of portions in the second heat dissipation layer RHL2 can be provided on the bottom surface LS of the insulating layer INS and be separated.

[0125] A thickness of each of the plurality of first heat dissipation layers RHL1 can be greater than a thickness of the second heat dissipation layer RHL2. The thickness of each of the plurality of first heat dissipation layers RHL1 can be defined by a value measured in a third direction DR3. The third direction DR3 can be defined as a direction perpendicular to a top surface of the first substrate SUB1.

[0126] The thickness of the second heat dissipation layer RHL2 can be defined as a thickness measured in a direction perpendicular to a contact surface at which the second heat dissipation layer RHL2 is contacted. For example, the thickness of the second heat dissipation layer RHL2 can be defined as a thickness measured in a direction perpendicular to each of a bottom surface of the first heat dissipation layer RHL1, the inner side surface IS of the insulation layer INS, and the bottom surface LS of the insulation layer INS.

[0127] The second heat dissipation layer RHL2 having a smaller thickness can be provided to have a stepped structure (or a height difference) by being provided in contact with the bottom surface of the first heat dissipation layer RHL1, the inner side surface IS of the insulation layer INS, and the bottom surface LS of the insulation layer INS. For example, the second heat dissipation layer RHL2 can be provided to have a step from the bottom surface of the first heat dissipation layer RHL1 to the bottom surface LS of the insulation layer INS. The second heat dissipation layer RHL2 is formed to have a step instead of a flat shape, and thus a surface area of the second heat dissipation layer RHL2 can increase.

[0128] Each of the first heat dissipation layer RHL1 and the second heat dissipation layer RHL2 can include a metal material. For example, the first heat dissipation layer RHL1 and the second heat dissipation layer RHL2 can include silver (Ag) or copper (Cu) having high thermal conductivity.

[0129] If a pixel PX provided in the pixel layer PXL is driven, heat HT can be generated in the display panel DP. The heat HT can be mainly transferred to the first heat dissipation layer RHL1. The heat HT can be secondarily transferred to the second heat dissipation layer RHL2 through the first heat dissipation layer RHL1.

[0130] The greater the surface area, the more effectively a heat dissipation material such as metal can dissipate heat. As described above, since the second heat dissipation layer RHL2 formed to have a step instead of a flat shape increases the surface area, the heat HT can be more effectively dissipated to the outside through the second heat dissipation layer RHL2. Since the heat HT generated in the display panel DP is more efficiently dissipated to the outside, the lifespan and the light emission efficiency of the pixel PX can be improved.

[0131] Figure 6 is a schematic plan view illustrating a planar arrangement of the first heat dissipation layer RHL1 shown in FIG. 1A. Figure 5 is a schematic plan view illustrating a planar arrangement of the first heat dissipation layer RHL1 shown in FIG. 1A. Figure 7 and Figure 8 are schematic plan views illustrating various shapes of the first heat dissipation layer RHL1.

[0132] Although the first heat dissipation layer RHL1 having three rows and five columns is illustrated, the number of the first heat dissipation layer RHL1 is not limited thereto.

[0133] Referring to Figure 6 In a plan view, the first opening part OP1 and the second opening part OP2 can have a circular shape. The first opening part OP1 and the second opening part OP2 can be arranged in a matrix type at equal intervals in the first direction DR1 and the second direction DR2. However, embodiments are not limited thereto. In embodiments, the first opening part OP1 and the second opening part OP2 can be randomly arranged at different intervals.

[0134] According to the arrangement of the first opening part OP1, in a plan view, the first heat dissipation layer RHL1 can have a circular shape. The first heat dissipation layer RHL1 is arranged in a matrix type at equal intervals in the first direction DR1 and the second direction DR2, but embodiments are not limited thereto. The first heat dissipation layer RHL1 can be randomly arranged at different intervals. Each of the plurality of first heat dissipation layers RHL1 can have a diameter DIT of about 100 µm to about 150 µm.

[0135] In embodiments, the first opening part OP1 and the second opening part OP2 can have the same circular shape, but are not limited thereto. The first opening part OP1 and the second opening part OP2 can have different shapes as long as the first opening part OP1 and the second opening part OP2 overlap each other. For example, in a plan view, the first opening part OP1 can have a circular shape, and the second opening part OP2 can have a polygonal shape or an elliptical shape.

[0136] Referring to Figure 7 and Figure 8 In a plan view, the first opening part OP1 and the second opening part OP2 can have various shapes other than a circular shape. In a plan view, the first opening part OP1 and the second opening part OP2 can have a polygonal shape or an elliptical shape. For example, in a plan view, the first opening part OP1 and the second opening part OP2 can have a rectangular shape as illustrated in FIG. 11A. Figure 7 In a plan view, the first opening part OP1 and the second opening part OP2 can be an elliptical shape as illustrated in FIG. 11B. Figure 8

[0137] Figures 9 to 17 A method for manufacturing a display device DD according to embodiments is schematically illustrated.

[0138] Referring to Figure 9 The first substrate SUB1 can include the first removal part RMP1 and the first peripheral part PRP1 surrounding the respective first removal part RMP1. The insulating layer INS can be provided (or formed) under the first substrate SUB1.​

[0139] The first removal portion RMP1 can be irradiated on the first substrate SUB1 with a laser beam LAR. The laser beam LAR can be a femtosecond laser beam. The first removal portion RMP1 irradiated with the laser beam LAR can be more easily etched with an etchant (e.g., hydrogen fluoride (HF) or potassium hydroxide (KOH)). Such a process can be defined as a laser-induced deep etching (LIDE) process.

[0140] Reference Figure 10 An etch stop layer (ETL) may be provided on the first substrate SUB1. A pixel layer (PXL) may be provided on the etch stop layer (ETL), and a thin film encapsulation layer (TFE) may be provided on the pixel layer (PXL). A color filter layer (CFL) and a light conversion layer (LCL) may be provided below the second substrate SUB2, and a filler material (FL) may be provided between the light conversion layer (LCL) and the thin film encapsulation layer (TFE).

[0141] In a plan view, the first removed portion RMP1 may overlap with the first light-emitting area PA1, the second light-emitting area PA2, and the third light-emitting area PA3. In a plan view, the first peripheral portion PRP1 may overlap with the aforementioned non-display area NPA.

[0142] Reference Figure 11 ,Will Figure 10 The display panel DP shown is inverted, and a first substrate SUB1 is disposed on a second substrate SUB2. An insulating layer INS may include a second removal portion RMP2 and a second peripheral portion PRP2 surrounding the respective second removal portion RMP2. The second removal portion RMP2 may be disposed on the first removal portion RMP1 to overlap with the first removal portion RMP1. The second peripheral portion PRP2 may be disposed on the first peripheral portion PRP1 to overlap with the first peripheral portion PRP1.

[0143] The hard mask layer HMK can be disposed on the insulating layer INS. The hard mask layer HMK can be disposed on the second peripheral portion PRP2, and may not be disposed on the second removal portion RMP2. As the hard mask layer HMK, a transparent electrode such as indium zinc oxide (IZO) can be used.

[0144] The hard mask layer HMK can be formed using typical photolithography processes. For example, a mask forming layer comprising indium zinc oxide (IZO) can be formed on the entire top surface of the insulating layer INS, and a photoresist can be provided on the mask forming layer. The portion of the photoresist overlapping the second removal portion RMP2 can be removed by exposure and development processes. Then, using the photoresist as a mask, the portion of the mask forming layer overlapping the second removal portion RMP2 is removed by wet etching to form...Figure 11 The hard mask layer HMK is shown in FIG. 1.

[0145] Referring to Figure 12 The second removal portion RMP2 of the insulating layer INS can be removed as a mask by the hard mask layer HMK. The second removal portion RMP2 can be removed in a dry etching manner. By removing the second removal portion RMP2, a second opening portion OP2 can be defined in the insulating layer INS. In a plan view, the second opening portion OP2 can overlap the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3, respectively.

[0146] The second peripheral portion PRP2 of the insulating layer INS can be left as being disposed on the first peripheral portion PRP1. In other words, the insulating layer INS can be disposed only on the first peripheral portion PRP1 of the first substrate SUB1.

[0147] Referring to Figure 13 and Figure 14 The first removal portion RMP1 is removed to define a first opening portion OP1 in the first substrate SUB1. In a plan view, the first opening portion OP1 can overlap the first light emitting area PA1, the second light emitting area PA2, and the third light emitting area PA3, respectively. The first opening portion OP1 and the second opening portion OP2 can have a circular shape and can be defined in the first substrate SUB1 and the insulating layer INS in a matrix type.

[0148] The first removal portion RMP1 can be removed by a wet etching method. For example, the first removal portion RMP1 can be removed with an etching solution such as HF or KOH. Since the first removal portion RMP1 has been irradiated with the laser beam LAR, the first removal portion RMP1 can be etched more easily.

[0149] The first peripheral portion PRP1 can be etched with the etching solution even though the first peripheral portion PRP1 is not irradiated with the laser beam LAR. However, the etching speed can be slower than that of the first removal portion RMP1. If the insulating layer INS is not disposed on the first peripheral portion PRP1, not only the first removal portion RMP1 but also the first peripheral portion PRP1 adjacent to the first removal portion RMP1 can be etched with the etching solution. Accordingly, the size of the first opening portion OP1 can be expanded. The greater the size of the first opening portion OP1, the weaker the strength of the first substrate SUB can become.

[0150] However, in the embodiment, since the insulating layer INS is disposed on the first peripheral portion PRP1, the etching solution can not be provided due to the insulating layer INS. In other words, the second peripheral portion PRP2 of the insulating layer INS can prevent the etching solution from being provided to the first peripheral portion PRP1. Accordingly, the size of the first opening portion OP1 can be easily controlled by the second peripheral portion PRP2.

[0151] If the first opening portion OP1 is formed due to the etching solution, the etching stop layer ETL can prevent the etching solution from penetrating to the pixel layer PXL through the first opening portion OP1.

[0152] Referring to Figure 15 A first material M1 including a metal can be provided to the first opening portion OP1. The first material M1 can be provided to the first opening portion OP1 by an inkjet printing or a dispersion method. The first material M1 can include a metal ink such as silver or copper. The first material M1 can be cured to form a first heat dissipation layer RHL1 in the first opening portion OP1.

[0153] Referring to Figure 16 A second material M2 including a metal can be provided to the second opening portion OP2 to be provided on the first heat dissipation layer RHL1. The second material M2 can be provided on the insulating layer INS. A second heat dissipation layer RHL2 can be formed by means of the second material M2. The second material M2 can be provided on the first heat dissipation layer RHL1 and the insulating layer INS by a sputtering process.

[0154] Referring to Figure 17 After the heat dissipation layer RHL is formed on the display panel DP, the display panel DP can be inverted again so that the second substrate SUB2 is disposed on the first substrate SUB1. Accordingly, a display device DD having an enhanced heat dissipation function can be manufactured.

[0155] Figure 18 A configuration of a display panel DP_1 according to another embodiment is illustrated.

[0156] Figure 18 is a schematic cross-sectional view illustrating a cross-section compared with Figure 5 , and hereinafter, the configuration of the display panel DP_1 illustrated in Figure 5 will be described based on components different from those of the display panel DP illustrated in Figure 18 .

[0157] Referring to Figure 18 The description from the heat dissipation layer RHL to the thin film encapsulation layer TFE is the same as or similar to the corresponding portion of the display panel DP illustrated in Figure 5 , and thus the description thereof will be omitted. An insulating layer O-IL can be disposed on the thin film encapsulation layer TFE. A first insulating layer IL1' can be disposed on the insulating layer O-IL.

[0158] The first quantum dot layer QDL1, the second quantum dot layer QDL2, the light-transmitting layer LTL, and the dam layer BNK can be disposed on the first insulating layer IL1'. An opening portion QOP overlapping the first light-emitting region PA1, the second light-emitting region PA2, and the third light-emitting region PA3 can be defined in the dam layer BNK, and the first quantum dot layer QDL1, the second quantum dot layer QDL2, and the light-transmitting layer LTL can be disposed in the opening portion QOP respectively.

[0159] The second insulating layer IL2' can be disposed on the first quantum dot layer QDL1, the second quantum dot layer QDL2, the light transmission layer LTL, and the dam layer BNK. The first color filter CF1, the second color filter CF2, the third color filter CF3, and the black matrix BM can be disposed on the second insulating layer IL2'.

[0160] In the plan view, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be configured to overlap with the first quantum dot layer QDL, the second quantum dot layer QDL2, and the light transmission layer LTL, respectively. In the plan view, the black matrix BM can overlap with the embankment layer BNK.

[0161] The third insulating layer IL3 may be disposed on the first color filter CF1, the second color filter CF2, the third color filter CF3, and the black matrix BM. The insulating layer O-IL, as well as the first insulating layer IL1', the second insulating layer IL2', and the third insulating layer IL3, may be organic or inorganic layers.

[0162] and Figure 5 The display panel DP shown is different. Figure 18 The display panel DP_1 shown may not include the second substrate SUB2.

[0163] According to one embodiment, a first heat dissipation layer is disposed in a first opening portion defined in a first substrate, and a second heat dissipation layer is disposed below an insulating layer, the insulating layer defining a second opening portion disposed below the first substrate and overlapping the first opening portion. The second heat dissipation layer contacts the first heat dissipation layer in the first opening portion, and thus the heat generated in the display panel can be dissipated to the outside more efficiently through the first and second heat dissipation layers.

[0164] Although embodiments of the invention have been described, it is to be understood that the invention is not to be limited to these embodiments, but rather that various changes and modifications can be made by those skilled in the art within the spirit and scope of the invention as claimed in the appended claims. Furthermore, the embodiments disclosed in this disclosure are not intended to limit the technical spirit of the invention, and the scope of the invention should be interpreted based on the appended claims, and it should be understood that all technical aspects included within their equivalents are included within the scope of the invention.

Claims

1. A display device, comprising: The first substrate includes at least one first opening portion; Pixels are disposed on the first substrate; At least one first heat dissipation layer is disposed in the at least one first opening portion; An insulating layer is disposed beneath the first substrate and includes at least one second opening portion overlapping the at least one first opening portion; as well as A second heat dissipation layer is disposed in the at least one second opening portion. In the at least one second opening portion, the second heat dissipation layer is recessed toward the first heat dissipation layer to define a groove corresponding to the at least one second opening portion.

2. The display device according to claim 1, wherein, The second heat dissipation layer is disposed below the first substrate and overlaps with the insulating layer.

3. The display device according to claim 2, wherein, The second heat dissipation layer contacts the at least one first heat dissipation layer in the at least one second opening portion.

4. The display device according to claim 2, wherein, The second heat dissipation layer is configured to have a stepped structure from the bottom surface of the insulating layer to the bottom surface of the at least one first heat dissipation layer.

5. The display device according to claim 1, wherein, Each of the at least one first heat dissipation layer has a thickness greater than that of the second heat dissipation layer.

6. The display device according to claim 1, further comprising: An etch stop layer is disposed between the first substrate and the pixel.

7. The display device according to claim 6, wherein, The at least one first heat dissipation layer, the second heat dissipation layer, and the etch stop layer comprise metallic materials.

8. The display device according to claim 1, wherein, In a plan view, the at least one first opening, the at least one second opening, and the at least one first heat dissipation layer have a circular shape, a polygonal shape, or an elliptical shape.

9. The display device according to claim 1, wherein, The pixels include: The luminescent area; and In a plan view, the at least one first heat dissipation layer overlaps with the light-emitting area in the non-light-emitting area adjacent to the light-emitting area.

10. The display device according to claim 9, further comprising: The second substrate is disposed on the first substrate; A color filter is disposed below the second substrate and overlaps with the light-emitting area in a plan view; as well as A quantum dot layer is disposed below the color filter and overlaps with the light-emitting region in a plan view, wherein the quantum dot layer is disposed on the pixel.

11. The display device according to claim 1, wherein, The at least one first opening portion includes a plurality of first opening portions. The at least one second opening portion includes a plurality of second opening portions, and The at least one first heat dissipation layer includes a plurality of first heat dissipation layers.

12. A method for manufacturing a display device, comprising: An insulating layer is formed under a first substrate, the first substrate including a first removal portion and a first peripheral portion adjacent to the first removal portion; Pixels are formed on the first substrate; Remove the second portion of the insulating layer that overlaps with the first removed portion in the plan view; Remove the first removed portion; A first heat dissipation layer is formed in a first opening portion of the first substrate, wherein the first opening portion is formed by removing the first removal portion; as well as A second heat dissipation layer is formed in the second opening portion of the insulating layer, recessed toward the first heat dissipation layer to define a groove corresponding to the second opening portion, the second opening portion being formed by removing the second removal portion.

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