Display device

Abstract

A display device includes a pixel portion including a plurality of pixels; a first scan driver that supplies a first scan signal to each of the pixels; and an initialization controller that controls the first scan driver. Each of the pixels includes a pixel circuit including a plurality of transistors and a light-emitting element connected to the pixel circuit, wherein an anode of the light-emitting element is initialized to a first initialization voltage in response to the first scan signal having a gate-on level. The initialization controller determines whether to supply the first scan signal having a gate-on level to each of the pixels for each frame.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2020-0076705, filed on June 23, 2020, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Aspects of one or more example embodiments of the present disclosure relate to a display device and a driving method thereof. Background Art

[0004] As information technology develops, the importance of display devices as a connection medium between users and information has become prominent. Therefore, the use of display devices such as liquid crystal display devices and organic light emitting display devices has increased.

[0005] Among display devices, organic light emitting display devices display images by using organic light emitting diodes (OLEDs) that generate light through the recombination of electrons and holes. Organic light emitting display devices have a fast response speed and can be driven with low power consumption.

[0006] In recent years, a method of driving an organic light emitting display device at various frequencies has been used to minimize or reduce power consumption.

[0007] The above information disclosed in this Background section is for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not constitute prior art. Summary of the Invention

[0008] One or more example embodiments of the present disclosure are directed to a display apparatus and a driving method thereof, which may minimize or reduce flicker observable (eg, visible) to a user while the display apparatus is driven at multiple frequencies.

[0009] However, the aspects and features of the present disclosure are not limited to those described above, and other aspects and features may be clearly understood by those skilled in the art from the following description or may be learned by practicing one or more exemplary embodiments of the present disclosure.

[0010] According to one or more exemplary embodiments of the present disclosure, a display device includes: a pixel portion including a plurality of pixels; a first scan driver configured to supply a first scan signal to each of the plurality of pixels; and an initialization controller configured to control the first scan driver. Each of the plurality of pixels includes a pixel circuit including a plurality of transistors and a light-emitting element connected to the pixel circuit, an anode of the light-emitting element configured to be initialized to a first initialization voltage in response to a first scan signal having a gate-on level, and the initialization controller is configured to determine whether to supply the first scan signal having the gate-on level to each of the plurality of pixels for each frame.

[0011] In an example embodiment, the initialization controller may include a frequency determiner configured to determine a frequency of each frame; and a control signal output portion configured to provide a black voltage control signal to the first scan driver according to the frequency determined by the frequency determiner.

[0012] In example embodiments, the initialization controller may be configured to control the first scan driver not to provide the first scan signal having the gate-on level when there is a frequency change in the current frame compared to the previous frame.

[0013] In example embodiments, the initialization controller may be configured to control the first scan driver to provide the first scan signal having a gate-on level when there is no frequency change in the current frame compared to the previous frame.

[0014] In example embodiments, the display device may further include a timing controller configured to provide the scan driving control signal to the first scan driver.

[0015] In example embodiments, the initialization controller may be implemented as a register in the timing controller.

[0016] In example embodiments, the display device may further include a power supply configured to provide a first initialization voltage.

[0017] In example embodiments, the power supply may be configured to provide a second initialization voltage for initializing a gate electrode of a driving transistor among the plurality of transistors.

[0018] In example embodiments, the display device may further include a second scan driver configured to provide a second scan signal, and the second initialization voltage may be provided to the gate electrode of the driving transistor in response to the second scan signal having a gate-on level.

[0019] In example embodiments, the plurality of transistors may include a P-type transistor and an N-type transistor.

[0020] According to one or more exemplary embodiments of the present disclosure, a driving method for driving a display device at multiple frequencies includes: determining a frequency change in a current frame based on a previous frame; and driving the display device in a normal mode or an initialization mode based on the determination of the frequency change. The initialization mode is a mode that includes a period in the current frame in which an anode of a light-emitting element is initialized to an initialization voltage, and the normal mode is a mode that does not include a period in the current frame in which the anode of the light-emitting element is initialized.

[0021] In an example embodiment, determining the frequency change may include determining whether there is a frequency change in the current frame based on the frequency of the previous frame, or determining whether a frequency change rate between the current frame and the previous frame is greater than or equal to a reference value.

[0022] In an example embodiment, when there is no frequency change of the current frame based on the previous frame, or when the frequency change rate is less than a reference value, the display device can be driven in an initialization mode, and when there is a frequency change of the current frame based on the previous frame, or when the frequency change rate is greater than or equal to the reference value, the display device can be driven in a normal mode.

[0023] In example embodiments, when there is a frequency increase of the current frame based on the previous frame, or when a rate of change of the frequency increase of the current frame is greater than or equal to a reference value, the display device may be driven in the normal mode.

[0024] In an example embodiment, a display device may include: a pixel including a light emitting element; a scan driver configured to provide a scan signal to the pixel; and a power supply configured to provide an initialization voltage to the pixel. The initialization voltage may be provided to an anode of the light emitting element in response to the scan signal having a gate-on level.

[0025] In example embodiments, the scan signal may not include a gate-on level in the normal mode, and the scan signal may include a gate-on level in the initialization mode.

[0026] In example embodiments, the driving method may further include determining whether brightness in a current frame is less than or equal to a reference value.

[0027] In example embodiments, when the brightness is less than or equal to a reference value, the determination of the frequency change may be performed, and when the brightness is greater than the reference value, the display device may be driven in the initialization mode in the current frame.

[0028] In example embodiments, the driving method may further include determining whether a grayscale value in a current frame is less than or equal to a reference value.

[0029] In example embodiments, when the grayscale value is less than or equal to a reference value, determination of the frequency change may be performed, and when the grayscale value is greater than the reference value, the display device may be driven in an initialization mode in a current frame.

[0030] According to one or more example embodiments of the present disclosure, flicker observable (eg, visible) to a user may be minimized or reduced while a display device is driven at multiple frequencies. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and other aspects and features of the present disclosure will become more apparent to those skilled in the art from the following detailed description of example embodiments with reference to the accompanying drawings.

[0032] Figure 1 FIG. 1 shows a schematic block diagram of a display device according to an embodiment of the present disclosure.

[0033] Figure 2 The figure shows Figure 1 2 is a circuit diagram of an example of a pixel illustrated in .

[0034] Figure 3 The diagram shows the drive Figure 1 An example of a timing diagram of a display device.

[0035] Figure 4 The diagram shows the drive Figure 1 An example of a timing diagram of a display device.

[0036] Figure 5 The figure shows Figure 1 Schematic block diagram of a timing controller.

[0037] Figure 6 FIG. 1 shows a schematic flowchart of a method for driving a display device according to an embodiment of the present disclosure.

[0038] Figure 7 The figure shows the Figure 6 Some timing diagrams and brightness versus time diagrams in the process of the driving method.

[0039] Figure 8 The figure shows the Figure 7 Timing diagrams of comparative examples and a graph of brightness versus time.

[0040] Figure 9 FIG. 1 shows a schematic block diagram of a display device according to another embodiment of the present disclosure.

[0041] Figure 10 FIG. 1 shows a circuit diagram of a pixel of a display device according to another embodiment of the present disclosure.

[0042] Figure 11 FIG. 1 shows a schematic flowchart of a method for driving a display device according to another embodiment of the present disclosure.

[0043] Figure 12 The figure shows the Figure 11 Some timing diagrams and brightness versus time diagrams in the process of the driving method.

[0044] Figure 13 FIG. 1 shows a schematic flowchart of a method for driving a display device according to another embodiment of the present disclosure.

[0045] Figure 14 FIG. 1 shows a schematic flowchart of a method for driving a display device according to another embodiment of the present disclosure.

[0046] Figure 15 FIG. 1 shows a schematic flowchart of a method for driving a display device according to another embodiment of the present disclosure. DETAILED DESCRIPTION

[0047] Hereinafter, example embodiments will be described in more detail with reference to the accompanying drawings, in which the same reference numerals always represent the same elements. However, the present disclosure can be embodied in a variety of different forms and should not be construed as being limited to the embodiments illustrated herein. On the contrary, these embodiments are provided as examples so that the present disclosure will be thorough and complete and will fully convey the aspects and features of the present disclosure to those skilled in the art. Therefore, processes, elements and techniques that are unnecessary for a person of ordinary skill in the art to fully understand the aspects and features of the present disclosure may not be described. Unless otherwise stated, the same reference numerals represent the same elements throughout the drawings and written description, and therefore, their descriptions may not be repeated.

[0048] For ease of illustration, spatially relative terms such as “below,” “beneath,” “down,” “under,” “above,” “upper,” etc. may be used herein to describe the relationship of one element or feature relative to another element or feature as shown in the accompanying drawings. It should be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, elements described as being “below,” “beneath,” or “under” other elements or features would then be oriented “above” the other elements or features. Thus, the example terms “below” and “under” may encompass both above and below. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0049] It will be understood that although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or portion from another element, component, region, layer, or portion. Thus, a first element, component, region, layer, or portion described below could be referred to as a second element, component, region, layer, or portion without departing from the spirit and scope of the present disclosure.

[0050] It will be understood that when an element or layer is referred to as being “on,” “connected to” or “coupled to” another element or layer, it can be directly on, connected to or coupled to the other element or layer, or one or more intervening elements or layers may be present. Additionally, it will be understood that when an element or layer is referred to as being “between” two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present.

[0051] The terms used herein are for the purpose of describing specific embodiments and are not intended to limit the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular form "one" is also intended to include the plural form. It will be further understood that the terms "comprising", "including" and "having" when used in this specification specify the presence of stated features, wholes, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, parts and / or combinations thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the items listed in association. Statements such as "at least one of" modify the entire column of elements when located after a column of elements and do not modify the individual elements in the column.

[0052] As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation rather than terms of degree, and are intended to take into account the inherent variation in measured or calculated values that one of ordinary skill in the art would recognize. Further, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure." As used herein, the term "using" and variations thereof may be considered synonymous with the term "utilizing" and variations thereof, respectively. Additionally, the term "exemplary" is intended to mean an example or illustration.

[0053] As used herein, unless expressly stated otherwise, terms such as "more than or equal to" and "greater than or equal to" are interchangeable with terms such as "more than" or "greater than," and terms such as "less than or equal to" or "less than or equal to" are interchangeable with terms such as "less than" or "less than," as would be understood by one of ordinary skill in the art.

[0054] The electronic or electrical devices and / or any other related devices or components (e.g., timing controllers, initialization controllers, and / or frequency determiners) according to the embodiments of the present disclosure described herein can be implemented using any suitable hardware, firmware (e.g., application specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, the various components of these devices can be formed on an integrated circuit (IC) chip or on a separate IC chip. In addition, the various components of these devices can be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or formed on a substrate. In addition, the various components of these devices can be processes or threads running on one or more processors in one or more computing devices, executing computer program instructions and interacting with other system components to perform the various functions described herein. Computer program instructions are stored in a memory (e.g., random access memory (RAM)) that can be implemented in a computing device using a standard storage device. Computer program instructions can also be stored in other non-transitory computer-readable media such as, for example, a CD-ROM, a flash drive, etc. Furthermore, those skilled in the art will recognize that the functionality of various computing devices may be combined or integrated into a single computing device, or that the functionality of a particular computing device may be distributed across one or more other computing devices without departing from the spirit and scope of the exemplary embodiments of the present disclosure.

[0055] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless expressly defined as such herein, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense.

[0056] Figure 1 FIG. 1 shows a schematic block diagram of a display device according to an embodiment of the present disclosure.

[0057] Hereinafter, for convenience, an organic light-emitting display device will be described as an example of the display device 1. However, the present disclosure is not limited thereto, and the display device 1 can be implemented using any suitable display (for example, a liquid crystal display, a micro-light-emitting diode (LED) display device, and / or a display device including an inorganic light-emitting element such as a quantum dot LED). In addition, one or more embodiments of the present disclosure can be applied to a display device including a combination of organic and inorganic materials.

[0058] Reference Figure 1 In an embodiment, the display device 1 may include a pixel portion (e.g., a pixel region or a display region) 10, a scan driver 20, a data driver 30, an emission driver 40, a timing controller 50, and a power supply 70. The display device 1 may be connected to a host 60 to receive various signals and / or data from the host 60.

[0059] For example, the host 60 may supply the image data RGB to the timing controller 50 through a suitable interface (e.g., a predetermined interface). In addition, the host 60 may supply the timing signals Vsync, Hsync, DE, and CLK to the timing controller 50. The host 60 may be implemented in the form of a central processing unit (CPU), a graphics processing unit (GPU), and / or an application processor (AP), etc., but the present disclosure is not limited thereto.

[0060] The timing controller 50 may generate scan driving control signals SCS1 , SCS2 and SCS3 , a data driving control signal DCS, an emission driving control signal ECS and a black voltage control signal BCS according to (eg, based on) signals input (eg, received) from the host 60 .

[0061] The scan drive control signals SCS1, SCS2, and SCS3 generated by the timing controller 50 are supplied to the scan driver 20, the data drive control signal DCS is supplied to the data driver 30, and the light emission drive control signal ECS is supplied to the emission driver 40. In addition, the timing controller 50 rearranges image data RGB supplied from the outside (e.g., from the host 60) and supplies the rearranged image data to the data driver 30. Further, the timing controller 50 supplies a black voltage control signal BCS to at least one of the scan drivers 20 (e.g., the first scan driver 20a).

[0062] The scan drive control signals SCS1, SCS2, and SCS3 may include at least one clock signal and a start pulse. The start pulse may control the output timing of each scan signal output from each of the scan drivers 20. The clock signal may be used to shift the start pulse.

[0063] The light emitting drive control signal ECS may also include at least one clock signal and a start pulse. The start pulse included in the light emitting drive control signal ECS may control the output timing of the light emitting control signal output from the emission driver 40. The clock signal included in the light emitting drive control signal ECS may be used to shift the start pulse.

[0064] The data driving control signal DCS may include a source start pulse and one or more clock signals. The source start pulse controls the start time of data sampling, and the clock signal is used to control the sampling operation.

[0065] exist Figure 1 In the embodiment of the present invention, the scan driver 20 may include a first scan driver 20a, a second scan driver 20b, and a third scan driver 20c. However, the present disclosure is not limited thereto, and in another embodiment, each of the first scan driver 20a, the second scan driver 20b, and the third scan driver 20c may be provided in the form of a sub-scan driver included in one scan driver.

[0066] The first scan driver 20a can supply a first scan signal to the first scan lines S11 to S1n in response to a first scan drive control signal SCS1. Here, n is a natural number greater than 1. For example, the first scan driver 20a can supply a first scan signal to the first scan lines S11 to S1n in sequence. When the first scan signal is supplied to the first scan lines S11 to S1n in sequence, the pixel PXL can be selected in units of horizontal lines (e.g., in units of rows). In this case, the first scan signal can be set to a gate-on voltage (e.g., a low potential (e.g., a low level) voltage) so that the transistor (e.g., a P-type transistor) included in the pixel PXL can be turned on.

[0067] In response to the black voltage control signal BCS, the first scan driver 20a may provide or not provide a gate-on voltage (e.g., a first scan signal) to the transistors included in the pixels PXL for each frame. In some embodiments, the first scan driver 20a may include a separate sub-scan driver for providing a gate-on voltage to some of the pixels PXL and not providing a gate-on voltage to other pixels PXL in the same frame. In another embodiment, the display device 1 may further include a fourth scan driver for providing a gate-on voltage to some of the pixels PXL and not providing a gate-on voltage to other pixels PXL in the same frame.

[0068] The second scan driver 20b may supply a second scan signal to the second scan lines S21 to S2n in response to the second scan drive control signal SCS2. For example, the second scan driver 20b may supply the second scan signal to the second scan lines S21 to S2n in sequence. The second scan signal may be set to a gate-on voltage (e.g., a high potential (e.g., a high level) voltage) so that a transistor (e.g., an N-type transistor) included in the pixel PXL may be turned on.

[0069] The third scan driver 20c may supply the third scan signal to the third scan lines S31 to S3n in response to the third scan driving control signal SCS3. For example, the third scan driver 20c may supply the third scan signal to the third scan lines S31 to S3n in sequence.

[0070] The third scan signal may be set to a gate-on voltage (eg, a high potential (eg, a high level) voltage) so that a transistor (eg, an N-type transistor) included in the pixel PXL may be turned on.

[0071] Each of the scan drivers 20a, 20b, and 20c may include a plurality of scan stage circuits connected in the form of a shift register. For example, a scan signal may be generated by sequentially transmitting a conduction level pulse (e.g., a start pulse) supplied to a scan start line to the next scan stage circuit.

[0072] The data driver 30 may supply data signals to the data lines D1 to Dm in response to the data drive control signal DCS. Here, m is a natural number greater than 1. The data signals supplied to the data lines D1 to Dm may be supplied to the pixels PXL selected by the first scan signal. In this case, the data driver 30 may supply the data signals to the data lines D1 to Dm in synchronization or substantially in synchronization with the first scan signal.

[0073] The emission driver 40 may supply a light-emission control signal to the light-emission control lines E1 to En in response to the light-emission drive control signal ECS. For example, the emission driver 40 may supply the light-emission control signal to the light-emission control lines E1 to En sequentially. When the light-emission control signal is supplied sequentially to the light-emission control lines E1 to En, the pixel PXL may not emit light in units of horizontal lines (e.g., in units of rows). In this case, the light-emission control signal is set to a gate-off voltage (e.g., a high potential (e.g., a high level) voltage) so that the transistor (e.g., a P-type transistor) included in the pixel PXL can be turned off.

[0074] The power supply 70 can receive an external input voltage and can provide the power supply voltage to the output terminal by converting the external input voltage. For example, the power supply 70 generates a high power supply voltage ELVDD and a low power supply voltage ELVSS according to (for example, based on) the external input voltage. As used in this specification, the high power supply voltage ELVDD and the low power supply voltage ELVSS can be power supplies with voltage levels relative to each other. For example, the high power supply voltage ELVDD can have a voltage level greater than the voltage level of the low power supply voltage ELVSS. The power supply 70 can provide a driving transistor T1 (for example, see Figure 2 ) and a first initialization voltage VINT1 for initializing the light emitting element LD (for example, see Figure 2 ). For example, the first initialization voltage VINT1 and the second initialization voltage VINT2 may each have a different voltage level selected from -10V to 10V, but the present disclosure is not limited thereto, and the first initialization voltage VINT1 and the second initialization voltage VINT2 are not limited to the above voltage range.

[0075] The power supply 70 can receive an external input voltage from a battery, etc., and can boost the external input voltage to generate a power supply voltage that is higher (e.g., greater) than the external input voltage. For example, the power supply 70 can be configured as a power management integrated circuit (PMIC). In another example, the power supply 70 can be configured as an external DC-DC converter integrated circuit (DC / DC IC).

[0076] The pixel section 10 includes a plurality of pixels PXL connected to data lines D1 to Dm, scan lines S11 to S1n, S21 to S2n, and S31 to S3n, and light emission control lines E1 to En.

[0077] The pixel PXL may receive initialization voltages VINT1 and VINT2 , a high power voltage ELVDD, and a low power voltage ELVSS from the outside.

[0078] Each of the pixels PXL can be selected to receive a data signal from the data lines D1 to Dm when a scan signal is supplied to the scan lines S11 to S1n, S21 to S2n, and S31 to S3n connected thereto. The pixel PXL receiving the data signal can control the amount of current flowing from the high power supply voltage ELVDD to the low power supply voltage ELVSS through the light emitting element LD in response to the data signal.

[0079] exist Figure 1In the embodiment of the present invention, each of the pixels PXL may be a red pixel for emitting red light, a green pixel for emitting green light, or a blue pixel for emitting blue light. However, the present disclosure is not limited thereto, and each of the pixels PXL may be a pixel for emitting light of various suitable or desired colors (e.g., white light, yellow light, magenta light, and / or cyan light).

[0080] Figure 2 The figure shows Figure 1 2 is a circuit diagram of an example of a pixel illustrated in .

[0081] Reference Figure 2 , the pixel PXL may include a light emitting element LD and a pixel circuit PXC connected to the light emitting element LD to drive the light emitting element LD. The pixel circuit PXC may include a plurality of transistors T1 to T7 and a storage capacitor Cst. However, the present disclosure is not limited thereto, and the elements included in the pixel circuit PXC of the pixel PXL are not limited to the above.

[0082] A first electrode of a first transistor T1 (e.g., a driving transistor) may be connected to a power line to which a high power supply voltage ELVDD is applied via a fifth transistor T5, and a second electrode of the first transistor T1 may be connected to an anode of the light-emitting element LD via a sixth transistor T6. The first electrode corresponds to one of a source electrode and a drain electrode, and the second electrode corresponds to the other of the source electrode and the drain electrode. A gate electrode of the first transistor T1 may be connected to a first node N1. The first transistor T1 may control the amount of current flowing from the high power supply voltage ELVDD to the low power supply voltage ELVSS via the light-emitting element LD in response to the voltage of the first node N1.

[0083] A second transistor T2 (e.g., a switching transistor) may be connected between the j-th data line Dj and the first electrode of the first transistor T1. A gate electrode of the second transistor T2 may be connected to the first scan line S1i. When a first scan signal GW[i] is supplied to the first scan line S1i, the second transistor T2 may be turned on to electrically connect the j-th data line Dj to the first electrode of the first transistor T1. Here, i is a natural number greater than or equal to 1 and less than or equal to n, and j is a natural number greater than or equal to 1 and less than or equal to m.

[0084] The third transistor T3 (e.g., a diode-connected transistor) can be connected between the second electrode of the first transistor T1 and the first node N1. In addition, the gate electrode of the third transistor T3 can be connected to the second scan line S2i. When the second scan signal GC[i] of the gate-on voltage (e.g., a high-level voltage) is supplied to the second scan line S2i, the third transistor T3 is turned on to electrically connect the second electrode of the first transistor T1 to the first node N1. Therefore, when the third transistor T3 is turned on, the first transistor T1 can be diode-connected.

[0085] The fourth transistor T4 (e.g., a gate initialization transistor) may be connected between the first node N1 and a first initialization power line to which a first initialization voltage VINT1 is applied. Furthermore, a gate electrode of the fourth transistor T4 may be connected to a third scan line S3i. When a third scan signal GI[i] having a gate-on voltage (e.g., a high-level voltage) is supplied to the third scan line S3i, the fourth transistor T4 may be turned on to supply the first initialization voltage VINT1 to the first node N1.

[0086] The fifth transistor T5 (e.g., the first light-emitting transistor) can be connected between a power line to which a high power supply voltage ELVDD is applied and the first electrode of the first transistor T1. The gate electrode of the fifth transistor T5 can be connected to the i-th light-emitting control line Ei. When a light-emitting control signal EM[i] having a gate-off voltage (e.g., a high-level voltage) is supplied to the i-th light-emitting control line Ei, the fifth transistor T5 can be turned off. Otherwise (e.g., when a gate-on voltage is supplied), the fifth transistor T5 can be turned on.

[0087] The sixth transistor T6 (e.g., a second light-emitting transistor) can be connected between the second electrode of the first transistor T1 and the anode of the light-emitting element LD. The gate electrode of the sixth transistor T6 can be connected to the i-th light-emitting control line Ei. When a light-emitting control signal EM[i] with a gate-off voltage (e.g., a high-level voltage) is supplied to the i-th light-emitting control line Ei, the sixth transistor T6 can be turned off. Otherwise (e.g., when a gate-on voltage is supplied), the sixth transistor T6 can be turned on.

[0088] The seventh transistor T7 (e.g., an anode initialization transistor) can be connected between a second initialization power line to which a second initialization voltage VINT2 is applied and a first electrode of the light-emitting element LD (e.g., an anode of the light-emitting element LD). In addition, the gate electrode of the seventh transistor T7 can be connected to a first scan line (e.g., a first scan line of the next row) S1(i+1) connected to the (i+1)th pixel (e.g., a pixel of the next row). When a first scan signal (e.g., GW[i+1]; GB[i]) of a gate-on voltage (e.g., a low-level voltage) is supplied to the first scan line S1(i+1) of the next row, the seventh transistor T7 can be turned on to supply the second initialization voltage VINT2 to the anode of the light-emitting element LD. In some embodiments, the second initialization voltage VINT2 can be set to a voltage lower than the voltage of the data signal DATA. For example, the second initialization voltage VINT2 can be set to the lowest voltage of the data signal DATA or a lower voltage.

[0089] In some embodiments, the first scan signal GW[i] provided to the second transistor T2 may be provided separately from the first scan signal GB[i] provided to the seventh transistor T7. In this case, the first scan signal GW[i] provided to the second transistor T2 and the first scan signal GB[i] provided to the seventh transistor T7 may be provided from separate sub-scan drivers in the first scan driver 20a. In another embodiment, the first scan signal GB[i] provided to the seventh transistor T7 may be provided from the first scan driver 20a, and the first scan signal GW[i] provided to the second transistor T2 may be provided from the fourth scan driver described above.

[0090] The storage capacitor Cst may be connected between a power line to which the high power voltage ELVDD is applied and the first node N1. The storage capacitor Cst may store the data signal DATA and a voltage corresponding to a threshold voltage of the first transistor T1.

[0091] exist Figure 2 In an embodiment, some of the plurality of transistors T1 to T7 (eg, T1, T2, T5, T6, and T7) are P-type (PMOS) transistors, and the other remaining transistors (eg, T3 and T4) are N-type (NMOS) transistors.

[0092] In another embodiment, each of transistors T1 to T7 may be a P-type (PMOS) transistor. The channels of transistors T1 to T7 may be made of polysilicon. The polysilicon transistors may be low-temperature polysilicon (LTPS) transistors. Polysilicon transistors have high electron mobility and therefore have fast driving characteristics.

[0093] In another embodiment, transistors T1 to T7 may be N-type (NMOS) transistors. In this case, the channels of transistors T1 to T7 may be made of oxide semiconductors. Oxide semiconductor transistors can be processed at low temperatures and have low charge mobility compared to polysilicon. Therefore, the amount of leakage current that occurs in the off state of the oxide semiconductor transistor is less than the amount of leakage current of the polysilicon transistor.

[0094] exist Figure 2 In an exemplary embodiment of the present invention, the light emitting element LD may be an organic light emitting diode. The light emitting element LD may emit light of one color among red, green, and blue. However, the present disclosure is not limited thereto.

[0095] exist Figure 2 In an embodiment, at least one light-emitting element LD may be provided for the pixel PXL. For example, the light-emitting element LD may be an organic light-emitting element or an inorganic light-emitting element such as a micro-LED and / or a quantum dot LED. In another example, the light-emitting element LD may be a light-emitting element made of a combination of organic and inorganic materials.

[0096] Figure 3 The diagram shows the drive Figure 1 An example of a timing diagram of a display device. Figure 4 The diagram shows the drive Figure 1 An example of a timing diagram of a display device.

[0097] refer to Figures 1 to 3 First, during a data writing period WP in one frame (1Frame), a light emission control signal EM[i] of a gate-off voltage (e.g., a high-level voltage) may be supplied to the i-th light emission control line Ei. Therefore, during the data writing period WP, the fifth transistor T5 and the sixth transistor T6 may be turned off.

[0098] The first pulse of the third scan signal GI[i] of the gate-on voltage (e.g., a high-level voltage) is supplied to the third scan line S3i. Therefore, the fourth transistor T4 is turned on, and the gate electrode (e.g., the first node N1) of the first transistor T1 is connected to the first initialization power line. Therefore, the voltage of the gate electrode of the first transistor T1 is initialized to the first initialization voltage VINT1 of the first initialization power line and is maintained or substantially maintained by the storage capacitor Cst. For example, the first initialization voltage VINT1 of the first initialization power line may be a voltage lower than (e.g., sufficiently lower than) the high power supply voltage ELVDD. For example, the first initialization voltage VINT1 may be a voltage having a level equal to or substantially equal to (e.g., approximately) the low power supply voltage ELVSS. Therefore, the first transistor T1 may be turned on.

[0099] Next, the first pulses of gate-on scan signals GW[i] and GC[i] are supplied to scan lines S1i and S2i, respectively, turning on the corresponding second and third transistors T2 and T3. Consequently, a voltage corresponding to the data signal DATA applied to data line Dj is written to storage capacitor Cst via the second transistor T2, the first transistor T1, and the third transistor T3. However, in this case, the data signal DATA may correspond to the grayscale value G[i-4] of pixel PXL four horizontal periods prior, which is not intended to cause pixel PXL to emit light but rather to apply a conduction bias to first transistor T1. When the conduction bias is applied to first transistor T1 before the target data signal DATA is written to first transistor T1, hysteresis can be improved.

[0100] Next, a first pulse of a first scan signal GB[i] (e.g., of the next row) having a gate-on voltage (e.g., a low-level voltage) is supplied to the first scan line S1(i+1) (e.g., of the next row), turning on the seventh transistor T7. Thus, the anode voltage of the light-emitting element LD is initialized.

[0101] In this case, the second pulse of the third scan signal GI[i] of the gate-on voltage (e.g., high-level voltage) is supplied to the third scan line S3i, and the driving process described above is repeated. In other words, the on-bias voltage is applied to the first transistor T1 again, and the anode voltage of the light-emitting element LD is initialized again.

[0102] By repeating the above-described process, when the third pulse of the gate-on scan signals GW[i] and GC[i] is supplied to the scan lines S1i and S2i, respectively, a voltage corresponding to the data signal DATA corresponding to the grayscale value G[i] of the pixel PXL is written to the storage capacitor Cst. In this case, the voltage corresponding to the data signal DATA written to the storage capacitor Cst is a voltage reflecting the decrease in the threshold voltage of the first transistor T1.

[0103] Finally, when the light-emission control signal EM[i] becomes a gate-on voltage (e.g., a low-level voltage), the fifth transistor T5 and the sixth transistor T6 are turned on. Thus, a drive current path is formed, connecting the high power supply voltage ELVDD, the fifth transistor T5, the first transistor T1, the sixth transistor T6, the light-emitting element LD, and the low power supply voltage ELVSS, and a drive current flows through the drive current path. The amount of the drive current corresponds to the voltage of the data signal DATA stored in the storage capacitor Cst. In this case, because the drive current flows through the first transistor T1, the reduction in the threshold voltage of the first transistor T1 is reflected in the drive current. Therefore, because the reduction in the threshold voltage reflected in the voltage of the data signal DATA stored in the storage capacitor Cst and the reduction in the threshold voltage reflected in the drive current offset each other, the drive current corresponding to the data signal DATA can flow regardless of the threshold voltage value of the first transistor T1. Based on the amount of the drive current, the light-emitting element LD emits light at the target brightness during the light-emission period EP.

[0104] exist Figure 3 In the present embodiment, it has been described that each scan signal includes three pulses, but in some embodiments, each scan signal may include two pulses or four or more pulses. In another embodiment, each scan signal may be configured to include one pulse, in which case the process of applying the on-bias voltage to the first transistor T1 may be omitted (for example, see Figure 4 ).

[0105] In addition, the interval between adjacent pulses of the horizontal synchronization signal Hsync may correspond to one horizontal period. Figure 3 , the pulse of the horizontal synchronization signal Hsync is shown at a low level, but the present disclosure is not limited thereto, and in another embodiment, the pulse of the horizontal synchronization signal Hsync may correspond to a high level.

[0106] In some embodiments, according to (e.g., based on) the black voltage control signal BCS, the first scan signal GB[i] applied to the seventh transistor T7 may not be supplied with a gate-on voltage (e.g., a low-level voltage). Therefore, when the black voltage control signal BCS is supplied, the seventh transistor T7 may maintain or substantially maintain an off state, and the anode voltage initialization operation of the light-emitting element LD may not be performed. The black voltage control signal BCS may correspond to a signal for determining whether to supply the first scan signal GB[i] applied to the seventh transistor according to the frequency of each frame. This will be referred to below. Figures 6 to 8 Describe in more detail.

[0107] For ease of description, refer to Figures 6 to 15 Descriptive assumptions Figure 4The scanning signals used to drive the display device are as follows: Figure 4 An example timing diagram including one pulse is shown in FIG, but the present disclosure is not limited thereto.

[0108] Figure 5 The figure shows Figure 1 Schematic block diagram of a timing controller.

[0109] Reference Figure 5 As an example, the timing controller 50 may include an initialization controller 100 .

[0110] The initialization controller 100 may include a frequency determiner 110 for determining the frequency of each frame and a control signal output unit 120 for outputting a black voltage control signal BCS, which may be a signal for controlling whether to provide a first scan signal of a gate-on level supplied by the first scan driver 20a to each pixel (e.g., applied to the seventh transistor T7).

[0111] exist Figure 5 In an embodiment, the frequency determiner 110 may determine the frequency of the current frame and the frequency of the immediately preceding frame. For example, the frequency determiner 110 may determine the frequency of each frame by using a method of counting a clock signal. In addition, the frequency determiner 110 may determine the frequency of each frame and calculate the time period of each frame based on the determined frequency of each frame. For example, the frequency may be inversely proportional to the time period.

[0112] exist Figure 5 In the embodiment of the present invention, the control signal output unit 120 can provide the black voltage control signal BCS to the first scan driver 20a. For example, the black voltage control signal BCS can be a signal used by the first scan driver 20a to determine whether to provide the first scan signal of the gate-on level (e.g., applied to the seventh transistor T7) to each pixel, or can be a signal used to block the scan drive control signal (e.g., SCS1) from being provided from the timing controller 50 to the first scan driver 20a. In other words, the black voltage control signal BCS can be provided in various suitable forms as needed or desired.

[0113] exist Figure 5In an embodiment, when the frequency determiner 110 compares the frequency (e.g., time period) of the current frame with the frequency (e.g., time period) of the previous frame and determines that the rate of change between the frequency of the current frame and the frequency of the previous frame is greater than or equal to a suitable reference value (e.g., a predetermined reference value), the initialization controller 100 can output the black voltage control signal BCS through the control signal output unit 120 in the current frame to control the first scan driver 20a not to provide the first scan signal of the gate-on level (e.g., applied to the seventh transistor T7) to each pixel (or in other words, to provide the first scan signal of the gate-off level (e.g., applied to the seventh transistor T7)). In addition, when the frequency determiner 110 compares the frequency (e.g., time period) of the current frame with the frequency (e.g., time period) of the previous frame and determines that the change rate between the frequency of the current frame and the frequency of the previous frame does not exceed (e.g., is less than or equal to) an appropriate reference value (e.g., a predetermined reference value), the initialization controller 100 can output the black voltage control signal BCS through the control signal output unit 120 in the current frame to control the first scan driver 20a to provide the first scan signal of the gate-on level (e.g., applied to the seventh transistor T7) to each pixel. Here, the change rate can be determined based on the absolute value (e.g., the difference between the frequency (e.g., time period) of the current frame and the frequency (e.g., time period) of the previous frame).

[0114] In another embodiment, when the frequency determiner 110 compares the frequency (e.g., time period) of the current frame with the frequency (e.g., time period) of the previous frame and determines that there is a change between the frequencies of the current frame and the previous frame, the initialization controller 100 may output the black voltage control signal BCS through the control signal output unit 120 in the current frame to control the first scan driver 20a to not provide the first scan signal of the gate-on level (e.g., applied to the seventh transistor T7) to each pixel (or in other words, to provide the first scan signal of the gate-off level (e.g., applied to the seventh transistor T7)). Alternatively, when the frequency determiner 110 compares the frequency (e.g., time period) of the current frame with the frequency (e.g., time period) of the previous frame and determines that there is no change between the frequencies of the current frame and the previous frame, the initialization controller 100 may output the black voltage control signal BCS through the control signal output unit 120 in the current frame to control the first scan driver 20a to provide the first scan signal of the gate-on level (e.g., applied to the seventh transistor T7) to each pixel.

[0115] The display device 1 can determine the driving mode in the current frame by comparing the frequency (e.g., time period) of the current frame with the frequency (e.g., time period) of the previous frame. The display device 1 can select one of a plurality of driving modes in one frame and can be driven in the selected driving mode. For example, the driving mode may include a normal mode and an initialization mode, in which the first scanning signal provided to each pixel by the first scanning driver 20a in the current frame (e.g., applied to the seventh transistor T7) does not include a gate-on level, and in which the first scanning signal provided to each pixel by the first scanning driver 20a in the current frame (e.g., applied to the seventh transistor T7) includes a gate-on level.

[0116] When the display device 1 is driven in the normal mode in the current frame, the second initialization voltage VINT2 may not be supplied to the anode of the light-emitting element in each pixel (for example, the anode is not separately initialized in the current frame). When the display device 1 is driven in the initialization mode in the current frame, the second initialization voltage VINT2 is supplied to the anode of the light-emitting element in each pixel so that the anode can be initialized to a voltage level corresponding to the second initialization voltage VINT2.

[0117] exist Figure 5 In an embodiment of the present invention, the black voltage control signal BCS may be a digital signal. For example, the black voltage control signal BCS may be provided to the first scan driver 20a as a signal having a value (e.g., a voltage value) corresponding to a logic low level (e.g., "0"), so that in a normal mode, the first scan driver 20a does not provide a first scan signal of a gate-on level (e.g., applied to the seventh transistor T7) to each pixel. On the other hand, the black voltage control signal BCS may be provided to the first scan driver 20a as a signal having a value (e.g., a voltage value) corresponding to a logic high level (e.g., "1"), so that in an initialization mode, the first scan driver 20a provides a first scan signal of a gate-on level (e.g., applied to the seventh transistor T7) to each pixel. In another embodiment, the black voltage control signal BCS can be provided to the first scan driver 20a as a signal having a value (e.g., a voltage value) corresponding to a logic high level (e.g., “1”) to drive the first scan driver 20a in a normal mode in the current frame, and can be provided to the first scan driver 20a as a signal having a value (e.g., a voltage value) corresponding to a logic low level (e.g., “0”) to drive the first scan driver 20a in an initialization mode in the current frame.

[0118] In some embodiments, the timing controller 50 may include a plurality of registers. In some embodiments, the initialization controller 100 may also be provided in the timing controller 50 in the form of at least one register to determine the frequency of the previous frame. In this case, the initialization controller 100 may receive a signal corresponding to the variable frame from the outside.

[0119] Hereinafter, a driving method of the display device according to the present embodiment will be described based on a first frame, a second frame, a third frame, a fourth frame, and a fifth frame as consecutive arbitrary frames.

[0120] Figure 6 FIG. 1 shows a schematic flowchart of a method for driving a display device according to an embodiment of the present disclosure. Figure 7 The figure shows the Figure 6 Some timing diagrams and brightness versus time diagrams in the process of the driving method. Figure 8 The figure shows the Figure 7 For ease of illustration, Figure 7 and Figure 8 The diagram only shows the Figure 2 The signal of the pixel PXL (for example, Figure 4 The first scan signal GB[i] (eg, having one pulse) (eg, applied to the seventh transistor T7) is selected from among the scan signals EM[i], GI[i], GW[i], GC[i], and GB[i].

[0121] exist Figure 6 In the embodiment of the present invention, a driving method of a display device is described with reference to a second frame which is a next frame to a first frame, and the description of the second frame can be applied to other frames. In other words, the first frame corresponds to a frame immediately before the second frame.

[0122] Reference Figure 6 , the driving method of the display device according to the embodiment may include a second frame starting operation S110, a previous frame reference frequency change determining operation S120, a normal mode driving operation S131, and an initialization mode driving operation S132. Although the respective operations are described as follows Figure 6 The flowcharts shown in FIG are executed sequentially, but the present disclosure is not limited thereto, and unless otherwise indicated, Figure 6 Some of the operations shown as being performed sequentially or continuously may be performed concurrently (eg, simultaneously), the order of some of the operations may be changed, some of the operations may be omitted, or may be performed in parallel. Figure 6 Add one or more additional operations between the operations in the .

[0123] First, the display device 1 may perform a second frame start operation S110. In the driving method of the display device 1, the second frame start operation S110 may refer to driving the pixel PXL at the time when the second frame starts after the first frame ends. In other words, in the second frame start operation S110, the display device 1 is in a state at the boundary time point where the first frame ends and the second frame starts.

[0124] Thereafter, the display device 1 may perform a previous frame reference frequency change determination operation S120. The previous frame reference frequency change determination operation S120 includes, for example, an operation of determining whether the frequency of the second frame, which is the current frame, has changed compared to the frequency of the first frame, which is the previous frame, or whether a rate of change between the frequencies of the first frame and the second frame is greater than or equal to a suitable reference value (e.g., a predetermined reference value).

[0125] When the display device 1 determines in the previous frame reference frequency change determination operation S120 that the frequency of the second frame as the current frame has changed compared to the frequency of the first frame as the previous frame, or that the rate of change between the frequency of the first frame and the frequency of the second frame is greater than or equal to the reference value, the display device 1 may perform the normal mode driving operation S131. In addition, when the display device 1 determines in the previous frame reference frequency change determination operation S120 that the frequency of the second frame as the current frame has not changed compared to the frequency of the first frame as the previous frame, or that the rate of change between the frequency of the first frame and the frequency of the second frame is less than the reference value, the display device 1 may perform the initialization mode driving operation S132.

[0126] In the normal mode driving operation S131, the "normal mode" corresponds to the following driving method, in which the first scan driver 20a is controlled so that in the second frame (which is the current frame), the initialization controller 100 does not provide the first scan signal of the gate-on level (for example, applied to the seventh transistor T7) to each pixel (or in other words, in the second frame, the first scan signal (for example, applied to the seventh transistor T7) does not include the gate-on level), and therefore in the second frame, the second initialization voltage VINT2 is not used to initialize the anode of the light-emitting element LD.

[0127] In the initialization mode driving operation S132, the "initialization mode" corresponds to the following driving method, in which the first scan driver 20a is controlled so that in the second frame (which is the current frame), the initialization controller 100 provides the first scan signal of the gate-on level (for example, applied to the seventh transistor T7) to each pixel (or in other words, in the second frame, the first scan signal (for example, applied to the seventh transistor T7) includes the gate-on level), and therefore in the second frame, the anode of the light-emitting element LD is initialized using the second initialization voltage VINT2.

[0128] In other words, depending on whether the frequency of the current frame has changed compared to the frequency of the previous frame, or whether the rate of change between the frequency of the previous frame and the frequency of the current frame is greater than or equal to a reference value, the display device 1 can determine whether to be driven in normal mode or initialization mode in the current frame.

[0129] Figure 7 The figure shows an example in which the time period TP1 of the first frame has the same or substantially the same length as the time period TP2 of the second frame, the time period TP3 of the third frame is longer than the time period TP2 of the second frame, the time period TP4 of the fourth frame has the same or substantially the same length as the time period TP3 of the third frame, and the time period TP5 of the fifth frame is shorter than the time period TP4 of the fourth frame. In other words, Figure 7 The graph shows that the frequency of the second frame is equal to or substantially equal to the frequency of the first frame, the frequency of the third frame is lower than the frequency of the second frame, the frequency of the fourth frame is equal to or substantially equal to the frequency of the third frame, and the frequency of the fifth frame is higher than the frequency of the fourth frame.

[0130] Reference Figure 6 and Figure 7 Because the time period TP2 of the second frame is the same as or substantially the same as the time period TP1 of the first frame (for example, because the frequency of the second frame and the frequency of the first frame are the same as or substantially the same as each other), the display device 1 can be driven in the initialization mode in the second frame. In the second frame, the first scan signal of the gate-on level (for example, applied to the seventh transistor T7) can be provided to each pixel, and the anode of the light emitting element in each pixel can be initialized to a voltage level corresponding to the second initialization voltage VINT2.

[0131] When the first scan signal GB[i] of the gate-on level (e.g., GB on) (e.g., applied to the seventh transistor T7) is provided to each pixel in the second frame, the anode of the light-emitting element is initialized to a voltage level corresponding to the second initialization voltage VINT2, and therefore, the brightness of each pixel can have a minimum value. In this case, the display device 1 may include a delay period DP, in which, in terms of brightness, even if a voltage signal corresponding to the data voltage is provided to the anode of the light-emitting element in each pixel after the second initialization voltage VINT2 is provided, the brightness does not increase immediately. The delay period DP may be caused by a capacitive component (e.g., a parasitic capacitance) of the light-emitting element. After the delay period DP, the brightness may gradually increase until the light-emitting element in each pixel emits light at a target brightness (e.g., a target value).

[0132] Because the period TP3 of the third frame is longer than the period TP2 of the second frame (eg, the frequency of the third frame is lower than that of the second frame), the display device 1 may be driven in the normal mode in the third frame.

[0133] In other words, the anode of the light-emitting element in each pixel may not be initialized in the third frame. In the third frame, the first scan signal GB[i] of the gate-off level (e.g., GB off) (e.g., applied to the seventh transistor T7) may be maintained or substantially maintained and provided to each pixel, and the light-emitting element in each pixel may be maintained or substantially maintained to emit light at the target brightness. In some embodiments, at the boundary between the third frame and the second frame, the brightness may be reduced (e.g., slightly reduced) and may be restored, but the present disclosure is not limited thereto.

[0134] Because the period TP4 of the fourth frame is the same as or substantially the same as the period TP3 of the third frame (for example, because the frequency of the fourth frame and the frequency of the third frame are the same as or substantially the same as each other), the display device 1 can be driven in the initialization mode in the fourth frame. In the fourth frame, the first scan signal GB[i] of the gate-on level (for example, GB on) (for example, applied to the seventh transistor T7) can be provided to each pixel, and the anode of the light emitting element in each pixel can be initialized to a voltage level corresponding to the second initialization voltage VINT2.

[0135] When the first scan signal GB[i] of the gate-on level (e.g., GB on) (e.g., applied to the seventh transistor T7) is supplied to each pixel in the fourth frame, the anode of the light-emitting element is initialized to a voltage level corresponding to the second initialization voltage VINT2, and thus, the brightness of each pixel can have a minimum value. In this case, the display device 1 can have a delay period DP, and the brightness can be increased (e.g., can be gradually increased) after the delay period DP until the light-emitting element in each pixel emits light at the target brightness.

[0136] Because the time period TP5 of the fifth frame is shorter than the time period TP4 of the fourth frame (for example, because the frequency of the fifth frame is higher than that of the fourth frame), the display device 1 can be driven in the normal mode in the fifth frame. In other words, the anode of the light-emitting element in each pixel may not be initialized in the fifth frame. In the fifth frame, the first scan signal GB[i] of the gate-off level (for example, GB off) (for example, applied to the seventh transistor T7) can be maintained or substantially maintained and provided to each pixel, and the light-emitting element in each pixel can be maintained or substantially maintained to emit light at the target brightness.

[0137] As described above, when the frequency of the current frame changes compared to the frequency of the previous frame, or the rate of change between the frequency of the previous frame and the frequency of the current frame is greater than or equal to a reference value, the flicker observed (e.g., seen) by the user can be minimized or reduced by driving the display device in normal mode in the current frame.

[0138] Reference Figure 8 The comparative example shown in , which illustrates driving the display device in the initialization mode in all frames (eg, in each of the frames).

[0139] In the comparative example, since the anode of the light emitting element in each pixel is initialized to the second initialization voltage for each frame, the pixel according to the comparative example may change in brightness at irregular intervals. Figure 7 Compared to the embodiment of the present invention, a user may easily observe (eg, may easily see) flicker when the brightness of a pixel changes at irregular intervals within a relatively short period of time.

[0140] For example, in the fifth frame of the comparative example, after the anode of each pixel is initialized to the second initialization voltage, the frame may end before the light-emitting element in each pixel emits light at the target brightness. In this case, the user can easily observe (e.g., easily see) the flicker.

[0141] Hereinafter, a display device according to another embodiment will be described. In the following description, the same or similar reference numerals are used to represent the same or similar reference numerals as those in the embodiment. Figures 1 to 8 The constituent elements are the same or substantially the same as those of the present invention, and therefore, redundant descriptions thereof may not be repeated.

[0142] Figure 9 FIG. 1 shows a schematic block diagram of a display device according to another embodiment of the present disclosure.

[0143] Reference Figure 9 The display device 1-1 according to this embodiment is different from the display device 1-1 according to Figure 1 The display device 1 of the embodiment may be different in that: Figure 9 The initialization controller 100 is provided separately from the timing controller 50_1 .

[0144] exist Figure 9 In an embodiment of the present invention, the initialization controller 100 is provided separately from the pixel portion 10, the scan driver 20, the data driver 30, the emission driver 40, the timing controller 50_1, the host 60, and the power supply 70, and the initialization controller 100 can control the scan driver 20 (for example, the first scan driver 20a).

[0145] In this embodiment, when the initialization controller 100 compares the frequency (e.g., time period) of the current frame with the frequency (e.g., time period) of the previous frame and determines that the rate of change between the frequency of the current frame and the frequency of the previous frame is greater than or equal to a suitable reference value (e.g., a predetermined reference value), the initialization controller 100 can control the first scan driver 20a not to provide the first scan signal of the gate-on level (e.g., applied to the seventh transistor T7) to each pixel (or in other words, provide the first scan signal of the gate-off level applied to the seventh transistor T7).

[0146] Figure 10 FIG. 1 shows a circuit diagram of a pixel of a display device according to another embodiment of the present disclosure.

[0147] Reference Figure 10 The pixel PXL-1 of this embodiment is different from the pixel PXL-1 according to Figure 2 The pixel PXL of the embodiment of FIG. 4 may be different in that the same initialization voltage VINT is supplied to the gate electrode of the first transistor T1 (eg, the driving transistor) and the anode of the light emitting element LD.

[0148] The fourth transistor T4 (eg, a gate initialization transistor) may be connected between the first node N1 and an initialization power line to which the initialization voltage VINT is applied.

[0149] The seventh transistor T7 (eg, an anode initialization transistor) may be connected between an initialization power line to which the initialization voltage VINT is applied and a first electrode of the light emitting element LD (eg, an anode of the light emitting element LD).

[0150] Figure 11 FIG. 1 shows a schematic flowchart of a method for driving a display device according to another embodiment of the present disclosure. Figure 12 The figure shows the Figure 11 Some timing diagrams and brightness versus time diagrams in the process of the driving method.

[0151] Reference Figure 11 , Figure 11 Driving method of display device and Figure 6 The driving method may differ in that, instead of Figure 6 The previous frame reference frequency in the change determination operation S120, Figure 11 The previous frame reference frequency increase determining operation S120_1 is included.

[0152] The previous frame reference frequency increase determination operation S120_1, for example, includes an operation of determining whether the frequency of the second frame as the current frame is increased compared with the frequency of the first frame as the previous frame, or whether the rate of change of the frequency increase of the second frame is greater than or equal to a suitable reference value (for example, a predetermined reference value).

[0153] When the display device determines in the previous frame reference frequency increase determination operation S120_1 that the frequency of the second frame as the current frame is increased compared to the frequency of the first frame as the previous frame, or the rate of change of the frequency increase of the second frame is greater than or equal to the reference value, the display device may perform the normal mode driving operation S131. When the display device determines in the previous frame reference frequency increase determination operation S120_1 that the frequency of the second frame as the current frame is not changed or decreased compared to the frequency of the first frame as the previous frame, or the rate of change of the frequency increase of the second frame is less than the reference value, the display device may perform the initialization mode driving operation S132.

[0154] and Figure 7 Same as in Figure 12 The figure shows an example in which the time period TP1 of the first frame has the same or substantially the same length as the time period TP2 of the second frame, the time period TP3 of the third frame is longer than the time period TP2 of the second frame, the time period TP4 of the fourth frame has the same or substantially the same length as the time period TP3 of the third frame, and the time period TP5 of the fifth frame is shorter than the time period TP4 of the fourth frame. In other words, Figure 12 The graph shows that the frequency of the second frame is equal to or substantially equal to the frequency of the first frame, the frequency of the third frame is lower than the frequency of the second frame, the frequency of the fourth frame is equal to or substantially equal to the frequency of the third frame, and the frequency of the fifth frame is higher than the frequency of the fourth frame.

[0155] Reference Figure 11 and Figure 12 Because the time period TP2 of the second frame has the same or substantially the same length as the time period TP1 of the first frame (in other words, because the frequency of the second frame and the frequency of the first frame are the same or substantially the same as each other), the display device can be driven in the initialization mode in the second frame. In the second frame, the first scan signal of the gate-on level (for example, applied to the seventh transistor T7) can be provided to each pixel, and the anode of the light emitting element in each pixel can be initialized to a voltage level corresponding to the second initialization voltage VINT2.

[0156] When the first scan signal GB[i] of the gate-on level (e.g., GB on) (e.g., applied to the seventh transistor T7) is supplied to each pixel in the second frame, the anode of the light-emitting element is initialized to a voltage level corresponding to the second initialization voltage VINT2, and thus, the brightness of each pixel can have a minimum value. Thereafter, the display device may include a delay period DP. After the delay period DP, the brightness may increase (e.g., may gradually increase) until the light-emitting element in each pixel emits light at a target brightness (e.g., a target value).

[0157] Because the time period TP3 of the third frame is longer than the time period TP2 of the second frame (in other words, because the frequency of the third frame is lower than the frequency of the second frame), the display device can be driven in the initialization mode in the third frame. In other words, in the third frame, the first scan signal GB[i] of the gate-on level (e.g., GB on) (e.g., applied to the seventh transistor T7) can be provided to each pixel, and the anode of the light emitting element in each pixel can be initialized to a voltage level corresponding to the second initialization voltage VINT2.

[0158] When the first scan signal GB[i] of the gate-on level (e.g., GB on) (e.g., applied to the seventh transistor T7) is supplied to each pixel in the third frame, the anode of the light-emitting element is initialized to a voltage level corresponding to the second initialization voltage VINT2, and thus, the brightness of each pixel can have a minimum value. Thereafter, the display device has a delay period DP, and the brightness can increase (e.g., can gradually increase) after the delay period DP until the light-emitting element in each pixel emits light at the target brightness.

[0159] Because the period TP4 of the fourth frame has the same or substantially the same length as the period TP3 of the third frame (in other words, because the frequency of the fourth frame and the frequency of the third frame are the same or substantially the same as each other), the display device 1 can be driven in the initialization mode in the fourth frame. In the fourth frame, the first scan signal GB[i] of the gate-on level (e.g., GB on) (e.g., applied to the seventh transistor T7) can be provided to each pixel, and the anode of the light emitting element in each pixel can be initialized to a voltage level corresponding to the second initialization voltage VINT2.

[0160] When the first scan signal GB[i] of the gate-on level (e.g., GB on) (e.g., applied to the seventh transistor T7) is supplied to each pixel in the fourth frame, the anode of the light-emitting element is initialized to a voltage level corresponding to the second initialization voltage VINT2, and thus, the brightness of each pixel can have a minimum value. Thereafter, the display device has a delay period DP, and the brightness can increase (e.g., can gradually increase) after the delay period DP until the light-emitting element in each pixel emits light at the target brightness.

[0161] Because the time period TP5 of the fifth frame is shorter than the time period TP4 of the fourth frame (in other words, because the frequency of the fifth frame is higher than the frequency of the fourth frame), the display device can be driven in the normal mode in the fifth frame. In other words, the anode of the light-emitting element in each pixel may not be initialized in the fifth frame. In the fifth frame, the first scan signal GB[i] of the gate-off level (e.g., GB off) (e.g., applied to the seventh transistor T7) may be maintained or substantially maintained and provided to each pixel, and the light-emitting element in each pixel may be maintained or substantially maintained to emit light at the target brightness.

[0162] Even if the time period TP5 is relatively short as in the fifth frame, the light emitting element in each pixel can be driven and maintained in the normal mode to emit light at the target brightness, so that the light emitting element in the pixel emits light at the target brightness. Therefore, flicker that can be observed (e.g., visible) by the user can be minimized or reduced.

[0163] Figure 13 FIG. 1 shows a schematic flowchart of a method for driving a display device according to another embodiment of the present disclosure.

[0164] Reference Figure 13 , Figure 13 Driving method of display device and Figure 6 The driving method of the Figure 13 The method further includes an operation S141 of determining whether the brightness is less than or equal to a reference value.

[0165] exist Figure 13 In the embodiment, after the second frame starts operation S110, operation S141 of determining whether the brightness is less than or equal to the reference value may be performed.

[0166] Operation S141 of determining whether the luminance is less than or equal to the reference value corresponds to an operation of determining whether the luminance is less than or equal to a suitable reference value (eg, a predetermined reference value) in the current frame.

[0167] Under relatively high brightness, it may be difficult for a user to recognize the brightness difference between frames, and thus, when the brightness exceeds the reference value, the user may not observe (eg, see) flicker even if the initialization mode driving operation S132 is performed.

[0168] The reference value of the brightness may be set by one or more registers of the timing controller 50 .

[0169] When the brightness in the current frame is determined to be less than or equal to the reference value in operation S141 of determining whether the brightness is less than or equal to the reference value, the previous frame reference frequency change determination operation S120 may be performed. On the other hand, when the brightness is determined to be greater than the reference value at operation S141, the initialization mode driving operation S132 is performed.

[0170] However, Figure 13 The embodiment of the present invention is not limited to the order of operation S141 of determining whether the brightness is equal to or less than the reference value and the previous frame reference frequency change determination operation S120. For example, in another embodiment, the previous frame reference frequency change determination operation S120 may be performed first, and after the previous frame reference frequency change determination operation S120 is performed, the operation S141 of determining whether the brightness is equal to or less than the reference value may be performed. In this case, when there is a frequency change in the previous frame reference frequency change determination operation S120, or when it is determined that the rate of change between the first frame and the second frame is greater than or equal to a suitable reference value (e.g., a predetermined reference value), the operation S141 of determining whether the brightness is equal to or less than the reference value may be performed. On the other hand, when there is no frequency change, or when it is determined that the rate of change between the current frame and the previous frame is less than a suitable reference value (e.g., a predetermined reference value), the initialization mode driving operation S132 may be performed.

[0171] Figure 14 FIG. 1 shows a schematic flowchart of a method for driving a display device according to another embodiment of the present disclosure.

[0172] Reference Figure 14 , Figure 14 Driving method of display device and Figure 6 The driving method of the Figure 14 The method further includes operation S142 of determining whether the grayscale (eg, grayscale value) is less than or equal to a reference value.

[0173] exist Figure 14 In the embodiment, after the second frame start operation S110, operation S142 of determining whether the grayscale is less than or equal to the reference value may be performed.

[0174] Operation S142 of determining whether the grayscale is less than or equal to the reference value corresponds to an operation of determining whether the grayscale is less than or equal to an appropriate reference value (eg, a predetermined reference value) in the current frame.

[0175] Since the delay period DP is relatively short at a relatively high grayscale (e.g., a relatively high grayscale value), it may be difficult for the user to recognize the brightness difference between frames. Therefore, when the grayscale exceeds the reference value, the user may not observe (e.g., may not see) the flicker even if the initialization mode driving operation S132 is performed.

[0176] The reference value of the grayscale may be set by one or more registers of the timing controller 50 .

[0177] When the grayscale in the current frame is determined to be less than or equal to the reference value in operation S142 of determining whether the grayscale is less than or equal to the reference value, the previous frame reference frequency change determination operation S120 may be performed. On the other hand, when the grayscale is greater than the reference value at operation S142, the initialization mode driving operation S132 may be performed.

[0178] However, Figure 14 The embodiment of the present invention is not limited to the order of operation S142 of determining whether the grayscale is equal to or less than the reference value and the previous frame reference frequency change determination operation S120. For example, in another embodiment, the previous frame reference frequency change determination operation S120 may be performed first, and after the previous frame reference frequency change determination operation S120 is performed, the operation S142 of determining whether the grayscale is equal to or less than the reference value may be performed. In this case, when there is a frequency change in the previous frame reference frequency change determination operation S120, or when it is determined that the rate of change between the first frame and the second frame is greater than or equal to a suitable reference value (e.g., a predetermined reference value), the operation S142 of determining whether the grayscale is equal to or less than the reference value may be performed. On the other hand, when there is no frequency change, or when it is determined that the rate of change between the first frame and the second frame is less than the reference value, the initialization mode driving operation S132 may be performed.

[0179] Figure 15 FIG. 1 shows a schematic flowchart of a method for driving a display device according to another embodiment of the present disclosure.

[0180] Reference Figure 15 , Figure 15 Driving method of display device and Figure 13 The driving method of the Figure 15 The method further includes operation S142 of determining whether the grayscale (eg, grayscale value) is less than or equal to a reference value.

[0181] exist Figure 15 In the embodiment of the present invention, after the second frame start operation S110, an operation S141 of determining whether the brightness is less than or equal to the reference value may be performed. When, in the operation S141 of determining whether the brightness is less than or equal to the reference value, it is determined that the brightness in the current frame is less than or equal to the reference value, an operation S142 of determining whether the grayscale is less than or equal to the reference value may be performed. When, in the operation S142 of determining whether the grayscale is less than or equal to the reference value, it is determined that the grayscale in the current frame is less than or equal to the reference value, a previous frame reference frequency change determination operation S120 may be performed.

[0182] However, Figure 15The embodiments are not limited to the order of operation S141 of determining whether the brightness is less than or equal to the reference value, operation S142 of determining whether the grayscale is less than or equal to the reference value, and operation S120 of determining whether the previous frame reference frequency is changed, and as will be understood by those skilled in the art, the order of these operations may be variously modified as needed or desired.

[0183] Although some example embodiments have been described, it will be readily understood by those skilled in the art that various modifications may be made in the example embodiments without departing from the spirit and scope of the present disclosure. It will be understood that, unless otherwise described, the description of features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Therefore, it will be apparent to those skilled in the art that, unless otherwise specifically indicated, the features, characteristics and / or elements described in conjunction with a particular embodiment may be used alone or in combination with the features, characteristics and / or elements described in conjunction with other embodiments. Therefore, it should be understood that the foregoing is an illustration of various example embodiments and should not be construed as being limited to the specific example embodiments disclosed herein, and that various modifications to the disclosed example embodiments as well as other example embodiments are intended to be included within the spirit and scope of the present disclosure as defined by the appended claims and their equivalents.

Claims

1. A display device, comprising: a pixel portion, the pixel portion including a plurality of pixels; a first scan driver configured to provide a first scan signal to each of the plurality of pixels; as well as an initialization controller configured to control the first scan driver, Each of the plurality of pixels includes a pixel circuit including a plurality of transistors and a light-emitting element connected to the pixel circuit. wherein the anode of the light emitting element is configured to be initialized to a first initialization voltage in response to the first scanning signal having a gate-on level, and The initialization controller is configured to determine whether to provide the first scan signal having the gate-on level to each of the plurality of pixels according to a frequency change of each frame for each frame.

2. The display device according to claim 1, wherein The initialization controller includes: a frequency determiner configured to determine a frequency of each frame; and A control signal output section is configured to provide a black voltage control signal to the first scan driver according to the frequency determined by the frequency determiner.

3. The display device according to claim 2, wherein: The initialization controller is configured to control the first scan driver not to provide the first scan signal having the gate-on level when there is the frequency change in a current frame compared to a previous frame.

4. The display device according to claim 3, wherein The initialization controller is configured to control the first scan driver to provide the first scan signal having the gate-on level when there is no frequency change in the current frame compared to the previous frame.

5. The display device according to claim 1, further comprising: A timing controller is configured to provide a scan driving control signal to the first scan driver. The display device according to claim 5 , wherein: The initialization controller is implemented as a register in the timing controller.

7. The display device according to claim 1, further comprising: A power supply is configured to provide the first initialization voltage.

8. The display device according to claim 7, wherein: The power supply is configured to provide a second initialization voltage for initializing a gate electrode of a driving transistor among the plurality of transistors.

9. The display device according to claim 8, further comprising: a second scan driver configured to provide a second scan signal, The second initialization voltage is supplied to the gate electrode of the driving transistor in response to the second scan signal having a gate-on level.

10. The display device according to claim 1, wherein The plurality of transistors include P-type transistors and N-type transistors.

Images