active phased array

Abstract

An active phased array includes a plurality of antennas, a plurality of phase shifters, and a plurality of filters. The phase shifters are individually coupled with a corresponding one of the antennas. The filters are collectively coupled with a signal feed line and individually coupled with a corresponding one of the phase shifters. Each filter includes a filter capacitance and a filter resistance. The filter capacitance is coupled between a first node and a second node and has a capacitance value. The filter resistance is coupled between the second node and a third node and has a resistance value. The first node is coupled with one of the signal feed line and a ground terminal, the second node is coupled with the corresponding one of the phase shifters, the third node is coupled with the other one of the signal feed line and the ground terminal, and at least one of the capacitance value and the resistance value is adjustable.

Description

Technical Field

[0001] This invention relates to a phase array, and more particularly to an active phase array. Background Technology

[0002] Currently, the frequency bands of fifth-generation (5G) communication systems can be divided into two types: "Sub-6" below 6 GHz and high-frequency bands of 26 / 28 GHz (i.e., millimeter wave). The millimeter wave (mmWave) band improves channel efficiency and system performance by employing beamforming protocols in phased array transmitters and receivers to provide data rates of up to 7 gigabits per second (7 Gbit / s) and assist users in aligning transmission paths.

[0003] Phase arrays are divided into passive phase arrays and active phase arrays. Passive phase arrays only change the signal phase of their antenna elements without the ability to switch the signal on or off. Active phase arrays, on the other hand, have the ability to change the signal phase and switch the signal on or off. Furthermore, because each antenna element can independently act as a signal source to actively transmit electromagnetic waves, they have a wider range of communication applications and represent the mainstream trend in array antenna development. Summary of the Invention

[0004] The present invention provides an active phase array with a filter having an adjustable cutoff frequency, thereby controlling the number of antennas transmitting signals.

[0005] The active phase array of the present invention includes multiple antennas, multiple phase shifters, and multiple filters. Each phase shifter is individually coupled to a corresponding antenna. The filters are collectively coupled to a signal feed line and individually coupled to a corresponding phase shifter. Each filter includes a filter capacitor and a filter resistor. The filter capacitor is coupled between a first node and a second node and has a capacitance value. The filter resistor is coupled between a second node and a third node and has a resistance value. The first node is coupled to one of the signal feed line and a ground terminal, the second node is coupled to a corresponding phase shifter, and the third node is coupled to the other of the signal feed line and a ground terminal, and at least one of the capacitance and resistance values ​​is adjustable.

[0006] Based on the above, in the active phase array of this embodiment, the filter is composed of a filter capacitor and a filter resistor, and at least one of the capacitance value of the filter capacitor and the resistance value of the filter resistor is adjustable. Therefore, the cutoff frequency of the filter will move with the adjusted capacitance value and / or resistance value, causing the filter to be turned on or off relative to the carrier frequency of the antenna signal transmitted by the signal feed line.

[0007] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description

[0008] Figure 1A This is a schematic diagram of an active phase array according to a first embodiment of the present invention.

[0009] Figure 1B This is a frequency domain schematic diagram of a high-pass filter according to an embodiment of the present invention.

[0010] Figure 1C This is a schematic diagram of the structural domain of a high-pass filter according to an embodiment of the present invention.

[0011] Figure 2 This is a schematic diagram of an active phase array according to a second embodiment of the present invention.

[0012] Figure 3 This is a schematic diagram of an active phase array according to a third embodiment of the present invention.

[0013] Figure 4A This is a schematic diagram of an active phase array according to a fourth embodiment of the present invention.

[0014] Figure 4B This is a frequency domain schematic diagram of a low-pass filter according to an embodiment of the present invention.

[0015] Figure 5 This is a schematic diagram of an active phase array according to a fifth embodiment of the present invention.

[0016] Figure 6 This is a schematic diagram of an active phase array according to the sixth embodiment of the present invention.

[0017] Explanation of reference numerals in the attached figures:

[0018] 100, 200, 300, 400, 500, 600: Active phase array

[0019] ANT1-ANT8: Antennas

[0020] C1: First capacitor

[0021] C2: Second capacitor

[0022] C3: Third capacitor

[0023] C4: Fourth capacitor

[0024] C5: Fifth capacitor

[0025] E1: Upper electrode

[0026] E2: Lower electrode

[0027] f0: Carrier frequency

[0028] f1, f2: Cutoff frequencies

[0029] FIT: Filter

[0030] GND: Ground terminal

[0031] HPF1-HPF8, HPF1a-HPF8a, HPF1b-HPF8b: High-pass filters

[0032] LC1, LC, LC2: Filter capacitors

[0033] LD1-LD4: Data cables

[0034] LG1-LG2: Gate lines

[0035] LPF1-LPF8, LPF1a-LPF8a, LPF1b-LPF8b: Low-pass filters

[0036] LSF: Signal feed line

[0037] N1: First node

[0038] N2: Second node

[0039] N3: Third Node

[0040] PSH1-PSH8: Phase Shifter

[0041] RE1, RE, RE2: Filter resistors

[0042] TFT, TR1, TR2: Impedance transistors

[0043] TS1: First switching transistor

[0044] TS2: Second switching transistor

[0045] TS3: Third switching transistor

[0046] TS4: Fourth Switching Transistor

[0047] VDD: System high voltage Detailed Implementation

[0048] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant technology and this invention, and will not be interpreted as having idealized or overly formal meanings unless expressly defined herein.

[0049] It should be understood that although the terms "first," "second," "third," etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another. Therefore, "first element," "component," "region," "layer," or "part" discussed below may be referred to as a second element, component, region, layer, or part without departing from the teachings of this document.

[0050] The terminology used herein is for the purpose of describing particular embodiments only and is not restrictive. As used herein, unless the content clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include multiple forms, including “at least one.” “Or” signifies “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It should also be understood that, when used in this specification, the terms “comprising” and / or “comprising” specify the presence of the stated features, areas, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, areas, integrals, steps, operations, elements, components, and / or combinations thereof.

[0051] Figure 1A This is a schematic diagram of an active phase array according to a first embodiment of the present invention. Please refer to... Figure 1A In this embodiment, the active phase array 100 includes multiple antennas (such as ANT1-ANT8), multiple phase shifters (such as PSH1-PSH8), and multiple filters (taking high-pass filters HPF1-HPF8 as an example). The number of antennas, phase shifters, and filters can be set to be the same, but this embodiment of the invention is not limited thereto.

[0052] Each of the phase shifters PSH1-PSH8 is individually coupled to a corresponding one of the antennas ANT1-ANT8. For example, phase shifter PSH1 is coupled to antenna ANT1, phase shifter PSH2 is coupled to antenna ANT2, and so on. Similarly, each of the high-pass filters HPF1-HPF8 is collectively coupled to the signal feed line LSF and individually coupled to a corresponding one of the phase shifters PSH1-PSH8. For example, high-pass filter HPF1 is coupled to phase shifter PSH1, high-pass filter HPF2 is coupled to phase shifter PSH2, and so on. In other words, phase shifter PSH1 and high-pass filter HPF1 are connected in series between antenna ANT1 and the signal feed line LSF, phase shifter PSH2 and high-pass filter HPF2 are connected in series between antenna ANT2 and the signal feed line LSF, and so on.

[0053] Each high-pass filter HPF1-HPF8 includes a filter capacitor LC1 and a filter resistor RE1. The filter capacitor LC1 is coupled between the first node N1 and the second node N2 and has a capacitance value. The filter resistor RE1 is coupled between the second node N2 and the third node N3 and has a resistance value. The first node N1 is coupled to the signal feed line LSF, the second node N2 is coupled to one of the corresponding phase shifters PSH1-PSH8, and the third node N3 is coupled to the ground terminal GND. At least one of the capacitance and resistance values ​​is adjustable. Therefore, the cutoff frequency of the high-pass filters HPF1-HPF8 shifts with the adjusted capacitance and / or resistance values, causing the high-pass filters HPF1-HPF8 to be either turned on or off relative to the carrier frequency of the antenna signal transmitted by the signal feed line LSF. Furthermore, by adjusting the capacitance and resistance values ​​of some of the high-pass filters HPF1-HPF8, the transmitter of some antennas (such as ANT1-ANT8) can be turned off, achieving a partial transceiver effect.

[0054] In the embodiments of the present invention, the antenna can be implemented in any form, such as a dipole antenna, a monopole antenna, a patch antenna, a loop antenna, a slot antenna, a slot+patch antenna, a liquid crystal antenna, etc.

[0055] Figure 1B This is a frequency domain schematic diagram of a high-pass filter according to an embodiment of the present invention. Please refer to... Figure 1A and Figure 1B When the capacitance value of the filter capacitor LC1 and / or the resistance value of the filter resistor RE1 of each high-pass filter HPF1-HPF8 are set such that the cutoff frequency of each high-pass filter HPF1-HPF8 is lower than the carrier frequency f0 of the antenna signal transmitted by the signal feed line LSF (e.g., cutoff frequency f1), each high-pass filter HPF1-HPF8 is conducting relative to the carrier frequency f0 of the antenna signal transmitted by the signal feed line LSF. When the capacitance value of the filter capacitor LC1 and / or the resistance value of the filter resistor RE1 of each high-pass filter HPF1-HPF8 are set such that the cutoff frequency of each high-pass filter HPF1-HPF8 is higher than the carrier frequency f0 (e.g., cutoff frequency f2), each high-pass filter HPF1-HPF8 is cut off relative to the carrier frequency f0 of the antenna signal transmitted by the signal feed line LSF.

[0056] Figure 1C This is a schematic diagram of the structural domain of a high-pass filter according to an embodiment of the present invention. Please refer to... Figures 1A to 1CIn this embodiment of the invention, the capacitance value of the filter capacitor LC and the resistance value of the filter resistor RE of the filter FIT are both adjustable. Furthermore, the filter capacitor LC can be composed of one or more liquid crystal capacitors. When the voltage difference between the upper electrode E1 and the lower electrode E2 of the liquid crystal capacitor LC is adjusted, the orientation of the liquid crystal can be adjusted, thereby adjusting the capacitance value of the liquid crystal layer. Alternatively, the filter resistor RE can include an impedance transistor TFT. When the drain-gate voltage of the impedance transistor TFT changes, the impedance value of the semiconductor layer of the impedance transistor TFT also changes, thereby adjusting the resistance value of the filter resistor RE.

[0057] In this embodiment, the upper electrode E1 of the liquid crystal capacitor of the filter capacitor LC is coupled to the drain of the transistor TFT (i.e., node N2), wherein the lower electrode E2 of the liquid crystal capacitor of the filter capacitor LC is equivalent to the first node N1, and the source of the impedance transistor TFT is equivalent to the third node N3. Here, "upper" and "lower" are only used to distinguish different components in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0058] In this embodiment, the multiple liquid crystal capacitors of the filter capacitor LC can be connected in parallel and / or in series to adjust the total capacitance function of the filter capacitor LC, and the multiple liquid crystal capacitors of the filter capacitor LC can be individually controlled to expand the adjustable range of the capacitance value.

[0059] In other embodiments, when the capacitance value of the filter capacitor LC of the filter FIT is fixed (i.e., non-adjustable), the filter capacitor LC can be composed of two overlapping electrodes sandwiching one or more insulating layers. When the resistance value of the filter resistor RE is fixed (i.e., non-adjustable), the filter resistor RE can be composed of one or more conductive layers or one or more transistors connected in a diode configuration. The above are examples for illustration, but the embodiments of the present invention are not limited thereto.

[0060] Figure 2 This is a schematic diagram of an active phase array according to a second embodiment of the present invention. Please refer to... Figure 1A and Figure 2 In this embodiment, the active phase array 200 is generally the same as the active phase array 100, except that it has high-pass filters HPF1a-HPF8a and the active phase array 200 also includes multiple data lines (such as LD1-LD4) and multiple gate lines (such as LG1-LG2) to receive signals and / or voltages required for control, wherein similar or identical components use the same or similar designations.

[0061] In this embodiment, it is assumed that the capacitance value of the filter capacitor LC1 in each of the high-pass filters HPF1a-HPF8a is adjustable. High-pass filter HPF1a is used as an example, and high-pass filters HPF2a-HPF8a can be referenced to HPF1a. In this embodiment, in addition to the filter capacitor LC1 and the filter resistor RE1, high-pass filter HPF1a also includes a first capacitor C1, a first switching transistor TS1, and a second capacitor C2. The first capacitor C1 is coupled between the signal feed line LSF and the filter capacitor LC1, and can be formed by the signal feed line LSF and the lower electrode E2 of the liquid crystal capacitor. The first switching transistor TS1 has a first terminal coupled to the filter capacitor LC1, a second terminal coupled to the data line LD1, and a control terminal coupled to the gate line LG1. The second capacitor C2 is coupled between the first terminal of the first switching transistor TS1 and the ground terminal GND.

[0062] Based on the above, in each high-pass filter HPF1a-HPF8a, the voltage difference of the second capacitor C2 determines the capacitance value of the filter capacitor LC1. Furthermore, the first switching transistor TS1 of each high-pass filter HPF1a-HPF8a can be sequentially turned on via the signals of the gate lines LG1-GL2, thereby setting the voltage difference of the second capacitor C2 of each high-pass filter HPF1a-HPF8a in sequence via the voltages on the data lines LD1-DL4, thereby changing the capacitance value of the filter capacitor LC1 of each high-pass filter HPF1a-HPF8a.

[0063] Figure 3 This is a schematic diagram of an active phase array according to a third embodiment of the present invention. Please refer to... Figure 1A and Figure 3 In this embodiment, the active phase array 300 is generally the same as the active phase array 100, except that it has high-pass filters HPF1b-HPF8b and the active phase array 300 also includes multiple data lines (such as LD1-LD4) and multiple gate lines (such as LG1-LG2) to receive signals and / or voltages required for control, wherein similar or identical components use the same or similar designations.

[0064] In this embodiment, it is assumed that the resistance value of the filter resistor RE1 in each of the high-pass filters HPF1b-HPF8b is adjustable. Taking high-pass filter HPF1b as an example, and high-pass filters HPF2b-HPF8b can be referenced to high-pass filter HPF1B. In this embodiment, the filter resistor RE1 includes an impedance transistor TR1, which has a first terminal coupled to phase shifter PSH1, a second terminal coupled to ground GND, and a control terminal. Furthermore, the second node N2 is coupled to the system high voltage VDD.

[0065] In addition to the filter capacitor LC1 and the impedance transistor TR1, the high-pass filter HPF1b also includes a second switching transistor TS2 and a third capacitor C3. The second switching transistor TS2 has a first terminal coupled to the control terminal of the impedance transistor TR1, a second terminal coupled to the data line LD1, and a control terminal coupled to the gate lines LG1-LG2. The third capacitor C3 is coupled between the first terminal of the second switching transistor TS2 and the ground terminal GND.

[0066] Based on the above, in each high-pass filter HPF1b-HPF8b, the voltage difference of the third capacitor C3 determines the resistance value of the filter resistor RE1. Furthermore, the second switching transistor TS2 of each high-pass filter HPF1b-HPF8b can be sequentially turned on via the signals of the gate lines LG1-GL2 to set the voltage difference of the third capacitor C3 of each high-pass filter HPF1b-HPF8b via the voltage on the data lines LD1-DL4, thereby changing the resistance value of the filter resistor RE1 of each high-pass filter HPF1b-HPF8b.

[0067] Figure 4A This is a schematic diagram of an active phase array according to a fourth embodiment of the present invention. Please refer to... Figure 1A and Figure 4A In this embodiment, the active phase array 400 is largely the same as the active phase array 100, except that low-pass filters LPF1-LPF8 replace high-pass filters HPF1-HPF8, and each low-pass filter LPF1-LPF8 includes a filter capacitor LC2 and a filter resistor RE2, wherein similar or identical components are labeled with the same or similar designations. The coupling method of the filter capacitor LC2 and filter resistor RE2 in each low-pass filter LPF1-LPF8 can refer to that of the filter capacitor LC1 and filter resistor RE1, except that the first node N1 is coupled to the ground terminal GND, the second node N2 is coupled to one of the corresponding phase shifters PSH1-PSH8, and the third node N3 is coupled to the signal feed line LSF.

[0068] In this embodiment, the first node N1 is coupled to the ground terminal GND, the second node N2 is coupled to one of the corresponding phase shifters PSH1-PSH8, and the third node N3 is coupled to the signal feed line LSF. At least one of the capacitance and resistance values ​​is adjustable. Therefore, the cutoff frequency of the low-pass filters LPF1-LPF8 will shift with the adjusted capacitance and / or resistance values, causing the low-pass filters LPF1-LPF8 to be either turned on or off relative to the carrier frequency of the antenna signal transmitted by the signal feed line LSF.

[0069] Figure 4B This is a frequency domain schematic diagram of a low-pass filter according to an embodiment of the present invention. Please refer to... Figure 4A and Figure 4B When the capacitance value of the filter capacitor LC2 and the resistance value of the filter resistor RE2 of each low-pass filter LPF1-LPF8 are set such that the cutoff frequency of each low-pass filter LPF1-LPF8 is higher than the carrier frequency f0 of the antenna signal transmitted by the signal feed line LSF (e.g., cutoff frequency f2), each low-pass filter LPF1-LPF8 is conducting relative to the carrier frequency f0 of the antenna signal transmitted by the signal feed line LSF. When the capacitance value of the filter capacitor LC2 and / or the resistance value of the filter resistor RE2 of each low-pass filter LPF1-LPF8 are set such that the cutoff frequency of each high-pass filter HPF1-HPF8 is lower than the carrier frequency f0 (i.e., cutoff frequency f1), each low-pass filter LPF1-LPF8 is cut off relative to the carrier frequency f0 of the antenna signal transmitted by the signal feed line LSF.

[0070] Figure 5 This is a schematic diagram of an active phase array according to a fifth embodiment of the present invention. Please refer to... Figure 4A and Figure 5 In this embodiment, the active phase array 500 is generally the same as the active phase array 100, except that it has low-pass filters LPF1a-LPF8a and the active phase array 500 also includes multiple data lines (such as LD1-LD4) and multiple gate lines (such as LG1-LG2) to receive signals and / or voltages required for control, wherein similar or identical components use the same or similar designations.

[0071] In this embodiment, it is assumed that the capacitance value of the filter capacitor LC2 in each low-pass filter LPF1a-LPF8a is adjustable. Low-pass filter LPF1a is used as an example, and low-pass filters LPF2a-LPF8a can be referenced to low-pass filter LPF1a. In this embodiment, in addition to the filter capacitor LC2 and the filter resistor RE2, low-pass filter LPF1a also includes a third switching transistor TS3 and a fourth capacitor C4. The third switching transistor TS3 has a first terminal coupled to the filter capacitor LC2, a second terminal coupled to the data line LD1, and a control terminal coupled to the gate line LG1. The fourth capacitor C4 is coupled between the first terminal of the third switching transistor TS3 and the ground terminal GND.

[0072] Based on the above, in each low-pass filter LPF1a-LPF8a, the voltage difference of the fourth capacitor C4 determines the capacitance value of the filter capacitor LC2. Furthermore, the third switching transistor TS3 of each low-pass filter LPF1a-LPF8a can be sequentially turned on via the signals of the gate lines LG1-GL2, thereby setting the voltage difference of the fourth capacitor C4 of each low-pass filter LPF1a-LPF8a in sequence via the voltages on the data lines LD1-DL4, thereby changing the capacitance value of the filter capacitor LC2 of each low-pass filter LPF1a-LPF8a.

[0073] Figure 6 This is a schematic diagram of an active phase array according to a sixth embodiment of the present invention. Please refer to... Figure 4A and Figure 6 In this embodiment, the active phase array 600 is generally the same as the active phase array 400, except that it has low-pass filters LPF1b-LPF8b and the active phase array 600 also includes multiple data lines (such as LD1-LD4) and multiple gate lines (such as LG1-LG2) to receive signals and / or voltages required for control, wherein similar or identical components use the same or similar designations.

[0074] In this embodiment, it is assumed that the resistance value of the filter resistor RE2 in the low-pass filters LPF1b-LPF8b is adjustable. Taking low-pass filter LPF1b as an example, and low-pass filters LPF2b-LPF8b can be referenced to low-pass filter LPF1b. In this embodiment, the filter resistor RE2 includes an impedance transistor TR2, which has a first terminal coupled to the signal feed line LSF, a second terminal coupled to the phase shifter PSH1, and a control terminal. Furthermore, the second node N2 is coupled between the filter capacitor LC2, the second terminal of the impedance transistor TR2, and the phase shifter PSH1.

[0075] In addition to the filter capacitor LC2 and the impedance transistor TR2, the low-pass filter LPF1b also includes a fourth switching transistor TS4 and a fifth capacitor C5. The fourth switching transistor TS4 has a first terminal coupled to the control terminal of the impedance transistor TR2, a second terminal coupled to the data line LD1, and a control terminal coupled to the gate line LG1. The fifth capacitor C5 is coupled between the first terminal of the fourth switching transistor TS4 and the ground terminal GND.

[0076] Based on the above, in each low-pass filter LPF1b-LPF8b, the voltage difference of the fifth capacitor C5 determines the resistance value of the filter resistor RE2. Furthermore, the fourth switching transistor TS4 of each low-pass filter LPF1b-LPF8b can be sequentially turned on via the signals of the gate lines LG1-GL2 to set the voltage difference of the fifth capacitor C5 of each low-pass filter LPF1b-LPF8b via the voltage on the data lines LD1-DL4, thereby changing the resistance value of the filter resistor RE2 of each low-pass filter LPF1b-LPF8b.

[0077] In summary, the active phase array of this embodiment of the invention comprises a filter capacitor and a filter resistor, and at least one of the capacitance value of the filter capacitor and the resistance value of the filter resistor is adjustable. Therefore, the cutoff frequency of the filter will shift with the adjusted capacitance value and / or resistance value, causing the filter to be turned on or off relative to the carrier frequency of the antenna signal transmitted by the signal feed line.

[0078] Although the present invention has been disclosed above with reference to embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some changes and modifications without departing from the concept and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the claims.

Claims

1. An active phase array, comprising: Multiple antennas; Multiple phase shifters, each individually coupled to a corresponding one of the antennas; as well as Multiple filters, commonly coupled to a signal feed line and individually coupled to a corresponding one of the phase shifters, each of the filters including: A filter capacitor, coupled between a first node and a second node, and having a capacitance value; and A filter resistor is coupled between the second node and a third node and has a resistance value, wherein at least one of the capacitance value and the resistance value is adjustable. Each of these filters is a high-pass filter. The first node is coupled to the signal feed line, the second node is coupled to a corresponding one of the phase shifters, and the third node is coupled to the ground terminal. When the capacitance value is adjustable, the filter capacitor includes a liquid crystal capacitor, and each of the filters also includes: A first capacitor is coupled between the signal feed line and the filter capacitor; A first switching transistor has a first terminal coupled to the filter capacitor, a second terminal coupled to a data line, and a control terminal coupled to a gate line; and A second capacitor is coupled between the first terminal of the first switching transistor and the ground terminal.

2. The active phase array as claimed in claim 1, wherein each filter is turned on when a cutoff frequency of each filter is lower than a carrier frequency of an antenna signal transmitted by the signal feed line, and each filter is turned off when the cutoff frequency of each filter is higher than the carrier frequency.

3. An active phase array, comprising: Multiple antennas; Multiple phase shifters, each individually coupled to a corresponding one of the antennas; as well as Multiple filters, commonly coupled to a signal feed line and individually coupled to a corresponding one of the phase shifters, each of the filters including: A filter capacitor, coupled between a first node and a second node, and having a capacitance value; and A filter resistor is coupled between the second node and a third node and has a resistance value, wherein at least one of the capacitance value and the resistance value is adjustable. Each of these filters is a high-pass filter. The first node is coupled to the signal feed line, the second node is coupled to a corresponding one of the phase shifters, and the third node is coupled to the ground terminal. When the resistance value is adjustable, the filter resistor includes an impedance transistor having a first terminal coupled to a corresponding one of the phase shifters, a second terminal coupled to the ground terminal, and a control terminal. These filters also include: A second switching transistor has a first terminal coupled to the control terminal of the impedance transistor, a second terminal coupled to a data line, and a control terminal coupled to a gate line; and A third capacitor is coupled between the first terminal of the second switching transistor and the ground terminal.

4. An active phase array, comprising: Multiple antennas; Multiple phase shifters, each individually coupled to a corresponding one of the antennas; as well as Multiple filters, commonly coupled to a signal feed line and individually coupled to a corresponding one of the phase shifters, each of the filters including: A filter capacitor, coupled between a first node and a second node, and having a capacitance value; and A filter resistor is coupled between the second node and a third node, and has a resistance value. At least one of the capacitance value and the resistance value is adjustable. Each of these filters is a low-pass filter. The first node is coupled to the ground terminal, the second node is coupled to a corresponding one of the phase shifters, and the third node is coupled to the signal feed line. When the capacitance value is adjustable, the filter capacitor includes a liquid crystal capacitor, and each of the filters also includes: A third switching transistor has a first terminal coupled to the filter capacitor, a second terminal coupled to a data line, and a control terminal coupled to a gate line; and A fourth capacitor is coupled between the first terminal of the third switching transistor and the ground terminal.

5. The active phase array as claimed in claim 4, wherein each filter is turned on when a cutoff frequency of each filter is higher than a carrier frequency of an antenna signal transmitted by the signal feed line, and each filter is turned off when the cutoff frequency of each filter is lower than the carrier frequency.

6. An active phase array, comprising: Multiple antennas; Multiple phase shifters, each individually coupled to a corresponding one of the antennas; as well as Multiple filters, commonly coupled to a signal feed line and individually coupled to a corresponding one of the phase shifters, each of the filters including: A filter capacitor, coupled between a first node and a second node, and having a capacitance value; and A filter resistor is coupled between the second node and a third node and has a resistance value, wherein at least one of the capacitance value and the resistance value is adjustable. Each of these filters is a low-pass filter. The first node is coupled to the ground terminal, the second node is coupled to a corresponding one of the phase shifters, and the third node is coupled to the signal feed line. When the resistance value is adjustable, the filter resistor includes an impedance transistor having a first terminal coupled to the signal feed line, a second terminal coupled to a corresponding one of the phase shifters, and a control terminal. These filters also include: A fourth switching transistor has a first terminal coupled to the control terminal of the impedance transistor, a second terminal coupled to a data line, and a control terminal coupled to a gate line; and A fifth capacitor is coupled between the first terminal of the fourth switching transistor and the ground terminal.

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