Non-volatile storage partition identifier

Abstract

A computing device including a memory module. The computing device may also include a processor configured to divide a non-volatile area of ​​the memory module into a first non-volatile storage partition assigned to the operating system and a second non-volatile storage partition assigned to the system firmware by executing instructions of the operating system. The processor may write a globally unique identifier (GUID) to the non-volatile area. The GUID may indicate the location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition. The processor may access the first non-volatile storage partition. By executing instructions of the system firmware, the processor may determine the location of the boundary. The processor may access the second non-volatile storage partition. The operating system may be prevented from accessing the second non-volatile storage partition, and the system firmware may be prevented from accessing the first non-volatile storage partition.

Description

Background Art

[0001] Software-defined storage-class memory is a special class of storage device used in some computing devices. During runtime, software-defined storage-class memory acts as volatile memory. When the computing device is turned off, software-defined storage-class memory acts as non-volatile memory. This feature of software-defined storage-class memory is made possible by firmware-assisted coupling of volatile memory areas and non-volatile storage partitions. Summary of the invention

[0002] According to one aspect of the present disclosure, a computing device is provided, including a memory module. The computing device may also include a processor configured to: by executing an instruction of an operating system, divide a non-volatile area of ​​the memory module into a first non-volatile storage partition assigned to the operating system and a second non-volatile storage partition assigned to the system firmware. The processor may also be configured to write a globally unique identifier (GUID) to the non-volatile area of ​​the memory module. The GUID may indicate a boundary between the first non-volatile storage partition and the second non-volatile storage partition. The processor may also be configured to access the first non-volatile storage partition by executing an instruction of the operating system. By executing an instruction of the system firmware, the processor may also be configured to determine the location of the boundary. By executing an instruction of the system firmware, the processor may also be configured to access the second non-volatile storage partition in response to determining the location of the boundary. The operating system may be prevented from accessing the second non-volatile storage partition, and the system firmware may be prevented from accessing the first non-volatile storage partition.

[0003] The present disclosure is provided to introduce selected concepts in a simplified form, which will be further described in the specific embodiments below. This summary is not intended to identify the key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. In addition, the claimed subject matter is not limited to implementations that address any or all of the shortcomings noted in any part of this disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 An example computing device including a memory module and a processor according to an example embodiment is schematically depicted.

[0005] Figure 2 Schematically depicts Figure 1 A memory module of a computing device.

[0006] Figure 3 Schematically depicts Figure 1 The non-volatile area of ​​the memory module.

[0007] Figure 4 Shown according to Figure 1 An example timeline of steps that may be performed in partitioning a non-volatile region of a memory module in accordance with an embodiment of the present invention.

[0008] Figure 5 Shown according to Figure 1 A flowchart of an example method of an embodiment of the present invention may be performed at a computing device.

[0009] Figure 6 shows that in some embodiments, Figure 5 Additional steps of the method.

[0010] Figure 7 shows that when a memory module includes a volatile area, it may be performed in some embodiments Figure 5 Additional steps of the method.

[0011] Figure 8 It is shown in Figure 1 A schematic diagram of an example computing environment in which a computer device may be implemented. DETAILED DESCRIPTION

[0012] Software defined storage class memory, such as non-volatile dual in-line memory modules (NVDIMMs), can be used to partition non-volatile storage between an operating system and system firmware, such as a basic input / output system (BIOS) or a unified extensible firmware interface (UEFI). When non-volatile storage is partitioned between the operating system and the system firmware, the operating system and the system firmware can each be assigned a corresponding partition of the non-volatile storage. The amount of storage allocated to each of the operating system and the system firmware can be specified by a user, allowing different amounts of storage to be assigned to the operating system and the system firmware in different contexts and use cases.

[0013] When a new server computing device is installed in a data center, all storage media contained in the new server computing device are typically formatted as a safety measure. Therefore, when a new server computing device is installed, partitions of the storage media are typically deleted. When a non-volatile memory partition specified by a software-defined storage class memory is deleted in this manner, a user may have to reallocate the non-volatile storage between the operating system and the system firmware. Therefore, a user installing a new server computing device may have to expend additional resources to reallocate the non-volatile storage.

[0014] In order to solve the above problems, a computing device 10 is provided, such as Figure 1 An example embodiment is schematically depicted. Figure 1The computing device 10 may include a processor 12 configured to execute program instructions. The computing device 10 may also include a memory module 14 operatively coupled to the processor 12. Figure 1 The illustrated memory module 14 is a hardware device that may be, for example, a memory chip coupled to the processor 12 via the motherboard of the computing device 10. The memory module 14 may include a non-volatile area 20 and a volatile area 30.

[0015] As in Figure 2 As shown in the example of , the memory module 14 may include one or more non-volatile storage drives 16 and one or more volatile memory devices 18. For example, the memory module 14 may be a non-volatile dual in-line memory module (NVDIMM). The NVDIMM may include one or more M.2 drives as one or more non-volatile storage drives 16, such as one or more non-volatile express memory (NVMe) drives. The one or more volatile memory devices 18 may be, for example, dynamic random access memory (DRAM) devices. Additionally or alternatively, the memory module 14 may include one or more other types of non-volatile storage drives 16 or volatile memory devices 18, such as a hard disk or flash memory.

[0016] Back to Figure 1 , the processor 12 of the computing device may be configured to execute instructions to run an operating system 40. The processor 12 may also be configured to execute instructions to run a system firmware 50. As described above, the system firmware 50 may be a BIOS or a UEFI. By executing the instructions of the operating system 40, the processor 12 may also be configured to divide the non-volatile area 20 of the memory module 14 into a first non-volatile storage partition 22 assigned to the operating system 40 and a second non-volatile storage partition 24 assigned to the system firmware 50. In some embodiments, the processor 12 may be configured to divide the non-volatile area into more than two partitions. In such an embodiment, one or more additional partitions in addition to the first non-volatile storage partition 22 and the second non-volatile storage partition 24 may each be assigned to the operating system 40, the system firmware 50, or some other processes executed on the processor 12. In such an embodiment, the processor 12 may also be configured to run multiple operating systems 40. A corresponding partition may be assigned to each of the multiple operating systems 40.

[0017] By executing instructions of the operating system 40, the processor 12 may also be configured to write a globally unique identifier (GUID) 26 to the non-volatile area 20 of the memory module 14. The GUID 26 may indicate the location 44 of the boundary 68 between the first non-volatile storage partition 22 and the second non-volatile storage partition 24. In some embodiments, the GUID 26 may be written to a GUID partition table (GPT) of the non-volatile area 20. In other embodiments, the GUID 26 may be written to some other portion of the non-volatile area 20, as discussed in further detail below.

[0018] Figure 3 The non-volatile area 20 of the memory module 14 is shown in more detail according to an example embodiment. Figure 3 In the example of , GUID 26 is written to a shared storage area 56 , which is accessible to both operating system 40 and system firmware 50 . Figure 3 Also shown is a boundary 68 between the first non-volatile storage partition 22 and the second non-volatile storage partition 24. In addition to the GUID 26, the shared storage location 56 may indicate the location 44 of the boundary 68.

[0019] Figure 3 Also shown are a plurality of memory intervals 66 into which the non-volatile area 20 is divided. The processor 12 may also be configured to divide the non-volatile area 20 so that a boundary 68 between the first non-volatile storage partition 22 and the second non-volatile storage partition 24 is aligned with a memory interval 66 in the plurality of memory intervals 66. Each memory interval 66 may have a predetermined length. For example, the length of each memory interval 66 may be 4 kB. In some other embodiments, each memory interval 66 may have some other predetermined length, such as 2 kB or 8 kB.

[0020] In some embodiments, the processor 12 may also be configured to determine a first partition size 62 of the first non-volatile storage partition 22 and a second partition size 64 of the second non-volatile storage partition 24 based at least in part on the total size 60 of the non-volatile area 20 and the number of non-volatile storage drives 16 included in the memory module 14. For example, the processor 12 may be configured to set the first partition size 62 to be the total size 60 of the non-volatile area 20 divided by the number of non-volatile storage drives 16, rounded up to the nearest gigabyte. Alternatively, the first partition size 62 may be rounded down or rounded to some other size interval. The first partition size 62 and the second partition size 64 may be determined at the operating system 40. In some embodiments, the processor 12 may be configured to receive the total size 60 and the number of non-volatile storage drives 16 from the system firmware 50 at the operating system 40.

[0021] Back to Figure 1 , the processor 12 may be configured to partition the non-volatile region 20 of the memory module 14 at least in part by generating a non-volatile storage allocation table 52 indicating the GUID 26 and the location 44 of the boundary 68. In some embodiments, the non-volatile storage allocation table 52 may be a GPT. The non-volatile storage allocation table 52 may be generated by executing instructions of the system firmware 50. In embodiments where the non-volatile region 20 of the memory module 14 is partitioned into more than two partitions, the non-volatile storage allocation table 52 may indicate a plurality of GUIDs and a corresponding plurality of locations 44 of the boundary 68 between the partitions.

[0022] In embodiments where the non-volatile storage allocation table 52 is generated, the processor 12 may also be configured to transmit the non-volatile storage allocation table 52 to a system management mode driver 54 by executing instructions of the system firmware 50. The system management mode driver 54 may be included in the system firmware 50. The system management mode driver 54 may operate in a system management mode, which may be the highest level of management privileges on the computing device 10. By executing instructions of the system management mode driver 54, the processor 12 may also be configured to transmit the non-volatile storage allocation table 52 to the operating system 40. In some embodiments, the system management mode driver 54 may transmit the non-volatile storage allocation table 52 to the operating system 40 by writing the non-volatile storage allocation table 52 to a shared storage location 56. The processor 12 may then execute instructions of the operating system 40 to retrieve the non-volatile storage allocation table 52.

[0023] In some embodiments, the processor 12 may also be configured to execute instructions of a provisioning agent 70. The provisioning agent 70 may be a program launched by the processor 12 to create the first non-volatile storage partition 22 and the second non-volatile storage partition 24 after the GUID 26 has been written to the non-volatile area 20. In some embodiments, the provisioning agent 70 may be a software stack executed external to the system firmware 50. The provisioning agent 70 may, for example, be run during a boot process in which the computing device 10 is prepared for use as a server computing device in a cloud computing environment.

[0024] After the non-volatile area 20 is divided into the first non-volatile storage partition 22 and the second non-volatile storage partition 24, the processor 12 may also be configured to access the first non-volatile storage partition 22 at the operating system 40 by executing instructions of the operating system 40. The operating system 40 may be prevented from accessing the second non-volatile storage partition 24. In some embodiments, the processor 12 may be configured to determine which portions of the non-volatile area 20 are accessible to the operating system 40 and which portions are inaccessible to the operating system 40 at least in part by accessing the non-volatile storage allocation table 52.

[0025] By executing the instructions of the system firmware 50, the processor 12 may also be configured to determine the location 44 of the boundary 68 after the non-volatile area 20 has been divided into the first non-volatile storage partition 22 and the second non-volatile storage partition 24 and the GUID 26 has been written to the non-volatile area 20. In some embodiments, executing the instructions of the system firmware 50 to determine the location 44 of the boundary 68 may include querying the non-volatile storage allocation table 52. The processor 12 may also be configured to access the second non-volatile storage partition 24 in response to determining the location 44 of the boundary 68. The system firmware 50 may be prevented from accessing the first non-volatile storage partition 22. Therefore, the non-volatile area 20 may be divided into the first non-volatile storage partition 22 that can be accessed by the operating system 40 but not by the system firmware 50, and the second non-volatile storage partition 24 that can be accessed by the system firmware 50 but not by the operating system 40.

[0026] In some embodiments, by executing instructions of the system firmware 50, the processor 12 may be configured to determine the location 44 of the boundary 68 after the computing device 10 is rebooted after the GUID 26 has been written to the non-volatile area 20. Additionally or alternatively, by executing instructions of the system firmware 50, the processor 12 may also be configured to determine the location 44 of the boundary 68 in response to receiving a boundary location search instruction 42 from the operating system 40.

[0027] Figure 4An example timeline 100 is shown of steps that the processor 12 may perform by executing instructions of the system management mode driver 54, the operating system 40, and the provisioning agent 70 during provisioning of the non-volatile area 20 according to an example embodiment. At step 102, the processor 12 may be configured to boot into the system firmware 50. In the system firmware 50, the processor 12 may be configured to specify one or more non-volatile storage drives 16 as being included in the non-volatile area 20. At step 104, the processor 12 may also be configured to boot into the operating system 40. From the operating system 40, the processor 12 may also be configured to launch the provisioning agent 70 at step 106. For example, the processor 12 may launch the provisioning agent 70 in response to an instruction received from a user at the operating system 40 (e.g., at a graphical user interface).

[0028] At step 108, by executing the instructions of the provisioning agent 70, the processor 12 may also be configured to create the first non-volatile storage partition 22 and the second non-volatile storage partition 24. In some embodiments, the processor 12 may also be configured to generate one or more additional partitions by executing the instructions of the provisioning agent. After the first non-volatile storage partition 22 and the second non-volatile storage partition 24 have been created, the processor 12 may also be configured to perform a system reboot at step 110. When the processor 12 performs a system reboot, the processor 12 may also be configured to boot into the system firmware 50 again at step 112. The processor 12 may also be configured to determine the location 44 of the boundary 68 by executing the instructions of the system firmware 50, as described above. At step 114, the processor 12 may also be configured to boot into the operating system 40. When the processor 12 boots into the operating system 40 at step 114, the processor 12 may be configured to access the first non-volatile storage partition 22.

[0029] Back to Figure 1 , a volatile area 30 of the memory module 14 is shown. The volatile area 30 may include a first volatile memory partition 32 and a second volatile memory partition 34 of one or more volatile memory devices 18. In some embodiments, the processor 12 may also be configured to store a first backup 36 of the first volatile memory partition 32 in the first non-volatile memory partition 22. Additionally or alternatively, the processor 12 may also be configured to store a second backup 38 of the second volatile memory partition 34 in the second non-volatile memory partition 24. Therefore, the non-volatile area 20 of the memory module 14 may back up at least a portion of the data stored in the volatile area 30, so that the backup data persists across system reboots.

[0030] In an embodiment in which the non-volatile area 20 stores at least one of the first backup 36 of the first volatile memory partition 32 or the second backup 38 of the second volatile memory partition 34, the processor 12 may also be configured to determine that the first volatile memory partition 32 or the second volatile memory partition 34 has been erased. For example, the processor 12 may make this determination after the system is rebooted. In response to making this determination, the processor 12 may also be configured to restore the volatile memory partition from the corresponding backup of the erased volatile memory partition. Therefore, when the processor 12 determines that the first volatile memory partition 32 has been erased, the processor 12 may also be configured to load the first backup 36 into the volatile memory area 30. Similarly, when the processor 12 determines that the second volatile memory partition 34 has been erased, the processor 12 may also be configured to load the second backup 38 into the volatile memory area 30. When the volatile memory partition is restored from the backup, the processor 12 may write to the volatile memory area 30 the backup of the location where the volatile memory partition was before it was erased.

[0031] Figure 5 A flow chart of an example method 200 for a computing device to partition a non-volatile region of a memory module is shown. Figure 5 The computing device of method 200 may be Figure 1 The computing device 10 or some other computing device of the present invention. At step 202, the method 200 may include dividing a non-volatile area of ​​a memory module into a first non-volatile storage partition allocated to an operating system and a second non-volatile storage partition allocated to system firmware. For example, the memory module may be an NVDIMM. Step 202 may be performed by executing instructions of an operating system of a computing device in which the method 200 is performed.

[0032] At step 204, method 200 may further include writing a GUID to a non-volatile area of ​​the memory module. The GUID may indicate the location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition. Step 204 may be performed by executing instructions of an operating system. At step 206, method 200 may further include accessing the first non-volatile storage partition by executing instructions of the operating system. The first non-volatile storage partition may be accessed after booting into the operating system. The operating system may be blocked from accessing the second non-volatile storage partition.

[0033] Step 208 of method 200 may be performed by executing instructions of system firmware of the computing device. At step 208, method 200 may also include determining the location of the boundary in the non-volatile area of ​​the memory module. In some embodiments, by executing instructions of the system firmware, the location of the boundary may be determined after the computing device has been restarted after the non-volatile area has been written. Additionally or alternatively, by executing instructions of the system firmware, the location of the boundary in the non-volatile area may be determined in response to receiving a boundary location search instruction from an operating system.

[0034] At step 210, method 200 may also include accessing the second non-volatile storage partition in response to determining the location of the boundary by executing instructions of the system firmware. The system firmware may be blocked from accessing the first non-volatile storage partition. Therefore, the first non-volatile storage partition may be allocated to the operating system and the second non-volatile storage partition may be allocated to the system firmware.

[0035] In some embodiments, the non-volatile area of ​​the memory module can be divided into more than two partitions. In such an embodiment, each additional non-volatile storage partition other than the first non-volatile storage partition and the second non-volatile storage partition can be assigned to an operating system or system firmware. In some embodiments, multiple operating systems can be run on the computing device. In such an embodiment, each operating system in the multiple operating systems can be assigned a non-volatile storage partition.

[0036] Figure 6 Additional steps of method 200 that may be performed in some embodiments are shown. At step 212, method 200 may also include generating a non-volatile storage allocation table indicating the location of the GUID and the boundary. Step 212 may be performed as part of partitioning the non-volatile area of ​​the memory module at step 202. In some embodiments, the non-volatile storage allocation table may be stored in a shared storage location included in the non-volatile area of ​​the memory module. In an embodiment in which step 212 is performed, method 200 may also include transmitting the non-volatile storage allocation table to a system management mode driver at step 214. The non-volatile storage allocation table may be transmitted to the system management mode driver by executing instructions of the system firmware. At step 216, method 200 may also include transmitting the non-volatile storage allocation table to the operating system by executing instructions of the system management mode driver.

[0037] Figure 7 Additional steps of method 200 that may be performed in some embodiments are also shown. Figure 7The steps may be performed in an embodiment in which the memory module also includes a volatile area, and wherein the volatile area includes a first volatile memory partition and a second volatile memory partition of one or more volatile memory devices. At step 218, method 200 may also include storing a first backup of the first volatile memory partition in the first non-volatile storage partition. Additionally or alternatively, at step 220, method 200 may also include storing a second backup of the second volatile memory partition in the second non-volatile storage partition. In some embodiments, the volatile area of ​​the memory module may include more than two partitions. In such an embodiment, when the non-volatile area includes more than two non-volatile storage partitions, each volatile memory partition may be backed up on the corresponding non-volatile storage partition. Alternatively, one or more of the non-volatile storage partitions may store corresponding backups of multiple volatile memory partitions.

[0038] At step 222, method 200 may also include determining that the first volatile memory partition or the second volatile memory partition has been erased. For example, the volatile area may be erased during a system reboot. In response to the determination, method 200 may also include: at step 224, restoring the volatile memory partition from a corresponding backup of the erased volatile memory partition. Thus, data stored in the volatile area may be backed up in the non-volatile area and may be restored from the backup after at least a portion of the volatile area is erased.

[0039] Using the above-mentioned device and method, the non-volatile area of ​​the memory module can be partitioned between the operating system and the system firmware of the computing device. When the computing device is a server computing device in the process of being installed in a data center, generally, for security reasons, the drive will be reformatted before installation, which has the effect of deleting any partitions installed before that point. During the supply process, the system and method of this article enable components of the BIOS (such as, for non-volatile memory (i.e., NVDIMM memory) drivers) to scan non-volatile memory partitions. If no non-volatile memory partition is found, which will be true after the driver is reformatted for security reasons, the operating system uses the NVDIMM-specific GUID generated by the operating system to generate a partition for the GUID of the non-volatile memory, and stores it in the appropriate location as described above. Then, the server computing device can be rebooted, and in the subsequent boot process, the driver of the NVDIMM memory will scan for the partition, and find the partition of the GUID written by the operating system, and can send an arm operation to the NVDIMM to enable the save operation on the NVDIMM partitioned according to the partition definition of the GUID. In this manner, an operating system can be used to partition non-volatile memory in an NVDIMM, such as during server provisioning. Using this approach, a user installing a server computing device can avoid having to manually repartition memory modules after installation. Additionally, using the above-described apparatus and method, a user can select at the operating system where non-volatile storage partitions are created in the non-volatile area, enabling highly flexible and situation-specific partitioning by the user.

[0040] In some embodiments, the methods and processes described herein may be bound to a computing system of one or more computing devices. In particular, such methods and processes may be implemented as computer applications or services, application programming interfaces (APIs), libraries, and / or other computer program products.

[0041] Figure 8 A non-limiting embodiment of a computing system 300 is schematically shown, which can implement one or more of the above-described methods and processes. The computing system 300 is shown in simplified form. The computing system 300 can embody the above-described and Figure 1 The computing system 300 may take the form of one or more personal computers, server computers, tablet computers, home entertainment computers, network computing devices, gaming devices, mobile computing devices, mobile communication devices (e.g., smart phones), and / or other computing devices, as well as wearable computing devices (such as smart watches and head-mounted augmented reality devices).

[0042] The computing system 300 includes a logic processor 302, a volatile memory 304, and a non-volatile storage device 306. The computing system 300 may optionally include a display subsystem 308, an input subsystem 310, a communication subsystem 312, and / or Figure 8 Other components not shown.

[0043] Logical processor 302 includes one or more physical devices configured to execute instructions. For example, a logical processor may be configured to execute instructions that are part of one or more applications, programs, routines, libraries, objects, components, data structures, or other logical structures. Such instructions may be implemented to perform tasks, implement data types, transform the state of one or more components, achieve technical effects, or otherwise achieve desired results.

[0044] The logical processor may include one or more physical processors (hardware) configured to execute software instructions. Additionally or alternatively, the logical processor may include one or more hardware logic circuits or firmware devices configured to execute logic or firmware instructions implemented by hardware. The processor of the logical processor 302 may be single-core or multi-core, and the instructions executed thereon may be configured for sequential, parallel and / or distributed processing. The individual components of the logical processor may optionally be distributed among two or more separate devices, which may be located remotely and / or configured for collaborative processing. Various aspects of the logical processor may be virtualized and executed by a remotely accessible networked computing device configured in a cloud computing configuration. In such a case, it is understood that these virtualized aspects are run on different physical logical processors of various different machines.

[0045] The non-volatile storage device 306 includes one or more physical devices configured to hold instructions executable by a logical processor to implement the methods and processes described herein. When such methods and processes are implemented, the state of the non-volatile storage device 306 may be changed, for example, to hold different data.

[0046] The non-volatile storage device 306 may include removable and / or built-in physical devices. The non-volatile storage device 306 may include optical storage (e.g., CD, DVD, HD-DVD, Blu-Ray Disc, etc.), semiconductor storage (e.g., ROM, EPROM, EEPROM, FLASH memory, etc.), and / or magnetic storage (e.g., hard disk drive, floppy disk drive, tape drive, MRAM, etc.), or other mass storage device technology. The non-volatile storage device 306 may include a non-volatile, dynamic, static, read / write, read-only, sequential access, location addressable, file addressable, and / or content addressable device. It should be understood that the non-volatile storage device 306 is configured to save instructions even when power to the non-volatile storage device 306 is cut off.

[0047] Volatile memory 304 may include a physical device that includes random access memory. Volatile memory 304 is typically utilized by logical processor 302 to temporarily store information during the processing of software instructions. It should be understood that when power to volatile memory 304 is cut off, volatile memory 304 typically does not continue to store instructions.

[0048] Aspects of the logic processor 302, volatile memory 304, and non-volatile storage device 306 may be integrated together into one or more hardware logic components. For example, such hardware logic components may include field programmable gate arrays (FPGAs), program and application specific integrated circuits (PASIC / ASIC), program and application specific standard products (PSSP / ASSP), systems on chips (SOCs), and complex programmable logic devices (CPLDs).

[0049] The terms "module", "program", and "engine" may be used to describe aspects of the computing system 300 that are typically implemented in software by a processor to perform a specific function using a portion of volatile memory, the function of which involves a conversion process that specifically configures the processor to perform the function. Thus, a module, program, or engine may be instantiated via the logical processor 302 executing instructions held by the non-volatile storage device 306 using a portion of the volatile memory 304. It should be understood that different modules, programs, and / or engines may be instantiated from the same application, service, code block, object, library, routine, API, function, etc. Likewise, the same module, program, and / or engine may be instantiated by different applications, services, code blocks, objects, routines, APIs, functions, etc. The terms "module", "program", and "engine" may include individual or grouped executable files, data files, libraries, drivers, scripts, database records, etc.

[0050] When display subsystem 308 is included, display subsystem 308 can be used to present a visual representation of the data held by non-volatile storage device 306. The visual representation can take the form of a graphical user interface (GUI). Since the methods and processes described herein change the data held by the non-volatile storage device and thus transform the state of the non-volatile storage device, the state of the display subsystem 308 can likewise be transformed to visually represent the changes in the underlying data. Display subsystem 308 can include one or more display devices utilizing almost any type of technology. Such a display device can be combined with logical processor 302, volatile memory 304 and / or non-volatile storage device 306 in a shared housing, or such a display device can be a peripheral display device.

[0051] When the input subsystem 310 is included, the input subsystem 310 may include or interface with one or more user input devices, such as a keyboard, mouse, touch screen, or game controller. In some embodiments, the input subsystem may include or interface with selected natural user input (NUI) components. Such components may be integrated or peripheral, and the conversion and / or processing of input actions may be performed inside or outside the machine. Example NUI components may include microphones for speech and / or voice recognition; infrared, color, stereo and / or depth cameras for machine vision and / or gesture recognition; head trackers, eye trackers, accelerometers and / or gyroscopes for motion detection and / or intent recognition; and electric field sensing components for evaluating brain activity; and / or any other suitable sensors.

[0052] When the communication subsystem 312 is included, the communication subsystem 312 can be configured to communicatively couple the various computing devices described herein to each other, as well as to communicatively couple with other devices. The communication subsystem 312 may include wired and / or wireless communication devices compatible with one or more different communication protocols. As a non-limiting example, the communication subsystem may be configured to communicate via a wireless telephone network, or a wired or wireless local area network or wide area network (such as, HDMI connected via Wi-Fi). In some embodiments, the communication subsystem may allow the computing system 300 to send and / or receive messages to and / or from other devices via a network (such as, the Internet).

[0053] According to one aspect of the present disclosure, a computing device is provided, including a memory module and a processor. The processor may be configured to divide a non-volatile area of ​​the memory module into a first non-volatile storage partition assigned to the operating system and a second non-volatile storage partition assigned to the system firmware by executing instructions of the operating system. The processor may also be configured to write a globally unique identifier (GUID) to the non-volatile area of ​​the memory module. The GUID may indicate the location of the boundary between the first non-volatile storage partition and the second non-volatile storage partition. The processor may also be configured to access the first non-volatile storage partition. By executing instructions of the system firmware, the processor may also be configured to determine the location of the boundary. The processor may also be configured to: in response to determining the location of the boundary, access the second non-volatile storage partition. The operating system may be prevented from accessing the second non-volatile storage partition, and the system firmware may be prevented from accessing the first non-volatile storage partition.

[0054] According to this aspect, the memory module may be a non-volatile dual in-line memory module (NVDIMM).

[0055] According to this aspect, the processor may be configured to partition the non-volatile region of the memory module at least in part by generating a non-volatile storage allocation table including the GUID and the location of the boundary.

[0056] According to this aspect, the processor may be further configured to transmit the non-volatile storage allocation table to the system management mode driver by executing instructions of the system firmware. By executing instructions of the system management mode driver, the processor may be further configured to transmit the non-volatile storage allocation table to the operating system.

[0057] According to this aspect, by executing instructions of the system firmware, the processor may be configured to determine the location of the boundary after a reboot of the computing device after the GUID has been written to the non-volatile area.

[0058] According to this aspect, by executing instructions of the system firmware, the processor may be configured to determine the location of the boundary in response to receiving a boundary location search instruction from the operating system.

[0059] According to this aspect, the processor may be configured to partition the nonvolatile area such that a boundary between the first nonvolatile storage partition and the second nonvolatile storage partition is aligned with a memory interval of a plurality of memory intervals, each of which has a predetermined length.

[0060] According to this aspect, the memory module may also include a volatile area including a first volatile memory partition and a second volatile memory partition of one or more volatile memory devices.

[0061] According to this aspect, the processor may be further configured to store a first backup of the first volatile memory partition in the first non-volatile memory partition and to store a second backup of the second volatile memory partition in the second non-volatile memory partition.

[0062] According to this aspect, the processor may be further configured to determine that the first volatile memory partition or the second volatile memory partition has been erased. The processor may be further configured to restore the erased volatile memory partition from a corresponding backup of the volatile memory partition.

[0063] According to this aspect, the processor may be further configured to determine a first partition size of the first nonvolatile storage partition and a second partition size of the second nonvolatile storage partition based at least in part on the total size of the nonvolatile area and the number of nonvolatile storage drives included in the memory module.

[0064] According to another aspect of the present disclosure, a method for a computing device is provided. The method may include: by executing an instruction of an operating system, dividing a non-volatile area of ​​a memory module into a first non-volatile storage partition assigned to an operating system and a second non-volatile storage partition assigned to a system firmware. The method may also include writing a globally unique identifier (GUID) to the non-volatile area of ​​the memory module. The GUID indicates the location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition. The method may also include accessing the first non-volatile storage partition. The method may also include determining the location of the boundary by executing an instruction of the system firmware. The method may also include accessing the second non-volatile storage partition in response to determining the location of the boundary. The operating system may be prevented from accessing the second non-volatile storage partition, and the system firmware may be prevented from accessing the first non-volatile storage partition.

[0065] According to this aspect, the memory module may be a non-volatile dual in-line memory module (NVDIMM).

[0066] According to this aspect, partitioning the nonvolatile area of ​​the memory module may include generating a nonvolatile storage allocation table indicating the GUID and the boundary location.

[0067] According to this aspect, the method may further include: transmitting the non-volatile storage allocation table to a system management mode driver by executing instructions of the system firmware. The method may further include transmitting the non-volatile storage allocation table to an operating system by executing instructions of the system management mode driver.

[0068] According to this aspect, by executing instructions of the system firmware, the location of the boundary can be determined after the GUID has been written to the non-volatile area and after the computing device is rebooted.

[0069] According to this aspect, the nonvolatile area may be partitioned such that a boundary between a first nonvolatile storage partition and a second nonvolatile storage partition is aligned with a memory interval of a plurality of memory intervals, each of the plurality of memory intervals having a predetermined length.

[0070] According to this aspect, the memory module may also include a volatile area, the volatile area including a first volatile memory partition and a second volatile memory partition of one or more volatile memory devices. The method may also include storing a first backup of the first volatile memory partition in the first non-volatile memory partition. The method may also include storing a second backup of the second volatile memory partition in the second non-volatile memory partition.

[0071] According to this aspect, the method may further include determining that the first volatile memory partition or the second volatile memory partition has been erased. The method may further include restoring the erased volatile memory partition from a corresponding backup of the volatile memory partition.

[0072] According to another aspect of the present disclosure, a computing device is provided, including a non-volatile dual in-line memory module (NVDIMM) and a processor. The processor may be configured to divide the non-volatile area of ​​the NVDIMM into a first non-volatile storage partition assigned to the operating system and a second non-volatile storage partition assigned to the system firmware by executing instructions of the operating system. The processor may also be configured to write a globally unique identifier (GUID) to the non-volatile area of ​​the NVDIMM. The GUID may indicate the location of the boundary between the first non-volatile storage partition and the second non-volatile storage partition. The processor may also be configured to access the first non-volatile storage partition. The processor may also be configured to determine the location of the boundary after the reboot of the computing device after the GUID has been written to the non-volatile area by executing instructions of the system firmware. The processor may also be configured to access the second non-volatile storage partition in response to determining the location of the boundary. The operating system may be prevented from accessing the second non-volatile storage partition, and the system firmware may be prevented from accessing the first non-volatile storage partition.

[0073] It should be understood that the configuration and / or method described herein are exemplary in nature, and these specific embodiments or examples should not be considered as restrictive, because many variations are possible. Specific routines or methods described herein can represent one or more processing strategies in any number of processing strategies. Therefore, the illustrated and / or described various actions can be performed in the illustrated and / or described order, in other orders, in parallel or in an omitted manner. Equally, the order of the above-mentioned process can be changed.

[0074] The subject matter of the present disclosure includes all novel and nonobvious combinations and subcombinations of the various processes, systems and configurations, and other features, functions, acts, and / or properties disclosed herein, as well as any and all equivalents thereof.

Claims

1. A computing device, comprising: Memory module; as well as The processor is configured as: By executing instructions of an operating system during a first boot of the computing device: Dividing the non-volatile area of ​​the memory module into a first non-volatile storage partition and a second non-volatile storage partition, wherein the first non-volatile storage partition is allocated to the operating system and the second non-volatile storage partition is allocated to system firmware; writing a globally unique identifier GUID to the non-volatile area of ​​the memory module, wherein the GUID indicates the location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition; as well as accessing the first non-volatile storage partition; as well as By executing instructions of the system firmware during a second boot of the computing device: determining said location of said boundary; as well as In response to the system firmware determining the location of the boundary, accessing the second non-volatile storage partition based on the location of the boundary in the non-volatile area, wherein the operating system is prevented from accessing the second non-volatile storage partition and the system firmware is prevented from accessing the first non-volatile storage partition. 2 . The computing device of claim 1 , wherein the memory module is a non-volatile dual in-line memory module (NVDIMM).

3. The computing device of claim 1, wherein the processor is configured to partition the non-volatile region of the memory module at least in part by generating a non-volatile storage allocation table that includes the GUID and the location of the boundary.

4. The computing device of claim 3, wherein the processor is further configured to: By executing the instructions of the system firmware, transmitting the non-volatile storage allocation table to a system management mode driver included in the system firmware; and The non-volatile storage allocation table is transmitted to the operating system by executing the instructions of the system management mode driver.

5. The computing device of claim 1, wherein: By executing instructions of the system firmware, the processor is configured to determine the location of the boundary after a reboot of the computing device after the GUID has been written to the non-volatile area.

6. The computing device of claim 1, wherein: By executing instructions of the system firmware, the processor is configured to determine the location of the boundary in response to receiving a boundary location search instruction from the operating system.

7. The computing device of claim 1 , wherein the processor is configured to: divide the non-volatile area so that the boundary between the first non-volatile storage partition and the second non-volatile storage partition is aligned with a memory interval in a plurality of memory intervals, each of the plurality of memory intervals having a predetermined length.

8. The computing device of claim 1, wherein the memory module further comprises a volatile region comprising a first volatile memory partition and a second volatile memory partition of one or more volatile memory devices.

9. The computing device of claim 8, wherein the processor is further configured to: storing a first backup of the first volatile memory partition in the first non-volatile memory partition; and A second backup of the second volatile memory partition is stored in the second non-volatile memory partition.

10. The computing device of claim 9, wherein the processor is further configured to: determining that the first volatile memory partition or the second volatile memory partition has been erased; and The volatile memory partition that was erased is restored from its corresponding backup.

11. The computing device of claim 1 , wherein the processor is further configured to determine a first partition size of the first non-volatile storage partition and a second partition size of the second non-volatile storage partition based at least in part on a total size of the non-volatile area and a number of non-volatile storage drives included in the memory module.

12. A method for a computing device, the method comprising: By executing instructions of an operating system during a first boot of the computing device: Dividing a non-volatile area of ​​a memory module into a first non-volatile storage partition and a second non-volatile storage partition, wherein the first non-volatile storage partition is allocated to the operating system and the second non-volatile storage partition is allocated to system firmware; writing a globally unique identifier GUID to the non-volatile area of ​​the memory module, wherein the GUID indicates the location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition; as well as accessing the first non-volatile storage partition; as well as By executing, during a second boot of the computing device, instructions of the system firmware: determining said location of said boundary; as well as In response to the system firmware determining the location of the boundary, accessing the second non-volatile storage partition based on the location of the boundary in the non-volatile area, wherein the operating system is prevented from accessing the second non-volatile storage partition and the system firmware is prevented from accessing the first non-volatile storage partition.

13. The method of claim 12, wherein the memory module is a non-volatile dual in-line memory module (NVDIMM).

14. The method according to claim 12, wherein partitioning the non-volatile area of ​​the memory module comprises: A non-volatile storage allocation table is generated indicating the GUID and the location of the boundary.

15. The method according to claim 14, further comprising: Transmitting the non-volatile storage allocation table to a system management mode driver included in the system firmware by executing instructions of the system firmware; as well as The non-volatile storage allocation table is transmitted to the operating system by executing the instructions of the system management mode driver.

16. The method according to claim 12, wherein: The location of the boundary is determined after a reboot of the computing device, by executing instructions of the system firmware, after the GUID has been written to the non-volatile area.

17. The method of claim 12, wherein the nonvolatile area is divided such that a boundary between the first nonvolatile storage partition and the second nonvolatile storage partition is aligned with a memory interval of a plurality of memory intervals, each of the plurality of memory intervals having a predetermined length.

18. The method of claim 12, wherein the memory module further comprises a volatile area, the volatile area comprising a first volatile memory partition and a second volatile memory partition of one or more volatile memory devices, the method further comprising: storing a first backup of the first volatile memory partition in the first non-volatile memory partition; as well as A second backup of the second volatile memory partition is stored in the second non-volatile memory partition.

19. The method according to claim 18, further comprising: determining that the first volatile memory partition or the second volatile memory partition has been erased; as well as The volatile memory partition that was erased is restored from its corresponding backup.

20. A computing device comprising: Non-volatile dual in-line memory modules NVDIMM, and The processor is configured as: By executing instructions of an operating system during a first boot of the computing device: Dividing the non-volatile area of ​​the NVDIMM into a first non-volatile storage partition and a second non-volatile storage partition, wherein the first non-volatile storage partition is allocated to the operating system and the second non-volatile storage partition is allocated to system firmware; Writing a globally unique identifier GUID to the non-volatile area of ​​the NVDIMM, wherein the GUID indicates the location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition; as well as accessing the first non-volatile storage partition; as well as By executing instructions of the system firmware during a second boot of the computing device after a reboot of the computing device after the GUID has been written to the non-volatile area: determining said location of said boundary; as well as In response to the system firmware determining the location of the boundary, accessing the second non-volatile storage partition based on the location of the boundary in the non-volatile area, wherein the operating system is prevented from accessing the second non-volatile storage partition and the system firmware is prevented from accessing the first non-volatile storage partition.

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