A four-system navigation frequency conversion device compatible with Beidou III

Abstract

The invention discloses a four-system navigation frequency conversion device compatible with Beidou III, comprising a four-system navigation frequency conversion module compatible with Beidou III, the four-system navigation frequency conversion module comprising a channel multiplexing unit, a down-conversion unit, a frequency conversion unit, a transmission pre-amplification unit, a reference switching unit, an MCU unit and a power processing unit; the invention can solve the integration problem of multi-system and multi-frequency point simultaneous reception of satellite navigation signals, as well as the dynamic balance problem of high sensitivity and high linearity.

Description

Technical Field

[0001] The present invention relates to a four-system navigation frequency conversion device compatible with Beidou-3, belonging to the technical field of global navigation and positioning equipment. Background Art

[0002] The construction goal of the Beidou-3 satellite navigation system is to provide navigation and positioning services for military and civilian users in China and its surrounding areas, promote the application of satellite positioning, navigation, and timing service functions, meet the needs of weapon guidance, and meet the needs of navigation and positioning information exchange.

[0003] On June 23, 2020, the last global networking satellite of Beidou-3 successfully entered the predetermined orbit. The global networking of Beidou-3 was successfully completed. China has stepped up the development of comprehensive applications of Beidou-3 in multiple global scenarios. There is an urgent need to develop and manufacture a three-star combined positioning device for Beidou-3, GPS, and GLONASS, which involves the compatibility problem of simultaneously receiving satellite navigation signals with multiple systems and multiple frequency points. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a four-system navigation frequency conversion device compatible with Beidou-3, which can solve the compatibility problem of simultaneously receiving satellite navigation signals with multiple systems and multiple frequency points, and at the same time provide a radio frequency solution based on a Beidou-3 radio frequency chip that takes into account high sensitivity and high anti-interference performance.

[0005] To solve the above technical problems, the technical solution adopted by the present invention is:

[0006] A four-system navigation frequency conversion device compatible with Beidou-3 includes a four-system navigation frequency conversion module compatible with Beidou-3. The four-system navigation frequency conversion module includes a channel multiplexing unit, a down-conversion unit, a frequency conversion unit, a transmission pre-amplification unit, a reference switching unit, an MCU unit, and a power supply processing unit;

[0007] The radio frequency signal received by the active antenna enters the module through the RFIN port, is divided and filtered into seven radio frequency signals by the channel multiplexing unit, and is respectively input to the down-conversion unit and the frequency conversion unit for down-conversion into intermediate frequency signals for output. At the same time, the down-conversion unit outputs a sampling clock signal SAMPCLK_out; the digital intermediate frequency BPSK signal is input to the frequency conversion unit for carrier modulation and then outputs a radio frequency signal, which is filtered and amplified by the transmission pre-amplification unit and then output from the RFOUT port to an external active antenna for amplification and transmission; the reference switching unit internally has a 10MHz reference clock source, receives an externally input 10MHz reference clock, automatically switches using a detector built in the module, and at the same time outputs a 10MHz reference signal;

[0008] The MCU unit can configure the power-on default state of the configurable module. At the same time, it can dynamically control the down-conversion unit, frequency conversion unit, and transmit pre-amplification unit to realize the AGC and fixed gain switching, fixed gain adjustment, sampling clock frequency adjustment, transmit frequency point switching and frequency fine-tuning, transmit power adjustment, and parameter configuration function of RF chip reset for each receiving channel. The power supply processing unit synthesizes multiple power supply chips to generate multiple independent power supplies, reducing the product power consumption while avoiding signal crosstalk through the power supply. At the same time, it feeds out the required power supply for the RFIN and RFOUT ports.

[0009] A further improvement of the technical solution of the present invention lies in that: the circuit diagram of the channel multiplexing unit includes a limiter U88, a single-chip amplifier U87, a multiplexer U65, a four-way splitter U11, two-way splitters U86 and U30, surface acoustic wave filters F1, F5, F2, F6, F3, F4, and a dielectric filter U66; the model of the limiter U88 is CLA4610_085LF, the model of the single-chip amplifier U87 is PMA3-83LN+, the model of the multiplexer U65 is DP2012, the model of the four-way splitter U11 is SCA-4-20+, the models of the two-way splitters U86 and U30 are GP2S1+, the models of the surface acoustic wave filters F1, F5, F2, F6, F3, F4 are SF9016, TA0675A, TA0582A, TA0490A, TA0862A, TA1442A respectively, and the model of the dielectric filter U66 is DFC1575P50A8;

[0010] Pin 1 of the limiter U88 is connected to the first end of C550. The second end of C550 is divided into two paths, one connecting to the RFIN port and the negative pole of D10 respectively, and the positive pole of D10 is grounded; Pin 2 of the limiter U88 is grounded. Pin 3 of the limiter U88 is connected to the first end of C734. The second end of C734 is divided into two paths, one connecting to L44 and then grounded, and the other connecting to pin 2 of the single-chip amplifier U87. Pins 0, 1, 3, 4, 5, 6, 7, 9, 10, 11, 12 of the single-chip amplifier U87 are grounded. Pin 8 of the single-chip amplifier U87 is divided into two paths, one connecting to the first end of L43. The second end of L43 is connected to the first ends of C210 and C211, and the second ends of C210 and C211 are grounded. The other path is connected to the first end of C213. The second end of C213 is connected to pin 5 of the multiplexer U65. Pins 2, 4, 6 of the multiplexer U65 are grounded. Pin 1 of the multiplexer U65 is connected to pin 2 of the surface acoustic wave filter F4. Pins 1, 3, 4, 6 of the surface acoustic wave filter F4 are grounded. Pin 5 of the surface acoustic wave filter F4 outputs the radio frequency signal S1 into the frequency conversion unit. Pin 3 of the multiplexer U65 is connected to pin 3 of the four-way splitter U11. Pins 1, 2, 4, 5, 8 of the four-way splitter U11 are grounded. Pin 6 of the four-way splitter U11 is connected to pin 1 of the dielectric filter U66. Pins 3, 4, 5, 6, 7 of the dielectric filter U66 are grounded. Pin 2 of the dielectric filter U66 outputs the radio frequency signal B1_1 into the frequency conversion unit. Pin 7 of U11 is connected to pin 2 of the surface acoustic wave filter F3. Pins 1, 3, 4, 6 of F3 are grounded. Pin 5 of F3 outputs the radio frequency signal B3_1 into the frequency conversion unit. Pin 9 of U11 is connected to pin 2 of the two-way splitter U30. Pins 0, 1, 3, 4, 5, 6, 8, 10, 11, 12 of U30 are grounded. Pin 7 of U30 is connected to pin 2 of the surface acoustic wave filter F6. Pins 1, 3, 4, 6 of F6 are grounded. Pin 5 of F6 outputs the signal L2C into the frequency conversion unit. Pin 9 of U30 is connected to pin 2 of the surface acoustic wave filter F2. Pins 1, 3, 4, 6 of F2 are grounded. The radio frequency signal B2b output from pin 5 of F2 enters the down-conversion unit. Pin 10 of U11 is connected to pin 2 of the two-way splitter U86. Pins 0, 1, 3, 4, 5, 6, 8, 10, 11, 12 of U86 are grounded. Pin 7 of U86 is connected to pin 2 of the surface acoustic wave filter F5. Pins 1, 3, 4, 6 of F5 are grounded. Pin 5 of F5 outputs the radio frequency signal B2a into the down-conversion unit. Pin 9 of U86 is connected to pin 2 of the surface acoustic wave filter F1. Pins 1, 3, 4, 6 of F1 are grounded. Pin 5 of F1 outputs the radio frequency signal GLONASS into the down-conversion unit.

[0011] A further improvement of the technical solution of the present invention lies in that: the down-conversion unit includes a radio frequency chip U7, and video amplifiers U1, U2, and U4. The model of the radio frequency chip U7 is RX3701, and the models of the video amplifiers U1, U2, and U4 are MAAX4444ESE+;

[0012] The radio frequency signal B2b output from the channel multiplexing unit is connected to the first end of C33. The second end of C33 is respectively connected to the first ends of C35 and L6. The second end of C35 is grounded. The second end of L6 is respectively connected to the first end of C36 and the pin 79 of the radio frequency chip U7. The second end of C36 is grounded; the pin 74 of the radio frequency chip U7 is connected to the first end of C38. The second end of C38 outputs the signal B2b_I_P. The pin 75 of the radio frequency chip U7 is connected to the first end of C37. The second end of C37 outputs the signal B2b_I_N. The signal B2b_I_N is connected to the first end of R13. The second end of R13 is connected to the pin 3 of the video amplifier U2. The signal B2b_I_P is connected to the first end of R22. The second end of R22 is connected to the pin 7 of the video amplifier U2. The pin 15 of the video amplifier U2 is connected to the first end of R8. The second end of R8 is connected to the first end of C13. The second end of C13 outputs the intermediate frequency signal B2b_IF of B2b;

[0013] The radio frequency signal GLONASS output from the channel multiplexing unit is connected to the first end of C51. The second end of C51 is respectively connected to the first ends of C53 and L7. The second end of C53 is grounded. The second end of L7 is respectively connected to the first end of C54 and the pin 9 of the radio frequency chip U7. The second end of C54 is grounded; the pin 69 of the radio frequency chip U7 is connected to the first end of C40. The second end of C40 outputs the signal GLO_I_P. The pin 70 of the radio frequency chip U7 is connected to the first end of C39. The second end of C39 outputs the signal GLO_I_N. GLO_I_N is connected to the first end of R6. The second end of R6 is respectively connected to the first end of R4 and the pin 3 of the video amplifier U1. The second end of R4 is grounded. The signal GLO_I_P is connected to the first end of R14. The second end of R14 is respectively connected to the second end of R21 and the pin 6 of U1. The second end of R21 is grounded. The pin 15 of the video amplifier U1 is respectively connected to the first ends of R9 and R5. The second end of R9 is grounded. The second end of R5 is respectively connected to the first ends of C7 and R11. The second end of R11 is grounded. The second end of C7 is respectively connected to the negative electrode of D1 and outputs the intermediate frequency signal GLO_IF of B2b. The positive electrode of D1 is grounded;

[0014] The radio frequency signal B2a output from the channel multiplexing unit is connected to the first end of C62. The second end of C62 is respectively connected to the first ends of C66 and L8. The second end of C66 is grounded. The second end of L8 is respectively connected to the first end of C67 and pin 15 of the radio frequency chip U7. The second end of C67 is grounded. Pin 64 of the radio frequency chip U7 is connected to the first end of C42. The second end of C42 outputs the signal B2a_I_P. Pin 65 of the radio frequency chip U7 is connected to the first end of C41. The second end of C41 outputs the signal B2a_I_N. The signal B2a_I_N is connected to the first end of R17. The second end of R17 is respectively connected to the first end of R12 and pin 3 of the video amplifier U4. The second end of R12 is grounded. The signal B2b_I_P is connected to the first end of R26. The second end of R26 is respectively connected to the second end of R28 and pin 6 of U4. The second end of R28 is grounded. Pin 15 of the video amplifier U4 is respectively connected to the first ends of R24 and R16. The second end of R24 is grounded. The second end of R16 is respectively connected to the first ends of C14 and R25. The second end of R25 is grounded. The second end of C14 is respectively connected to the first end of D7 and the intermediate frequency signal B2b_IF of the output B2a. The second end of D7 is grounded;

[0015] The radio frequency signal L2C output from the channel multiplexing unit is connected to the first end of C692. The second end of C62 is respectively connected to the first ends of C695 and L59. The second end of C695 is grounded. The second end of L59 is respectively connected to the first end of C696 and pin 22 of the radio frequency chip U7. The second end of C696 is grounded. Pin 59 of the radio frequency chip U7 is connected to the first end of C672. The second end of C672 outputs the signal L2C_I_P. Pin 60 of the radio frequency chip U7 is connected to the first end of C668. The second end of C668 outputs the signal L2C_I_N. L2C_I_N is connected to the first end of R350. The second end of R350 is respectively connected to the first end of R346 and pin 3 of the video amplifier U96. The second end of R346 is grounded. L2C_I_P is connected to the first end of R358. The second end of R358 is respectively connected to the second end of R360 and pin 6 of U96. The second end of R360 is grounded. Pin 15 of the video amplifier U96 is respectively connected to the first ends of R356 and R349. The second end of R356 is grounded. The second end of R349 is respectively connected to the first ends of C476 and R357. The second end of R357 is grounded. The second end of C476 is respectively connected to the first end of D31 and the intermediate frequency signal L2C_IF of the output L2C. The second end of D31 is grounded.

[0016] A further improvement of the technical solution of the present invention lies in that: the frequency conversion unit includes controllable attenuators U12, U13, U14, a radio frequency chip U98, and video amplifiers U16, U19, U24, U25. The models of the controllable attenuators U12, U13, U14 are HMC540LP3, the model of the radio frequency chip U98 is RX3701, and the models of the video amplifiers U16, U19, U24, U25 are MAAX4444ESE+;

[0017] The radio frequency signal B3_1 output from the channel multiplexing unit is connected to the first end of C91. The second end of C91 is connected to the pin 2 of the controllable attenuator U12. The pin 11 of U12 is connected to the first end of C90. The second end of C90 is connected to the first end of C553. The second end of C553 is respectively connected to the first ends of L53 and C558. The second end of C558 is grounded. The second end of L53 is respectively connected to the first end of C562 and the pin 79 of the radio frequency chip U98. The second end of C562 is grounded; the pin 75 of U98 is connected to the first end of C571. The second end of C571 outputs the signal B3_I_N. The pin 74 of U98 is connected to the first end of C663. The second end of C663 outputs the signal B3_I_P. The signal B3_I_N is connected to the first end of R88. The second end of R88 is respectively connected to the first end of R78 and the pin 3 of the video amplifier U19. The second end of R78 is grounded. The signal B3_I_P is connected to the first end of R96. The second end of R96 is respectively connected to the second end of R100 and the pin 6 of U19. The second end of R100 is grounded. The pin 15 of the video amplifier U19 is respectively connected to the first ends of R92 and R79. The second end of R92 is grounded. The second end of R79 is respectively connected to the first ends of C138 and R94. The second end of R94 is grounded. The second end of C138 is respectively connected to the first end of D17 and the intermediate frequency signal B3_IF of the output B3. The second end of D17 is grounded;

[0018] The radio frequency signal B1_1 output from the channel multiplexing unit is connected to the first end of C102. The second end of C102 is connected to pin 2 of the controllable attenuator U13. Pin 11 of U13 is connected to the first end of C101. The second end of C101 is connected to the first end of C683. The second end of C683 is respectively connected to the first ends of L56 and C685. The second end of C685 is grounded. The second end of L56 is respectively connected to the first end of C686 and pin 9 of the radio frequency chip U98. The second end of C686 is grounded; Pin 70 of U98 is connected to the first end of C664. The second end of C664 outputs the signal B1_I_N. Pin 69 of U98 is connected to the first end of C667. The second end of C667 outputs the signal B1_I_P. Pin 68 of U98 is connected to the first end of C129. The second end of C129 outputs the signal B1_Q_N. Pin 67 of U98 is connected to the first end of C130. The second end of C130 outputs the signal B1_Q_P. The signal B1_Q_N is connected to the first end of R77. The second end of R77 is respectively connected to the first end of R75 and pin 3 of the video amplifier U16. The second end of R75 is grounded. The signal B1_Q_P is connected to the first end of R89. The second end of R89 is respectively connected to the second end of R95 and pin 6 of U16. The second end of R95 is grounded. Pin 15 of the video amplifier U16 is respectively connected to the first ends of R80 and R76. The second end of R80 is grounded. The second end of R76 is respectively connected to the first ends of C137 and R83. The second end of R83 is grounded. The second end of C137 is respectively connected to the first end of D16 and the intermediate frequency signal B1Q_IF outputting B1Q. The second end of D16 is grounded. The signal B1_I_N is connected to the first end of R109. The second end of R109 is respectively connected to the first end of R107 and pin 3 of the video amplifier U25. The second end of R107 is grounded. The signal B1_I_P is connected to the first end of R112. The second end of R112 is respectively connected to the second end of R113 and pin 6 of U25. The second end of R113 is grounded. Pin 15 of the video amplifier U25 is respectively connected to the first ends of R110 and R108. The second end of R110 is grounded. The second end of R108 is respectively connected to the first ends of C148 and R111. The second end of R111 is grounded. The second end of C148 is respectively connected to the first end of D28 and the intermediate frequency signal B1I_IF outputting B1I. The second end of D28 is grounded;

[0019] The radio frequency signal S_1 output from the channel multiplexing unit is connected to the first end of C115. The second end of C115 is connected to pin 2 of the controllable attenuator U14. Pin 11 of U14 is connected to the first end of C114. The second end of C114 is connected to the first end of C692. The second end of C692 is respectively connected to the first ends of L59 and C695. The second end of C695 is grounded. The second end of L59 is respectively connected to the first end of C696 and pin 22 of the radio frequency chip U98. The second end of C696 is grounded. Pin 60 of U98 is connected to the first end of C131. The second end of C131 outputs the signal S_I_N. Pin 59 of U98 is connected to the first end of C132. The second end of C132 outputs the signal S_I_P. The signal S_I_N is connected to the first end of R91. The second end of R91 is respectively connected to the first end of R87 and pin 3 of the video amplifier U24. The second end of R87 is grounded. The signal S_I_P is connected to the first end of R99. The second end of R99 is respectively connected to the second end of R101 and pin 6 of U24. The second end of R101 is grounded. Pin 15 of the video amplifier U24 is respectively connected to the first ends of R97 and R90. The second end of R97 is grounded. The second end of R90 is respectively connected to the first ends of C139 and R98. The second end of R98 is grounded. The second end of C139 is respectively connected to the first end of D18 and the intermediate frequency signal S_IF output at S. The second end of D18 is grounded.

[0020] A further improvement of the technical solution of the present invention lies in that: the transmission pre-amplification unit includes a filter U18, a low-noise monolithic amplifier U17, a digital control attenuator U20, a temperature compensation attenuator U21, and a surface acoustic wave filter U22. The model of the filter U18 is LFCN-2000D+. The model of the low-noise monolithic amplifier U17 is SPF-5043Z. The model of the digital control attenuator U20 is PE43711B-Z. The model of the temperature compensation attenuator U21 is STCA0603N9. The model of the surface acoustic wave filter U22 is SF9074;

[0021] The transmitted signals output by the frequency conversion unit are respectively connected to the negative electrode of D33 and the first end of C165. The positive electrode of D33 is grounded. The second end of C165 is respectively connected to the first ends of R18 and R15. The second end of R15 is grounded. The second end of R18 is respectively connected to the first ends of R93, R10 and R71. The second end of R93 is grounded. The second ends of R10 and R7 are connected to pin 3 of filter U18. Pins 2 and 4 of U18 are grounded. Pin 1 of U18 is connected to the first end of C699. The second end of C699 is connected to pin 1 of low-noise monolithic amplifier U17. Pins 2 and 4 of U17 are grounded. Pin 3 of U17 is connected to the first end of C702. The second end of C702 is connected to pin 14 of digital control attenuator U20. Pin 5 of U20 is connected to the first end of C190. The second end of C190 is connected to pin 2 of temperature compensation attenuator U21. Pin 3 of U21 is grounded. Pin 1 of U21 is connected to the first end of C197. The second end of C197 is connected to pin 5 of U22. Pins 1, 3, 4, 6 of U22 are grounded. Pin 2 of U22 is connected to the first end of C715. The second end of C715 outputs the transmitted signal.

[0022] A further improvement of the technical solution of the present invention lies in that: the reference switching unit includes operational amplifier U4, single-channel input NOT gate U41, U43, single-channel low-voltage comparator U42, single-pole double-throw switch U46, crystal oscillator U52. The model of operational amplifier U4 is OPA695IDBV. The models of single-channel input NOT gates U41 and U43 are SN74AHC1G04DBVR. The model of single-channel low-voltage comparator U42 is LMV331DBVR. The model of single-pole double-throw switch U46 is HMC194MS8ETR. The model of crystal oscillator U52 is RTX7050A10M;

[0023] Pin 5 of crystal oscillator U52 is connected to the first end of C433. The second end of C433 outputs 10MHz-N and is connected to pin 8 of U46. The 10M-IN signal is respectively connected to the negative electrode of D3 and the first end of C357. The positive electrode of D3 is grounded. The second end of C357 is respectively connected to the first ends of R187 and R174 and pin 3 of U4. The second end of R187 is grounded. The second end of R174 is connected to pin 6 of U4. Pin 1 of U4 is respectively connected to the first ends of C351, C346 and R177. The second end of R177 is connected to pin 4 of U4. The second ends of C351 and C346 are connected to the first end of R173. The second end of R173 is connected to the first end of C350. The second end of C350 is respectively connected to the first ends of R175 and C345. The second end of R175 outputs 10MHz-Y. 10MHz-Y is connected to the first end of C372. The second end of C372 is connected to pin 5 of U46;

[0024] The second end of C345 is respectively connected to the first end of R172 and pin 2 of U41. The second end of R172 is grounded. Pin 4 of U41 is connected to the first end of C347. The second end of C347 is connected to the first end of R170. The second end of R170 is respectively connected to the first end of L75 and the positive electrode of D2. The second end of L75 is grounded. The negative electrode of D2 is respectively connected to the first ends of C342, R166 and pin 1 of U42. The second ends of C342 and R166 are grounded. Pin 4 of U42 is respectively connected to pin 2 of U46 and pin 1 of U43. Pin 4 of U43 is connected to pin 1 of U46. Pin 3 of U46 is connected to the first end of C382. The second end of C382 is respectively connected to the first end of R215 and pin 2 of U48. The second end of R215 is grounded. Pin 4 of U48 is connected to the first end of C381. The second end of C381 is respectively connected to the first ends of L77 and C376. The second end of C376 is grounded. The second end of L77 is respectively connected to the first ends of C375 and L76. The second end of C375 is grounded. The second end of L76 is respectively connected to the first ends of C374 and R218. The second end of C374 is grounded. The second end of R218 is connected to the first end of C380. The second end of C380 outputs a 10 MHz reference signal.

[0025] A further improvement of the technical solution of the present invention lies in that: the MCU unit includes a voltage monitor U45 and a single-chip microcomputer U44. The model of the voltage monitor U45 is IMP811, and the model of the single-chip microcomputer U44 is C8051F410-GQ;

[0026] Pin 2 of the single-chip microcomputer U44 is respectively connected to the first ends of R199 and R196. The second end of R199 is connected to C2CK. The second end of R196 is respectively connected to the first end of R198 and pin 2 of U45. The second end of R198 is grounded. Pin 17 of the single-chip microcomputer U44 is connected to the first end of R205. The second end of R205 inputs the signal SCLK. Pin 18 of the single-chip microcomputer U44 is connected to the first end of R204. The second end of R204 outputs the MISO signal. Pin 19 of the single-chip microcomputer U44 is connected to the first end of R203. The second end of R203 inputs the signal MISO. Pin 20 of the single-chip microcomputer U44 is connected to the first end of R202. The second end of R202 inputs the signal CS. Pin 21 of the single-chip microcomputer U44 is connected to the first end of R200. The second end of R200 is connected to the TX signal. Pin 22 of the single-chip microcomputer U44 is connected to the first end of R197. The second end of R197 is connected to the RX signal. Pin 32 of the single-chip microcomputer U44 is connected to the first end of R191. The second end of R191 is connected to the C2D signal.

[0027] A further improvement of the technical solution of the present invention lies in that: the power supply processing unit includes an overvoltage protector U85, a switching regulator U57, and a voltage regulator U3. The model of the overvoltage protector U85 is MAX14586, the model of the switching regulator U57 is TPS6213, and the model of the voltage regulator U3 is LT3045EDD;

[0028] The electrical signal VIN is respectively connected to the negative electrode of D8 and the positive electrode of D6. The positive electrode of D8 is grounded. The negative electrode of D6 is respectively connected to the positive electrode of C526, the first ends of C195 and R212, and pins 1 and 2 of U85. The negative electrode of C526 and the second end of C195 are grounded. The second end of R212 is respectively connected to pin 3 of U85 and the first end of R213. The second end of R213 is grounded; Pins 7 and 8 of U85 are connected to the first ends of C192 and L89. The second end of C192 is grounded. The second end of L89 is respectively connected to the positive electrode of C511, the first end of C512, and pins 10, 11, and 12 of U57. The negative electrode of C511 and the second end of C512 are grounded. Pins 1, 2, and 3 of U57 are connected to the first end of L90. The second end of L90 is respectively connected to pin 14 of U57, the first ends of R240 and R239, the positive electrode of C513, the first end of C10, and pins 1, 2, and 3 of U3. The second end of R240 is connected to pin 4 of U57. The second end of R239 is connected to the first end of R238 and pin 5 of U57. The second end of R238 is grounded. The negative electrode of C513 and the second end of C10 are grounded. Pins 9 and 10 of U3 are respectively connected to the first ends of C11, C12, and R30. The second ends of C11 and C12 are grounded. The second end of R30 is respectively connected to pin 6 of U3 and the first end of R29. The second end of R29 is grounded. Pins 9 and 10 of U3 output +5V.

[0029] Due to the adoption of the above technical solution, the technical progress achieved by the present invention is:

[0030] 1. The GNSS four-system navigation frequency conversion module compatible with Beidou-3 RNSS / RDSS system, GPS and GLONASS provided by the present invention includes the reception of navigation signals of B1A / C / I, B2a, B2b, B3 of Beidou-3 RNSS, S of Beidou-3 RDSS, G1 of GLONASS and L2C of GPS. At the same time, it includes the transmitting frequency point chips of Beidou-3 RDSS L LF0-LF5. It has a high degree of technical integration, integrating multi-system and multi-frequency navigation reception and Beidou-3 transmitting signals. By using multi-carrier modulation and demodulation, and through rigorous calculation, the intermodulation components do not affect the reception performance of each frequency point. Using Beidou-3, GPS and GLONASS satellite systems for navigation positioning is convenient and fast, and the overall machine integration is improved. It solves the compatibility problem of receiving satellite navigation signals from multiple systems and multiple frequency points simultaneously, and at the same time provides a radio frequency solution based on Beidou-3 radio frequency chips that takes into account both high sensitivity and high anti-interference performance. It can adapt to active antennas with various gains or adapt to various application cable losses to meet the requirements of various application environments. At the same time, it supports automatic identification and switching of internal and external references and supports one-way reference output to solve the problem of multi-device same-source. It adopts an efficient power supply scheme to minimize power consumption on the premise of ensuring performance.

[0031] 2. The navigation radio frequency signals of Beidou-3, GPS and GLONASS of the present invention are combined and input from the RFin interface, first amplified by a low-noise amplifier, and then divided into 7 radio frequency signals by a power divider. After being filtered by the band-pass filters of each frequency point, they are input to the radio frequency chip. After being mixed and amplified by the radio frequency chip and amplified by the intermediate-frequency operational amplifier, they are output to the external baseband processing unit. Among them, for the B1 frequency point (1575.42MHz ± 16.368MHz) of Beidou-3, due to the relatively wide frequency band and considering the usage scenario requirements with a sampling clock of only 62MHz, in order to meet the sampling theorem and avoid spectral aliasing, a radio frequency chip supporting I / Q demodulation is used to output two orthogonal differential intermediate-frequency signals (2.42MHz ± 16.368MHz) of I / Q. After being amplified and impedance-converted by the intermediate-frequency operational amplifier, two orthogonal single-ended signals of I / Q are output, and the amplitude-phase consistency of the two I / Q channels meets the usage requirements.

[0032] 3. The MCU unit of the present invention can control the digital controlled attenuator and the gain of the radio frequency chip through the SPI interface, comprehensively calculate and balance indicators such as noise figure, output 1dB compression point, output third-order intermodulation point, channel gain, user AD full-scale voltage, and AD least significant bit, taking into account both high-sensitivity applications and high anti-interference performance, and adapting to various external cables and external active antennas. The receiving channel supports a flexible function of dynamically adjustable link gain.

[0033] 4. The MCU unit of the present invention can configure the RF chip and the digital control attenuator through SPI, realize the frequency point switching of lf0 to lf5, and can meet the short message up-conversion transmission function in multiple fields in various regions of the world. It can realize the frequency fine-tuning function of lf0 to lf5 to meet the frequency compensation requirements of satellite Doppler frequency offset and crystal oscillator aging frequency offset. It can dynamically adjust the transmission output power to adapt to a variety of external cables and external active antennas, reduce the restrictions on the use environment, improve the adaptability of applications, and realize multi-scenario and multi-demand applications.

[0034] 5. Support automatic identification and switching between internal and external references. The detector can automatically detect whether there is an external reference input. If there is an external reference clock input, the internal reference is cut off, and at the same time, it supports one-way reference clock output. It can meet the requirement of clock synchronization of multiple devices in the system, or users can select the reference clock that meets their expectations.

[0035] 6. The components such as the RF chip, RF amplifier, and intermediate frequency amplifier selected in the present invention take into account both performance and power consumption indicators. At the same time, the power supply processing network tries to improve the voltage conversion efficiency to ensure the engineering requirements of high performance and low power consumption of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is the principle block diagram of the present invention;

[0037] Figure 2 is the circuit connection diagram of the channel multiplexing unit of the present invention;

[0038] Figure 3 is the circuit connection diagram of the down-conversion unit of the present invention;

[0039] Figure 4 is the circuit connection diagram of the frequency conversion unit of the present invention;

[0040] Figure 5 is the circuit connection diagram of the transmit pre-amplification unit of the present invention;

[0041] Figure 6 is the circuit connection diagram of the reference switching unit of the present invention;

[0042] Figure 7 is the circuit connection diagram of the MCU unit of the present invention;

[0043] Figure 8 is the circuit connection diagram of the power supply processing unit of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0044] The present invention will be further described in detail below with reference to the embodiments:

[0045] As Figure 1As shown in the figure, a four-system navigation frequency conversion device compatible with Beidou-3 includes a four-system navigation frequency conversion module compatible with Beidou-3. The four-system navigation frequency conversion module includes a channel multiplexing unit, a down-conversion unit, a frequency conversion unit, a transmit pre-amplification unit, a reference switching unit, an MCU unit, and a power supply processing unit;

[0046] The RF signal received by the active antenna enters the module through the RFIN port, and is divided and filtered into seven RF signals by the channel multiplexing unit, and is respectively input to the down-conversion unit and the frequency conversion unit for down-conversion into intermediate frequency signals for output. At the same time, the down-conversion unit outputs a sampling clock signal SAMPCLK_out; the digital intermediate frequency BPSK signal is input to the frequency conversion unit for carrier modulation and then outputs an RF signal, which is filtered and amplified by the transmit pre-amplification unit and then output from the RFOUT port to the external active antenna for amplification and transmission; the reference switching unit has a built-in 10MHz reference clock source, receives the externally input 10MHz reference clock, automatically switches using the built-in detector of the module, and outputs a 10MHz reference signal at the same time;

[0047] The MCU unit can configure the default power-on state of the module, and can dynamically control the down-conversion unit, the frequency conversion unit, and the transmit pre-amplification unit to realize the parameter configuration functions of AGC and fixed gain switching and fixed gain adjustment of each receiving channel, sampling clock frequency adjustment, transmit frequency point switching and frequency fine-tuning, transmit power adjustment, and reset of the RF chip; the power supply processing unit synthesizes multiple power supply chips to generate multiple independent power supplies, reduces the product power consumption while avoiding signal crosstalk through the power supply, and feeds out the required power supply for the RFIN and RFOUT ports at the same time.

[0048] As Figure 2 shown in the figure, the circuit diagram of the channel multiplexing unit includes a limiter U88, a single-chip amplifier U87, a multiplexer U65, a four-way power divider U11, two-way power dividers U86 and U30, surface acoustic wave filters F1, F5, F2, F6, F3, F4, and a dielectric filter U66; the model of the limiter U88 is CLA4610_085LF, the model of the single-chip amplifier U87 is PMA3-83LN+, the model of the multiplexer U65 is DP2012, the model of the four-way power divider U11 is SCA-4-20+, the models of the two-way power dividers U86 and U30 are GP2S1+, the models of the surface acoustic wave filters F1, F5, F2, F6, F3, F4 are SF9016, TA0675A, TA0582A, TA0490A, TA0862A, TA1442A respectively, and the model of the dielectric filter U66 is DFC1575P50A8;

[0049] Pin 1 of limiter U88 is connected to the first end of C550. The second end of C550 is divided into two paths and is respectively connected to the RFIN port and the negative pole of D10. The positive pole of D10 is grounded. Pin 2 of limiter U88 is grounded. Pin 3 of limiter U88 is connected to the first end of C734. The second end of C734 is divided into two paths. One path is connected to L44 and then grounded, and the other path is connected to pin 2 of single-chip amplifier U87. Pins 0, 1, 3, 4, 5, 6, 7, 9, 10, 11, 12 of single-chip amplifier U87 are grounded. Pin 8 of single-chip amplifier U87 is divided into two paths. One path is connected to the first end of L43. The second end of L43 is connected to the first ends of C210 and C211. The second ends of C210 and C211 are grounded. The other path is connected to the first end of C213. The second end of C213 is connected to pin 5 of multiplexer U65. Pins 2, 4, 6 of multiplexer U65 are grounded. Pin 1 of multiplexer U65 is connected to pin 2 of surface acoustic wave filter F4. Pins 1, 3, 4, 6 of surface acoustic wave filter F4 are grounded. Pin 5 of surface acoustic wave filter F4 outputs radio frequency signal S1 and enters the frequency conversion unit. Pin 3 of multiplexer U65 is connected to pin 3 of four-way power divider U11. Pins 1, 2, 4, 5, 8 of four-way power divider U11 are grounded. Pin 6 of four-way power divider U11 is connected to pin 1 of dielectric filter U66. Pins 3, 4, 5, 6, 7 of dielectric filter U66 are grounded. Pin 2 of dielectric filter U66 outputs radio frequency signal B1_1 and enters the frequency conversion unit. Pin 7 of U11 is connected to pin 2 of surface acoustic wave filter F3. Pins 1, 3, 4, 6 of F3 are grounded. Pin 5 of F3 outputs radio frequency signal B3_1 and enters the frequency conversion unit. Pin 9 of U11 is connected to pin 2 of two-way power divider U30. Pins 0, 1, 3, 4, 5, 6, 8, 10, 11, 12 of U30 are grounded. Pin 7 of U30 is connected to pin 2 of surface acoustic wave filter F6. Pins 1, 3, 4, 6 of F6 are grounded. Pin 5 of F6 outputs signal L2C and enters the frequency conversion unit. Pin 9 of U30 is connected to pin 2 of surface acoustic wave filter F2. Pins 1, 3, 4, 6 of F2 are grounded. The radio frequency signal B2b output from pin 5 of F2 enters the down-conversion unit. Pin 10 of U11 is connected to pin 2 of two-way power divider U86. Pins 0, 1, 3, 4, 5, 6, 8, 10, 11, 12 of U86 are grounded. Pin 7 of U86 is connected to pin 2 of surface acoustic wave filter F5. Pins 1, 3, 4, 6 of F5 are grounded. Pin 5 of F5 outputs radio frequency signal B2a and enters the down-conversion unit. Pin 9 of U86 is connected to pin 2 of surface acoustic wave filter F1. Pins 1, 3, 4, 6 of F1 are grounded. Pin 5 of F1 outputs radio frequency signal GLONASS and enters the down-conversion unit.

[0050] Such as Figure 3As shown, the down-conversion unit includes a radio frequency chip U7, and video amplifiers U1, U2, and U4. The model of the radio frequency chip U7 is RX3701, and the models of the video amplifiers U1, U2, and U4 are MAAX4444ESE+;

[0051] The radio frequency signal B2b output from the channel multiplexing unit is connected to the first end of C33. The second end of C33 is respectively connected to the first ends of C35 and L6. The second end of C35 is grounded. The second end of L6 is respectively connected to the first end of C36 and pin 79 of the radio frequency chip U7. The second end of C36 is grounded. Pin 74 of the radio frequency chip U7 is connected to the first end of C38. The second end of C38 outputs the signal B2b_I_P. Pin 75 of the radio frequency chip U7 is connected to the first end of C37. The second end of C37 outputs the signal B2b_I_N. The signal B2b_I_N is connected to the first end of R13. The second end of R13 is connected to pin 3 of the video amplifier U2. The signal B2b_I_P is connected to the first end of R22. The second end of R22 is connected to pin 6 of the video amplifier U2. Pin 15 of the video amplifier U2 is connected to the first end of R8. The second end of R8 is connected to the first end of C13. The second end of C13 outputs the intermediate frequency signal B2b_IF of B2b;

[0052] The radio frequency signal GLONASS output from the channel multiplexing unit is connected to the first end of C51. The second end of C51 is respectively connected to the first ends of C53 and L7. The second end of C53 is grounded. The second end of L7 is respectively connected to the first end of C54 and pin 9 of the radio frequency chip U7. The second end of C54 is grounded. Pin 69 of the radio frequency chip U7 is connected to the first end of C40. The second end of C40 outputs the signal GLO_I_P. Pin 70 of the radio frequency chip U7 is connected to the first end of C39. The second end of C39 outputs the signal GLO_I_N. GLO_I_N is connected to the first end of R6. The second end of R6 is respectively connected to the first end of R4 and pin 3 of the video amplifier U1. The second end of R4 is grounded. The signal GLO_I_P is connected to the first end of R14. The second end of R14 is respectively connected to the second end of R21 and pin 6 of U1. The second end of R21 is grounded. Pin 15 of the video amplifier U1 is respectively connected to the first ends of R9 and R5. The second end of R9 is grounded. The second end of R5 is respectively connected to the first ends of C7 and R11. The second end of R11 is grounded. The second end of C7 is respectively connected to the negative pole of D1 and outputs the intermediate frequency signal GLO_IF of B2b. The positive pole of D1 is grounded;

[0053] The radio frequency signal B2a output from the channel multiplexing unit is connected to the first end of C62. The second end of C62 is respectively connected to the first ends of C66 and L8. The second end of C66 is grounded. The second end of L8 is respectively connected to the first end of C67 and pin 15 of the radio frequency chip U7. The second end of C67 is grounded. Pin 64 of the radio frequency chip U7 is connected to the first end of C42. The second end of C42 outputs the signal B2a_I_P. Pin 65 of the radio frequency chip U7 is connected to the first end of C41. The second end of C41 outputs the signal B2a_I_N. The signal B2a_I_N is connected to the first end of R17. The second end of R17 is respectively connected to the first end of R12 and pin 3 of the video amplifier U4. The second end of R12 is grounded. The signal B2b_I_P is connected to the first end of R26. The second end of R26 is respectively connected to the second end of R28 and pin 6 of U4. The second end of R28 is grounded. Pin 15 of the video amplifier U4 is respectively connected to the first ends of R24 and R16. The second end of R24 is grounded. The second end of R16 is respectively connected to the first ends of C14 and R25. The second end of R25 is grounded. The second end of C14 is respectively connected to the first end of D7 and outputs the intermediate frequency signal B2b_IF of B2a. The second end of D7 is grounded;

[0054] The radio frequency signal L2C output from the channel multiplexing unit is connected to the first end of C692. The second end of C62 is respectively connected to the first ends of C695 and L59. The second end of C695 is grounded. The second end of L59 is respectively connected to the first end of C696 and pin 22 of the radio frequency chip U7. The second end of C696 is grounded. Pin 59 of the radio frequency chip U7 is connected to the first end of C672. The second end of C672 outputs the signal L2C_I_P. Pin 60 of the radio frequency chip U7 is connected to the first end of C668. The second end of C668 outputs the signal L2C_I_N. L2C_I_N is connected to the first end of R350. The second end of R350 is respectively connected to the first end of R346 and pin 3 of the video amplifier U96. The second end of R346 is grounded. L2C_I_P is connected to the first end of R358. The second end of R358 is respectively connected to the second end of R360 and pin 6 of U96. The second end of R360 is grounded. Pin 15 of the video amplifier U96 is respectively connected to the first ends of R356 and R349. The second end of R356 is grounded. The second end of R349 is respectively connected to the first ends of C476 and R357. The second end of R357 is grounded. The second end of C476 is respectively connected to the first end of D31 and outputs the intermediate frequency signal L2C_IF of L2C. The second end of D31 is grounded.

[0055] As Figure 4As shown, the frequency conversion unit includes controllable attenuators U12, U13, U14, radio frequency chip U98, video amplifiers U16, U19, U24, U25. The models of the controllable attenuators U12, U13, U14 are HMC540LP3, the model of the radio frequency chip U98 is RX3701, and the models of the video amplifiers U16, U19, U24, U25 are MAAX4444ESE+;

[0056] The radio frequency signal B3_1 output from the channel multiplexing unit is connected to the first end of C91. The second end of C91 is connected to pin 2 of the controllable attenuator U12. Pin 11 of U12 is connected to the first end of C90. The second end of C90 is connected to the first end of C553. The second end of C553 is respectively connected to the first ends of L53 and C558. The second end of C558 is grounded. The second end of L53 is respectively connected to the first end of C562 and pin 79 of the radio frequency chip U98. The second end of C562 is grounded; Pin 75 of U98 is connected to the first end of C571. The second end of C571 outputs the signal B3_I_N. Pin 74 of U98 is connected to the first end of C663. The second end of C663 outputs the signal B3_I_P. The signal B3_I_N is connected to the first end of R88. The second end of R88 is respectively connected to the first end of R78 and pin 3 of the video amplifier U19. The second end of R78 is grounded. The signal B3_I_P is connected to the first end of R96. The second end of R96 is respectively connected to the second end of R100 and pin 6 of U19. The second end of R100 is grounded. Pin 15 of the video amplifier U19 is respectively connected to the first ends of R92 and R79. The second end of R92 is grounded. The second end of R79 is respectively connected to the first ends of C138 and R94. The second end of R94 is grounded. The second end of C138 is respectively connected to the first end of D17 and the intermediate frequency signal B3_IF of output B3. The second end of D17 is grounded;

[0057] The radio frequency signal B1_1 output from the channel multiplexing unit is connected to the first end of C102. The second end of C102 is connected to pin 2 of the controllable attenuator U13. Pin 11 of U13 is connected to the first end of C101. The second end of C101 is connected to the first end of C683. The second end of C683 is respectively connected to the first ends of L56 and C685. The second end of C685 is grounded. The second end of L56 is respectively connected to the first end of C686 and pin 9 of the radio frequency chip U98. The second end of C686 is grounded; Pin 70 of U98 is connected to the first end of C664. The second end of C664 outputs the signal B1_I_N. Pin 69 of U98 is connected to the first end of C667. The second end of C667 outputs the signal B1_I_P. Pin 68 of U98 is connected to the first end of C129. The second end of C129 outputs the signal B1_Q_N. Pin 67 of U98 is connected to the first end of C130. The second end of C130 outputs the signal B1_Q_P. The signal B1_Q_N is connected to the first end of R77. The second end of R77 is respectively connected to the first end of R75 and pin 3 of the video amplifier U16. The second end of R75 is grounded. The signal B1_Q_P is connected to the first end of R89. The second end of R89 is respectively connected to the second end of R95 and pin 6 of U16. The second end of R95 is grounded. Pin 15 of the video amplifier U16 is respectively connected to the first ends of R80 and R76. The second end of R80 is grounded. The second end of R76 is respectively connected to the first ends of C137 and R83. The second end of R83 is grounded. The second end of C137 is respectively connected to the first end of D16 and the intermediate frequency signal B1Q_IF of the output B1Q. The second end of D16 is grounded. The signal B1_I_N is connected to the first end of R109. The second end of R109 is respectively connected to the first end of R107 and pin 3 of the video amplifier U25. The second end of R107 is grounded. The signal B1_I_P is connected to the first end of R112. The second end of R112 is respectively connected to the second end of R113 and pin 6 of U25. The second end of R113 is grounded. Pin 15 of the video amplifier U25 is respectively connected to the first ends of R110 and R108. The second end of R110 is grounded. The second end of R108 is respectively connected to the first ends of C148 and R111. The second end of R111 is grounded. The second end of C148 is respectively connected to the first end of D28 and the intermediate frequency signal B1I_IF of the output B1I. The second end of D28 is grounded;

[0058] The radio frequency signal S_1 output from the channel multiplexing unit is connected to the first end of C115. The second end of C115 is connected to pin 2 of the controllable attenuator U14. Pin 11 of U14 is connected to the first end of C114. The second end of C114 is connected to the first end of C692. The second end of C692 is respectively connected to the first ends of L59 and C695. The second end of C695 is grounded. The second end of L59 is respectively connected to the first end of C696 and pin 22 of the radio frequency chip U98. The second end of C696 is grounded. Pin 60 of U98 is connected to the first end of C131. The second end of C131 outputs the signal S_I_N. Pin 59 of U98 is connected to the first end of C132. The second end of C132 outputs the signal S_I_P. The signal S_I_N is connected to the first end of R91. The second end of R91 is respectively connected to the first end of R87 and pin 3 of the video amplifier U24. The second end of R87 is grounded. The signal S_I_P is connected to the first end of R99. The second end of R99 is respectively connected to the second end of R101 and pin 6 of U24. The second end of R101 is grounded. Pin 15 of the video amplifier U24 is respectively connected to the first ends of R97 and R90. The second end of R97 is grounded. The second end of R90 is respectively connected to the first ends of C139 and R98. The second end of R98 is grounded. The second end of C139 is respectively connected to the first end of D18 and the intermediate frequency signal S_IF output at S. The second end of D18 is grounded.

[0059] As Figure 5 shown, the transmit preamplification unit includes a filter U18, a low-noise monolithic amplifier U17, a digital control attenuator U20, a temperature-compensated attenuator U21, and a surface acoustic wave filter U22. The model of the filter U18 is LFCN-2000D+. The model of the low-noise monolithic amplifier U17 is SPF-5043Z. The model of the digital control attenuator U20 is PE43711B-Z. The model of the temperature-compensated attenuator U21 is STCA0603N9. The model of the surface acoustic wave filter U22 is SF9074;

[0060] The transmitted signals output by the frequency conversion unit are respectively connected to the negative electrode of D33 and the first end of C165. The positive electrode of D33 is grounded. The second end of C165 is respectively connected to the first ends of R18 and R15. The second end of R15 is grounded. The second end of R18 is respectively connected to the first ends of R93, R10 and R71. The second end of R93 is grounded. The second ends of R10 and R7 are connected to pin 3 of the filter U18. Pins 2 and 4 of U18 are grounded. Pin 1 of U18 is connected to the first end of C699. The second end of C699 is connected to pin 1 of the low-noise monolithic amplifier U17. Pins 2 and 4 of U17 are grounded. Pin 3 of U17 is connected to the first end of C702. The second end of C702 is connected to pin 14 of the digital control attenuator U20. Pin 5 of U20 is connected to the first end of C190. The second end of C190 is connected to pin 2 of the temperature compensation attenuator U21. Pin 3 of U21 is grounded. Pin 1 of U21 is connected to the first end of C197. The second end of C197 is connected to pin 5 of U22. Pins 1, 3, 4, 6 of U22 are grounded. Pin 2 of U22 is connected to the first end of C715. The second end of C715 outputs the transmitted signal.

[0061] As Figure 6 shown, the reference switching unit includes an operational amplifier U4, single-channel input NOT gates U41, U43, a single-channel low-voltage comparator U42, a single-pole double-throw switch U46, and a crystal oscillator U52. The model of the operational amplifier U4 is OPA695IDBV. The models of the single-channel input NOT gates U41 and U43 are SN74AHC1G04DBVR. The model of the single-channel low-voltage comparator U42 is LMV331DBVR. The model of the single-pole double-throw switch U46 is HMC194MS8ETR. The model of the crystal oscillator U52 is RTX7050A 10M;

[0062] Pin 5 of the crystal oscillator U52 is connected to the first end of C433. The second end of C433 outputs 10MHz-N and is connected to pin 8 of U46. The 10M-IN signal is respectively connected to the negative electrode of D3 and the first end of C357. The positive electrode of D3 is grounded. The second end of C357 is respectively connected to the first ends of R187 and R174 and pin 3 of U4. The second end of R187 is grounded. The second end of R174 is connected to pin 6 of U4. Pin 1 of U4 is respectively connected to the first ends of C351, C346 and R177. The second end of R177 is connected to pin 4 of U4. The second ends of C351 and C346 are connected to the first end of R173. The second end of R173 is connected to the first end of C350. The second end of C350 is respectively connected to the first ends of R175 and C345. The second end of R175 outputs 10MHz-Y. 10MHz-Y is connected to the first end of C372. The second end of C372 is connected to pin 5 of U46;

[0063] The second end of C345 is respectively connected to the first end of R172 and pin 2 of U41. The second end of R172 is grounded. Pin 4 of U41 is connected to the first end of C347. The second end of C347 is connected to the first end of R170. The second end of R170 is respectively connected to the first end of L75 and the positive pole of D2. The second end of L75 is grounded. The negative pole of D2 is respectively connected to the first ends of C342, R166 and pin 1 of U42. The second ends of C342 and R166 are grounded. Pin 4 of U42 is respectively connected to pin 2 of U46 and pin 1 of U43. Pin 4 of U43 is connected to pin 1 of U46. Pin 3 of U46 is connected to the first end of C382. The second end of C382 is respectively connected to the first end of R215 and pin 2 of U48. The second end of R215 is grounded. Pin 4 of U48 is connected to the first end of C381. The second end of C381 is respectively connected to the first ends of L77 and C376. The second end of C376 is grounded. The second end of L77 is respectively connected to the first ends of C375 and L76. The second end of C375 is grounded. The second end of L76 is respectively connected to the first ends of C374 and R218. The second end of C374 is grounded. The second end of R218 is connected to the first end of C380. The second end of C380 outputs a 10 MHz reference signal.

[0064] As Figure 7 shown, the MCU unit includes a voltage monitor U45 and a single-chip microcomputer U44. The model of the voltage monitor U45 is IMP811, and the model of the single-chip microcomputer U44 is C8051F410-GQ;

[0065] Pin 2 of the single-chip microcomputer U44 is respectively connected to the first ends of R199 and R196. The second end of R199 is connected to C2CK. The second end of R196 is respectively connected to the first end of R198 and pin 2 of U45. The second end of R198 is grounded. Pin 17 of the single-chip microcomputer U44 is connected to the first end of R205. The second end of R205 inputs the signal SCLK. Pin 18 of the single-chip microcomputer U44 is connected to the first end of R204. The second end of R204 outputs the MISO signal. Pin 19 of the single-chip microcomputer U44 is connected to the first end of R203. The second end of R203 inputs the signal MISO. Pin 20 of the single-chip microcomputer U44 is connected to the first end of R202. The second end of R202 inputs the signal CS. Pin 21 of the single-chip microcomputer U44 is connected to the first end of R200. The second end of R200 is connected to the TX signal. Pin 22 of the single-chip microcomputer U44 is connected to the first end of R197. The second end of R197 is connected to the RX signal. Pin 32 of the single-chip microcomputer U44 is connected to the first end of R191. The second end of R191 is connected to the C2D signal.

[0066] As Figure 8As shown, the power supply processing unit includes an overvoltage protector U85, a switching regulator U57, and a voltage regulator U3. The model of the overvoltage protector U85 is MAX14586, the model of the switching regulator U57 is TPS6213, and the model of the voltage regulator U3 is LT3045EDD;

[0067] The electrical signal VIN is respectively connected to the negative electrode of D8 and the positive electrode of D6. The positive electrode of D8 is grounded. The negative electrode of D6 is respectively connected to the positive electrode of C526, the first ends of C195 and R212, and pins 1 and 2 of U85. The negative electrode of C526 and the second end of C195 are grounded. The second end of R212 is respectively connected to pin 3 of U85 and the first end of R213. The second end of R213 is grounded; Pins 7 and 8 of U85 are connected to the first ends of C192 and L89. The second end of C192 is grounded. The second end of L89 is respectively connected to the positive electrode of C511, the first end of C512, and pins 10, 11, and 12 of U57. The negative electrode of C511 and the second end of C512 are grounded. Pins 1, 2, and 3 of U57 are connected to the first end of L90. The second end of L90 is respectively connected to pin 14 of U57, the first ends of R240 and R239, the positive electrode of C513, the first end of C10, and pins 1, 2, and 3 of U3. The second end of R240 is connected to pin 4 of U57. The second end of R239 is connected to the first end of R238 and pin 5 of U57. The second end of R238 is grounded. The negative electrode of C513 and the second end of C10 are grounded. Pins 9 and 10 of U3 are respectively connected to the first ends of C11, C12, and R30. The second ends of C11 and C12 are grounded. The second end of R30 is respectively connected to pin 6 of U3 and the first end of R29. The second end of R29 is grounded. Pins 9 and 10 of U3 output +5V.

Claims

1. A four-system navigation frequency conversion device compatible with Beidou III, characterized by: It includes a four-system navigation frequency conversion module compatible with Beidou III, which includes a channel multiplexing unit, a down-conversion unit, a frequency conversion unit, a transmission pre-amplification unit, a reference switching unit, an MCU unit and a power processing unit; The RF signal received by the active antenna enters the module through the RFIN port, and is filtered by the channel multiplexing unit to be seven RF signals, which are respectively input to the down-conversion unit and the frequency conversion unit for down-conversion to intermediate frequency signal output. At the same time, the down-conversion unit outputs the sampling clock signal SAMPCLK_out; the digital intermediate frequency BPSK signal is input to the frequency conversion unit for carrier modulation and then output as an RF signal, which is filtered and amplified by the transmission pre-amplification unit and then output from the RFOUT port to the external active antenna for amplification and transmission; the reference switching unit has a built-in 10MHz reference clock source, receives the external input 10MHz reference clock, uses the built-in detector of the module for automatic switching, and outputs a 10MHz reference signal at the same time; The MCU unit can configure the module's power-on default state, and can dynamically control the down-conversion unit, frequency conversion unit and transmit pre-amplification unit to achieve parameter configuration functions such as AGC and fixed gain switching and fixed gain adjustment of each receiving channel, sampling clock frequency adjustment, transmit frequency point switching and frequency fine-tuning, transmit power adjustment and RF chip reset; the power processing unit integrates multiple power chips to generate multiple independent power supplies, which reduces product power consumption while avoiding signal crosstalk through the power supply, and feeds out power that meets the requirements to the RFIN and RFOUT ports.

2. The four-system navigation frequency conversion device compatible with Beidou III according to claim 1, characterized in that: The circuit diagram of the channel multiplexing unit includes a limiter U88, a monolithic amplifier U87, a multiplexer U65, a four-way power divider U11, two-way power dividers U86 and U30, SAW filters F1, F5, F2, F6, F3, F4 and a dielectric filter U66; the model of the limiter U88 is CLA4610_085LF, the model of the monolithic amplifier U87 is PMA3-83LN+, the model of the multiplexer U65 is DP2012, the model of the four-power divider U11 is SCA-4-20+, the model of the two-power divider U86 and U30 is GP2S1+, the model of the SAW filter F1, F5, F2, F6, F3, F4 are SF9016, TA0675A, TA0582A, TA0490A, TA0862A, TA1442A respectively, the model of the dielectric filter U66 is DFC1575P50A8; Pin 1 of the limiter U88 is connected to the first end of C550, and the second end of C550 is divided into two paths, which are respectively connected to the RFIN port and the negative pole of D10, and the positive pole of D10 is grounded; Pin 2 of the limiter U88 is grounded, Pin 3 of the limiter U88 is connected to the first end of C734, and the second end of C734 is divided into two paths, one of which is connected to L44 and then grounded, and the other is connected to Pin 2 of the monolithic amplifier U87, Pins 0, 1, 3, 4, 5, 6, 7, 9, 10, 11, and 12 of the monolithic amplifier U87 are grounded, and Pin 8 of the monolithic amplifier U87 is divided into two paths, one of which is connected to the first end of L43, and the second end of L43 is connected to the first ends of C210 and C211. The second ends of C210 and C211 are grounded, and the other end is connected to the first end of C213. The second end of C213 is connected to pin 5 of the multiplexer U65, pins 2, 4, and 6 of the multiplexer U65 are grounded, pin 1 of the multiplexer U65 is connected to pin 2 of the surface acoustic filter F4, pins 1, 3, 4, and 6 of the surface acoustic filter F4 are grounded, pin 5 of the surface acoustic filter F4 outputs the RF signal S1 into the frequency conversion unit, pin 3 of the multiplexer U65 is connected to pin 3 of the four-power divider U11, pins 1, 2, 4, 5, and 8 of the four-power divider U11 are grounded, pin 6 of the four-power divider U11 is connected to pin 1 of the dielectric filter U66, and the dielectric filter U Pins 3, 4, 5, 6, and 7 of 66 are grounded, pin 2 of dielectric filter U66 outputs RF signal B1_1 into the frequency conversion unit, pin 7 of U11 is connected to pin 2 of acoustic surface filter F3, pins 1, 3, 4, and 6 of F3 are grounded, and pin 5 of F3 outputs RF signal B3_1 into the frequency conversion unit, pin 9 of U11 is connected to pin 2 of power divider U30, pins 0, 1, 3, 4, 5, 6, 8, 10, 11, and 12 of U30 are grounded, pin 7 of U30 is connected to pin 2 of acoustic surface filter F6, pins 1, 3, 4, and 6 of F6 are grounded, pin 5 of F6 outputs signal L2C into the frequency conversion unit, and pin 9 of U30 is connected to acoustic surface filter F6. Pin 2 of filter F2, pins 1, 3, 4, and 6 of F2 are grounded, and the RF signal B2b output by pin 5 of F2 enters the down-conversion unit, pin 10 of U11 is connected to pin 2 of the power divider U86, pins 0, 1, 3, 4, 5, 6, 8, 10, 11, and 12 of U86 are grounded, pin 7 of U86 is connected to pin 2 of the surface acoustic wave filter F5, pins 1, 3, 4, and 6 of F5 are grounded, and pin 5 of F5 outputs the RF signal B2a and enters the down-conversion unit, pin 9 of U86 is connected to pin 2 of the surface acoustic wave filter F1, pins 1, 3, 4, and 6 of F1 are grounded, and pin 5 of F1 outputs the RF signal GLONASS and enters the down-conversion unit.

3. The four-system navigation frequency conversion device compatible with Beidou III according to claim 1, characterized in that: The down-conversion unit includes a radio frequency chip U7, video amplifiers U1, U2, and U4, the model of the radio frequency chip U7 is RX3701, and the model of the video amplifiers U1, U2, and U4 is MAAX4444ESE+; The RF signal B2b output from the channel multiplexing unit is connected to the first end of C33, the second end of C33 is respectively connected to the first ends of C35 and L6, the second end of C35 is grounded, the second end of L6 is respectively connected to the first end of C36 and the pin 79 of the RF chip U7, and the second end of C36 is grounded; the pin 74 of the RF chip U7 is connected to the first end of C38, the second end of C38 outputs the signal B2b_I_P, the pin 75 of the RF chip U7 is connected to the first end of C37, the second end of C37 outputs the signal B2b_I_N, the signal B2b_I_N is connected to the first end of R13, the second end of R13 is connected to the pin 3 of the video amplifier U2, the signal B2b_I_P is connected to the first end of R22, the second end of R22 is connected to the pin 7 of the video amplifier U2, the pin 15 of the video amplifier U2 is connected to the first end of R8, the second end of R8 is connected to the first end of C13, and the second end of C13 outputs the intermediate frequency signal B2b_IF of B2b; The RF signal GLONASS output from the channel multiplexing unit is connected to the first end of C51, the second end of C51 is respectively connected to the first ends of C53 and L7, the second end of C53 is grounded, the second end of L7 is respectively connected to the first end of C54 and pin 9 of the RF chip U7, and the second end of C54 is grounded; pin 69 of the RF chip U7 is connected to the first end of C40, the second end of C40 outputs the signal GLO_I_P, pin 70 of the RF chip U7 is connected to the first end of C39, the second end of C39 outputs the signal GLO_I_N, GLO_I_N is connected to the first end of R6, R6 The second end of each of the signals is connected to the first end of R4 and the pin 3 of the video amplifier U1, the second end of R4 is grounded, the signal GLO_I_P is connected to the first end of R14, the second end of R14 is connected to the second end of R21 and the pin 6 of U1, the second end of R21 is grounded, the pin 15 of the video amplifier U1 is connected to the first end of R9 and R5, the second end of R9 is grounded, the second end of R5 is connected to the first end of C7 and R11, the second end of R11 is grounded, the second end of C7 is connected to the negative electrode of D1 and the intermediate frequency signal GLO_IF of the output B2b, and the positive electrode of D1 is grounded; The RF signal B2a output from the channel multiplexing unit is connected to the first end of C62, the second end of C62 is respectively connected to the first ends of C66 and L8, the second end of C66 is grounded, the second end of L8 is respectively connected to the first end of C67 and pin 15 of the RF chip U7, the second end of C67 is grounded, the pin 64 of the RF chip U7 is connected to the first end of C42, the second end of C42 outputs the signal B2a_I_P, the pin 65 of the RF chip U7 is connected to the first end of C41, the second end of C41 outputs the signal B2a_I_N, the signal B2a_I_N is connected to the first end of R17, the second end of R17 The first end of R12 and the pin 3 of the video amplifier U4 are respectively connected, the second end of R12 is grounded, the signal B2b_I_P is connected to the first end of R26, the second end of R26 is respectively connected to the second end of R28 and the pin 6 of U4, the second end of R28 is grounded, the pin 15 of the video amplifier U4 is respectively connected to the first ends of R24 and R16, the second end of R24 is grounded, the second end of R16 is respectively connected to the first ends of C14 and R25, the second end of R25 is grounded, the second end of C14 is respectively connected to the first end of D7 and the intermediate frequency signal B2b_IF of the output B2a, and the second end of D7 is grounded; The RF signal L2C output from the channel multiplexing unit is connected to the first end of C692, the second end of C62 is respectively connected to the first ends of C695 and L59, the second end of C695 is grounded, the second end of L59 is respectively connected to the first end of C696 and the pin 22 of the RF chip U7, the second end of C696 is grounded, the pin 59 of the RF chip U7 is connected to the first end of C672, the second end of C672 outputs the signal L2C_I_P, the pin 60 of the RF chip U7 is connected to the first end of C668, the second end of C668 outputs the signal L2C_I_N, L2C_I_N is connected to the first end of R350, and the second end of R350 is respectively connected to The first end of R346 is connected to pin 3 of the video amplifier U96, the second end of R346 is grounded, L2C_I_P is connected to the first end of R358, the second end of R358 is respectively connected to the second end of R360 and pin 6 of U96, the second end of R360 is grounded, the pin 15 of the video amplifier U96 is respectively connected to the first end of R356 and R349, the second end of R356 is grounded, the second end of R349 is respectively connected to the first end of C476 and R357, the second end of R357 is grounded, the second end of C476 is respectively connected to the first end of D31 and the intermediate frequency signal L2C_IF of the output L2C, and the second end of D31 is grounded.

4. The four-system navigation frequency conversion device compatible with Beidou III according to claim 1, characterized in that: The frequency conversion unit includes controllable attenuators U12, U13, U14, a radio frequency chip U98, and video amplifiers U16, U19, U24, and U25. The models of the controllable attenuators U12, U13, and U14 are HMC540LP3, the model of the radio frequency chip U98 is RX3701, and the models of the video amplifiers U16, U19, U24, and U25 are MAAX4444ESE+. The RF signal B3_1 output from the channel multiplexing unit is connected to the first end of C91, the second end of C91 is connected to pin 2 of the controllable attenuator U12, the pin 11 of U12 is connected to the first end of C90, the second end of C90 is connected to the first end of C553, the second end of C553 is respectively connected to the first ends of L53 and C558, the second end of C558 is grounded, the second end of L53 is respectively connected to the first end of C562 and the pin 79 of the RF chip U98, and the second end of C562 is grounded; the pin 75 of U98 is connected to the first end of C571, the second end of C571 outputs the signal B3_I_N, the pin 74 of U98 is connected to the first end of C663, and the second end of C663 outputs the signal B3_I _P, signal B3_I_N connects to the first end of R88, the second end of R88 connects to the first end of R78 and pin 3 of the video amplifier U19 respectively, the second end of R78 is grounded, signal B3_I_P connects to the first end of R96, the second end of R96 connects to the second end of R100 and pin 6 of U19 respectively, the second end of R100 is grounded, pin 15 of the video amplifier U19 connects to the first end of R92 and R79 respectively, the second end of R92 is grounded, the second end of R79 connects to the first end of C138 and R94 respectively, the second end of R94 is grounded, the second end of C138 connects to the first end of D17 and the intermediate frequency signal B3_IF of the output B3 respectively, the second end of D17 is grounded; The RF signal B1_1 output from the channel multiplexing unit is connected to the first end of C102, the second end of C102 is connected to the pin 2 of the controllable attenuator U13, the pin 11 of U13 is connected to the first end of C101, the second end of C101 is connected to the first end of C683, the second end of C683 is respectively connected to the first ends of L56 and C685, the second end of C685 is grounded, the second end of L56 is respectively connected to the first end of C686 and the pin 9 of the RF chip U98, and the second end of C686 is grounded; the pin 70 of U98 is connected to the first end of C664, and the second end of C664 outputs the signal B1 _I_N, pin 69 of U98 is connected to the first end of C667, and the second end of C667 outputs signal B1_I_P, pin 68 of U98 is connected to the first end of C129, and the second end of C129 outputs signal B1_Q_N, pin 67 of U98 is connected to the first end of C130, and the second end of C130 outputs signal B1_Q_P, signal B1_Q_N is connected to the first end of R77, and the second end of R77 is respectively connected to the first end of R75 and pin 3 of the video amplifier U16, the second end of R75 is grounded, signal B1_Q_P is connected to the first end of R89, and the second end of R89 is grounded The two ends are respectively connected to the second end of R95 and pin 6 of U16, the second end of R95 is grounded, the pin 15 of the video amplifier U16 is respectively connected to the first end of R80 and R76, the second end of R80 is grounded, the second end of R76 is respectively connected to the first end of C137 and R83, the second end of R83 is grounded, the second end of C137 is respectively connected to the first end of D16 and the intermediate frequency signal B1Q_IF of the output B1Q, the second end of D16 is grounded, the signal B1_I_N is connected to the first end of R109, and the second end of R109 is respectively connected to the first end of R107 and the video amplifier U25 Pin 3 of U25, the second end of R107 is grounded, the signal B1_I_P is connected to the first end of R112, the second end of R112 is respectively connected to the second end of R113 and pin 6 of U25, the second end of R113 is grounded, the pin 15 of the video amplifier U25 is respectively connected to the first ends of R110 and R108, the second end of R110 is grounded, the second end of R108 is respectively connected to the first ends of C148 and R111, the second end of R111 is grounded, the second end of C148 is respectively connected to the first end of D28 and the intermediate frequency signal B1I_IF of the output B1I, and the second end of D28 is grounded; The RF signal S_1 output from the channel multiplexing unit is connected to the first end of C115, the second end of C115 is connected to pin 2 of the controllable attenuator U14, the pin 11 of U14 is connected to the first end of C114, the second end of C114 is connected to the first end of C692, the second end of C692 is respectively connected to the first ends of L59 and C695, the second end of C695 is grounded, the second end of L59 is respectively connected to the first end of C696 and pin 22 of the RF chip U98, the second end of C696 is grounded, the pin 60 of U98 is connected to the first end of C131, the second end of C131 outputs the signal S_I_N, the pin 59 of U98 is connected to the first end of C132, and the second end of C132 outputs the signal S _I_P, signal S_I_N is connected to the first end of R91, the second end of R91 is respectively connected to the first end of R87 and pin 3 of the video amplifier U24, the second end of R87 is grounded, signal S_I_P is connected to the first end of R99, the second end of R99 is respectively connected to the second end of R101 and pin 6 of U24, the second end of R101 is grounded, pin 15 of the video amplifier U24 is respectively connected to the first ends of R97 and R90, the second end of R97 is grounded, the second end of R90 is respectively connected to the first ends of C139 and R98, the second end of R98 is grounded, the second end of C139 is respectively connected to the first end of D18 and the intermediate frequency signal S_IF of the output S, and the second end of D18 is grounded.

5. The four-system navigation frequency conversion device compatible with Beidou III according to claim 1, characterized in that: The transmitting pre-amplification unit includes a filter U18, a low-noise monolithic amplifier U17, a digitally controlled attenuator U20, a temperature-compensated attenuator U21, and a surface acoustic wave filter U22. The model of the filter U18 is LFCN-2000D+, the model of the low-noise monolithic amplifier U17 is SPF-5043Z, the model of the digitally controlled attenuator U20 is PE43711B-Z, the model of the temperature-compensated attenuator U21 is STCA0603N9, and the model of the surface acoustic wave filter U22 is SF9074. The transmission signal output by the frequency conversion unit is respectively connected to the negative pole of D33 and the first end of C165, the positive pole of D33 is grounded, the second end of C165 is respectively connected to the first ends of R18 and R15, the second end of R15 is grounded, the second end of R18 is respectively connected to the first ends of R93, R10 and R71, the second end of R93 is grounded, the second ends of R10 and R7 are connected to pin 3 of filter U18, pins 2 and 4 of U18 are grounded, pin 1 of U18 is connected to the first end of C699, and the second end of C699 is connected to pin 1 of the low-noise monolithic amplifier U17 , pins 2 and 4 of U17 are grounded, pin 3 of U17 is connected to the first end of C702, the second end of C702 is connected to pin 14 of the digital controlled attenuator U20, pin 5 of U20 is connected to the first end of C190, the second end of C190 is connected to pin 2 of the temperature compensated attenuator U21, pin 3 of U21 is grounded, pin 1 of U21 is connected to the first end of C197, the second end of C197 is connected to pin 5 of U22, pins 1, 3, 4, and 6 of U22 are grounded, pin 2 of U22 is connected to the first end of C715, and the second end of C715 outputs the transmission signal.

6. The four-system navigation frequency conversion device compatible with Beidou III according to claim 1, characterized in that: The reference switching unit includes an operational amplifier U4, single-input NOT gates U41 and U43, a single-channel low-voltage comparator U42, a single-pole double-throw switch U46, and a crystal oscillator U52. The model of the operational amplifier U4 is OPA695IDBV, the models of the single-input NOT gates U41 and U43 are SN74AHC1G04DBVR, the model of the single-channel low-voltage comparator U42 is LMV331DBVR, the model of the single-pole double-throw switch U46 is HMC194MS8ETR, and the model of the crystal oscillator U52 is RTX7050A 10M. Pin 5 of crystal oscillator U52 is connected to the first end of C433, the second end of C433 outputs 10MHz-N and is connected to pin 8 of U46, 10M-IN signal is respectively connected to the negative pole of D3 and the first end of C357, the positive pole of D3 is grounded, the second end of C357 is respectively connected to the first ends of R187 and R174 and pin 3 of U4, the second end of R187 is grounded, the second end of R174 is connected to pin 6 of U4, pin 1 of U4 is respectively connected to the first ends of C351, C346 and R177, the second end of R177 is connected to pin 4 of U4, the second ends of C351 and C346 are connected to the first end of R173, the second end of R173 is connected to the first end of C350, the second end of C350 is respectively connected to the first ends of R175 and C345, the second end of R175 outputs 10MHz-Y, 10MHz-Y is connected to the first end of C372, and the second end of C372 is connected to pin 5 of U46; The second end of C345 is respectively connected to the first end of R172 and pin 2 of U41, the second end of R172 is grounded, pin 4 of U41 is connected to the first end of C347, the second end of C347 is connected to the first end of R170, the second end of R170 is respectively connected to the first end of L75 and the positive electrode of D2, the second end of L75 is grounded, the negative electrode of D2 is respectively connected to the first end of C342 and R166 and pin 1 of U42, the second ends of C342 and R166 are grounded, pin 4 of U42 is respectively connected to pin 2 of U46 and pin 1 of U43, pin 4 of U43 is connected to pin 1 of U46, and pin 3 of U46 is connected The first end of C382 and the second end of C382 are respectively connected to the first end of R215 and pin 2 of U48, the second end of R215 is grounded, pin 4 of U48 is connected to the first end of C381, the second end of C381 is respectively connected to the first ends of L77 and C376, the second end of C376 is grounded, the second end of L77 is respectively connected to the first ends of C375 and L76, the second end of C375 is grounded, the second end of L76 is respectively connected to the first ends of C374 and R218, the second end of C374 is grounded, the second end of R218 is connected to the first end of C380, and the second end of C380 outputs a 10MHz reference signal.

7. The four-system navigation frequency conversion device compatible with Beidou III according to claim 1, characterized in that: The MCU unit includes a voltage monitor U45 and a single-chip microcomputer U44. The model of the voltage monitor U45 is IMP811, and the model of the single-chip microcomputer U44 is C8051F410-GQ. Pin 2 of the microcontroller U44 is connected to the first end of R199 and R196 respectively, the second end of R199 is connected to C2CK, the second end of R196 is connected to the first end of R198 and pin 2 of U45 respectively, the second end of R198 is grounded, pin 17 of the microcontroller U44 is connected to the first end of R205, the second end of R205 inputs the signal SCLK, pin 18 of the microcontroller U44 is connected to the first end of R204, the second end of R204 outputs the MISO signal, and pin 19 of the microcontroller U44 is connected The first end of R203 and the second end of R203 input signal MISO, pin 20 of microcontroller U44 is connected to the first end of R202, and the second end of R202 input signal CS, pin 21 of microcontroller U44 is connected to the first end of R200, and the second end of R200 is connected to the TX signal, pin 22 of microcontroller U44 is connected to the first end of R197, and the second end of R197 is connected to the RX signal, pin 32 of microcontroller U44 is connected to the first end of R191, and the second end of R191 is connected to the C2D signal.

8. The four-system navigation frequency conversion device compatible with Beidou III according to claim 1, characterized in that: The power processing unit includes an overvoltage protector U85, a switching regulator U57, and a regulator U3. The model of the overvoltage protector U85 is MAX14586, the model of the switching regulator U57 is TPS6213, and the model of the regulator U3 is LT3045EDD. The electrical signal VIN is connected to the negative electrode of D8 and the positive electrode of D6 respectively, the positive electrode of D8 is grounded, the negative electrode of D6 is connected to the positive electrode of C526, the first end of C195 and R212, and pins 1 and 2 of U85 respectively, the negative electrode of C526 and the second end of C195 are grounded, the second end of R212 is connected to pin 3 of U85 and the first end of R213 respectively, and the second end of R213 is grounded; pins 7 and 8 of U85 are connected to the first end of C192 and L89, the second end of C192 is grounded, the second end of L89 is connected to the positive electrode of C511, the first end of C512 and pins 10, 11, and 12 of U57 respectively, the negative electrode of C511 and the second end of C512 are grounded, and pins 1, 2, and 3 of U57 are grounded. 3 is connected to the first end of L90, the second end of L90 is respectively connected to pin 14 of U57, the first ends of R240 and R239, the positive pole of C513, the first end of C10 and pins 1, 2, and 3 of U3, the second end of R240 is connected to pin 4 of U57, the second end of R239 is connected to the first end of R238 and pin 5 of U57, the second end of R238 is grounded, the negative pole of C513 and the second end of C10 are grounded, pins 9 and 10 of U3 are respectively connected to the first ends of C11, C12 and R30, the second ends of C11 and C12 are grounded, the second end of R30 is respectively connected to pin 6 of U3 and the first end of R29, the second end of R29 is grounded, and pins 9 and 10 of U3 output +5V.

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