A method and system for evaluating the effectiveness of important display functions of a display device

Abstract

The present invention relates to a method and system for verifying the effectiveness of a key display function of a display device. The method comprises: determining a frame interruption checkpoint of a system-on-chip (SoC) to be tested; utilizing a watchdog and the frame interruption checkpoint to determine the display frame rate of the SoC; and testing the security of displayed content determined to be normal frames. The present invention utilizes a watchdog in conjunction with an internal clock timer to achieve independent modular operation, monitor the effectiveness of the display device, and implement resets. By utilizing the watchdog, system timer, and a rationally designed display output check mechanism, effective monitoring and notification of display content correctness can be achieved.

Description

Technical Field

[0001] The present invention belongs to the technical field of system-on-chip display control, and in particular relates to a method and system for identifying the effectiveness of an important display function of a display device. Background Art

[0002] With the rapid development of technology, the semiconductor industry has played a significant supporting role. Large-screen electronic devices are now ubiquitous in our daily lives. Thanks to the widespread adoption of mature SoCs, the scale of software used in these devices has also seen exponential growth. For display screens, which experience the most user interaction, especially those critical to personal safety, the secure and accurate transmission of information, such as alarms, to these devices remains a pressing issue.

[0003] Traditional embedded systems with display functions often only use the most basic monitoring function of the watchdog, which only monitors the overall operation of the system. If an overall system abnormality occurs, the entire system software is reset. It is basically unable to perform any monitoring role on the correctness of the operation of specific modules. Summary of the Invention

[0004] In order to improve the security of display devices, promptly and accurately feedback and alert users to specific problems existing on the display screen, and effectively reduce the safety risks of device use, a first aspect of the present invention provides a method for identifying the effectiveness of important display functions of a display device, including: determining a frame interruption checkpoint of a system-on-chip to be detected; using a watchdog and the frame interruption checkpoint to determine the display frame rate of the system-on-chip; and detecting the security of display content determined to be a normal frame.

[0005] In some embodiments of the present invention, determining the frame interruption checkpoint of the system-on-chip to be detected includes: determining the division of the display layer of the system-on-chip to be detected; determining the layer merging method based on the division of the display layer; and determining the frame interruption checkpoint based on the layer merging method.

[0006] In some embodiments of the present invention, determining the display frame rate of the system on chip by using the watchdog and the frame interruption checkpoint includes:

[0007] The watchdog's monitoring period is determined based on the frame rate of the monitored object of the system-on-chip; the number of frame scans executed by the system-on-chip is calculated based on the current display frame rate checkpoint and the count value of the system-on-chip timing counter when the system-on-chip was normal last time; and whether the display frame rate is abnormal is determined based on the number of frame scans executed and a preset threshold.

[0008] Furthermore, the use of the watchdog and the frame interruption checkpoint to determine the display frame rate of the system on chip further includes:

[0009] If the display frame rate is judged to be normal, the current watchdog count value is saved and the accumulated frame interruption count is cleared, and then the display frame rate judgment is continued; if the display frame rate is judged to be abnormal, the abnormal information is saved to BackupRam and a software reset of the on-chip system is initiated.

[0010] In some embodiments of the present invention, the security detection of the display content determined to be a normal frame includes the following steps: determining an output abnormality detection object for the display content; determining the allowed deviation range of pixels in the image resource of the display object based on the output abnormality detection object; and periodically monitoring whether the icon elements in a preset area in the output image are valid based on the deviation range.

[0011] In the above embodiment, before determining the display frame rate of the system on chip by using the watchdog and the frame interruption checkpoint, the method further includes:

[0012] Set the initial parameters of the clock counter of the system on chip to be tested;

[0013] determining, based on the initial parameters, whether a clock counter of the system on chip is abnormal;

[0014] After determining that the clock counter of the system on chip is normal, it is determined whether the system on chip operates abnormally.

[0015] The second aspect of the present invention provides an identification system for the effectiveness of important display functions of a display device, including: a determination module for determining the frame interruption checkpoint of the on-chip system to be detected; a judgment module for using a watchdog and the frame interruption checkpoint to determine the display frame rate of the on-chip system; and a detection module for detecting the security of the display content determined to be a normal frame.

[0016] Furthermore, the determination module includes a first determination unit, a second determination unit and a third determination unit. The first determination unit is used to determine the division of the display layer of the system-on-chip to be detected; the second determination unit is used to determine the layer merging method based on the division of the display layer; and the third determination unit is used to determine the frame interruption checkpoint based on the layer merging method.

[0017] The third aspect of the present invention provides an electronic device, comprising: one or more processors; a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the method for identifying the effectiveness of the important display functions of the display device provided in the first aspect of the present invention.

[0018] A fourth aspect of the present invention provides a computer-readable medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the method for identifying the effectiveness of important display functions of a display device provided in the first aspect of the present invention is implemented.

[0019] The beneficial effects of the present invention are:

[0020] 1. This invention utilizes a rationally designed watchdog monitoring mechanism to conduct specific monitoring of the display driver, ensuring real-time refresh of the display screen. Simultaneously, a specific display output monitoring mechanism is combined to confirm the correctness and validity of important display content in real time. When display anomalies occur, the watchdog and display output provide clear prompts to the user, thereby fundamentally reducing safety risks and accidents.

[0021] 2. The present invention uses a watchdog in combination with a clock timer within the system to monitor the effectiveness of independent module operation and implement reset;

[0022] 3. In addition, the present invention also provides a processing mechanism that can effectively determine whether the displayed content is abnormal, which is used to determine whether the displayed content is valid in real time and notify the user of possible display anomalies in real time;

[0023] 4. Through the watchdog, system timer and reasonable planning of display output inspection mechanism, effective monitoring and reminder of the correctness of display content can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic diagram of a basic flow chart of a method for evaluating the effectiveness of an important display function of a display device in some embodiments of the present invention;

[0025] Figure 2 A block diagram illustrating the effectiveness of important display functions of a display device in some embodiments of the present invention;

[0026] Figure 3 A schematic diagram of a specific flow chart of a method for identifying the effectiveness of an important display function of a display device in some embodiments of the present invention;

[0027] Figure 4 Schematic diagram of a specific structure of a system for evaluating the effectiveness of an important display function of a display device in some embodiments of the present invention;

[0028] Figure 5 Schematic diagram of the structure of an electronic device in some embodiments of the present invention. DETAILED DESCRIPTION

[0029] The principles and features of the present invention are described below with reference to the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0030] refer to Figure 1 In the first aspect of the present invention, a method for identifying the effectiveness of an important display function of a display device is provided, comprising: S100. determining a frame interruption checkpoint of a system-on-chip to be detected; S200. determining the display frame rate of the system-on-chip by using a watchdog and the frame interruption checkpoint; S300. detecting the security of display content determined to be a normal frame.

[0031] It can be understood that the system on chip described in the present invention refers to an SOC or MCU for display control. The frame interrupt checkpoint can also be simply referred to as a frame interrupt, which corresponds to the time point (moment) before the system on chip completes layer mixing and is ready to send the display content to the display device (display or module with display function). SOC: System-on-chip, also known as system on chip, means that it is a product, an integrated circuit with a dedicated purpose, which contains a complete system and all the contents of embedded software. At the same time, it is also a technology that is used to realize the entire process from determining the system function to the software / hardware division and completing the design.

[0032] refer to Figure 2 In step S100 of some embodiments of the present invention, determining the frame interruption checkpoint of the system-on-chip to be detected includes: S101. determining the division of the display layer of the system-on-chip to be detected; S102. determining the layer merging method based on the division of the display layer; S103. determining the frame interruption checkpoint based on the layer merging method.

[0033] Specifically, in steps S101-S102, the order of layers is rationally planned based on display requirements, business logic, and MCU / SOC characteristics. The basic principle is to arrange them from the top to the bottom layer according to the importance and security requirements of the display content. A more reasonable image fusion algorithm is selected to merge the contents of each layer. Schematically, disp_app_1-disp_app_N in the figure represent different display requirements, business logic, and MCU / SOC characteristics. The content to be displayed is mapped to the corresponding layer through a double buffer, and the frame interruption checkpoint is set in the process of mixing the layers before transmission to the display device.

[0034] Accordingly, after the normal scanning of each frame display content is completed in step S103, it is necessary to set the frame end interrupt service subroutine. In order to detect whether the display driver layer function is normal, it is necessary to call the checkpoint arrival service provided by the watchdog module in the interrupt, that is, record the number of checkpoint triggering times, determine whether the checkpoint is legal and save possible abnormal information for subsequent watchdog tasks to determine the legality of the checkpoint.

[0035] In step S200 of some embodiments of the present invention, determining the display frame rate of the system on chip by using the watchdog and the frame interruption checkpoint includes:

[0036] S201. Determine the watchdog's monitoring period based on the frame rate of the monitored object of the system-on-chip; S202. Calculate the number of frame scans executed by the system-on-chip based on the current display frame rate checkpoint and the count value of the system-on-chip timing counter when the system-on-chip was normal last time; S203. Determine whether the display frame rate is abnormal based on the number of frame scans executed and a preset threshold.

[0037] Furthermore, the use of the watchdog and the frame interruption checkpoint to determine the display frame rate of the system on chip further includes:

[0038] S204. If the display frame rate is judged to be normal, the current watchdog count value is saved and its accumulated frame interruption count is cleared, and then the display frame rate determination is continued; S205. If the display frame rate is judged to be abnormal, the abnormal information is saved to BackupRam and a software reset of the system on chip is initiated.

[0039] Specifically, after the above-mentioned system on chip and watchdog are initialized and confirmed to be normal, if the system timer counter detects that it is normal and the system scheduler operates normally, it can be determined that monitoring of the checkpoint is required.

[0040] Assuming the target (the display device or device corresponding to the SoC) requires a 60Hz frame rate, the system can set the total monitoring period to 166ms, which is the time required for 10 frame scans, and the time required for a single frame scan to 16ms. The range of possible frame scans within the total monitoring period is set to [8,12], with a minimum of 8 and a maximum of 12.

[0041] Obtain the system free-running timer counter value at the time the previous monitoring total period determination was completed. Combined with the latest obtained system free-running timer counter value, determine whether the total elapsed time has reached the monitoring total period (set to 166ms in this case). If not, continue monitoring without determining whether an abnormality has occurred. If the monitoring total period has been reached, calculate the number of frame scans that can be executed within the exceeded time period (for example, if the monitoring time reaches 183ms, the scan range may increase by one within the elapsed time period, reaching the range of [9,13]). At this point, obtain the accumulated count in FrameEnd (frame interruption) to determine whether the accumulated count is within the valid range.

[0042] If the result is within the above range, save the specific counter (watchdog) parameter values ​​(including the count value) and clear the accumulated frame interruption counts, and then perform polling again. If the result is not within the above range, save the exception information to BackupRam and initiate a system software reset.

[0043] In step S300 of some embodiments of the present invention, the security detection of the display content determined to be a normal frame includes the following steps: S301. Determine the output abnormality detection object of the display content; S302. Determine the allowed deviation range of pixels in the image resource of the display object based on the output abnormality detection object; S303. Based on the deviation range, periodically monitor whether the icon elements in the preset area of ​​the output image are valid.

[0044] It should be noted that the judgment of the display content requires the MCU / SOC to provide specific detection peripherals. The following strategy can be used to implement display output abnormality detection.

[0045] Specifically, S3011: determining the output abnormality detection object, first of all, it is necessary to clarify the specific point of view that if there is no specific detection peripheral assistance, it is necessary to evaluate and extract which display contents are possible objects involving human life safety.

[0046] S3021: For the above-selected object, it is necessary to set the maximum and minimum deviation values ​​allowed for the pixels in the image resource of the display object, which are used to set the specific register deviation value table during output.

[0047] S3031: Periodically monitor whether icon elements in a specific area of ​​the output image are within the valid range. Display image resources can be stored in three redundant locations. When a display anomaly occurs, the second, third, and fourth copies of image data are used sequentially for output display. If display anomalies persist within a specific time period while monitoring the three redundant copies of image data, a system reset is initiated.

[0048] refer to Figure 3 In the above embodiment, before using the watchdog and the frame interrupt checkpoint to determine the display frame rate of the system-on-chip, the method also includes: setting initial parameters of the clock counter of the system-on-chip to be detected; judging whether the clock counter of the system-on-chip is abnormal based on the initial parameters; and after determining that the clock counter of the system-on-chip is normal, determining whether the operation of the system-on-chip is abnormal.

[0049] Specifically, the steps include:

[0050] Feed the watchdog: Call the feeding function provided by the driver layer to implement periodic system watchdog feeding. The main thing is to set the internal timing counter clock of the watchdog to the pre-installed initial value and start the watchdog again.

[0051] General timer counter exception detection: Call the free-running timer counter (system clock counter) provided by the system to obtain the current system clock counter count value, and determine whether the latest count value obtained is consistent with the count value obtained previously. If they are consistent, the counter count value is read several times (configurable) in a loop. If they are still consistent, it can be determined that the system timer counter has stopped abnormally. At this time, the exception information can be saved to BackupRam and a hardware-level reset can be initiated. If the above conditions are not met, it can be determined that the free-running timer counter is still operating normally. At this time, the latest counter value can be saved as a judgment benchmark for the next time the Task runs. At the same time, the count difference between the previous run of the Task and the current run is calculated to accumulate the total time the program has run.

[0052] System operation feasibility test: Obtain the status of whether the system scheduler is operating normally. Combined with the elapsed time result of Step 3_2, determine whether a scheduling timeout exception has occurred under the premise that the system scheduler is operating normally. For example, the normal scheduling period of the watchdog is M (ms), and the set maximum allowable interval time is N (ms). If the calculated M ≥ N, the system abnormality detection permission status needs to be set to allowed, and the cumulative sum of the previous elapsed time and the current elapsed time needs to be saved.

[0053] Determine whether monitoring is necessary: ​​After the above steps are completed, if the system timing counter is detected normally and the system scheduler is running normally, it can be determined that monitoring of the checkpoint is necessary.

[0054] Example 2

[0055] refer to Figure 4 In a second aspect of the present invention, a system 1 for identifying the effectiveness of an important display function of a display device is provided, comprising: a determination module 11 for determining a frame interruption checkpoint of a system-on-chip to be detected; a judgment module 12 for determining the display frame rate of the system-on-chip by using a watchdog and the frame interruption checkpoint; and a detection module 13 for detecting the security of display content determined to be a normal frame.

[0056] Furthermore, the determination module 11 includes a first determination unit, a second determination unit and a third determination unit. The first determination unit is used to determine the division of the display layer of the system-on-chip to be detected; the second determination unit is used to determine the layer merging method based on the division of the display layer; and the third determination unit is used to determine the frame interruption checkpoint based on the layer merging method.

[0057] Example 3

[0058] refer to Figure 5 According to the third aspect of the present invention, an electronic device is provided, comprising: one or more processors; a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the method for identifying the effectiveness of the important display functions of the display device according to the first aspect of the present invention.

[0059] The electronic device 500 may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 501, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 502 or a program loaded from a storage device 508 into a random access memory (RAM) 503. Various programs and data required for the operation of the electronic device 500 are also stored in the RAM 503. The processing device 501, the ROM 502, and the RAM 503 are connected to each other via a bus 504. An input / output (I / O) interface 505 is also connected to the bus 504.

[0060] Typically, the following devices may be connected to the I / O interface 505: an input device 506 including, for example, a touch screen, a touchpad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; an output device 507 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 508 including, for example, a hard disk, etc.; and a communication device 509. The communication device 509 may allow the electronic device 500 to communicate with other devices wirelessly or by wire to exchange data. Figure 5 The electronic device 500 is shown with various devices, but it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed instead. Figure 5 Each block shown in the figure may represent one device, or may represent multiple devices as needed.

[0061] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication device 509, or installed from the storage device 508, or installed from the ROM 502. When the computer program is executed by the processing device 501, the above-mentioned functions defined in the method of the embodiment of the present disclosure are executed. It should be noted that the computer-readable medium described in the embodiment of the present disclosure can be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to, an electrical connection having one or more conductors, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In embodiments of the present disclosure, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In embodiments of the present disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such a propagated data signal may take a variety of forms, including, but not limited to, an electromagnetic signal, an optical signal, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transfer a program for use by or in conjunction with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wire, optical cable, RF (radio frequency), etc., or any suitable combination thereof.

[0062] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device. The computer-readable medium carries one or more computer programs, which, when executed by the electronic device, cause the electronic device to:

[0063] Computer program code for performing the operations of embodiments of the present disclosure may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, Python, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0064] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the module, program segment, or a part of code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order than that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of the boxes in the block diagram and / or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0065] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for evaluating the effectiveness of an important display function of a display device, characterized in that: include: determining a frame interruption checkpoint of the system-on-chip to be detected; The display frame rate of the system-on-chip is determined by using the watchdog and the frame interruption checkpoint: the monitoring period of the watchdog is determined according to the frame rate of the monitored object of the system-on-chip; the number of frame scans executed by the system-on-chip is calculated based on the current display frame rate checkpoint and the count value of the system-on-chip timing counter when the system-on-chip was previously normal; Determining whether the display frame rate is abnormal based on the number of frame scans performed and a preset threshold; The safety of the display content determined to be a normal frame is checked.

2. The method for evaluating the effectiveness of an important display function of a display device according to claim 1, wherein: Determining a frame interruption checkpoint of the system on chip to be detected includes: Determining the division of display layers of the system-on-chip to be tested; Determining a layer merging method according to the division of the display layers; Determines the frame break checkpoint based on the layer merging method.

3. The method for evaluating the effectiveness of an important display function of a display device according to claim 1, wherein: The determining of the display frame rate of the system on chip by using the watchdog and the frame interruption checkpoint further includes: If the display frame rate is judged to be normal, the current watchdog count value is saved and the accumulated frame interruption count is cleared, and then the display frame rate judgment is continued; If the display frame rate is judged to be abnormal, the abnormal information is saved to BackupRam and a software reset of the system on chip is initiated.

4. The method for evaluating the effectiveness of an important display function of a display device according to claim 1, wherein: The security detection of the display content determined to be a normal frame includes the following steps: Determine an output anomaly detection target for display content; Determining an allowable deviation range of pixels in a picture resource of a display object according to the output anomaly detection object; According to the deviation interval, whether the icon elements in the preset area of ​​the output image are valid is periodically monitored.

5. The method for evaluating the effectiveness of an important display function of a display device according to any one of claims 1 to 4, characterized in that: Before determining the display frame rate of the system on chip by using the watchdog and the frame interruption checkpoint, the method further includes: Set the initial parameters of the clock counter of the system on chip to be tested; According to the initial parameters, determining whether the clock counter of the system on chip is abnormal; After determining that the clock counter of the system on chip is normal, it is determined whether the system on chip operates abnormally.

6. A system for evaluating the effectiveness of an important display function of a display device, characterized in that: include: A determination module, configured to determine a frame interruption checkpoint of a system-on-chip to be detected; a determination module configured to determine the display frame rate of the system-on-chip using the watchdog and the frame interruption checkpoint: determining a monitoring period of the watchdog based on the frame rate of the monitored object of the system-on-chip; and calculating the number of frame scans executed by the system-on-chip based on the current display frame rate checkpoint and the count value of the system-on-chip timing counter when the system-on-chip was previously normal; Determining whether the display frame rate is abnormal based on the number of frame scans performed and a preset threshold; The detection module is used to detect the security of the display content determined to be a normal frame.

7. The system for evaluating the effectiveness of important display functions of a display device according to claim 6, wherein: The determining module includes a first determining unit, a second determining unit and a third determining unit, The first determining unit is configured to determine the division of display layers of the system-on-chip to be detected; The second determining unit is configured to determine a layer merging method according to the division of the display layers; The third determining unit is used to determine the frame interruption checkpoint according to the layer merging method.

8. An electronic device comprising: one or more processors; A storage device for storing one or more programs, which, when executed by the one or more processors, enables the one or more processors to implement the method for identifying the effectiveness of important display functions of a display device as described in any one of claims 1 to 5.

9. A computer-readable medium having a computer program stored thereon, wherein: When the computer program is executed by a processor, the computer program realizes the method for evaluating the effectiveness of an important display function of a display device according to any one of claims 1 to 5.

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