Low parasitic capacitance mems inertial sensor and related methods

Abstract

Microelectromechanical system (MEMS) inertial sensors exhibiting reduced parasitic capacitance are described. The reduction in parasitic capacitance can be achieved by forming localized regions of thick dielectric material. These localized regions can be formed inside a trench. Forming the trench can increase the vertical separation between a sense capacitor and a substrate, thereby reducing the parasitic capacitance of the region. A fixed electrode of the sense capacitor can be placed between the proof mass and the trench. The trench can be filled with a dielectric material. In some cases, a portion of the trench can be filled with air, thereby further reducing the parasitic capacitance. These MEMS inertial sensors can be used as accelerometers and / or gyroscopes in other types of inertial sensors. Fabricating these trenches can involve lateral oxidation, whereby a column of semiconductor material is oxidized.

Description

[0001] Cross-referencing related applications

[0002] This application is a successor to U.S. Patent Application Serial No. 16 / 457,865, filed on June 28, 2019, pursuant to 35 U.SC § 120, Attorney’s File No. G0766.70275US00, entitled “Low Parasitic Capacitance MEMS Inertial Sensor and Related Methods”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The technology described in this application relates to microelectromechanical systems (MEMS) inertial sensors, such as accelerometers and gyroscopes. Background Technology

[0004] Inertial sensors are electronic devices that measure and report motion, force, angular rate, and / or other quantities. Examples of inertial sensors include gyroscopes and accelerometers. MEMS gyroscopes detect angular motion by sensing acceleration generated by the Coriolis force, which is produced when the gyroscope's resonant mass undergoes angular motion. MEMS accelerometers detect linear and / or angular acceleration. Summary of the Invention

[0005] According to aspects of this application, a microelectromechanical system (MEMS) inertial sensor exhibiting reduced parasitic capacitance is provided. The reduction in parasitic capacitance can be achieved by forming localized regions of thick dielectric material. These localized regions can be formed within trenches. Forming trenches increases the vertical spacing between the sensing capacitor and the substrate, thereby reducing the parasitic capacitance in that region. The fixed electrodes of the sensing capacitor can be positioned between the detection mass and the trench. The trenches can be filled with a dielectric material. In some cases, portions of the trenches can be filled with air, further reducing parasitic capacitance. In other types of inertial sensors, these MEMS inertial sensors can be used as accelerometers and / or gyroscopes. Fabricating these trenches may involve lateral oxidation, thereby oxidizing pillars of semiconductor material.

[0006] According to another aspect of this application, a MEMS inertial sensor is provided. The MEMS inertial sensor may include: a substrate; a detection mass coupled to the substrate; a trench formed in the substrate, the trench being at least partially filled with a dielectric material, the trench at least partially overlapping the detection mass along a direction perpendicular to a first surface of the substrate; and an electrode formed above the trench, the electrode and the detection mass forming a sensing capacitor, the sensing capacitor being configured to sense the motion of the detection mass relative to the substrate in response to the acceleration of the MEMS inertial sensor.

[0007] According to another aspect of this application, a MEMS inertial sensor is provided. The MEMS inertial sensor may include: a substrate having a first surface; a detection mass block coupled to the substrate; a trench formed in the substrate; a dielectric layer disposed on the first surface of the substrate; a dielectric material region disposed in the trench, the dielectric material region being thicker than the dielectric layer relative to a direction perpendicular to the first surface of the substrate; and an electrode formed above the trench.

[0008] According to another aspect of this application, a method for manufacturing a MEMS inertial sensor is provided. The method may include: etching a substrate to form a plurality of semiconductor material pillars spaced apart from each other by a plurality of gaps including a first gap; oxidizing the plurality of semiconductor material pillars to fill at least a portion of the first gap with an oxide material; forming an electrode over the oxide material; and forming a detection mass block suspended over the substrate. Attached Figure Description

[0009] Various aspects and embodiments of this application will be described with reference to the following accompanying drawings. It should be understood that these drawings are not necessarily drawn to scale. Items appearing in multiple drawings are denoted by the same reference numerals in all the drawings in which they appear.

[0010] Figure 1 This is a schematic diagram illustrating an example of a MEMS inertial sensor according to some non-limiting embodiments.

[0011] Figure 2 This is a schematic diagram illustrating an example of a MEMS inertial sensor having trenches formed in a substrate, according to some non-limiting embodiments.

[0012] Figure 3 The following is illustrated in more detail according to some non-limiting embodiments. Figure 2 A schematic diagram of a portion of a MEMS inertial sensor.

[0013] Figures 4A-4F These are schematic diagrams illustrating examples of processes for manufacturing MEMS inertial sensors according to some non-limiting embodiments.

[0014] Figure 5 This is a schematic diagram illustrating an example of an inertial sensor having trenches with multiple rows of semiconductor material according to some non-limiting embodiments.

[0015] Figure 6 This is a block diagram illustrating an example of a system including a MEMS inertial sensor according to some non-limiting embodiments.

[0016] Figure 7 The illustration includes some non-limiting embodiments. Figure 6 A schematic diagram of a car system.

[0017] Figure 8 The illustration includes some non-limiting embodiments. Figure 6 A schematic diagram of a smartphone system. Detailed Implementation

[0018] The applicant has recognized that the sensitivity of certain inertial sensors to detect physical quantities (such as acceleration or rotational rate) is negatively affected by noise generated due to the presence of parasitic capacitance. The effect of parasitic capacitance on the sensitivity of inertial sensors is particularly detrimental to those that rely on sensing capacitors to detect the measurand. In fact, in these inertial sensors, the noise picked up by parasitic capacitance is, to some extent, indistinguishable from the electrical signal generated by the sensing capacitor in response to the measurand (e.g., acceleration or rotational rate). As a result, the inertial sensor is less sensitive to the quantity being measured, thus limiting its practicality.

[0019] The applicant has recognized that parasitic capacitance occurs in some inertial sensors due to the presence of a substrate beneath the sensing capacitor. Specifically, parasitic capacitance appears in the region between the sensing capacitor and the substrate. This region is sometimes occupied by a thin layer of dielectric material deposited on the top surface of the substrate. Examples of parasitic capacitance include “backside capacitance” and “substrate capacitance”.

[0020] This application relates to MEMS inertial sensors in which parasitic capacitance is reduced by forming local regions of thick dielectric material. In some embodiments, such local regions of thick dielectric material are formed between a sensing capacitor and an underlying substrate.

[0021] In some embodiments, localized regions of thick dielectric material are formed within trenches formed in the substrate beneath the sensing capacitor. The applicant has recognized that the presence of trenches in the substrate beneath the sensing capacitor effectively increases the vertical spacing between the substrate and the sensing capacitor, resulting in a reduction in capacitance. These trenches may be partially or completely filled with dielectric material. For example, in inertial sensors formed on a semiconductor substrate (e.g., silicon), the trenches may be filled with silicon oxide or other types of oxides, or silicon nitride, etc. In other embodiments, air may be filled in the trenches, with a dielectric constant lower than that of the dielectric material, thereby further reducing parasitic capacitance.

[0022] The applicant has recognized a challenge associated with the formation of localized regions of thick dielectric material, stemming from the relatively low growth rate of the dielectric material on the semiconductor substrate. For example, in the oxidation of silicon along the 100°C direction, it takes approximately four hours at 12000°C to obtain a 0.4 μm thick silicon oxide layer. At this rate, growing a sufficiently thick silicon oxide layer to reduce the parasitic capacitance of the sensor to an acceptable level could take an excessively long time. This approach is not feasible because it increases manufacturing lead time, thereby increasing manufacturing costs.

[0023] This application relates to MEMS inertial sensors designed to reduce parasitic capacitance while minimizing delivery time and manufacturing costs. To increase the rate of forming thick dielectric material regions, in some embodiments, trenches are designed such that when dielectric material is formed therein, growth occurs at least partially in the lateral direction. As described further in detail below, allowing the dielectric material to grow laterally can accelerate the rate of trench filling (whether fully or partially filled).

[0024] In some embodiments, lateral dielectric growth can be achieved by forming multiple rows of semiconductor material in a substrate and oxidizing (partially or completely) these rows. In this way, oxidation occurs laterally in the gaps between the columns. If the semiconductor material rows are placed close enough to each other, the distance the dielectric material must travel before closing the gaps is short, thereby reducing the time required to form thick dielectric material regions.

[0025] Figure 1 This is a schematic diagram illustrating an example of a MEMS inertial sensor according to some non-limiting embodiments. The inertial sensor 100 is formed on a substrate 101 and includes a detection mass block 102, an anchor 104, a dielectric layer 106, and electrodes 108 and 110.

[0026] The substrate 101 may be made of any suitable material, including but not limited to silicon or other semiconductor materials. The detection mass block 102 may be made of materials such as undoped silicon, polycrystalline silicon, doped silicon, or combinations thereof. The detection mass block 102 may be conductive, or at least have conductive portions. For example, the surface of the detection mass block 102 facing the substrate 101 may be conductive. In some embodiments, the detection mass block 102 may comprise a mixture of materials, such as a dielectric material (or undoped silicon) having a conductive shell (e.g., doped silicon, aluminum, or copper). The anchor 104 may be made of the same material as or a different material from the mass block 102. The anchor 104 couples the detection mass block 102 to the substrate 101. The anchor 104 may be formed as a vertical pillar on the substrate 101 (e.g., ...). Figure 1 (as shown), or it can be part of the frame to which the quality block 102 is attached.

[0027] The dielectric layer 106 can be made of any suitable dielectric material, including but not limited to silicon oxide or other types of oxides, silicon nitride, or combinations thereof. Electrodes 108 and 110 can be made of any conductive material, including copper and aluminum. Conductive traces ( Figure 1 (Not shown) This can be used to route electrical signals between the MEMS inertial sensor 100 and other electronic circuitry formed on the substrate 101. Similar to electrodes 108 and 110, conductive traces can be deposited on top of the dielectric layer 106. The conductive traces can be routed to bonding pads, which can be wire-bonded to electronic circuitry formed on a chip other than the substrate 101. However, in some embodiments, such electronic circuitry can be formed on the substrate 101.

[0028] like Figure 1 As shown, a dielectric layer 106 is formed above the top surface 120 of the substrate 101. In this example, the top surface 120 is located in the xy plane, but not all embodiments are limited to this arrangement.

[0029] In other types of inertial sensors, the MEMS inertial sensor 100 can be used as an accelerometer or at least a portion thereof, and / or a gyroscope or at least a portion thereof. For example, the inertial sensor 100 can detect the degree to which the mass block 102 is tilted out of a plane (e.g., away from the plane defined by the top surface of the detected mass block 102, which is located at...). Figure 1 In the example, the xy-plane is used to sense acceleration oriented along the z-axis. Z-axis acceleration can occur in response to a variety of possible causes, including, for example, Coriolis forces or, more simply, the motion of an inertial sensor along the z-axis. The degree to which the mass block tilts out of the plane can be sensed by sensing the degree of capacitance change of one or more sensing capacitors. Figure 1 In the example, the sensing capacitor C S1 and C S2 It can be used for this purpose.

[0030] Capacitor C S1 A capacitor C is formed between electrode 108 and detection mass block 102. S2 A detection mass block 102 is formed between electrode 110 and detection mass block 102. Electrodes 108 and 110 are stationary (e.g., rigidly movable relative to substrate 101), while detection mass block 102 is free to move relative to substrate 101. Figure 1 In the example, capacitor C S1 and C S2 It is configured to differentially sense the out-of-plane motion of the detection mass 102. For example, when the detection mass 102 is tilted clockwise in the xz plane, the distance between the detection mass 102 and the electrode 110 decreases, thereby increasing the sensing capacitor C. S2The capacitance is reduced, and the distance between the detection mass block 102 and the electrode 108 is increased, thereby reducing the sensing capacitor C. S1 The capacitance. Similarly, when the detection mass 102 is tilted counterclockwise in the xz plane, the gap between the detection mass 102 and the electrode 110 increases, thereby reducing the sensing capacitor C. S2 The capacitance is increased, and the gap between the detection mass block 102 and the electrode 108 is reduced, thereby increasing the sensing capacitor C. S1 The capacitance. In some embodiments, the sensing capacitor C S1 and C S2 The capacitance can be represented by the spacing between each electrode and the detection mass block 102. For example, it can be represented by the following expression C. S1 =ε0ε1A1 / d1 to represent C S1 The capacitance, where ε0 is the vacuum permittivity and ε1 is the capacitance C. S1 The relative permittivity of the materials between the terminals, A1 is the capacitor C S1 The area is d1, where d1 is the distance between electrode 108 and detection mass block 102. A similar expression applies to C. S2 .

[0031] like Figure 1 As further shown, the parasitic capacitance is formed through the dielectric layer 106 between the sensing capacitor and the underlying substrate 101. For example, the parasitic capacitance C p1 It appears between electrode 108 and substrate 101, while parasitic capacitance C p2 It appears between electrode 110 and substrate 101. Therefore, electrode 108 and substrate 101 can be regarded as capacitor C. p1 The terminals, and the electrode 110 and the substrate 101 can be regarded as capacitor C. p2 The terminals. These parasitic capacitances affect the reception of the sensing capacitor C. S1 and C S2 The detection circuit of the generated signal ( Figure 1 Noise (not shown in the diagram) contributes to this. This noise negatively impacts the inertial sensor's ability to accurately detect acceleration or rotational speed. In some embodiments, the noise present in the detection circuit is actually proportional to the following amount: (C sense +C parasitic +C routing +C amp ) / (C sense ), where C sense C represents the total capacitance of the sensing capacitor. parasitic C represents the total parasitic capacitance. routing C represents the total capacitance associated with the conductive trace. ampThis represents the input capacitance of the amplification stage in the detection circuit. Therefore, the presence of parasitic capacitance directly affects the noise of the detection circuit.

[0032] Parasitic capacitance can be expressed by the spacing between its terminals and the dielectric constant of the material between the terminals. For example, C p1 The capacitance can be expressed by the following expression C p1 =ε0ε p A p / d p It means that ε p A is the relative permittivity of the material between the capacitor terminals. p Let d be the area of ​​the capacitor. p For separation between terminals.

[0033] This application relates to techniques for reducing noise at the detection circuitry of a MEMS inertial sensor due to parasitic capacitance. In some embodiments, this noise can be reduced by increasing the spacing between its terminals. Figure 1 The parasitic capacitance shown is illustrated. For example, in some embodiments, the parasitic capacitance can be reduced by forming trenches in the substrate and by partially or completely filling the trenches with a dielectric material or with air.

[0034] According to some non-limiting embodiments, examples of this arrangement are shown in Figure 2 As shown in the figure. Similar to MEMS inertial sensor 100, MEMS inertial sensor 200 is formed on substrate 101 and includes a detection mass block 102, an anchor 104, a dielectric layer 106, and electrodes 108 and 110. MEMS inertial sensor 200 further includes trenches 208 and 210 formed in the substrate below electrodes 108 and 110.

[0035] Similar to MEMS inertial sensor 100, MEMS inertial sensor 200 can be used as an accelerometer or at least a portion thereof and / or a gyroscope or at least a portion thereof, as well as other types of inertial sensors. For example, inertial sensor 200 can sense acceleration oriented along the z-axis, but aspects of this application are not limited in this respect, as they can also be applied to inertial sensors configured to detect in-plane acceleration.

[0036] In some embodiments, such as Figure 2 As shown, the trench can at least partially overlap with the detection mass block 102 along the z-axis. As a result, at least a portion of the trench is below the detection mass block 102. In some embodiments, the electrode can be positioned along the z-axis between the detection mass block 102 and the corresponding trench. For example, as... Figure 2 As shown, electrode 108 is placed between the detection mass block 102 and the trench 208.

[0037] Combined with the following text Figure 3 As described in detail, trenches 208 and 210 are arranged to reduce the size of the MEMS inertial sensor relative to C. p1 and C p2 parasitic capacitance (see) Figure 1 Trench 208 and 210 may be partially or completely filled with a dielectric material to provide mechanical stability, or they may be filled with air. For example, in some embodiments, substrate 101 may be made of silicon and the trenches may be filled with silicon oxide. (Relative to...) Figure 1 The arrangement Figure 2 The arrangement effectively increases the vertical spacing (on the z-axis) between the substrate and the sensing electrodes, thereby reducing parasitic capacitance. The dielectric material filling trenches 208 and 210 can be the same material used in dielectric layer 106 (e.g., silicon oxide) or a different material.

[0038] In some embodiments, portions of trenches 208 and 210 may be filled with air. Since the relative permittivity of air is approximately 1, filling portions of the trenches with air can further reduce parasitic capacitance.

[0039] In some embodiments, conductive traces may be used to route electrical signals between the MEMS inertial sensor 200 and other electronic circuits. Figure 2 Trenches of the type described herein are formed in the substrate below (not shown) to reduce parasitic capacitance associated with such conductive traces. Similar to trenches 208 and 210, these trenches may be partially or completely filled with at least one of a dielectric material or air.

[0040] Figure 3 The following is illustrated in more detail according to some non-limiting embodiments. Figure 2 A schematic diagram of a portion of a MEMS inertial sensor. Specifically, Figure 3 The groove 208 is shown in more detail. Figure 3 The groove 210, not shown, may have a connection with the joint. Figure 3Similar features to those described herein. In some embodiments, trench 208 may be defined in the xy plane by sidewalls 302 and 304. In some embodiments, sidewalls 302 and 304 may be substantially vertical (e.g., parallel to the z-axis, or offset at an angle of 50° or less relative to the z-axis). Substantially vertical sidewalls can be obtained by etching the substrate using anisotropic etching processes, including, for example, reactive ion etching (RIE). Anisotropic etching techniques enable the formation of trenches deeper than other types of grooves formed by isotropic etching techniques. Deep trenches are desirable in some embodiments because they result in greater separation between the terminals of parasitic capacitance, and thus lower capacitance. However, it should be understood that isotropic etching techniques can be used in some embodiments to form one or more trenches of the type described herein. However, it should be understood that sidewalls 302 and 304 may be at any suitable angle relative to the z-axis, as the application is not limited to substantially vertical sidewalls. In some embodiments, for example, a triangular-shaped trench may be used, with the sidewalls converging at the bottom of the trench.

[0041] In some embodiments, trench 208 may be partially or completely filled with a dielectric material. The dielectric material in the trench (along the z-axis) may be thicker than dielectric layer 106. Figure 3 In this context, the thickness (t1) of dielectric layer 106 and the thickness (t2) of trench 208 are defined relative to the top surface 120 of substrate 101. Thicknesses t1 and t2 are relative to the z-axis. The ratio t2 / t1 may be between 1.5 and 100, 1.5 to 50, 1.5 to 25, 1.5 to 10, 1.5 to 5, 2 to 100, 2 to 50, 2 to 25, 2 to 10, 2 to 5, 5 to 100, 5 and 50, 5 and 25, or 5 and 10. Other ratios are also possible.

[0042] Thickness t1 can be between 0.1 μm and 5 μm, between 0.5 μm and 5 μm, between 1 μm and 5 μm, between 2 μm and 5 μm, between 3 μm and 5 μm, between 4 μm and 5 μm, between 0.1 μm and 3 μm, between 0.5 μm and 3 μm, between 1 μm and 3 μm, between 2 μm and 3 μm, between 0.1 μm and 2 μm, between 0.5 μm and 2 μm, between 1 μm and 2 μm, between 0.1 μm and 1.5 μm, between 0.5 μm and 1.5 μm, between 1 μm and 1.5 μm, between 0.1 μm and 1 μm, between 0.5 μm and 1 μm, between 0.1 μm and 0.5 μm, and between 0.5 μm and 1 μm. Other ranges outside these are also possible. In some embodiments, dielectric layer 106 may be omitted (making t1 = 0).

[0043] Thickness t2 can be between 1μm and 20μm, between 2.5μm and 20μm, between 5μm and 20μm, between 7.5μm and 20μm, between 10μm and 20μm, between 15μm and 20μm, between 1μm and 10μm, between 2.5μm and 10μm, between 5μm and 10μm, between 7.5μm and 10μm, between 1μm and 8μm, between 2μm and 8μm, between 4μm and 8μm, between 6μm and 8μm, between 1μm and 6μm, between 2μm and 6μm, between 6μm and 8μm, between 1μm and 4μm, and between 2μm and 4μm. Alternatively or additionally, the thickness t2 may be greater than 20 μm, greater than 50 μm, greater than 100 μm, greater than 300 μm, greater than 500 μm, or greater than 700 μm, but less than the total thickness of the substrate 101. Other ranges outside these ranges are also possible.

[0044] The width of the grooves 208(w) on the x and y axes can be between 1 μm and 400 μm, between 25 μm and 400 μm, between 50 μm and 400 μm, between 75 μm and 400 μm, between 100 μm and 400 μm, between 150 μm and 400 μm, between 1 μm and 200 μm, between 25 μm and 200 μm, between 50 μm and... The width of the groove 208 on the x-axis can be between 200 μm, 75 μm and 200 μm, 1 μm and 100 μm, 20 μm and 100 μm, 40 μm and 100 μm, 60 μm and 100 μm, 1 μm and 50 μm, 20 μm and 50 μm, 30 μm and 50 μm, 1 μm and 10 μm, and 5 μm and 10 μm. Other ranges outside these are also possible. The width of the groove 208 on the x-axis can be equal to or different from the width of the groove 208 on the y-axis.

[0045] exist Figure 3 In the example, the distance between electrode 108 and substrate 101 along the z-axis is t1+t2, which is greater than... Figure 1 The distance between the middle electrode 108 and the top surface 120 is equal to t2. The result is the parasitic capacitance C. PT Less than the parasitic capacitance C p1 This reduction in the parasitic capacitance associated with electrode 108 results in a reduction in the noise present in the detection circuit, and thus an increase in the sensitivity of the MEMS inertial sensor 200 to the quantity to be detected (e.g., acceleration and / or angular rate of motion).

[0046] In some embodiments, it may be desirable to form very deep trenches 208 (e.g., t2 greater than 3 μm) to significantly reduce capacitance. However, the applicant has recognized that forming localized regions of thick dielectric material can be challenging due to the relatively low growth rate of the dielectric material.

[0047] The applicant has recognized that by allowing the dielectric material to grow in the lateral direction during the manufacturing process, the time required to form localized areas of thick dielectric material (such as the area inside trench 208) can be significantly reduced. In some embodiments, lateral dielectric growth can be achieved by forming multiple rows of semiconductor material in a substrate and by (partially or completely) oxidizing the rows of semiconductor material. Examples of such a manufacturing process are provided according to some non-limiting embodiments. Figures 4A-4F As shown in the diagram. It should be understood that the manufacturing processes of the types described herein are not limited to... Figures 4A-4F The order of these steps can be changed as needed, because some (or all) of these steps can be changed.

[0048] like Figure 4A As shown, a substrate 101 is provided. The substrate 101 may be made of any suitable semiconductor material, including, for example, silicon (doped or undoped) or polysilicon.

[0049] exist Figure 4B In the manufacturing process, multiple columns 402 of semiconductor material are formed in the substrate 101. The columns 402 can extend along the z-axis. The columns 402 can have any suitable shape, including cylindrical and rectangular shapes. The shape of the columns 402 can be regular (such that the width W... A (Constant along the z-axis) or can be irregular (making the width W) A (Varies along the z-axis). Columns 402 can be separated from each other by gaps 404. In some embodiments, gaps 404 can be filled with air. The shape of gaps 404 can be regular (such that the width W...). B (Constant along the z-axis) or can be irregular (making the width W) B (Varies along the z-axis). In some embodiments, the gap 404 and pillar 402 can be formed by selectively etching (using photolithography) the substrate 101. Selective etching can include anisotropic etching, such as RIE. The depth of the gap 404 relative to the top surface 120 along the z-axis can be equal to t2 (see... Figure 3 ).

[0050] Width W A It can be between 0.1μm and 5μm, between 0.1μm and 3μm, between 0.1μm and 2μm, between 0.1μm and 1μm, between 0.5μm and 2μm, or between 0.5μm and 1μm. Other ranges outside these are also possible.

[0051] Width W B It can be between 0.1μm and 5μm, between 0.5μm and 3μm, between 0.1μm and 2μm, between 0.1μm and 1μm, between 0.5μm and 2μm, or between 0.5μm and 1μm. Other ranges outside these are also possible.

[0052] exist Figure 4C In the manufacturing process, dielectric material 406 is formed. For example, dielectric material 406 can be formed by oxidizing patterned substrate 101. Outside the etched area, and at the top of column 402, oxidation can occur in the vertical direction (along the z-axis). Additionally, lateral oxidation (along the x-axis and / or y-axis) may occur in the voids 404. Lateral oxidation may occur due to the oxidation of the sidewalls of column 402. As the oxide advances in the lateral direction, the width W of column 402 and void 404... A and W B The oxidation decreases. This is because the oxide travels in two directions: from the sidewalls of the pillars towards the center (thus consuming a portion of the pillar), and from the sidewalls of the pillars away from the center (thus consuming a portion of the voids). In some embodiments, oxidation may continue until all of each column 402 and all of each void 404 has been consumed by silicon oxide, as... Figure 4D As shown. However, in other embodiments, a portion of one or more voids 404 and / or a portion of one or more pillars 402 may remain unoxidized. This situation is... Figure 5 The diagram shows that oxidation is stopped when void 404 has reached width W3, column 402 has reached width W1, and the oxidized region has reached width W2. In some embodiments, oxidation can be stopped before the entire region is consumed by oxide, allowing the presence of air to further reduce parasitic capacitance. In some embodiments, for example, the thicknesses of void 404 and column 402 can be selected such that unoxidized residual voids remain even when the entire column has been consumed by oxide.

[0053] Different manufacturing techniques can be used to form the dielectric layer 406. For example, in some embodiments, the dielectric layer can be formed by thermal oxidation (in a dry or humid environment), plasma-enhanced chemical vapor deposition (PECVD) (e.g., using tetraethyl orthosilicate (TEOS) as a precursor), and nitric acid oxidation of silicon (NAOS). Among these, thermal oxidation results in lower levels of mechanical stress due to the high temperatures involved in the oxidation process, but delivery times may be longer.

[0054] It should be understood that, in some embodiments, as Figure 4C As part of the manufacturing process, it can be formed simultaneously. Figure 3The dielectric layer 106 and dielectric material are located within the trench. However, in other embodiments, the dielectric layer 106 and... Figure 3 The dielectric material within the trench can be formed separately.

[0055] Optionally, in Figure 4D During the manufacturing process, planarization can be performed to flatten the top surface of the dielectric material. Possible planarization techniques include chemical mechanical polishing (CMP), thermal reflow, and deposition of additional dielectric layers.

[0056] exist Figure 4E In the manufacturing process, electrode 108 is formed. In some embodiments, electrode 108 is formed over a region of thick dielectric material such that electrode 108 overlaps with the thick dielectric material along the z-axis. Figure 2 As shown, electrode 108 can be used as a terminal of a sensing capacitor. In some embodiments, conductive traces ( Figure 4E (not shown in the image) is also present Figure 4E It is patterned during the manufacturing process.

[0057] exist Figure 4F In the manufacturing steps, an anchor 104 and a detection mass block 102 are formed. In some embodiments, the formation of the detection mass block 102 involves the formation and release of a sacrificial layer. The detection mass block 102 may be formed to overlap with a region of thick dielectric material and to overlap with the electrode 108 along the z-axis.

[0058] MEMS inertial sensors of the type described herein can be used as accelerometers to sense acceleration in one, two, or three directions. Alternatively, MEMS inertial sensors of the type described herein can be used as gyroscopes to sense angular rates of motion in one, two, or three directions. These types of gyroscopes can be configured to sense pitch and / or roll and / or yaw rates. When used as gyroscopes, MEMS inertial sensors of the type described herein can be coupled to circuitry for inducing resonant oscillations. The resonator can be the sensing mass 102 itself, or other parts of the MEMS inertial sensor.

[0059] As described above, the detection circuitry can be coupled to sensing capacitors and can be configured to sense changes in the capacitance of these capacitors. In some embodiments, the detection circuitry can be disposed on substrate 101. In other embodiments, the detection circuitry can be disposed on a separate substrate, which can be bonded (e.g., wire bonding or flip bonding) to substrate 101. These substrates may or may not be encapsulated within a common housing.

[0060] Figure 6This is a block diagram illustrating a system 600 including a MEMS inertial sensor 602, a power supply unit 604, a detection circuit 606, and an input / output (I / O) interface 608. The MEMS inertial sensor 602 may include, for example, a MEMS inertial sensor 200, and optionally, may be based on... Figures 4A-4F The process involves several steps. MEMS inertial sensors can be configured, for example, to sense the acceleration and / or angular rate of motion.

[0061] System 600 can periodically transmit data representing sensed acceleration and / or angular rate to an external monitoring system, such as a computer, smartphone, tablet, smartwatch, smart glasses, or any other suitable receiving device, via a wired or wireless connection. I / O interface 608 can be configured to transmit and / or receive data via Wi-Fi, Bluetooth, Bluetooth Low Energy (BLE), Zigbee, Thread, ANT, ANT+, IEEE 802.15.4, IEEE 802.11ah, or any other suitable wireless communication protocol. Alternatively or additionally, I / O interface 608 can be configured to use proprietary connectivity protocols to transmit and / or receive data. I / O interface 608 may include one or more antennas, such as microstrip antennas. In some embodiments, I / O interface 608 can be connected to a cable and can be configured to transmit and / or receive signals over the cable.

[0062] System 600 can be powered by power supply unit 604. Power supply unit 604 can be configured to power detection circuitry 606, I / O interface 608, MEMS inertial sensor 602, or any suitable combination thereof. In some embodiments, power supply unit 604 may include one or more batteries. In at least some embodiments, system 600 can consume sufficiently little power to allow it to operate for extended periods based solely on battery power. In some embodiments, the one or more batteries may be rechargeable. Power supply unit 604 may include one or more lithium-ion batteries, lithium polymer (LiPo) batteries, supercapacitor-based batteries, alkaline batteries, aluminum-ion batteries, mercury batteries, dry cell batteries, zinc-carbon batteries, nickel-cadmium batteries, graphene batteries, or any other suitable type of battery. In some embodiments, power supply unit 604 may include circuitry for converting AC power to DC power. For example, power supply unit 604 may receive AC power from an external power source, such as through I / O interface 608, and may provide DC power to some or all components of system 600. In this case, power supply unit 604 may include a rectifier, voltage regulator, DC-DC converter, or any other suitable device for power conversion.

[0063] In some embodiments, power unit 604 may include energy harvesting components and / or energy storage components. Energy can be harvested from and stored from the surrounding environment to power system 600 when needed, which may include periodic, random, or continuous power supply. The type of energy harvesting component implemented may be selected based on the expected environment of system 600, such as the expected amplitude and frequency of motion that system 600 may experience, the amount of pressure that the system may experience, the amount of exposure that the system may experience, and / or the temperature that the system may be exposed to, as well as other possible considerations. Examples of suitable energy harvesting technologies include thermoelectric energy harvesting, magnetic vibration harvesting, electrical overstress harvesting, photovoltaic harvesting, radio frequency harvesting, and kinetic energy harvesting. In some embodiments, energy storage components may include supercapacitors.

[0064] System 600 can be deployed in a variety of settings to detect acceleration and / or angular rate (and other possible physical quantities), including sports, healthcare, consumer, military, and industrial applications. Some non-limiting examples are now described. System 600 can be a wearable sensor deployed in monitoring motion-related physical activity and performance, patient health, military personnel activity, or other applications of interest to the user. System 600 can be integrated into a smartphone and can be configured to sense roll, yaw, and / or pitch rate and / or acceleration in one, two, or three dimensions.

[0065] One such setup is in a car or other means of transportation, such as a ship or airplane. Figure 7 A vehicle 700 including system 600 is schematically shown. System 600 can be positioned at any suitable location within the vehicle 700. System 600 can be configured to sense roll, pitch, and / or yaw rate and / or acceleration in one, two, or three dimensions. System 600 can be configured to provide the sensed angular rate and / or acceleration to a computer system located within the vehicle 700 and / or at a base station located outside the vehicle 700 using I / O interface 608. System 600 can provide information to a navigation system (including an autopilot system) installed in the vehicle 700. Alternatively or additionally, system 600 can provide information to an automatic steering system and / or an automatic braking system.

[0066] In some embodiments, system 600 may be part of a wearable device. For example, system 600 may be part of an earphone, a smartwatch, or a smartphone 801 (such as...). Figure 8 (As shown) Installation. Other environments where System 600 can be deployed include tablets, laptops, smart glasses, medical devices, sports equipment, etc.

[0067] The aspects of the technology described herein may provide one or more benefits, some of which have already been described previously. Some examples of these benefits are described now. It should be understood that not all aspects and embodiments are required to provide all the benefits described herein. Furthermore, it should be understood that aspects of the technology described herein may provide additional benefits to those described herein.

[0068] Aspects of the technology described herein provide MEMS inertial sensors with reduced parasitic capacitance, resulting in reduced noise in the detection circuitry, thereby increasing the sensitivity of the inertial sensor to the physical quantity to be measured (e.g., acceleration and / or angular rate of motion). In some embodiments, the noise present in MEMS inertial sensors of the type described herein is three times lower (or even less in some embodiments) than that present in other types of MEMS inertial sensors. A further aspect of the technology described herein provides a low-cost technique for fabricating low-parasitic-capacitance MEMS inertial sensors.

[0069] The terms “approximately,” “substantially,” and “probably” can be used to indicate within ±20% of the target value in some embodiments, within ±10% of the target value in some embodiments, within ±5% of the target value in some embodiments, and within ±2% of the target value in some embodiments. The terms “approximately,” “substantially,” and “probably” can include the target value.

Claims

1. A method for manufacturing a microelectromechanical system (MEMS) inertial sensor, the method comprising: The substrate is etched from a first surface to form a plurality of semiconductor material pillars spaced apart from each other by a plurality of gaps, the plurality of gaps including the first gap; The substrate is subjected to an oxidation process to oxidize at least the plurality of semiconductor material pillars so as to fill at least a portion of the first gap with an oxide material; An electrode is formed on the oxide material; and A detection mass block is formed and suspended above the first surface of the substrate.

2. The method of claim 1, wherein oxidizing the plurality of semiconductor material pillars comprises: The plurality of semiconductor material pillars are oxidized to fill the entire first gap with the oxide material.

3. The method of claim 1, characterized in that it comprises one of the following: The method further includes forming a dielectric layer on the substrate and the oxide material; or The oxidation process further oxidizes the substrate to form a dielectric layer on a first surface of the substrate, the dielectric layer being in contact with the oxide material, the oxide material being thicker than the dielectric layer.

4. The method of claim 1, wherein etching the substrate to form the plurality of semiconductor material pillars comprises performing deep reactive ion etching, and The etching of the substrate to form the plurality of semiconductor material pillars includes etching the substrate to form the plurality of semiconductor material pillars with a height between 2µm and 20µm.

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