Display substrate and display device

Abstract

A display substrate and a display device. The display substrate includes a first power signal line and a pixel defining layer. The first power signal line includes a first sub-power signal line extending in a first direction and a second sub-power signal line extending in a second direction; the pixel defining layer includes a plurality of openings to define effective light-emitting regions of a plurality of sub-pixels, the plurality of sub-pixels include a sub-pixel pair composed of two sub-pixels arranged in the second direction, and the sub-pixel pair includes two sub-effective light-emitting regions having a gap therebetween. In a plan view, the first sub-power signal line passes through the gap between the two sub-effective light-emitting regions, at least one second sub-power signal line includes a break, and the two sub-effective light-emitting regions are located at the break so that a virtual straight line connecting two end points of the break of the second sub-power signal line penetrates through the two sub-effective light-emitting regions. The break provided in the second sub-power signal line can reduce the overlap between the two sub-effective light-emitting regions and the first power signal line, and reduce the color shift of the sub-pixel pair.

Description

Technical Field

[0001] At least one embodiment of the present disclosure relates to a display substrate and a display device. Background Art

[0002] Organic light-emitting diodes have the advantages of self-luminescence, high efficiency, bright colors, thinness, light weight, and power saving, and have been gradually applied to large-area displays, lighting, and vehicle-mounted displays. In order to improve the uniformity of an organic light-emitting diode display device, a structure of two layers of power signal lines may be adopted, and the power signal lines on the side close to the light-emitting layer of the organic light-emitting diode form a grid pattern to reduce the voltage drop of the power signal lines. Summary of the Invention

[0003] At least one embodiment of the present disclosure provides a display substrate and a display device.

[0004] At least one embodiment of the present disclosure provides a display substrate, including: a substrate; a first power signal line located on the substrate, the first power signal line including a plurality of first sub-power signal lines extending in a first direction and a plurality of second sub-power signal lines extending in a second direction, the first sub-power signal lines being connected to the second sub-power signal lines; a pixel defining layer located on a side of the first power signal line away from the substrate, the pixel defining layer including a plurality of openings to define effective light-emitting regions of a plurality of sub-pixels, the plurality of sub-pixels including a sub-pixel pair composed of two sub-pixels arranged in the second direction, the sub-pixel pair including two sub-effective light-emitting regions having a gap therebetween. In a plan view, the first sub-power signal line passes through the gap between the two sub-effective light-emitting regions, at least one of the second sub-power signal lines includes at least one break, and both the two sub-effective light-emitting regions and the gap therebetween are located at the break, so that a virtual straight line extending in the second direction connecting two end points of the same break of the second sub-power signal line penetrates through the two sub-effective light-emitting regions and the gap.

[0005] For example, in an embodiment of the present disclosure, in a direction perpendicular to the substrate, the second sub-power signal line having the break does not overlap with both the two sub-effective light-emitting regions and the gap.

[0006] For example, in an embodiment of the present disclosure, the display substrate further includes: a plurality of second power signal lines extending along the second direction, located between the first power signal line and the substrate, and the second power signal line is electrically connected to the second sub-power signal line through a via in an insulating layer located between the second sub-power signal line and the second power line. The orthographic projection of the second sub-power signal line on the substrate at least partially overlaps with the orthographic projection of the second power signal line on the substrate, and the orthographic projections of the two sub-effective light-emitting regions on the substrate overlap with the orthographic projection of the second power signal line on the substrate.

[0007] For example, in an embodiment of the present disclosure, the ratio of the distance between the orthographic projection of the first sub-power signal line on the substrate and the two centers of the two orthographic projections of the two sub-effective light-emitting regions on the substrate is 0.9 to 1.1.

[0008] For example, in an embodiment of the present disclosure, the two centers of the two orthographic projections of the two sub-effective light-emitting regions on the substrate are located within the orthographic projection of the second power signal line on the substrate.

[0009] For example, in an embodiment of the present disclosure, the display substrate includes a plurality of repeating units located on the substrate. Each of the plurality of repeating units includes a first color sub-pixel, a pair of second color sub-pixels, and a third color sub-pixel arranged in sequence along the first direction. The pair of second color sub-pixels includes two second color sub-pixels of the same color, and the sub-pixel pair formed by the two sub-pixels arranged along the second direction is the pair of second color sub-pixels; the first color sub-pixel includes a first effective light-emitting region, the two sub-effective light-emitting regions are two second effective light-emitting regions, and the third color sub-pixel includes a third effective light-emitting region.

[0010] For example, in an embodiment of the present disclosure, along the second direction, the size of the interval is smaller than the size of the first effective light-emitting region, and the size of the interval is smaller than the size of the third effective light-emitting region.

[0011] For example, in an embodiment of the present disclosure, in a direction perpendicular to the substrate, the first effective light-emitting region does not overlap with the second sub-power signal line and the second power signal line.

[0012] For example, in an embodiment of the present disclosure, the first effective light-emitting region is located between adjacent second sub-power signal lines, and the first effective light-emitting region is located between adjacent second power signal lines.

[0013] For example, in an embodiment of the present disclosure, the center of the orthographic projection of the first effective light-emitting region on the substrate is located within the orthographic projection of the first sub-power signal line on the substrate.

[0014] For example, in an embodiment of the present disclosure, the display substrate further includes: a plurality of pads, extending along the second direction and disposed on the same layer as the first power signal line. The distances from two second sub-power signal lines located on both sides of the first effective light-emitting region and adjacent to the first effective light-emitting region to the center line extending along the second direction of the first effective light-emitting region are not equal, and the first effective light-emitting region is located between the pad and the second sub-power signal line closer to the center line of the first effective light-emitting region.

[0015] For example, in an embodiment of the present disclosure, in the first direction, the ratio of the center line of the first effective light-emitting region to the distances from the pads and the second sub-power signal lines located on both sides of the first effective light-emitting region is 0.9 to 1.1.

[0016] For example, in an embodiment of the present disclosure, along the direction perpendicular to the substrate, the pad overlaps with the first sub-power signal line and is electrically connected to each other.

[0017] For example, in an embodiment of the present disclosure, the shape of the pad is generally strip-shaped, and the center of the orthographic projection of the pad on the substrate is located within the orthographic projection of the first sub-power signal line on the substrate.

[0018] For example, in an embodiment of the present disclosure, a pad is disposed between the first color sub-pixels and the third color sub-pixels arranged adjacent to each other along the first direction, and the pad is electrically connected to the second sub-power signal line located between the first color sub-pixels and the third color sub-pixels.

[0019] For example, in an embodiment of the present disclosure, the display substrate further includes: a connection portion, disposed on the same layer as the pad and located between the second sub-power signal line and the pad. The pad is connected to the second sub-power signal line through the connection portion.

[0020] For example, in an embodiment of the present disclosure, there is a gap between the pad and the second sub-power signal line connected thereto. The connection portion is located between the pad and the second sub-power signal line, and the connection portion, the pad, and the second sub-power signal line form an annular structure.

[0021] For example, in an embodiment of the present disclosure, the plurality of second sub-power signal lines include a first sub-signal line and a second sub-signal line that are alternately arranged along the first direction. The first sub-signal line is a continuous signal line, and the second sub-signal line is a signal line having the break.

[0022] For example, in an embodiment of the present disclosure, the spacer is connected to the second sub-signal line through the connecting portion, and a positive projection of the spacer on another second sub-signal line adjacent to the second sub-signal line to which the spacer is connected is located within the break of the another second sub-signal line.

[0023] For example, in an embodiment of the present disclosure, along the second direction, the size of the spacer is smaller than the size of the first effective light-emitting region.

[0024] For example, in an embodiment of the present disclosure, in a direction perpendicular to the substrate, the third effective light-emitting region does not overlap with the second sub-power signal line and the second power signal line.

[0025] For example, in an embodiment of the present disclosure, the third effective light-emitting region is located between adjacent second sub-power signal lines, and the third effective light-emitting region is located between adjacent second power signal lines.

[0026] For example, in an embodiment of the present disclosure, the center of the positive projection of the third effective light-emitting region on the substrate is located within the positive projection of the first sub-power signal line on the substrate.

[0027] For example, in an embodiment of the present disclosure, the ratio of the distance between the positive projections of two second sub-power signal lines located on both sides of the third color sub-pixel and adjacent to the third color sub-pixel on the substrate to the center of the positive projection of the third effective light-emitting region on the substrate is 0.9 to 1.1.

[0028] For example, in an embodiment of the present disclosure, each sub-pixel includes an organic light-emitting element. The organic light-emitting element includes a first electrode, a light-emitting layer, and a second electrode that are sequentially stacked. At least a part of the light-emitting layer is located within the opening, and the second electrode is located on a side of the pixel defining layer facing the substrate. In the first color sub-pixel, the area ratio of the first effective light-emitting region to the second electrode is 53% to 55%; in the second color sub-pixel pair, the area ratio of the two second effective light-emitting regions to the two second electrodes is 43.5% to 48%; in the third color sub-pixel, the area ratio of the third effective light-emitting region to the second electrode is 67.5% to 69%.

[0029] For example, in the embodiments of the present disclosure, the shapes of the first effective light-emitting region and the third effective light-emitting region include a hexagon or an ellipse, and the shape of each of the second effective light-emitting regions included in the second color sub-pixel pair includes a pentagon, a circle or a teardrop shape.

[0030] For example, in the embodiments of the present disclosure, the second electrodes of the color sub-pixels include a main electrode and a connection electrode connected to each other, and the shape of the main electrode is substantially the same as the shape of the effective light-emitting region of the corresponding sub-pixel; in each of the sub-pixels, a notch is provided at a portion where the connection electrode is connected to the main electrode, and in a direction perpendicular to the substrate, at least a part of the display substrate corresponding to the notch is a transparent region.

[0031] For example, in an embodiment of the present disclosure, the display substrate further includes: a plurality of data lines extending along the second direction and provided on the same layer as the second power supply signal line; a plurality of scan signal lines extending along the first direction and located on a side of the film layer where the data lines are located facing the substrate; a plurality of reset power supply signal lines extending along the first direction and located between the film layer where the scan signal lines are located and the film layer where the data lines are located; a plurality of reset control signal lines extending along the first direction and provided on the same layer as the scan signal lines; and a plurality of light emission control signal lines extending along the first direction and provided on the same layer as the scan signal lines. Each of the sub-pixels further includes a pixel circuit for driving the organic light-emitting element, and the pixel circuit includes a driving transistor, a data writing transistor, a storage capacitor, a threshold compensation transistor, a first light emission control transistor, a second light control transistor, a first reset transistor, and a second reset transistor; a first pole of the data writing transistor is electrically connected to a first pole of the driving transistor, a second pole of the data writing transistor is electrically connected to the data line to receive a data signal, and a gate of the data writing transistor is electrically connected to the scan signal line to receive a scan signal; a first pole of the storage capacitor is electrically connected to the second power supply signal line, a second pole of the storage capacitor is electrically connected to a gate of the driving transistor; a first pole of the threshold compensation transistor is electrically connected to a second pole of the driving transistor, a second pole of the threshold compensation transistor is electrically connected to the gate of the driving transistor, and a gate of the threshold compensation transistor is electrically connected to the scan signal line to receive a compensation control signal; a first pole of the first reset transistor is electrically connected to the reset power supply signal line to receive a first reset signal, a second pole of the first reset transistor is electrically connected to the gate of the driving transistor, and a gate of the first reset transistor is electrically connected to the reset control signal line to receive a first sub-reset control signal; a first pole of the second reset transistor is electrically connected to the reset power supply signal line to receive a second reset signal, a second pole of the second reset transistor is electrically connected to a first electrode of the organic light-emitting element, and a gate of the second reset transistor is electrically connected to the reset control signal line to receive a second sub-reset control signal; a first pole of the first light emission control transistor is electrically connected to the second power supply signal line, a second pole of the first light emission control transistor is electrically connected to a first pole of the driving transistor, and a gate of the first light emission control transistor is electrically connected to the light emission control signal line to receive a first light emission control signal; a first pole of the second light emission control transistor is electrically connected to a second pole of the driving transistor, a second pole of the second light emission control transistor is electrically connected to a second electrode of the organic light-emitting element, and a gate of the second light emission control transistor is electrically connected to the light emission control signal line to receive a second light emission control signal.The display substrate further includes a first connection portion, a second connection portion, and a third connection portion that are disposed on the same layer as the data line, and a fourth connection portion that is disposed on the same layer as the first power signal line. The first connection portion is configured to connect the second pole of the threshold compensation transistor and the gate of the driving transistor. The second connection portion is configured to connect the reset power signal line and the first pole of the second reset transistor. The third connection portion is configured to connect the second pole of the second light-emitting control transistor and the fourth connection portion. The fourth connection portion is configured to connect the third connection portion and the connection electrode of the second electrode of the organic light-emitting element.

[0032] For example, in an embodiment of the present disclosure, the transparent region includes a region where the pixel circuit, the first power signal line, the second power signal line, the data line, the scan signal line, the reset power signal line, the reset control signal line, and the light-emitting control signal line are not provided.

[0033] For example, in an embodiment of the present disclosure, along a direction perpendicular to the substrate, a region surrounded by the light-emitting control signal line, the second power signal line, the active semiconductor layer including the channel regions and the source-drain doped regions of the transistors included in each sub-pixel, and the first pole of the storage capacitor connected to the first color sub-pixel overlaps with a notch of the second electrode of the first color sub-pixel.

[0034] For example, in an embodiment of the present disclosure, along a direction perpendicular to the substrate, a partial region close to the light-emitting control signal line in a region surrounded by the light-emitting control signal line, the second power signal line, and the first pole of the storage capacitor connected to the first sub-pixel of the pixel circuit connected to the second color sub-pixel pair overlaps with a notch of the second electrode of the first sub-pixel.

[0035] For example, in an embodiment of the present disclosure, in the second sub-pixel of the second color sub-pixel pair, the connection electrode includes a first portion extending along the second direction and a bent second portion. The first portion is located on a side of the second portion away from the main body electrode. The second portion is connected to the main body electrode, and a maximum dimension of the first portion along the first direction is greater than a maximum dimension of the second portion along the first direction.

[0036] For example, in an embodiment of the present disclosure, in the second sub-pixel, the connection electrode does not overlap with the source-drain doped region of the first light-emitting control transistor.

[0037] For example, in an embodiment of the present disclosure, in a direction perpendicular to the substrate, a partial area of the region surrounded by the light emission control signal line, the second power supply signal line, and the third connection portion of the pixel circuit connected to the second sub-pixel, which is close to the second power supply signal line and the light emission control signal line, overlaps with the notch of the second electrode of the second sub-pixel.

[0038] For example, in an embodiment of the present disclosure, in a direction perpendicular to the substrate, a partial area of the region surrounded by the data line, the active semiconductor layer, and the film layer where the first pole of the storage capacitor is located in the pixel circuit connected to the second sub-pixel, which is far from the light emission control signal line, overlaps with the notch of the second electrode of the third color sub-pixel.

[0039] For example, in an embodiment of the present disclosure, the first color sub-pixel is a red sub-pixel, the second color sub-pixel is a green sub-pixel, and the third color sub-pixel is a blue sub-pixel.

[0040] At least one embodiment of the present disclosure provides a display device including the above-mentioned display substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure and do not limit the present disclosure.

[0042] Figure 1A It is a plan view showing the positional relationship between the first power supply signal line and the effective light emission region in the display substrate provided according to an embodiment of the present disclosure;

[0043] Figure 1B It is Figure 1A A plan view showing the positional relationship between the first power supply signal line, the second power supply signal line, and the effective light emission region in the shown display substrate;

[0044] Figure 2 It is along Figure 1A and Figure 1B A partial cross-sectional structural schematic diagram taken along the AA' line shown;

[0045] Figure 3A It is along Figure 1A and Figure 1B A partial cross-sectional structural schematic diagram taken along the BB' shown;

[0046] Figure 3B It is along Figure 1B shown

[0047] Figure 3CIn another example of the embodiments of the present disclosure, it is a sectional view taken along the line BB' shown in Figure 1B ;

[0048] Figure 4 is a schematic diagram of a pixel circuit included in each sub-pixel and connected to an organic light-emitting element;

[0049] Figures 5 - 11 is a schematic diagram of the layer stacking of a pixel circuit and each signal line provided in some embodiments of the present disclosure;

[0050] Figure 12 is for Figure 11 a plan view of an organic light-emitting element corresponding one by one to each pixel circuit structure shown;

[0051] Figure 13 is a plan view of the second electrode of each sub-pixel; and

[0052] Figure 14 is a plan view of the second electrode of each sub-pixel in a display substrate. Detailed Embodiments

[0053] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present disclosure without creative efforts shall fall within the scope of protection of the present disclosure.

[0054] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure shall have the ordinary meanings understood by those of ordinary skill in the art to which the present disclosure pertains. The "first", "second", and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are only used to distinguish different components. The terms such as "include" or "comprise" mean that the elements or items appearing before the term cover the elements or items listed after the term and their equivalents, without excluding other elements or items.

[0055] An organic light-emitting diode display device includes a pixel defining layer. The pixel defining layer includes an opening for defining a light-emitting region of a sub-pixel, and the opening exposes the anode of the organic light-emitting element. When the subsequent light-emitting layer of the organic light-emitting element is formed in the opening of the pixel defining layer, the light-emitting layer contacts the anode, so that this part can drive the light-emitting layer to emit light to form a light-emitting region.

[0056] In the research, the inventors of the present application found that: in an organic light-emitting diode display, when the power supply signal line on the side of the light-emitting layer close to the organic light-emitting diode overlaps with the opening, the power supply signal line in the light-emitting area is likely to cause color deviation.

[0057] Embodiments of the present disclosure provide a display substrate and a display device. The display substrate includes: a substrate, a first power supply signal line located on the substrate, and a pixel defining layer located on a side of the first power supply signal line away from the substrate. The first power supply signal line includes a plurality of first sub-power supply signal lines extending in a first direction and a plurality of second sub-power supply signal lines extending in a second direction, and the first sub-power supply signal lines are connected to the second sub-power supply signal lines; the pixel defining layer includes a plurality of openings to define effective light-emitting areas of a plurality of sub-pixels, and the plurality of sub-pixels include a sub-pixel pair composed of two sub-pixels arranged in the second direction, and the sub-pixel pair includes two sub-effective light-emitting areas having a gap therebetween. In a plan view, the first sub-power supply signal line passes through the gap between the two sub-effective light-emitting areas, and at least one second sub-power supply signal line includes a break, and both the two sub-effective light-emitting areas and the gap therebetween are located at the break, so that a virtual straight line extending in the second direction connecting two end points of the same break of the second sub-power supply signal line passes through the two sub-effective light-emitting areas and the gap. By providing a break in the second sub-power supply signal line in the embodiments of the present disclosure to reduce the overlapping area between the two sub-effective light-emitting areas and the first power supply signal line, color deviation of the sub-pixel pair during display can be avoided as much as possible.

[0058] The display substrate and the display device provided by the embodiments of the present disclosure are described below with reference to the drawings.

[0059] Figure 1A It is a plan view of the positional relationship between the first power supply signal line and the effective light-emitting area in the display substrate provided by an embodiment of the present disclosure. Figure 1B For Figure 1A It is a plan view of the positional relationship between the first power supply signal line, the second power supply signal line and the effective light-emitting area in the shown display substrate. Figure 2 For Figure 1A And Figure 1B It is a partial cross-sectional structural schematic diagram taken along the AA' line shown in and shown in. As Figures 1A - 2As shown in the figure, the display substrate includes a substrate 100 and a plurality of repeating units 200 located on the substrate 100. Each repeating unit 200 includes a first color sub-pixel 210 arranged along a first direction (the X direction shown in the figure), a pair of second color sub-pixels 220, and a third color sub-pixel 230. The pair of second color sub-pixels 220 includes two second color sub-pixels arranged along a second direction (the Z direction shown in the figure, a direction different from the first direction). The plurality of repeating units 200 are arranged along the first direction to form a plurality of repeating unit groups. The plurality of repeating unit groups are arranged along the second direction, and adjacent repeating unit groups in the plurality of repeating unit groups are offset from each other along the first direction, that is, there is a certain offset amount between adjacent repeating unit groups along the first direction. Therefore, the sub-pixels of the same color in adjacent repeating unit groups are not aligned in the second direction. The pixel arrangement patterns in odd-row repeating unit groups are the same, and the pixel arrangement patterns in even-row repeating unit groups are the same.

[0060] For example, the offset amount between adjacent repeating unit groups in the first direction is approximately half of the size of the repeating unit 200 in the first direction. For example, the size of the repeating unit 200 in the first direction is the pitch of the repeating unit 200 in the first direction. Here, the pitch refers to the distance between the centers of the light-emitting regions of two first color sub-pixels 210 in two adjacent repeating units 200 along the first direction. Here, the center of the light-emitting region refers to the geometric center of the planar shape of the light-emitting region.

[0061] The above-mentioned first direction and second direction are two mutually perpendicular directions in the same plane. For example, this plane is the plane in which the pixels are arranged. Here, the repeating unit only refers to the repetition of sub-pixels, and other structures may be the same or different. In addition, the above-mentioned repetition means that the approximate position, shape, and size are similar. In some cases, for the needs of wiring or opening holes, the shape may be slightly different, such as having openings at different positions.

[0062] For example, in an example of the embodiment of the present disclosure, the first color sub-pixel 210 may be a red sub-pixel, the pair of second color sub-pixels 220 may be a pair of green sub-pixels, and the third color sub-pixel 230 may be a blue sub-pixel. However, it is not limited thereto, and the color sub-pixels can be interchanged.

[0063] As Figures 1A - 2 As shown in the figure, the display substrate further includes a first power signal line 400 located on the substrate 100. The first power signal line 400 includes a plurality of first sub-power signal lines 410 extending along the first direction and a plurality of second sub-power signal lines 420 extending along the second direction. The first sub-power signal lines 410 are connected to the second sub-power signal lines 420.

[0064] As Figures 1A - 2As shown, the display substrate further includes a pixel defining layer 130 on a side of the first power supply signal line 400 away from the substrate 100. The pixel defining layer 130 includes a plurality of openings to define an effective light-emitting region of each sub-pixel. Here, the "effective light-emitting region" may refer to a two-dimensional planar region parallel to the substrate. It should be noted that due to process reasons, the size of the part of the opening of the pixel defining layer away from the substrate is slightly larger than that of the part close to the substrate, or the size gradually increases from the side close to the substrate to the side away from the substrate. Therefore, the size of the effective light-emitting region may be slightly different from the sizes at different positions of the opening of the pixel defining layer, but the overall region shape and size are basically equivalent. For example, the projection of the effective light-emitting region on the substrate substantially coincides with the projection of the corresponding opening of the pixel defining layer on the substrate. For example, the projection of the effective light-emitting region on the substrate completely falls within the projection of the corresponding opening of the pixel defining layer on the substrate, and the two have similar shapes. The projected area of the effective light-emitting region on the substrate is slightly smaller than the projected area of the corresponding opening of the pixel defining layer on the substrate.

[0065] For example, each sub-pixel includes an organic light-emitting element. The organic light-emitting element includes a first electrode, a light-emitting layer, and a second electrode that are sequentially stacked. At least a part of the light-emitting layer is located within the opening, and the second electrode is located on a side of the pixel defining layer facing the substrate. For example, as Figure 2 shown, taking one of the second color sub-pixels included in the second color sub-pixel pair as an example, the second color sub-pixel includes an organic light-emitting element, which includes a first electrode 221, a second electrode 222, and a light-emitting layer 223 located between the first electrode 221 and the second electrode 222. The opening of the pixel defining layer 130 exposes a part of the second electrode 222. When the light-emitting layer 223 is formed in the opening of the pixel defining layer 130, the light-emitting layer 223 contacts the second electrode 222, so that this part can drive the light-emitting layer to emit light to form a second effective light-emitting region 2200. The second color sub-pixel pair 220 includes two second effective light-emitting regions 2201 and 2202.

[0066] In the embodiments of the present disclosure, it is described by taking the light-emitting layers of the two second color sub-pixels included in the second color sub-pixel pair as an integral body as an example. For example, the light-emitting layers of the two second color sub-pixels in the second color sub-pixel pair are a connected whole film layer, that is, the light-emitting layers of the two second color sub-pixels are a continuous and complete pattern, or the projections of the light-emitting layers of the two second color sub-pixels on the substrate are continuous and complete, and the light-emitting layers of the two second color sub-pixels can be fabricated through one opening. However, it is not limited thereto. For example, the light-emitting layers of the two second color sub-pixels included in the second color sub-pixel pair may also be separated.

[0067] As Figures 1A - 2As shown, the first color sub-pixel 210 includes a first effective light-emitting region 2100, the second color sub-pixel pair includes two second effective light-emitting regions 2200 (including a first sub-effective light-emitting region 2201 and a second sub-effective light-emitting region 2202) having a gap therebetween, and the third color sub-pixel 230 includes a third effective light-emitting region 2300. In the figure, the portion of the light-emitting layer in contact with the second electrode in the opening of the pixel defining layer is used as the effective light-emitting region for illustration. The "gap" in the above "the second color sub-pixel pair includes two second effective light-emitting regions 2200 having a gap therebetween" refers to the solid portion of the pixel defining layer between the two openings defined by the pixel defining layer. As Figure 1A shown, the positive projection of the gap S on the straight line extending in the X direction can be substantially coincident with the positive projection of the second color sub-pixel pair on the straight line extending in the X direction, and the positive projection of the gap S on the straight line extending in the Z direction is located between the two positive projections of the second color sub-pixel pair on the straight line extending in the Z direction.

[0068] As Figures 1A - 2 shown, in a plan view, for example, parallel to the plane of the substrate 100 (or the positive projection of the subsequent structure on this plane), the first sub-power signal line 410 passes through the gap between the two second effective light-emitting regions 2200, and at least one second sub-power signal line 420 includes a break 421, and the two second effective light-emitting regions 2200 and the above-mentioned gap are located at the break 421, so that the second sub-power signal line 420 does not penetrate through the two second effective light-emitting regions 2200 and the above-mentioned gap. That is, the virtual straight line 4210 connecting the two end points on both sides of the break 421 and extending in the Z direction passes through the two second effective light-emitting regions 2200 and the gap S located between the two second effective light-emitting regions 2200. The above "break" means that the second sub-power signal line 420 is not a continuous signal line, and the signal line includes a plurality of signal segments that are disconnected from each other, and the gap between two adjacent signal segments is the above-mentioned break 421.

[0069] For example, along the direction perpendicular to the substrate 100, the second sub-power signal line 420 having the break 421 does not overlap with the two second effective light-emitting regions 2200 and the gap S.

[0070] For example, along the direction perpendicular to the base substrate 100, the two second effective light-emitting areas 2200 do not overlap with the first power signal line 400. That is, in the direction perpendicular to the base substrate 100, the two second effective light-emitting areas 2200 overlap with the break 421, but do not overlap with the second sub-power signal line 420, and the two second effective light-emitting areas 2200 do not overlap with the first sub-power signal line 410. Thus, along the direction perpendicular to the base substrate, the two second effective light-emitting areas included in the second color sub-pixel pair do not overlap with the first power signal line, so as to improve the flatness of the film layer on the side of the second electrode away from the light-emitting layer in the two second effective light-emitting areas, and to avoid color deviation of the second color sub-pixel pair during display.

[0071] For example, Figure 1A and Figure 1B As shown, the interval between the two second effective light-emitting areas 2200 along the second direction is smaller than the size of the first effective light-emitting area 2100 along the second direction, and the interval between the two second effective light-emitting areas 2200 along the second direction is smaller than the size of the third effective light-emitting area 2300 along the second direction.

[0072] For example, along the second direction, the size of the first effective light-emitting area 2100 is larger than that of the third effective light-emitting area 2300. For example, the size of the first effective light-emitting area 2100 can be 45 to 49 microns, for example, 47 microns; the size of the third effective light-emitting area 2300 can be 38 to 42 microns, for example, 40 microns.

[0073] For example, Figure 1A and Figure 1B As shown, the ratio of the distance between the orthographic projection of the first sub-power signal line 410 on the substrate 100 and the two centers of the two orthographic projections of the two second effective light-emitting areas 2200 on the substrate 100 is 0.9 to 1.1. For example, the distance between the orthographic projection of the first sub-power signal line 410 on the substrate 100 and the two centers of the two orthographic projections of the two second effective light-emitting areas 2200 on the substrate 100 is substantially equal. Thus, the two second effective light-emitting areas included in the second color sub-pixel pair are symmetrically distributed relative to the first sub-power signal line, which is conducive to ensuring the environmental consistency of the two second color sub-pixels included in the second color sub-pixel pair. For example, the orthographic projection of the first sub-power signal line 410 on the substrate 100 can also be closer to one of the second color sub-pixel pair. For example, the orthographic projection of the first sub-power signal line 410 on the substrate 100 does not overlap with the second electrode projections of the two second color sub-pixels in the second color sub-pixel pair.

[0074] The center of the above-mentioned orthographic projection refers to the geometric center of the shape of the orthographic projection. The shape of the orthographic projection of the effective light-emitting area on the substrate is determined by the shape of the effective light-emitting area, and the shape of the effective light-emitting area is substantially the same as the shape of the opening of the corresponding pixel defining layer.

[0075] For example, as Figure 1A and Figure 1B shown, the shape of each second effective light-emitting area 2200 included in the second color sub-pixel pair 220 includes a pentagon, a circle or a water droplet shape. For example, Figure 1A and Figure 1B schematically show that the shape of each second effective light-emitting area 2200 is a pentagon. The pentagon includes a set of parallel opposite sides (parallel to the second direction) and a vertical side (parallel to the first direction). The vertical side is perpendicular to the set of parallel opposite sides, and the two vertical sides of the two second effective light-emitting areas 2200 in each second color sub-pixel pair 220 are arranged adjacent to each other. For example, the first sub-power signal line 410 is located between the above two vertical sides and passes through the midpoint of the shortest connection line between the above two vertical sides.

[0076] In addition, although the shape of the second effective light-emitting area of the second color sub-pixel in Figure 1A and Figure 1B includes a strictly formed angle by two line segments, in some embodiments, the shape of the second effective light-emitting area of the second color sub-pixel can be a rounded-corner graphic, such as a circle or a water droplet shape. That is, on the basis of the above pentagon shape, the corners of the second effective light-emitting area of the second color sub-pixel are rounded. For example, when forming the opening of the pixel defining layer, a rounded-corner shape may be formed at the corner of the opening, so that the shape of the formed light-emitting area may be a rounded-corner shape.

[0077] For example, as Figures 1A - 2As shown, the display substrate further includes: a second power signal line 500 located between the first power signal line 400 and the substrate 100, and the second power signal line 500 extends along the second direction. The orthographic projection of the second sub-power signal line 420 on the substrate 100 overlaps at least partially with the orthographic projection of the second power signal line 500 on the substrate 100, and the orthographic projections of the two second effective light-emitting regions 2200 on the substrate 100 overlap with the orthographic projection of the second power signal line 500 on the substrate 100. That is, along the direction perpendicular to the substrate 100, the break 421 overlaps with the second power signal line 500. For example, the orthographic projection of the second sub-power signal line 420 on the substrate 100 is located within the orthographic projection of the second power signal line 500 on the substrate 100. For example, the second power signal line may substantially coincide with the portion of the second sub-power signal line other than the break, but the line width of the second sub-power signal line is partially adjusted and does not completely coincide with the second power signal line. For example, the area of the overlapping portion of the second power signal line and the second sub-power signal line accounts for more than 70% of the area of the second power signal line.

[0078] For example, at different positions of the second sub-power signal line 420 in its extending direction, the width of the second sub-power signal line 420 in the first direction is slightly different. For example, the width of the second sub-power signal line 420 decreases at the positions corresponding to some color sub-pixels. Similarly, at different positions of the second power signal line 500 in its extending direction, the width in the first direction is slightly different.

[0079] For example, as Figures 1A - 1BAs shown, two repeating units 200 located in the same repeating unit group and adjacent to each other include a first repeating unit 201 and a second repeating unit 202. The third color sub-pixel 230 of the first repeating unit 201 is adjacent to the first color sub-pixel 210 of the second repeating unit 202. The repeating unit 200 adjacent to both the first repeating unit 201 and the second repeating unit 202 and located in an adjacent repeating unit group is a third repeating unit 203. A continuous second sub-power signal line 420, that is, a first sub-signal line 4201, is provided between the first color sub-pixel 210 in the third repeating unit 203 and the third color sub-pixel 230 in the first repeating unit 201. A column of first color sub-pixels 210 and a column of third color sub-pixels 230 located on both sides of the continuous second sub-power signal line 420 and adjacent to the second sub-power signal line 420 are alternately arranged in the second direction in the orthographic projection of the second sub-power signal line 420. The width of the second sub-power signal line 420 at the orthographic projection position of the first color sub-pixel 210 on the continuous second sub-power signal line 420 is a first width. The width of the second sub-power signal line 420 at the interval position between two adjacent orthographic projections of the first color sub-pixel 210 and the third color sub-pixel 230 on the second sub-power signal line 420 is a second width. The width of the second sub-power signal line 420 at the orthographic projection position of the third color sub-pixel 230 on the continuous second sub-power signal line 420 is a third width. The first width is less than the second width, and the third width is less than the second width. The above first width and third width may be the same or different. For example, the third width is less than the first width. The continuous second sub-power signal line 420 includes a first segment and a second segment corresponding to the first color sub-pixel 210 and the third color sub-pixel 230 respectively, and a connection segment connecting the first segment and the second segment. Along the second direction, the first segment and the second segment of the continuous second sub-power signal line 420 are alternately arranged. The edge of the first segment away from the first center line of the corresponding first color sub-pixel 210 and the edge of the connection segment away from the first center line are located on the same straight line extending in the second direction. The distance between the edge of the first segment close to the first center line of the corresponding first color sub-pixel 201 and the first center line is greater than the distance between the edge of the connection segment close to the first center line and the first center line. Similarly, the edge of the second segment away from the third center line of the corresponding third color sub-pixel and the edge of the connection segment away from the third center line are located on the same straight line extending in the second direction. The distance between the edge of the second segment close to the third center line of the corresponding third color sub-pixel and the third center line is greater than the distance between the edge of the connection segment close to the third center line and the third center line.That is, the first segment and the connecting segments on both sides of the first segment form a first recessed portion recessed toward the first color sub-pixel, the second segment and the connecting segments on both sides of the second segment form a second recessed portion recessed toward the third color sub-pixel, and the settings of the first recessed portion and the second recessed portion can prevent the first effective light emission and the third effective light emission regions from overlapping with the second sub-power signal line, reducing color shift.

[0080] For example, a second sub-power signal line 420 including a break is provided between the third color sub-pixel 230 in the first repeating unit 201 and the first color sub-pixel 210 in the third repeating unit 203, that is, the second sub-signal line 4202. For example, the first sub-signal line 4201 and the second sub-signal line 4202 are alternately arranged along the first direction, and the numbers are substantially equal. For example, the second sub-signal line 4202 includes a plurality of signal line segments that are disconnected from each other, and each signal line segment can be electrically connected to the second power signal line through a via in the insulating layer between the second power signal line and the second sub-signal line.

[0081] For example, the second sub-power signal line 420 (signal line segment) between two adjacent breaks arranged along the second direction includes a third segment, a fourth segment, and a fifth segment that are sequentially connected along the second direction. Along the first direction, the width of the third segment can be substantially equal to the width of the fifth segment, and the widths of the third segment and the fifth segment are both greater than the width of the fourth segment. Thus, the third segment, the fourth segment, and the fifth segment form a third recessed portion recessed toward the first color sub-pixel 210 in the second repeating unit 202. The orthographic projection of the fourth segment on the substrate falls within the orthographic projection of the second power signal line on the substrate to prevent affecting the light transmittance of the display substrate. The fourth segment of the second sub-power signal line is electrically connected to the first sub-power signal line.

[0082] Similarly, the second power signal line 500 also has the same characteristics as the second sub-power signal line, which will not be elaborated here.

[0083] For example, the orthographic projection of the first effective light emission region 2100 of the first color sub-pixel 210 on the second sub-signal line 4202 does not overlap with the break 421, that is, the orthographic projection of the first effective light emission region 2100 of the first color sub-pixel 210 on the second sub-signal line 4202 is located within the signal line segment. For example, the orthographic projection of the third effective light emission region 2300 of the third color sub-pixel 230 on the second sub-signal line 4202 does not overlap with the break 421, that is, the orthographic projection of the third effective light emission region 2300 of the third color sub-pixel 230 on the second sub-signal line 4202 is located within the signal line segment.

[0084] For example, the width of the first section of the second sub-power signal line 420 in the first direction can be 2.5 to 3.7 micrometers, and the width of the connection section of the second sub-power signal line 420 in the first direction can be 5.8 to 7 micrometers. For example, the distance between the edges of the connection section of one of the two second sub-power signal lines 420 adjacent to and on both sides of the third color sub-pixel 230 and the third section of the other second sub-power signal line that are close to each other is approximately 23.4 to 26 micrometers.

[0085] For example, in the case of the second sub-power signal line 420 and the second power signal line 500, there are partial regions where their widths in the first direction are approximately equal and substantially completely overlap. For example, the positions of the two edges of the break are both located in the region where the second sub-power signal line 420 and the second power signal line 500 substantially completely overlap. For example, the distance between the edges of two adjacent breaks arranged in the second direction that are close to each other (i.e., the length of a signal line segment) is greater than the size of a pixel circuit in the second direction. For example, the size of each break in the second direction is less than the size of a pixel circuit in the second direction. For example, the distance between the edges of two adjacent breaks arranged in the second direction that are close to each other (i.e., the length of a signal line segment) is approximately 69 to 75 micrometers. For example, the size of the pixel circuit in the second direction is approximately 63 to 65 micrometers. For example, the size of the break in the second direction is approximately 52 to 57 micrometers. For example, the ratio of the size of the break in the second direction to the size of a pixel circuit in the second direction is 0.8 to 0.9. For example, the ratio of the distance between the edges of two adjacent breaks arranged in the second direction that are close to each other (i.e., the length of a signal line segment) to the size of a pixel circuit in the second direction is 1.1 to 1.2.

[0086] For example, as Figures 1A - 1B shown, half D1 of the difference between the size D3 of the break 421 in the second direction and the sum D2 of the sizes of the two second effective light-emitting regions 2200 and the interval S located within the break 421 in the second direction can be 1.8 to 6.5 micrometers. For example, the ratio of the size D3 of the break 421 in the second direction to the sum D2 of the sizes of the two second effective light-emitting regions 2200 and the interval S located within the break 421 in the second direction can be 1.07 to 1.25.

[0087] For example, as Figures 1A - 2 shown, a first planarization layer 121 is provided between the first power signal line 400 and the second electrode of each sub-pixel to play a planarization role. A second planarization layer 122 and a passivation layer 123 are provided between the first power signal line 400 and the second power signal line 500 to play a planarization role. The embodiments of the present disclosure are not limited to providing the second planarization layer 122 and the passivation layer 123 between the first power signal line 400 and the second power signal line 500, and it is also possible to only provide the second planarization layer 122 without providing the passivation layer 123.

[0088] For example, as Figures 1A - 2 shown, the centers of the two positive projections of the two second effective light-emitting regions 2200 on the substrate 100 are located within the positive projection of the second power supply signal line 500 on the substrate 100. Along the direction perpendicular to the substrate 100, although the second effective light-emitting region 2200 overlaps with the second power supply signal line 500, the second power supply signal line 500 passes through the centers of the two second effective light-emitting regions, which can ensure good symmetry of the second effective light-emitting region 2200 in the first direction to improve color shift.

[0089] For example, as Figure 1A and Figure 1B shown, the distance between adjacent second sub-power supply signal lines 420 in the first direction is greater than the size of the first effective light-emitting region 2100 in the first direction, and the first effective light-emitting region 2100 is located between adjacent second sub-power supply signal lines 420. Similarly, the first effective light-emitting region 2100 is located between adjacent second power supply signal lines 500. In the embodiments of the present disclosure, the size of the first effective light-emitting region of the first color sub-pixel is smaller than the distance between adjacent two second sub-power supply signal lines. By arranging the first effective light-emitting region between adjacent second sub-power supply signal lines, it is possible to prevent the first effective light-emitting region from overlapping with the second sub-power supply signal lines and the second power supply lines, improve the flatness of the inner layer of the first effective light-emitting region, and improve the symmetry of the first effective light-emitting region in the first direction, which is beneficial to improving color shift.

[0090] For example, as Figure 1A and Figure 1B shown, the distance between adjacent second sub-power supply signal lines 420 in the first direction is greater than the size of the third effective light-emitting region 2300 in the first direction, and the third effective light-emitting region 2300 is located between adjacent second sub-power supply signal lines 420. For example, the width of the second sub-power supply signal line 420 at the position corresponding to the third color sub-pixel 230 is reduced so that the distance between the adjacent edges of the second sub-power supply signal lines 420 close to each other (the two edges corresponding to the position of the third effective light-emitting region) in the first direction is greater than the size of the third effective light-emitting region 2300 in the first direction. Similarly, the third effective light-emitting region 2300 is located between adjacent second power supply signal lines 500. In the embodiments of the present disclosure, the size of the third effective light-emitting region of the third color sub-pixel is smaller than the distance between adjacent two second sub-power supply signal lines. By arranging the third effective light-emitting region between adjacent second sub-power supply signal lines, it is possible to prevent the third effective light-emitting region from overlapping with the second sub-power supply signal lines and the second power supply lines, improve the flatness of the inner layer of the third effective light-emitting region, and improve the symmetry of the third effective light-emitting region in the first direction, which is beneficial to improving color shift.

[0091] For example, the positive projection of the second electrode of the third color sub-pixel 230 on the substrate 100 hardly overlaps with the second sub-power signal line 420. For example, the width of the second sub-power signal line 420 at the position corresponding to the third color sub-pixel 230 is reduced so that the distance in the first direction between the adjacent edges of the second sub-power signal lines 420 close to each other (the two edges at the position of the second electrode corresponding to the third color sub-pixel) is greater than the dimension in the first direction of the second electrode of the third color sub-pixel 230.

[0092] For example, as Figure 1A and Figure 1B shown, a second sub-power signal line 420 is disposed between the effective light-emitting regions of two adjacent sub-pixels arranged in the first direction, that is, a second sub-power signal line 420 is disposed between the first effective light-emitting region 2100 and the second effective light-emitting region 2200, a second sub-power signal line 420 is disposed between the second effective light-emitting region 2200 and the third effective light-emitting region 2300, and a second sub-power signal line 420 is disposed between the third effective light-emitting region 2300 and the first effective light-emitting region 2100.

[0093] For example, as Figure 1A and Figure 1B shown, multiple second sub-power signal lines 420 are uniformly distributed in the first direction, that is, the intervals between the multiple second sub-power signal lines 420 are substantially equal.

[0094] For example, as Figure 1A and Figure 1BAs shown in the figure, in the first direction, the distance between the adjacent sides of two second sub-power signal lines 420 located on both sides of the first effective light-emitting region 2100 and adjacent to the first effective light-emitting region 2100 is the first distance d1. Here, the distance between the adjacent edges of the first segment of the second sub-power signal line 420 on one side of the first effective light-emitting region 2100 and the third segment of the second sub-power signal line 420 on the other side of the first effective light-emitting region 2100 is taken as an example of the first distance. The distance between two second sub-power signal lines 420 located on both sides of the second effective light-emitting region 2200 and adjacent to the second effective light-emitting region 2200 is the second distance d2. Here, the distance between the adjacent edges of the first segment of the second sub-power signal line 420 on one side of the second effective light-emitting region 2200 and the second segment of the second sub-power signal line 420 on the other side of the second effective light-emitting region 220 is taken as an example of the second distance. The distance between two second sub-power signal lines 420 located on both sides of the third effective light-emitting region 2300 and adjacent to the third effective light-emitting region 2300 is the third distance d3. Here, the distance between the adjacent edges of the second segment of the second sub-power signal line 420 on one side of the third effective light-emitting region 2300 and the third segment of the second sub-power signal line 420 on the other side of the third effective light-emitting region 2300 is taken as an example of the third distance. The ratio of the first distance to the third distance is 0.9 to 1.1. For example, the first distance is approximately equal to the third distance, and the second distance is approximately twice the first distance. The above-mentioned second sub-power signal lines located on both sides of the effective light-emitting region and adjacent to the effective light-emitting region refer to the second sub-power signal lines along the first direction, and there are no other second sub-power signal lines between the second sub-power signal line and the effective light-emitting region.

[0095] For example, as Figure 1A and Figure 1B shown, the ratio of the distances between two second sub-power signal lines 420 located on both sides of the second color sub-pixel pair 220 and adjacent to the second color sub-pixel pair 220 and the second center line extending along the second direction of the second effective light-emitting region 2200 of the second color sub-pixel pair 220 is 0.9 to 1.1. For example, the distances between two second sub-power signal lines 420 located on both sides of the second color sub-pixel pair 220 and adjacent to the second color sub-pixel pair 220 and the second center line extending along the second direction of the second effective light-emitting region 2200 of the second color sub-pixel pair 220 are approximately equal. Thus, two second sub-power signal lines 420 located on both sides of the second effective light-emitting region 2200 and adjacent to the second effective light-emitting region 2200 are approximately symmetrically distributed with respect to the second center line, so as to ensure the symmetry of the second electrode of the second color sub-pixel pair in the first direction and improve color deviation.

[0096] For example, as Figure 1A and Figure 1BAs shown in the figure, the ratio of the distances from two second sub-power signal lines 420, which are located on both sides of the third color sub-pixel 230 and adjacent to the third color sub-pixel 230, to the third center line extending in the second direction of the third effective light-emitting region 2300 of the third color sub-pixel 230 is 0.9 to 1.1. For example, the distances from two second sub-power signal lines 420, which are located on both sides of the third color sub-pixel 230 and adjacent to the third color sub-pixel 230, to the third center line extending in the second direction of the third effective light-emitting region 2300 of the third color sub-pixel 230 are approximately equal. The distance from the second sub-power signal line 420 on both sides of the third color sub-pixel 230 to the third center line can refer to the distance between the edge of the second sub-power signal line 420 close to the third center line and the third center line. The width of the second sub-power signal line 420 on one side of the third color sub-pixel 230 corresponding to the position of the third color sub-pixel 230 is relatively narrow. This position is the second segment of the second sub-power signal line 420. The second segment forms a second recess with the connection segment so that the distances between the edges close to each other of two second sub-power signal lines 420, which are located on both sides of the third color sub-pixel 230 and adjacent to the third color sub-pixel 230, and the third center line extending in the second direction of the third effective light-emitting region 2300 of the third color sub-pixel 230 are approximately equal. Two second sub-power signal lines 420, which are located on both sides of the third effective light-emitting region 2300 and adjacent to the third effective light-emitting region 2300, are distributed approximately symmetrically with respect to the third center line, thereby ensuring the symmetry of the second electrode of the third color sub-pixel in the first direction to improve color deviation.

[0097] For example, as Figure 1A and Figure 1BAs shown, the distances between two second sub-power signal lines 420 located on both sides of the first color sub-pixel 210 and adjacent to the first color sub-pixel 210 from the first center line extending in the second direction of the first effective light-emitting region 2100 of the first color sub-pixel 210 are not equal. That is, the two second sub-power signal lines 420 located on both sides of the first effective light-emitting region 2100 and adjacent to the first effective light-emitting region 2100 are not symmetrically distributed with respect to the first center line. For example, the distance between the edge of the second sub-power signal line 420 close to the first center line and the first center line between the first effective light-emitting region 2100 and the second effective light-emitting region 2200 is the fourth distance. Here, the distance between the edge of the first segment of the second sub-power signal line 420 close to the first center line and the first center line between the first effective light-emitting region 2100 and the second effective light-emitting region 2200 in the first repeating unit 201 is taken as an example of the fourth distance. The distance between the second sub-power signal line 420 between the first effective light-emitting region 2100 and the third effective light-emitting region 2300 and the first center line is the fifth distance, and the fifth distance is greater than the fourth distance. Here, the distance between the edge of the third segment of the second sub-power signal line 420 close to the first center line and the first center line between the third effective light-emitting region 2300 in the first repeating unit 201 and the first effective light-emitting region 2100 in the second repeating unit 202 is taken as an example of the fifth distance.

[0098] For example, as Figure 1A and Figure 1B shown, the distance between the opposite edges of the second effective light-emitting region 2200 and the adjacent second sub-power signal line 420 is greater than the distance between the opposite edges of the first effective light-emitting region 2100 and the adjacent second sub-power signal line 420.

[0099] For example, as Figure 1A and Figure 1B shown, the distance (PDL gap) between the boundaries of the light-emitting regions of different color sub-pixels is basically the same. That is, among the sub-pixels arranged in the first direction, the ratio of the distance between the adjacent edges of the first effective light-emitting region 2100 and the second effective light-emitting region 2200 to the distance between the adjacent edges of the second effective light-emitting region 2200 and the third effective light-emitting region 2300 is, for example, 0.9 to 1.1. For example, the distance between the adjacent edges of the first effective light-emitting region 2100 and the second effective light-emitting region 2200 is approximately equal to the distance between the adjacent edges of the second effective light-emitting region 2200 and the third effective light-emitting region 2300. Thus, the distance between the second sub-power signal line between the first effective light-emitting region and the second effective light-emitting region and the first center line is less than the distance between the second sub-power signal line between the first effective light-emitting region and the third effective light-emitting region and the first center line.

[0100] For example, as Figure 1A and Figure 1B shown, the display substrate further includes a plurality of pads 430 disposed on the same layer as the first power signal line 400. The pads 430 extend in the second direction, and the first effective light-emitting region 2100 is located between the pads 430 and the second sub-power signal line 420 that is closer to the first center line (among the second sub-power signal lines 420 adjacent to the first effective light-emitting region 2100). For example, the distance between the edge of the pad 430 close to the first center line and the first center line of the first effective light-emitting region 2100 is a sixth distance, and the sixth distance is less than the fifth distance. By providing pads on one side of the first effective light-emitting region in the embodiments of the present disclosure, it is beneficial to improve the symmetry of the second electrode of the first color sub-pixel in the first direction, so as to improve color shift.

[0101] For example, the ratio of the sixth distance to the fourth distance may be 0.9 to 1.1 to further improve the symmetry of the second electrode of the first color sub-pixel in the first direction.

[0102] For example, along the direction perpendicular to the substrate, the pad 430 does not overlap with the first effective light-emitting region 2100 to prevent affecting the display of the first color sub-pixel.

[0103] For example, along the direction perpendicular to the substrate, the pad 430 does not overlap with the second sub-power signal line 420 on the side of the first effective light-emitting region 2100 away from the pad 430.

[0104] For example, along the direction perpendicular to the substrate, the pad 430 does not overlap with the second electrode of the first color sub-pixel, or the overlapping area between the two is very small, which is beneficial to reducing color shift.

[0105] For example, as Figure 1A and Figure 1BAs shown, the spacer 430 is located on the side of the second sub-power signal line 420 disposed between the first color sub-pixel 210 and the third color sub-pixel 230, closer to the first color sub-pixel 410. The spacer in the embodiments of the present disclosure can reduce the distance between the film layer pattern of the first power signal line located on the side of the first effective light-emitting area away from the second effective light-emitting area and the first center line, which is beneficial to improving the symmetry of the second electrode of the first color sub-pixel in the first direction to improve color shift. For example, the spacer 430 can be integrated with the first power signal line located on the side of the first effective light-emitting area away from the second effective light-emitting area. It is equivalent to widening the first power signal line in the first direction in the area closer to the first color sub-pixel 210, so that the distances between the two side edges of the first effective light-emitting area of the first color sub-pixel 210 and the film layer pattern of the first power signal line are equivalent to reduce color shift. For example, the part connecting the first spacer 430 and the first power signal line in the middle can be a solid structure. For example, the part connecting the first spacer 430 and the first power signal line in the middle can be set as a hollow structure, that is, a part of the pattern is removed between the first spacer 430 and the first power signal line to reduce the parasitic capacitance or transistor load of the overlapping part of the pattern in this area, or improve the transmittance. For example, the line width of the part of the first spacer 430 close to the first color sub-pixel is not greater than the line width of the part of the first power signal line close to the first color sub-pixel.

[0106] For example, the length of the first effective light-emitting area of the first color sub-pixel in the second direction is greater than its width in the first direction, and the extending direction of the length of the first effective light-emitting area is consistent with the extending direction of the second sub-power signal line. Thus, a spacer extending in the second direction is provided on one side of the first effective light-emitting area in the first direction. For example, the length of the third effective light-emitting area of the third color sub-pixel in the second direction is greater than its width in the first direction, and the aspect ratio of the first effective light-emitting area is greater than the aspect ratio of the third effective light-emitting area. Thus, there may be a large difference in the distances between the first center line of the first effective light-emitting area and the two second sub-power signal lines located on both sides of the first effective light-emitting area and adjacent thereto. By providing the above-mentioned spacer on one side of the first effective light-emitting area, color shift can be reduced.

[0107] For example, as Figure 1A and Figure 1B shown, in the first direction, the distances between the center line of the first effective light-emitting area 2100 and the spacers 430 and the second sub-power signal line 420 located on both sides of the first effective light-emitting area 2100 are substantially equal. That is, the distances between the spacers 430 and the second sub-power signal line located on both sides of the first center line and the first center line are substantially equal, so that the symmetry of the second electrode of the first color sub-pixel in the first direction can be further improved, which is beneficial to improving color shift.

[0108] For example, asFigure 1A and Figure 1B As shown, the pad 430 is electrically connected to the first power signal line 400 to prevent the pad from being in a floating state, thereby affecting the normal operation of the organic light emitting element.

[0109] For example, Figure 1A and Figure 1B As shown, along the direction perpendicular to the base substrate 100, the pad 430 overlaps with the first sub-power signal line 410 and is electrically connected to each other, and the first sub-power signal line 410 provides an electrical signal to the pad 430. For example, the first sub-power signal line 410 can be integrally formed with the pad 430 to save process.

[0110] For example, the shape of the spacer block 430 is substantially a long strip, and the center of the orthographic projection of the spacer block 430 on the base substrate 100 is located within the orthographic projection of the first sub-power signal line 410 on the base substrate 100 .

[0111] For example, Figure 1A and Figure 1B As shown, the size of the pad 430 along the second direction is greater than its size along the first direction. Along the second direction, the size of the pad 430 is smaller than the size of the first effective light-emitting area 2100. When the display substrate in the embodiment of the present disclosure is used for under-screen fingerprint detection, the size of the pad along the second direction is designed to be smaller than the size of the first effective light-emitting area. For example, the pad is not overlapped with the light-transmitting area (described later) as much as possible, which is beneficial to improve the light transmittance of the display substrate.

[0112] For example, Figure 1A and Figure 1B As shown, the display substrate further includes a connection portion 440 disposed in the same layer as the pad 430. There is a gap between the pad 430 and the second sub-signal line 4202, and the connection portion 440 is located between the second sub-power signal line 420 (i.e., the second sub-signal line 4202) and the pad 430, and the pad 430 is connected to the second sub-power signal line 420 through the connection portion 440.

[0113] For example, the size of the connection portion 440 along the second direction may be 36-40 micrometers, for example, 38 micrometers. For example, along the second direction, the size of the connection portion 440 is smaller than the size of the first effective light emitting area 2100 and the third effective light emitting area 2300.

[0114] For example, the orthographic projection of the connection portion 440 on the straight line extending along the second direction may be located within the orthographic projection of the third effective light emitting area 2300 on the straight line.

[0115] For example, the orthographic projections of the cushion block 430 and the connecting portion 440 on the straight line extending along the second direction are both located within the orthographic projection of the third effective light emitting area 2300 on the straight line.

[0116] For example, the size of the spacer 430 in the second direction is smaller than the size of the third effective light-emitting region 2300 in the second direction.

[0117] For example, the distance between the second sub-power signal line 420 located between the connection portion 440 and the third color sub-pixel 230 and the adjacent edges of the spacer 430 may be 11 to 13 micrometers, and may be 12 micrometers, for example.

[0118] For example, the connection portion 440, the spacer 430, and the second sub-power signal line 420 form an annular structure.

[0119] For example, as Figure 1A and Figure 1B shown, the connection portion 440 includes two sub-connection portions, and the two end portions of the spacer 430 are electrically connected to the second sub-power signal line 420 through the two sub-connection portions respectively. The connection portion, the spacer, and the second sub-power signal line connected to the connection portion provided by the embodiments of the present disclosure form an annular loop, which is beneficial to the uniformity of the first color sub-pixel.

[0120] For example, the size of each sub-connection portion in the second direction may be 2.5 to 3.5 micrometers, and may be 3 micrometers, for example. The distance between the adjacent edges of the two sub-connection portions may be 32 micrometers.

[0121] For example, the connection portion 440, the spacer 430, and the second sub-power signal line 420 are integrally provided structures to save process steps.

[0122] For example, the spacer 430 is connected to the second sub-signal line 4202 through the connection portion 440, and the orthographic projection of the spacer 430 on another second sub-signal line 4202 adjacent to the second sub-signal line 4202 connected to the spacer 430 is located within the break 421 of the other second sub-signal line 4202.

[0123] For example, when the display substrate in the embodiments of the present disclosure is applied to in-screen fingerprint detection, the connection portion does not overlap with the transparent region (described later), which can ensure that the light transmittance of the display substrate is not affected.

[0124] For example, Figure 3A is a schematic diagram of a partial cross-sectional structure intercepted by BB' as shown along Figure 1A and Figure 1B shown. Figure 3B is a schematic diagram of a partial cross-sectional structure intercepted by CC' as shown along Figure 1B shown. As Figures 1A - 3BAs shown, in the direction perpendicular to the substrate 100, the first effective light-emitting region 2100 does not overlap with the second sub-power signal line 420 and the second power signal line 500, so that good symmetry of the first effective light-emitting region along the first direction can be ensured to improve color shift. Similarly, in the direction perpendicular to the substrate 100, the third effective light-emitting region 2300 does not overlap with the second sub-power signal line 420 and the second power signal line 500, so that good symmetry of the third effective light-emitting region along the first direction can be ensured.

[0125] For example, as Figures 1A - 3B shown, the first center line of the first effective light-emitting region 2100 overlaps with the data line Vd (described later), so that good symmetry of the first effective light-emitting region along the first direction can be ensured. For example, the data line Vd penetrates the first effective light-emitting region 2100 along the second direction, so that the first effective light-emitting region 2100 has a certain uniformity along the second direction. The "penetration" in the embodiments of the present disclosure refers to the positional relationship in the plane between structures such as data lines and the first power signal line and the effective light-emitting region.

[0126] For example, as Figure 1A and Figure 1B shown, the shapes of the first effective light-emitting region 2100 of the first color sub-pixel 210 and the third effective light-emitting region 2300 of the third color sub-pixel 230 both include a hexagon or an ellipse. For example, the shapes of the first effective light-emitting region 2100 and the third effective light-emitting region 2300 are both hexagons, and the three pairs of opposite sides in the hexagon are parallel, and the hexagon also includes sides parallel to the second direction. The hexagon includes a symmetry axis extending along the first direction and a symmetry axis extending along the second direction.

[0127] Although Figure 1A the shapes of the first effective light-emitting region and the third effective light-emitting region shown include strictly angles formed by two line segments, in some embodiments, the shapes of the first effective light-emitting region and the third effective light-emitting region can both be rounded-corner figures, such as ellipses. That is, on the basis of the above hexagon, the corners of the first effective light-emitting region and the third effective light-emitting region are rounded. For example, when forming the opening of the pixel defining layer, the part at the corner of the opening may form a rounded-corner shape, so that the shapes of the formed first effective light-emitting region and the third effective light-emitting region may be rounded-corner shapes.

[0128] For example, as Figures 1A - 3BAs shown, the center of the orthographic projection of the first effective light-emitting region 2100 on the substrate 100 is located within the orthographic projection of the first sub-power signal line 410 on the substrate 100. For example, the orthographic projection of the first sub-power signal line 410 on the substrate 100 passes through the center of the orthographic projection of the first effective light-emitting region 2100 on the substrate 100. That is, in the plan view, the first effective light-emitting region 2100 is symmetrically distributed with respect to the first sub-power signal line 410, that is, the axis of symmetry of the first effective light-emitting region 2100 extending in the first direction coincides with the first sub-power signal line 410, which can ensure better symmetry of the first effective light-emitting region 2100 in the second direction to improve color shift.

[0129] For example, as Figures 1A - 3B shown, the center of the orthographic projection of the third effective light-emitting region 2300 on the substrate 100 is located within the orthographic projection of the first sub-power signal line 410 on the substrate 100. For example, the orthographic projection of the first sub-power signal line 410 on the substrate 100 passes through the center of the orthographic projection of the third effective light-emitting region 2300 on the substrate 100. That is, in the plan view, the third effective light-emitting region 2300 is approximately symmetrically distributed with respect to the first sub-power signal line 410, that is, the axis of symmetry of the third effective light-emitting region 2300 extending in the first direction falls within the first sub-power signal line 410, which can ensure better symmetry of the third effective light-emitting region 2300 in the second direction to improve color shift.

[0130] For example, Figure 4 is a schematic diagram of the pixel circuit included in each sub-pixel and connected to the organic light-emitting element. As Figure 4 shown, each sub-pixel further includes a pixel circuit 0221 for driving the organic light-emitting element to emit light. The pixel circuit 0221 may include a driving circuit 0222, a first light-emitting control circuit 0223, a second light-emitting control circuit 0224, a data writing circuit 0226, a storage circuit 0227, a threshold compensation circuit 0228, and a reset circuit 0229. The driving circuit 0222 includes a control terminal, a first terminal, and a second terminal, and is configured to provide a driving current for driving the organic light-emitting element 0220 to emit light to the organic light-emitting element 0220.

[0131] For example, the first light-emitting control circuit 0223 is electrically connected to the first voltage terminal VDD and the first terminal of the driving circuit 0222, and is configured to implement the connection conduction or disconnection between the driving circuit 0222 and the first voltage terminal VDD; the second light-emitting control circuit 0224 is electrically connected to the second terminal of the driving circuit 0222 and the first electrode of the organic light-emitting element 0220, and is configured to implement the connection conduction or disconnection between the driving circuit 0222 and the organic light-emitting element 0220. The data writing circuit 0226 is electrically connected to the first terminal of the driving circuit 0222, and is configured to write a data signal into the storage circuit 0227 under the control of a scanning signal. The storage circuit 0227 is electrically connected to the control terminal of the driving circuit 0222 and the first voltage terminal VDD, and is configured to store the data signal. The threshold compensation circuit 0228 is electrically connected to the control terminal and the second terminal of the driving circuit 0222, and is configured to perform threshold compensation on the driving circuit 0222. The reset circuit 0229 is electrically connected to the control terminal of the driving circuit 0222 and the first electrode of the organic light-emitting element 0220, and is configured to reset the control terminal of the driving circuit 0222 and the first electrode of the organic light-emitting element 0220 under the control of a reset control signal.

[0132] For example, as Figure 4 shown, the driving circuit 0222 includes a driving transistor T1, the control terminal of the driving circuit 0222 includes the gate of the driving transistor T1, the first terminal of the driving circuit 0222 includes the first pole of the driving transistor T1, and the second terminal of the driving circuit 0222 includes the second pole of the driving transistor T1. The data writing circuit 0226 includes a data writing transistor T2, the storage circuit 0227 includes a capacitor C, the threshold compensation circuit 0228 includes a threshold compensation transistor T3, the first light-emitting control circuit 0223 includes a first light-emitting control transistor T4, the second light-emitting control circuit 0224 includes a second light-emitting control transistor T5, the reset circuit 0229 includes a first reset transistor T6 and a second reset transistor T7, and the reset control signal may include a first sub-reset control signal and a second sub-reset control signal.

[0133] For example, as Figure 4As shown, a first pole of the data writing transistor T2 is electrically connected to a first pole of the driving transistor T1. A second pole of the data writing transistor T2 is configured to be electrically connected to a data line Vd to receive a data signal. A gate of the data writing transistor T2 is configured to be electrically connected to a first scanning signal line Ga1 to receive a scanning signal; a first pole of a capacitor C is electrically connected to a first power supply terminal VDD. A second pole of the capacitor C is electrically connected to a gate of the driving transistor T1; a first pole of a threshold compensation transistor T3 is electrically connected to a second pole of the driving transistor T1. A second pole of the threshold compensation transistor T3 is electrically connected to a gate of the driving transistor T1. A gate of the threshold compensation transistor T3 is configured to be electrically connected to a second scanning signal line Ga2 to receive a compensation control signal; a first pole of a first reset transistor T6 is configured to be electrically connected to a first reset power supply terminal Vinit1 to receive a first reset signal. A second pole of the first reset transistor T6 is electrically connected to a gate of the driving transistor T1. A gate of the first reset transistor T6 is configured to be electrically connected to a first reset control signal line Rst1 to receive a first sub-reset control signal; a first pole of a second reset transistor T7 is configured to be electrically connected to a second reset power supply terminal Vinit2 to receive a second reset signal. A second pole of the second reset transistor T7 is electrically connected to a first electrode of the organic light-emitting element 0220. A gate of the second reset transistor T7 is configured to be electrically connected to a second reset control signal line Rst2 to receive a second sub-reset control signal; a first pole of a first light-emitting control transistor T4 is electrically connected to the first power supply terminal VDD. A second pole of the first light-emitting control transistor T4 is electrically connected to a first pole of the driving transistor T1. A gate of the first light-emitting control transistor T4 is configured to be electrically connected to a first light-emitting control signal line EM1 to receive a first light-emitting control signal; a first pole of a second light-emitting control transistor T5 is electrically connected to a second pole of the driving transistor T1. A second pole of the second light-emitting control transistor T5 is electrically connected to a second electrode of the organic light-emitting element 0220. A gate of the second light-emitting control transistor T5 is configured to be electrically connected to a second light-emitting control signal line EM2 to receive a second light-emitting control signal; a first electrode of the organic light-emitting element 0220 is electrically connected to a second power supply terminal VSS.

[0134] For example, one of the first power supply terminal VDD and the second power supply terminal VSS is a high-voltage terminal, and the other is a low-voltage terminal. For example, in the embodiment as Figure 4 shown, the first power supply terminal VDD is a voltage source to output a constant first voltage, and the first voltage is a positive voltage; while the second power supply terminal VSS can be a voltage source to output a constant second voltage, and the second voltage is a negative voltage, etc. For example, in some examples, the second power supply terminal VSS can be grounded.

[0135] For example, as Figure 4As shown, the scan signal and the compensation control signal can be the same. That is, the gates of the data writing transistor T2 and the threshold compensation transistor T3 can be electrically connected to the same signal line, such as the first scan signal line Ga1, to receive the same signal (e.g., the scan signal). At this time, the display substrate may not be provided with the second scan signal line Ga2, reducing the number of signal lines. For another example, the gates of the data writing transistor T2 and the threshold compensation transistor T3 can also be electrically connected to different signal lines respectively. That is, the gate of the data writing transistor T2 is electrically connected to the first scan signal line Ga1, and the gate of the threshold compensation transistor T3 is electrically connected to the second scan signal line Ga2, and the signals transmitted by the first scan signal line Ga1 and the second scan signal line Ga2 are the same.

[0136] It should be noted that the scan signal and the compensation control signal can also be different, so that the gates of the data writing transistor T2 and the threshold compensation transistor T3 can be separately controlled, increasing the flexibility of controlling the pixel circuit.

[0137] For example, as Figure 4 shown, the first light emission control signal and the second light emission control signal can be the same. That is, the gates of the first light emission control transistor T4 and the second light emission control transistor T5 can be electrically connected to the same signal line, such as the first light emission control signal line EM1, to receive the same signal (e.g., the first light emission control signal). At this time, the display substrate may not be provided with the second light emission control signal line EM2, reducing the number of signal lines. For another example, the gates of the first light emission control transistor T4 and the second light emission control transistor T5 can also be electrically connected to different signal lines respectively. That is, the gate of the first light emission control transistor T4 is electrically connected to the first light emission control signal line EM1, and the gate of the second light emission control transistor T5 is electrically connected to the second light emission control signal line EM2, and the signals transmitted by the first light emission control signal line EM1 and the second light emission control signal line EM2 are the same.

[0138] It should be noted that when the first light emission control transistor T4 and the second light emission control transistor T5 are transistors of different types, for example, the first light emission control transistor T4 is a P-type transistor and the second light emission control transistor T5 is an N-type transistor, the first light emission control signal and the second light emission control signal can also be different, and the embodiments of the present disclosure do not limit this.

[0139] For example, the first sub-reset control signal and the second sub-reset control signal may be the same. That is, the gates of the first reset transistor T6 and the second reset transistor T7 may be electrically connected to the same signal line, such as the first reset control signal line Rst1, to receive the same signal (for example, the first sub-reset control signal). In this case, the display substrate may not be provided with the second reset control signal line Rst2, reducing the number of signal lines. For another example, the gates of the first reset transistor T6 and the second reset transistor T7 may also be electrically connected to different signal lines respectively. That is, the gate of the first reset transistor T6 is electrically connected to the first reset control signal line Rst1, and the gate of the second reset transistor T7 is electrically connected to the second reset control signal line Rst2, while the signals transmitted by the first reset control signal line Rst1 and the second reset control signal line Rst2 are the same. It should be noted that the first sub-reset control signal and the second sub-reset control signal may also be different.

[0140] For example, in some examples, the second sub-reset control signal may be the same as the scan signal. That is, the gate of the second reset transistor T7 may be electrically connected to the scan signal line Ga to receive the scan signal as the second sub-reset control signal.

[0141] For example, the sources of the first reset transistor T6 and the second reset transistor T7 are respectively connected to the first reset power supply terminal Vinit1 and the second reset power supply terminal Vinit2. The first reset power supply terminal Vinit1 and the second reset power supply terminal Vinit2 may be DC reference voltage terminals to output a constant DC reference voltage. The first reset power supply terminal Vinit1 and the second reset power supply terminal Vinit2 may be the same. For example, the sources of the first reset transistor T6 and the second reset transistor T7 are connected to the same reset power supply terminal. The first reset power supply terminal Vinit1 and the second reset power supply terminal Vinit2 may be high voltage terminals or low voltage terminals, as long as they can provide the first reset signal and the second reset signal to reset the gate of the driving transistor T1 and the first electrode of the light-emitting element 0220. The present disclosure does not limit this. For example, the gates of the first reset transistor T6 and the second reset transistor T7 may both be connected to the reset power supply signal line Init.

[0142] It should be noted that Figure 4 The driving circuit 0222, the data writing circuit 0226, the storage circuit 0227, the threshold compensation circuit 0228, and the reset circuit 0229 in the pixel circuit shown are only schematic. The specific structures of the circuits such as the driving circuit 0222, the data writing circuit 0226, the storage circuit 0227, the threshold compensation circuit 0228, and the reset circuit 0229 can be set according to actual application requirements, and the embodiments of the present disclosure do not make specific limitations on this.

[0143] For example, according to the characteristics of transistors, transistors can be classified into N-type transistors and P-type transistors. For the sake of clarity, in the embodiments of the present disclosure, the technical solutions of the present disclosure are elaborated in detail by taking the transistor as a P-type transistor (for example, a P-type MOS transistor). That is to say, in the description of the present disclosure, the driving transistor T1, the data writing transistor T2, the threshold compensation transistor T3, the first light-emitting control transistor T4, the second light-emitting control transistor T5, the first reset transistor T6, the second reset transistor T7, etc. can all be P-type transistors. However, the transistors in the embodiments of the present disclosure are not limited to P-type transistors, and those skilled in the art can also use N-type transistors (for example, N-type MOS transistors) to implement the functions of one or more transistors in the embodiments of the present disclosure according to actual needs.

[0144] It should be noted that the transistors used in the embodiments of the present disclosure can be thin-film transistors, field-effect transistors, or other switching devices with the same characteristics. The thin-film transistors can include oxide semiconductor thin-film transistors, amorphous silicon thin-film transistors, polycrystalline silicon thin-film transistors, etc. The source and drain of the transistor can be symmetric in structure, so there is no physical difference between its source and drain. In the embodiments of the present disclosure, in order to distinguish the transistors, except for the gate as the control electrode, one of the electrodes is directly described as the first electrode and the other as the second electrode. Therefore, the first and second electrodes of all or part of the transistors in the embodiments of the present disclosure can be interchanged according to needs.

[0145] It should be noted that in the embodiments of the present disclosure, the pixel circuit of the sub-pixel can be Figure 4 not only the 7T1C (i.e., seven transistors and one capacitor) structure shown, but also a structure including other numbers of transistors, such as 7T2C structure, 6T1C structure, 6T2C structure, or 9T2C structure. The embodiments of the present disclosure do not limit this.

[0146] Figures 5 - 11 Schematic diagrams of the layer-by-layer stacking of a pixel circuit and each signal line provided for some embodiments of the present disclosure. The following combines the attached Figures 5 - 11 to describe the positional relationship of each circuit in the pixel circuit and each signal line on the backplane. Figures 5 - 11 In the example shown, four adjacent pixel circuits 0221 included in four sub-pixels are taken as an example, and the positions of the transistors of the pixel circuit included in one sub-pixel are schematically shown. The components included in the pixel circuits of other sub-pixels are substantially the same as the positions of the transistors included in this sub-pixel. As Figure 5 shown, the pixel circuit 0221 of this sub-pixel includes Figure 4The driving transistor T1, data writing transistor T2, threshold compensation transistor T3, first light emission control transistor T4, second light emission control transistor T5, first reset transistor T6, second reset transistor T7, and capacitor C shown.

[0147] For example, Figure 5 The active semiconductor layer 310 of the pixel circuit in the display substrate is shown. The active semiconductor layer 310 can be formed by patterning a semiconductor material. The active semiconductor layer 310 can be used to fabricate the active layers of the above-mentioned driving transistor T1, data writing transistor T2, threshold compensation transistor T3, first light emission control transistor T4, second light emission control transistor T5, first reset transistor T6, and second reset transistor T7. The active semiconductor layer 310 includes the active layer patterns (channel regions) and doping region patterns (source / drain doping regions) of the transistors in each sub-pixel, and the active layer patterns and doping region patterns of the transistors in the same pixel circuit are integrally provided.

[0148] It should be noted that the active layer can include an integrally formed low-temperature polysilicon layer, and the source region and drain region can be made conductive through doping and other means to achieve the electrical connection of each structure. That is, the active semiconductor layer of the transistors in each sub-pixel is an integral pattern formed of p-silicon, and the transistors in the same pixel circuit include doping region patterns (i.e., source regions and drain regions) and active layer patterns, and the active layers of different transistors are separated by doping structures.

[0149] For example, the active semiconductor layer 310 can be fabricated using amorphous silicon, polysilicon, oxide semiconductor materials, etc. It should be noted that the above-mentioned source region and drain region can be regions doped with n-type impurities or p-type impurities.

[0150] For example, the active semiconductor layers in the pixel circuits of different color sub-pixels arranged along the first direction have no connection relationship and are disconnected from each other. The active semiconductor layers in the pixel circuits of the sub-pixels arranged along the second direction can be integrally provided or can be disconnected from each other.

[0151] Figures 5 - 11Also shown are a scan signal line Ga (including a first scan signal line Ga1 and a second scan signal line Ga2), a reset control signal line Rst (including a first reset control signal line Rst1 and a second reset control signal line Rst2), a reset power signal line Init of a reset power supply terminal Vinit (including a first reset power signal line Init1 of a first reset power supply terminal Vinit1 and a second reset power signal line Init2 of a second reset power supply terminal Vinit2), a light emission control signal line EM (including a first light emission control signal line EM1 and a second light emission control signal line EM2), a data line Vd, a first power signal line 400, and a second power signal line 500, which are electrically connected to respective color sub-pixels of the pixel circuit 0121. The first power signal line 400 and the second power signal line 500 are electrically connected to each other.

[0152] It should be noted that in Figures 5 to 11 the example shown, the first scan signal line Ga1 and the second scan signal line Ga2 are the same signal line Ga, the first reset power signal line Init1 and the second reset power signal line Init2 are the same signal line Init, the first reset control signal line Rst1 and the second reset control signal line Rst2 are the same signal line Rst, and the first light emission control signal line EM1 and the second light emission control signal line EM2 are the same signal line EM, but it is not limited thereto.

[0153] For example, the gate metal layer of the pixel circuit may include a first conductive layer and a second conductive layer. A gate insulating layer ( Figure 2 the gate insulating layer 160 shown) is formed on the above-mentioned active semiconductor layer 310 for insulating the above-mentioned active semiconductor layer 310 from the subsequently formed gate metal layer. Figure 6 Shown is a first conductive layer 320 included in the display substrate. The first conductive layer 320 is disposed on the gate insulating layer so as to be insulated from the active semiconductor layer 310. The first conductive layer 320 may include a second pole CC2 of a capacitor C, a scan signal line Ga, a reset control signal line Rst, a light emission control signal line EM, and gates of a driving transistor T1, a data writing transistor T2, a threshold compensation transistor T3, a first light emission control transistor T4, a second light emission control transistor T5, a first reset transistor T6, and a second reset transistor T7.

[0154] For example, as Figure 6As shown, the gate of the data writing transistor T2 can be the overlapping part of the scanning signal line Ga and the active semiconductor layer 310; the gate of the first light-emitting control transistor T4 can be the first overlapping part of the light-emitting control signal line EM and the active semiconductor layer 310, and the gate of the second light-emitting control transistor T5 can be the second overlapping part of the light-emitting control signal line EM and the active semiconductor layer 310; the gate of the first reset transistor T6 is the first overlapping part of the reset control signal line Rst and the active semiconductor layer 310, and the gate of the second reset transistor T7 is the second overlapping part of the reset control signal line Rst and the active semiconductor layer 310; the threshold compensation transistor T3 can be a thin-film transistor with a double-gate structure. The first gate of the threshold compensation transistor T3 can be the overlapping part of the scanning signal line Ga and the active semiconductor layer 310, and the second gate of the threshold compensation transistor T3 can be the overlapping part of the protruding structure P protruding from the scanning signal line Ga and the active semiconductor layer 310. As Figure 4 and 6 shown, the gate of the driving transistor T1 can be the second pole CC2 of the capacitor C.

[0155] It should be noted that Figure 5 and Figure 6 each of the dashed rectangular boxes in shows the respective overlapping parts of the first conductive layer 320 and the active semiconductor layer 310. As the channel regions of the respective transistors, the active semiconductor layers on both sides of each channel region are made conductive through processes such as ion doping as the first and second poles of the respective transistors.

[0156] For example, as Figure 6 shown, the scanning signal line Ga, the reset control signal line Rst, and the light-emitting control signal line EM are arranged along the second direction (Z direction). The scanning signal line Ga is located between the reset control signal line Rst and the light-emitting control signal line EM.

[0157] For example, in the second direction, the second pole CC2 of the capacitor C (i.e., the gate of the driving transistor T1) is located between the scanning signal line Ga and the light-emitting control signal line EM. The protruding structure P protruding from the scanning signal line Ga is located on the side of the scanning signal line Ga away from the light-emitting control signal line EM.

[0158] For example, as Figure 6 shown, in the second direction, the gates of the data writing transistor T2, the threshold compensation transistor T3, and the first reset transistor T6 are all located on the first side of the gate of the driving transistor T1, and the gates of the first light-emitting control transistor T4, the second light-emitting control transistor T5, and the second reset transistor T7 are all located on the second side of the gate of the driving transistor T1. For example, Figure 6In the example shown, the first side and the second side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel are two opposite sides that drive the gate of the driving transistor T1 in the second direction. For example, as Figure 6 shown, in the XZ plane, the first side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel can be the upper side of the gate of the driving transistor T1, and the second side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel can be the lower side of the gate of the driving transistor T1. The lower side, for example, the side of the display substrate for binding the IC is the lower side of the display substrate, and the lower side of the gate of the driving transistor T1 is the side of the gate of the driving transistor T1 closer to the IC. The upper side is the opposite side of the lower side, for example, the side of the gate of the driving transistor T1 farther from the IC.

[0159] For example, in some embodiments, as Figure 6 shown, in the first direction (X direction), the gates of the data writing transistor T2 and the first light emitting control transistor T4 are both located on the third side of the gate of the driving transistor T1, and the first gate of the threshold compensation transistor T3, the gates of the second light emitting control transistor T5 and the second reset transistor T7 are all located on the fourth side of the gate of the driving transistor T1. For example, Figure 6 in the example shown, the third side and the fourth side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel are two opposite sides that drive the gate of the driving transistor T1 in the first direction X. For example, the third side of the gate of the driving transistor T1 of the pixel circuit can be the left side of the gate of the driving transistor T1 of the pixel circuit, and the fourth side of the gate of the driving transistor T1 of the pixel circuit can be the right side of the gate of the driving transistor T1 of the pixel circuit. The left side and the right side, for example, among the data line Vd and the second power supply signal line 500 connected to the same pixel circuit, the data line Vd is on the left side of the second power supply signal line 500, and the second power supply signal line 500 is on the right side of the data line Vd.

[0160] It should be noted that the structure of each pixel circuit can be Figure 6 the mirror structure shown, that is, the structures of each layer of each pixel circuit are based on the channel region of the driving transistor T1, and the structures on the left and right sides are flipped, so the relationship between the left side and the right side described above can be opposite.

[0161] For example, a first insulating layer (such as the first insulating layer 150 shown in Figure 2 ) is formed on the above-mentioned first conductive layer 320 to insulate the above-mentioned first conductive layer 320 from the second conductive layer 330 formed subsequently. Figure 7The second conductive layer 330 of the pixel circuit is shown. The second conductive layer 330 includes the first pole CC1 of the capacitor C, the reset power signal line Init, and the light-shielding portion S. The first pole CC1 of the capacitor C and the second pole CC2 of the capacitor C overlap at least partially to form the capacitor C.

[0162] For example, as Figure 7 shown, the active semiconductor layer between the two channels of the dual-gate threshold compensation transistor T3 is in a floating state when the threshold compensation transistor T3 is turned off, and is prone to jumping due to the influence of the surrounding circuit voltage, which will affect the leakage current of the threshold compensation transistor T3 and further affect the light emission brightness. In order to keep the voltage of the active semiconductor layer between the two channels of the threshold compensation transistor T3 stable, the light-shielding portion S is designed to form a capacitor with the active semiconductor layer between the two channels of the threshold compensation transistor T3. The light-shielding portion S can be connected to the second power signal line to obtain a constant voltage, so that the voltage of the floating active semiconductor layer can be kept stable. The light-shielding portion S overlaps with the active semiconductor layer between the two channels of the dual-gate threshold compensation transistor T3, and can also prevent the active semiconductor layer between the two gates from being illuminated and changing its characteristics. For example, it can prevent the voltage of this part of the active semiconductor layer from changing to prevent crosstalk.

[0163] For example, a second insulating layer (such as the second insulating layer 140 shown in Figure 2 ) is formed on the second conductive layer 330 described above to insulate the second conductive layer 330 from the source-drain metal layer 340 formed subsequently. Figure 8 The via in the second insulating layer formed on the second conductive layer 330 described above is shown. Figure 9 The source-drain metal layer 340 of the pixel circuit is shown. As Figure 8 and Figure 9 shown, the source-drain metal layer 340 includes the data line Vd and the second power signal line 500. The above-mentioned data line Vd and the second power signal line 500 both extend in the Z direction.

[0164] For example, the source-drain metal layer 340 further includes a first connection portion 341, a second connection portion 342, and a third connection portion 343. Figure 8 and Figure 9 The exemplary positions of a plurality of vias are shown. The source-drain metal layer 340 is connected to the active semiconductor layer 310, the first conductive layer film 320, and the second conductive layer 330 through the plurality of vias shown.

[0165] For example, as Figure 8 and Figure 9As shown, the data line Vd is electrically connected to the second pole of the data writing transistor T2 through the via 381 that penetrates the gate insulating layer, the first insulating layer, and the second insulating layer. The second power supply signal line 500 is electrically connected to the first pole of the first light-emitting control transistor T4 through the via 382 that penetrates the gate insulating layer 160, the first insulating layer 150, and the second insulating layer 140. The second power supply signal line 500 and the data line Vd are alternately arranged in the first direction. The second power supply signal line 500 is electrically connected to the first pole CC1 of the capacitor C through the via 3832 that penetrates the second insulating layer 140. The second power supply signal line 500 is electrically connected to the light-shielding portion S through the via 3833 that penetrates the second insulating layer to provide a constant voltage to the light-shielding portion S. One end of the first connection portion 341 is electrically connected to the second pole of the threshold compensation transistor T3 through the via 384 in the gate insulating layer 160, the first insulating layer 150, and the second insulating layer 140, and the other end of the first connection portion 341 is electrically connected to the gate of the driving transistor T1 (i.e., the second pole CC2 of the capacitor C) through the via 385 in the first insulating layer 150 and the second insulating layer 140. One end of the second connection portion 342 is electrically connected to the reset power supply signal line Init through the via 386 in the second insulating layer 140, and the other end of the second connection portion 342 is electrically connected to the first pole of the second reset transistor T7 through the via 387 in the gate insulating layer 160, the first insulating layer 150, and the second insulating layer 140. The third connection portion 343 is electrically connected to the second pole of the second light-emitting control transistor T5 through the via 352 in the gate insulating layer 160, the first insulating layer 150, and the second insulating layer 140.

[0166] For example, a passivation layer 123 and a second planarization layer 122 (as Figures 2 - 3B shown) are formed on the source-drain metal layer 340 described above to protect the source-drain metal layer 340. As Figure 10 shown, the passivation layer 123 and the second planarization layer 122 include a via 351 and a via 354.

[0167] The embodiments of the present disclosure are not limited to forming the passivation layer 123 and the second planarization layer 122 on the source-drain metal layer 340 described above. Figure 3C For another example in the embodiments of the present disclosure, it is a cross-sectional view taken along the Figure 1B BB' line shown. For example, as Figure 3C shown, only the second planarization layer 122 may be formed on the source-drain metal layer 340 described above, without forming the passivation layer 123.

[0168] For example, Figure 11 shows the third conductive layer 350 of the pixel circuit. The third conductive layer 350 includes a fourth connection portion 450 and a first power supply signal line 400 that are cross-distributed in the X direction and the Y direction. Figure 11Exemplary positions of a plurality of vias 351 and 354 are also shown. The third conductive layer 350 is connected to the source-drain metal layer 340 through the shown plurality of vias 351 and 354. A first planarization layer 121 is provided on a side of the third conductive layer 350 away from the substrate 100. The second electrodes of the organic light-emitting elements of each sub-pixel can be provided on a side of the first planarization layer 121 away from the substrate 100, and the second electrodes of the organic light-emitting diodes are electrically connected to the fourth connection part 450 through vias 1210 provided in the first planarization layer 121, so as to achieve electrical connection with the second pole of the second light-emitting control transistor T5.

[0169] For example, as Figures 1A - 1B and Figure 11 shown, the third conductive layer 350 includes a plurality of fourth connection parts 450. A column of fourth connection parts 450 is provided between adjacent two second sub-power signal lines 420. For example, each sub-pixel circuit includes one fourth connection part 450, and the plurality of fourth connection parts 450 included in the plurality of sub-pixels are arranged in an array in the first direction and the second direction. For example, the plurality of fourth connection parts 450 are arranged at equal intervals in the first direction, and the plurality of fourth connection parts 450 are also arranged at equal intervals in the second direction.

[0170] For example, along a direction perpendicular to the substrate 100, each effective light-emitting region does not overlap with the fourth connection part 450. For example, the center line of the positive projection of the third effective light-emitting region 2300 on the substrate 100 passes through the positive projection of a column of fourth connection parts 450 on the substrate 100. For example, the straight line extending in the second direction where the spacer 430 is located passes through a column of fourth connection parts 450. For example, the distance between the adjacent edges of two adjacent fourth connection parts 450 arranged in the first direction is greater than the size of the second effective light-emitting region 2200 in the first direction. For example, the distance between the adjacent edges of two adjacent fourth connection parts 450 arranged in the second direction is greater than the size of each effective light-emitting region in the second direction. For example, the distance between the adjacent edges of two adjacent fourth connection parts 450 arranged in the second direction is less than the size of the break 421 in the second direction.

[0171] For example, a first planarization layer 121 is provided between the second electrodes included in each color sub-pixel and the third conductive layer 350 ( Figure 2 shown), and the second electrode is connected to the fourth connection part 450 through a via provided in the first planarization layer, so as to achieve connection with the second pole of the second light-emitting control transistor T5.

[0172] Figure 12 For Figure 11 is a schematic plan view of an organic light-emitting element corresponding one by one to each pixel circuit structure shown, Figure 13 is a schematic plan view of the planar shape of the second electrode of each sub-pixel.

[0173] For example, as Figure 1B and Figure 12 shown, along the direction perpendicular to the substrate 100, the first effective light-emitting region 2100 overlaps with the data line Vd connected to the second pole of the data writing transistor T2 of the first color sub-pixel 210.

[0174] For example, as Figure 1B and Figure 12 shown, along the direction perpendicular to the substrate 100, the second effective light-emitting region 2201 overlaps with the second power supply signal line 500 connected to the first pole of the first light-emitting control transistor T4 of the second color sub-pixel 220, the second connection portion 342 of the second color sub-pixel 220, and the data line Vd connected to the second pole of the data writing transistor T2 of the second color sub-pixel 220. Moreover, the second center line overlaps with the second power supply signal line 500, and the second connection portion 342 and the data line Vd are located on both sides of the second center line; along the direction perpendicular to the substrate 100, the second effective light-emitting region 2202 overlaps with the data line Vd, the second power supply signal line 500, and the first connection portion 341. Moreover, the second center line overlaps with the second power supply signal line 500, and the first connection portion 341 and the data line Vd are located on both sides of the second center line.

[0175] For example, as Figure 1B and Figure 12 shown, along the direction perpendicular to the substrate 100, the third effective light-emitting region 2300 overlaps with the data line Vd connected to the second pole of the data writing transistor T2 of the adjacent second color sub-pixel 220, the first connection portion 341 of the third color sub-pixel 230, and the second connection portion 342. Moreover, the data line Vd is located on one side of the third center line, and the first connection portion 341 and the second connection portion 342 are located on the other side of the third center line.

[0176] For example, as Figure 12 shown, along the direction perpendicular to the substrate 100, the portion where the second connection portion 342 is electrically connected to the first pole of the second reset transistor T7 through the via 387 overlaps with the break. For example, along the direction perpendicular to the substrate 100, the portion of the light-shielding portion S extending in the Z direction overlaps with the break, and the via 3833 overlaps with the break. For example, along the direction perpendicular to the substrate 100, the portion where the first pole CC1 of the capacitor C is connected to the second power supply signal line through the via 3832 overlaps with the break.

[0177] For example, as Figures 5 - 13As shown, the second electrode 212 of the first color sub-pixel 210 includes a first main electrode 2121 and a first connection electrode 2122. The first main electrode 2121 and the first connection electrode 2122 may be an integral structure, and the first connection electrode 2122 is connected to the fourth connection portion 450 through a via 1210 to be connected to the second pole of the second light-emitting control transistor T5 of the first color sub-pixel 210.

[0178] For example, the second electrodes 222 of the second color sub-pixels in the second color sub-pixel pair 220 include a second main electrode 2221 and a second connection electrode 2222. The second electrode of the first sub-pixel in the second color sub-pixel pair 220 includes a second main portion 2221-1 and a second connection portion 2222-1, and the second electrode of the second sub-pixel in the second color sub-pixel pair 220 includes a second main portion 2221-2 and a second connection portion 2222-2. For example, the second main electrode 2221 and the second connection electrode 2222 of each second color sub-pixel may be an integral structure, and the second connection electrode 2222 of the second color sub-pixel is connected to the fourth connection portion 450 through a via 1210 to be connected to the second pole of the second light-emitting control transistor T5 of the second color sub-pixel.

[0179] For example, the second electrode 232 of the third color sub-pixel 230 includes a third main electrode 2321 and a third connection electrode 2322. For example, the third main electrode 2321 and the third connection electrode 2322 may be an integral structure, and the third connection electrode 2322 is connected to the fourth connection portion 450 through a via 1210 to be connected to the second pole of the second light-emitting control transistor T5 of the third color sub-pixel 130.

[0180] For example, the first connection electrode 2122 of the first color sub-pixel 210 is located on the side of the first main electrode 2121 close to the second color sub-pixel pair 220, the second connection electrode 2222 of the second color sub-pixel pair 220 is located on the side of the second main electrode 2221 away from the first color sub-pixel 210, and the third center line of the third effective light-emitting region 2300 of the third color sub-pixel 230 passes through the third main electrode 2321 and the third connection electrode 2322.

[0181] For example, as Figure 1A , Figure 1B , Figure 12 and Figure 13As shown, the shape of the main electrode of each sub-pixel is substantially the same as the shape of the light-emitting region, and the area of the main electrode of each sub-pixel is larger than the area of the effective light-emitting region. For example, the geometric center of the main electrode of each sub-pixel substantially coincides with the geometric center of the effective light-emitting region. For example, the shapes of the first main electrode 2121 of the first color sub-pixel 210 and the third main electrode 2321 of the third color sub-pixel 230 are substantially hexagonal or elliptical, and the shape of the second main electrode 2221 of each second color sub-pixel in the second color sub-pixel pair 220 is substantially pentagonal, circular or droplet-shaped.

[0182] For example, Figure 14 is a schematic plan view of the second electrode of each sub-pixel in a display substrate. Figure 14 The display substrate shown is different from the display substrate of the embodiment of the present disclosure as shown in FIG. 1- Figure 13 The difference of the display substrate shown lies in Figure 14 The shape of the connecting electrode of the second electrode of the organic light-emitting element shown is different from the shape of the connecting electrode of the second electrode of the organic light-emitting element in the embodiment of the present disclosure as Figure 13 shown. As Figure 14 shown, the shape of the main electrode 11 included in the second electrode of the organic light-emitting element of the first color sub-pixel and the shape of its light-emitting region 1 are both hexagonal; the shape of the main electrode 31 included in the second electrode of the organic light-emitting element of the third color sub-pixel and the shape of its light-emitting region 3 are both hexagonal; the shape of the main electrode 21 included in the second electrode of the organic light-emitting element of the second color sub-pixel and the shape of its light-emitting region 2 are both pentagonal. The second electrode of one second color sub-pixel includes a main electrode 21-1 and a connecting electrode 22-1, and the second electrode of the other second color sub-pixel includes a main electrode 21-2 and a connecting electrode 22-2. The main electrode and the connecting electrode in the second electrode of each sub-pixel can be an integral structure, and at this time, the boundary between the main electrode and the connecting electrode is Figure 14 the boundary shown by the dotted line in Figure 14 It can be seen that the shape of the main electrode of each sub-pixel can be a regular polygon, and the shape of the connecting electrode can be an irregular shape.

[0183] When Figure 14 the display substrate shown is applied to fingerprint detection, an optical in-screen fingerprint detection technology can be adopted. The optical in-screen fingerprint detection technology relies on light reflection to detect the fingerprint circuit and compares the obtained fingerprint image with the image in the database to achieve the purpose of fingerprint detection. The optical in-screen fingerprint detection technology is particularly widely used in organic light-emitting diode display devices.

[0184] Optical in-screen fingerprint detection technology usually uses the light emitted by the display substrate as the light source. The fingerprint sensor is usually arranged on the non-display side of the display substrate. For example, it can be located on the side of the organic light-emitting element close to the substrate to achieve the function of in-screen fingerprint detection.

[0185] For example, the light emitted by each sub-pixel can be used for display and as the light for in-screen fingerprint detection. A top film layer can also be arranged on the side of the sub-pixel away from the substrate to place the finger. The fingerprint sensor for collecting fingerprint images can be arranged on the same side of the display substrate as each sub-pixel, and the fingerprint sensor is arranged on the side of the organic light-emitting element of each sub-pixel close to the substrate, for detecting the reflected light reflected from the fingerprint on the surface of the top film layer. The fingerprint sensor can include a plurality of detection units arranged in an array. To achieve the function of in-screen fingerprint detection, at least part of the film layers such as the above-mentioned top layer film and substrate are transparent, and a transparent area (this transparent area is the transparent area of the display substrate) is arranged between adjacent sub-pixels, so that the reflected light of the fingerprint on the surface of the top layer film can be incident on the fingerprint sensor to obtain a fingerprint image. Since the anode (the second electrode) of the organic light-emitting element of each sub-pixel is formed of a light-blocking material, the light-shielding area of the anode of each sub-pixel will affect the light transmittance, and thus affect the sensitivity of fingerprint detection.

[0186] As Figure 14 shown, in the first color sub-pixel, the area ratio of the effective light-emitting area 1 to the second electrode is approximately 52.85%; in the second color sub-pixel, the area ratio of the effective light-emitting area 2 to the second electrode is approximately 42.31%; in the third color sub-pixel, the area ratio of the effective light-emitting area 3 to the second electrode is approximately 66.99%. The area ratio of the second electrode of the first color sub-pixel, the two second electrodes in the second color sub-pixel pair, and the second electrode in the third color sub-pixel is 1:1.58:1.16.

[0187] On the premise of ensuring that the area of the light-emitting area of each sub-pixel remains unchanged, the light-shielding area can be reduced by changing the shape of the area outside the effective light-emitting area of the second electrode, such as the connection electrode, to increase the area of the transparent area of the display substrate, thereby improving the sensitivity of fingerprint detection.

[0188] On the premise that the area of the effective light-emitting area of each sub-pixel remains unchanged, compared with Figure 14 the shape of the second electrode of each sub-pixel in the shown display substrate, the display substrate provided by the embodiment of the present disclosure can reduce the light-blocking area of the second electrode by reducing the area of the area outside the effective light-emitting area of each sub-pixel, such as the connection electrode, and improve the light transmittance of the display substrate.

[0189] For example, as Figure 1A , Figures 12 - 13As shown, in the first color sub-pixel 210, the area ratio of the first effective light-emitting region 2100 to the second electrode 212 is 53% - 55%. In the second color sub-pixel pair 220, the area ratio of the two second effective light-emitting regions 2200 to the two second electrodes 222 is 43.5% - 48%. In the third color sub-pixel 230, the area ratio of the third effective light-emitting region 2300 to the second electrode 232 is 67.5% - 69%. The first color sub-pixel, the second color sub-pixel, and the third color sub-pixel in the embodiments of the present disclosure can correspond one-to-one with Figure 14 the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel therein. For example, in the first color sub-pixel 210, the area ratio of the first effective light-emitting region 2100 to the second electrode 212 is 54.9%. In the second color sub-pixel pair 220, the area ratio of the two second effective light-emitting regions 2200 to the two second electrodes 222 is 47%. In the third color sub-pixel 230, the area ratio of the third effective light-emitting region 2300 to the second electrode 232 is 68.3%. Thus, the overall transmittance of the display substrate is increased by approximately 0.23%. Compared with Figure 14 the display substrate shown, by increasing the area ratio of the effective light-emitting region of each sub-pixel to the second electrode in the embodiments of the present disclosure, the overall transmittance of the display substrate can be increased, and thus the sensitivity of fingerprint detection can be improved.

[0190] For example, the area ratio of the first effective light-emitting region 2100, the two second effective light-emitting regions 2200 in the second color sub-pixel pair 220, and the third effective light-emitting region 2300 is approximately 1:1.27:1.47; the area ratio of the second electrode 212 of the first color sub-pixel 210, the two second electrodes 222 in the second color sub-pixel pair 220, and the second electrode 232 of the third color sub-pixel 230 is approximately 1:1.48:1.18.

[0191] For example, as Figures 1A - 13As shown, in each sub-pixel, at least one notch is provided in the part where the connection electrode is connected to the main electrode. Along the direction perpendicular to the substrate 100, at least a part of the display substrate corresponding to the notch is a transparent region. The transparent region 10 here includes the region where the pixel circuit 0221, the first power supply signal line 400, the second power supply signal line 500, the data line Vd, the scan signal line Ga, the reset power supply signal line Init, the reset control signal line Rst, and the light emission control signal line EM are not provided. That is, the transparent region 10 refers to the region where light can enter the fingerprint sensor from the light-transmitting region on the substrate 100 that is not covered by the light-shielding film layer. The light-shielding film layer includes the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, the third conductive layer 350, and the film layer where the second electrode of each sub-pixel is located. For example, in at least a part of the region corresponding to the notch, there is no projection of the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350 falling within this region. For example, in at least a part of the region corresponding to the notch, there is no projection of vias, connection parts, and pads falling within this region. For example, in at least a part of the region corresponding to the notch, one or more insulating layers are provided, such as one or more of the gate insulating layer 160, the first insulating layer 150, the second insulating layer 140, the passivation layer 123, the first planarization layer 121, and the second planarization layer 122, etc., and the transmittance of the one or more insulating layers is greater than any one of the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350. For example, in at least a part of the region corresponding to the notch, one or more insulating layers are provided, such as one or more of the gate insulating layer 160, the first insulating layer 150, the second insulating layer 140, the passivation layer 123, the first planarization layer 121, and the second planarization layer 122, etc., and the multiple insulating layers are sequentially formed on the display substrate, and in the transparent region, the multiple insulating layers are adjacent to each other, that is, from the direction away from the display substrate, the second insulating layer is in direct contact with the first insulating layer, and the third insulating layer is in direct contact with the second insulating layer. For example, the one or more insulating layers can be an organic layer or an inorganic layer. For example, in at least a part of the region corresponding to the notch, it is set as a transparent region. In this region, the gate insulating layer is formed on the surface of the substrate, the first insulating layer is located on the surface of the gate insulating layer away from the substrate, the second insulating layer is located on the surface of the first insulating layer away from the substrate, the passivation layer is located on the surface of the second insulating layer away from the substrate, the second planarization layer is located on the surface of the passivation layer away from the substrate, the first planarization layer is located on the surface of the second planarization layer away from the substrate, and the second electrode, such as the anode, is a notch at this position, that is, the surface of the first planarization layer away from the substrate is in direct contact with the pixel defining layer formed after the second electrode.For example, in a region corresponding to at least a part of the notch, it is set as a transparent region. In this region, a gate insulating layer is formed on the surface of the substrate, a first insulating layer is located on the surface of the gate insulating layer away from the substrate, a second insulating layer is located on the surface of the first insulating layer away from the substrate, a second planarization layer is located on the surface of the second insulating layer away from the substrate, a first planarization layer is located on the surface of the second planarization layer away from the substrate, and the second electrode, such as an anode, is a notch at this position, that is, the pixel defining layer formed after the second electrode is in direct contact with the surface of the first planarization layer away from the substrate. For example, as follows. Figures 12 - 13 As shown, in the first color sub-pixel 210, a first notch 2123 is provided at the connection portion of the first connection electrode 2122 and the first main electrode 2121, and the display substrate is a transparent region 10 in a region corresponding to at least a part of the first notch 2123. That is, the part of the first notch 2123 does not overlap with the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350, and the region of the first notch 2123 that does not overlap with the above-mentioned film layers forms the transparent region of the display substrate. As Figures 13 - 14 shown, the first notch 2123 is the part where the first connection electrode 2122 in the embodiment of the present disclosure is recessed inward relative to Figure 14 the connection electrode 12 shown. A part of the above-mentioned recessed part overlaps with light-shielding film layers such as the active semiconductor layer 310, the first conductive layer 320, and the source-drain metal layer 340, and another part of the above-mentioned recessed part only overlaps with the substrate 100 and the multi-layer transparent insulating layer. That is, the position of the first notch needs to consider its positional relationship with the light-transmitting region exposed by the light-shielding film layers other than the film layer where the second electrode is located, and at least a part of the first notch and the above-mentioned light-transmitting region together form the transparent region of the display substrate.

[0192] For example, Figure 14 as shown, the side of the connection electrode 12 connected to the main electrode 11 is substantially a straight edge, Figure 13 and the first notch 2123 shown is a notch formed by bending the above-mentioned straight edge toward the side close to the first main electrode 2121. Relative to Figure 14 the display substrate shown, in the embodiment of the present disclosure, by providing a notch at the place where the first connection electrode faces the transparent region, the light transmittance of the display substrate can be improved, and thus the sensitivity of fingerprint detection can be improved.

[0193] For example, as Figures 12 - 13As shown, in a direction perpendicular to the substrate 100, a region 101 surrounded by a light emission control signal line EM of a pixel circuit connected to a first color sub-pixel 210, a second power supply signal line 500, an active semiconductor layer 310 including channel regions and source-drain doping regions of respective transistors of each sub-pixel, and a first pole CC1 of a storage capacitor C overlaps with a first notch 2123 of a second electrode 212 of the first color sub-pixel 210. Relative to Figure 14 In the embodiment of the present disclosure, by providing the first notch 2123 at a position of the first connection electrode 2122 corresponding to the region 101 with respect to the connection electrode 12 described above, the light transmittance of the display substrate can be increased.

[0194] For example, as Figures 12 - 13 shown, in the first color sub-pixel 210, the first connection electrode 2122 is connected to a fourth connection portion 450 through a first connection via 1211. The first notch 2123 is located on a side of the first connection via 1211 away from a second color sub-pixel 220 in the same repeating unit as the first color sub-pixel 210. The degree of depression of the first notch 2123 depends on the distance between the edge of the first connection electrode 2122 and the first connection via 1211. The first notch 2123 needs to avoid the first connection via 1211 to prevent affecting the electrical connection between the first connection electrode 2122 and the fourth connection portion 450. For example, the first notch 2123 is a notch formed by inward depression of a side edge of the first connection electrode 2122 opposite to the first connection via 1211 and away from the second color sub-pixel 220, and the edge of the notch extends to the edge of the first main electrode 2121.

[0195] For example, as Figure 14 shown, a portion of the connection electrode 12 close to the main electrode 11 has a wider width in the X direction, that is, a portion between the portion of the connection via connected to the connection electrode 12 and the main electrode 11 has a wider width in the X direction. Thus, Figure 14 after forming the first notch 2123 as shown in Figure 13 shown on the connection electrode 12, it can be ensured that the first connection electrode 2122 can still maintain a reliable connection with the fourth connection portion 450 through the first connection via 1211.

[0196] For example, as Figures 12 - 13As shown, in the second electrode 222-1 of the first sub-pixel of the second color sub-pixel pair 220, a second notch 2223-1 is provided at the connection portion between the first connection electrode 2222-1 and the first main electrode 2221-1, and the area of the display substrate corresponding to at least a part of the second notch 2223-1 is a transparent area. That is, the part of the second notch 2223-1 does not overlap with the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350, and the area of the second notch 2223-1 that does not overlap with the above-mentioned film layers forms the transparent area of the display substrate. As Figures 13 - 14 shown, the second notch 2223-1 is the part where the second connection electrode 2222-1 in the embodiment of the present disclosure is recessed with respect to the Figure 14 shown connection electrode 22-1. A part of the recessed part overlaps with light-shielding film layers such as the active semiconductor layer 310, the first conductive layer 320, and the source-drain metal layer 340, and another part of the recessed part only overlaps with the substrate 100 and the multi-layer transparent insulating layer. That is, the position of the second notch needs to consider its positional relationship with the light-transmitting area exposed by the light-shielding film layers other than the film layer where the second electrode is located, and at least a part of the second notch forms the transparent area of the display substrate together with the above-mentioned light-transmitting area.

[0197] For example, Figure 14 as shown, the side of the connection electrode 22-1 connected to the main electrode 21-1 is substantially a straight side, Figure 13 and the second notch 2223-1 shown is a notch formed by bending the straight side toward the side close to the second main electrode 2221-1. With respect to the Figure 14 shown display substrate, in the embodiment of the present disclosure, by providing a notch at the place where the second connection electrode faces the transparent area, the light transmittance of the display substrate can be improved, and thus the sensitivity of fingerprint detection can be improved.

[0198] For example, as Figures 12 - 13 shown, along the direction perpendicular to the substrate 100, a part of the area 102 close to the light emission control signal line EM in the area surrounded by the light emission control signal line EM, the second power supply signal line 500, and the first pole CC1 of the storage capacitor C connected to the first sub-pixel of the second color sub-pixel pair 220 overlaps with the second notch 2223-1 of the second electrode 222-1 of the first sub-pixel. With respect to the Figure 14 described connection electrode 22-1, in the embodiment of the present disclosure, by providing the second notch 2223-1 at the position of the second connection electrode 2222-1 corresponding to the area 102, the light transmittance of the display substrate can be increased.

[0199] For example, as Figures 12 - 13As shown, in the second electrode 222-2 of the second sub-pixel of the second color sub-pixel pair 220, a third notch 2223-2 is provided at the connection portion between the second connection electrode 2222-2 and the second main electrode 2221-2, and the region of the display substrate corresponding to at least a part of the third notch 2223-2 is a transparent region. That is, the portion of the third notch 2223-2 does not overlap with the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350, and the region of the third notch 2223-2 that does not overlap with the above-mentioned film layers forms the transparent region of the display substrate. As Figures 13 - 14 shown, the third notch 2223-2 is the portion where the second connection electrode 2222-2 in the embodiment of the present disclosure is recessed with respect to the Figure 14 shown connection electrode 22-2. A part of the above-mentioned recessed portion overlaps with light-shielding film layers such as the active semiconductor layer 310, the first conductive layer 320, and the source-drain metal layer 340, and another part of the above-mentioned recessed portion only overlaps with the substrate 100 and the multilayer transparent insulating layer. That is, the position of the third notch needs to consider its positional relationship with the light-transmitting region exposed by the light-shielding film layers other than the film layer where the second electrode is located, and at least a part of the third notch and the above-mentioned light-transmitting region together form the transparent region of the display substrate.

[0200] For example, Figure 14 shown, the side of the connection electrode 22-2 connected to the main electrode 21-2 is substantially a straight edge, Figure 13 shown second notch 2223-2 is a notch formed by bending the above-mentioned straight edge away from the first color sub-pixel. With respect to the Figure 14 shown display substrate, in the embodiment of the present disclosure, by providing a notch at the place where the second connection electrode faces the transparent region, the light transmittance of the display substrate can be improved, and thus the sensitivity of fingerprint detection can be improved.

[0201] For example, as Figures 12 - 13 shown, in the second sub-pixel of the second color sub-pixel pair 220, the second connection electrode 2222-2 includes a first portion 2-1 extending in the second direction and a bent second portion 2-2. The first portion 2-1 is located on the side of the second portion 2-2 away from the second main electrode 2221-2, the second portion 2-2 is connected to the main electrode 2221-2, and the maximum dimension of the first portion 2-1 in the first direction is greater than the maximum dimension of the second portion 2-2 in the first direction.

[0202] For example, as Figures 12 - 13As shown, in a direction perpendicular to the substrate 100, a partial area 103 near the second power supply signal line 500 and the light emission control signal line EM in the area surrounded by the light emission control signal line EM, the second power supply signal line 500, and the third connection part 343 of the pixel circuit connected to the second sub-pixel overlaps with the third notch 2223-2 of the second electrode 222-2 of the second sub-pixel.

[0203] Relative to Figure 14 the connection electrode 22-2 shown, in the embodiment of the present disclosure, by providing a third notch 2223-2 at a position of the second connection electrode 2222-2 corresponding to the area 103, the light transmittance of the display substrate can be increased.

[0204] Figure 14 The first part 22-21 included in the connection electrode 22-2 shown has substantially the same shape and size as the first part 2-1 included in the second connection electrode 2222-2 described in the embodiment of the present disclosure, while Figure 14 the size of the second part 22-22 included in the connection electrode 22-2 shown in the first direction is larger than the size of the first part 22-21 in the first direction, and the second part 22-22 covers a part of the light-transmitting area exposed by the light-shielding film layer except for the film layer where the second electrode is located. Therefore, by reducing the area of the overlapping part of the second part 22-22 and the above light-transmitting area, for example, removing the part near the first effective light-emitting area of the first color sub-pixel and covering the above light-transmitting area to form a third notch 2223-2, the light transmittance of the display substrate can be improved.

[0205] For example, Figure 14 the second part 22-22 of the connection electrode 22-2 shown is connected to both the first side close to the first color sub-pixel and the second side far from the first color sub-pixel of the main body electrode 21-2, while the second part 2-2 of the second connection electrode 2222-2 in the embodiment of the present disclosure is only connected to the second side far from the first color sub-pixel of the second main body electrode 2221-2, so that the light-transmitting area near the first side of the second main body electrode is not covered by the second connection electrode.

[0206] For example, as Figures 12 - 13 shown, in the second sub-pixel, the second connection electrode 2222-2 does not overlap with the source-drain doping region of the first light emission control transistor T4. Figure 14 The part of the second part 22-22 of the connection electrode 22-2 shown close to the first effective light-emitting area 1 of the first color sub-pixel covers the source-drain doping region of the first light emission control transistor T4. In the embodiment of the present disclosure, by Figure 14The second part 22-22 of the connecting electrode 22-2 shown, which is close to the first color sub-pixel, is removed, so that the second part 2-2 of the second connecting electrode 2222-2 does not overlap with the source-drain doping regions of the first light-emitting control transistor T4, and thus the second part 2-2 does not overlap with the light-transmitting region near the source-drain doping regions of the first light-emitting control transistor T4, improving the light transmittance of the display substrate.

[0207] For example, as Figures 12 - 13 shown, in the second color sub-pixel 220, the first connecting electrode 2222-1 is connected to the fourth connecting portion 450 through the second connecting via 1212-1. The second notch 2223-1 is located on the side of the second connecting via 1212-1 close to the first color sub-pixel 210 that is in the same repeating unit as the second color sub-pixel 220. The degree of depression of the second notch 2223-1 depends on the distance between the edge of the first connecting electrode 2222-1 and the second connecting via 1212-1. The second notch 2223-1 needs to avoid the second connecting via 1212-1 to prevent affecting the electrical connection between the first connecting electrode 2222-1 and the fourth connecting portion 450. For example, the second notch 2223-1 is a notch formed by inward depression of the edge of the first connecting electrode 2222-1 facing the second connecting via 1212-1 and close to the first color sub-pixel 210, and the edge of the notch extends to the edge of the first main electrode 2221-1.

[0208] For example, as Figure 14 shown, the width of the part of the connecting electrode 22-1 close to the main electrode 21-1 in the X direction is relatively wide, that is, the width of the part between the part of the connecting via connected to the connecting electrode 22-1 and the main electrode 21-1 in the X direction is relatively wide. Thus, Figure 14 after forming the Figure 13 shown second notch 2223-1 on the connecting electrode 22-1 shown, it can be ensured that the first connecting electrode 2222-1 can still maintain a reliable connection with the fourth connecting portion 450 through the second connecting via 1212-1.

[0209] For example, as Figures 12 - 13As shown, in the second color sub-pixel 220, the first connection electrode 2222-2 is connected to the fourth connection portion 450 through the third connection via 1212-2. The third notch 2223-2 is located on the side of the third connection via 1212-2 close to the first color sub-pixel 210 in the same repeating unit as the second color sub-pixel 220. The degree of depression of the third notch 2223-2 depends on the distance between the edge of the first connection electrode 2222-2 and the third connection via 1212-2. The third notch 2223-2 needs to avoid the third connection via 1212-2 to prevent affecting the electrical connection between the first connection electrode 2222-2 and the fourth connection portion 450. For example, the third notch 2223-2 is a notch formed by inward depression of the edge of the first connection electrode 2222-2 opposite to the third connection via 1212-2 and close to the first color sub-pixel 210, and the edge of the notch extends to the edge of the first main electrode 2221-2.

[0210] For example, as Figure 14 shown, the width of the portion of the connection electrode 22-2 close to the main electrode 21-2 in the X direction is relatively wide, that is, the width of the portion between the portion of the connection via connected to the connection electrode 22-2 and the main electrode 21-2 in the X direction is relatively wide. Thus, Figure 14 after forming the Figure 13 shown third notch 2223-2 on the connection electrode 22-2 shown, it can be ensured that the first connection electrode 2222-2 can still maintain a reliable connection with the fourth connection portion 450 through the third connection via 1212-2.

[0211] For example, as Figures 12 - 13 shown, in the second electrode 232 of the third color sub-pixel pair 230, a fourth notch 2323 is provided in the connection portion between the third connection electrode 2322 and the third main electrode 2321. At least a part of the display substrate corresponding to the fourth notch 2323 is a transparent region 10. That is, the portion of the fourth notch 2323 does not overlap with the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350. The region of the fourth notch 2323 that does not overlap with the above-mentioned film layers forms a transparent region of the display substrate. As Figures 13 - 14 shown, the fourth notch 2323 is the second connection electrode 232 in the embodiment of the present disclosure relative to Figure 14The recessed portion of the connecting electrode 2322 shown above, a part of the recessed portion overlaps with light-shielding film layers such as the active semiconductor layer 310, the first conductive layer 320, and the source-drain metal layer 340, and another part of the recessed portion only overlaps with the substrate 100 and the multi-layer transparent insulating layer. That is, the position of the fourth notch needs to consider its positional relationship with the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located, and at least a part of the fourth notch forms a transparent area of the display substrate together with the above light-transmitting area.

[0212] For example, Figure 14 The side of the connecting electrode 32 shown above that is connected to the main electrode 31 is substantially a straight edge. Figure 13 The fourth notch 2323 shown above is a notch formed by bending the above straight edge toward the side close to the third main electrode 2321. Relative to Figure 14 For the display substrate shown above, in the embodiments of the present disclosure, by providing a notch at the place where the second connecting electrode faces the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located, the light transmittance of the display substrate can be improved, and thus the sensitivity of fingerprint detection can be improved.

[0213] For example, as Figures 12 - 13 shown above, along the direction perpendicular to the substrate 100, a partial area 104 away from the light-emitting control signal line EM in the area surrounded by the data line Vd of the pixel circuit of the second sub-pixel connected to the second color pixel pair, the active semiconductor layer 310, and the film layer where the first pole CC1 of the storage capacitor C is located overlaps with the fourth notch 2323 of the second electrode 2322 of the third color sub-pixel 230. Relative to Figure 14 For the connecting electrode 32 shown above, in the embodiments of the present disclosure, by providing a fourth notch 2323 at the part of the third connecting electrode 2322 corresponding to the area 104, the light transmittance of the display substrate can be increased.

[0214] Figure 14 The part of the connecting electrode 32 shown above close to the first color sub-pixel overlaps with the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located. In the embodiments of the present disclosure, by removing the part of the third connecting electrode 2322 close to the first color sub-pixel and covering the above light-transmitting area to form the fourth notch 2323, the light transmittance of the display substrate can be improved.

[0215] For example, as Figures 12 - 13As shown, in the third color sub-pixel 230, the first connection electrode 2322 is connected to the fourth connection portion 450 through the fourth connection via 1213, and the fourth recess 2323 is located on the side of the fourth connection via 1213 close to the first color sub-pixel 210 adjacent to the third color sub-pixel 230. The degree of depression of the fourth recess 2323 depends on the distance between the edge of the first connection electrode 2322 and the fourth connection via 1213. The fourth recess 2323 needs to avoid the fourth connection via 1213 to prevent affecting the electrical connection between the first connection electrode 2223 and the fourth connection portion 450. For example, the fourth recess 2323 is a recess formed by the edge of the first connection electrode 2223 facing the fourth connection via 1213, which is close to the first color sub-pixel 210, and the edge of the recess extends to the edge of the first main electrode 2321.

[0216] For example, Figure 14 As shown, the width of the portion of the connecting electrode 32 close to the main electrode 31 along the X direction is wider, that is, the width of the portion between the connecting via connected to the connecting electrode 32 and the main electrode 31 along the X direction is wider, thereby Figure 14 The connecting electrode 32 is formed on the Figure 13 After the fourth notch 2323 is formed, it can be ensured that the first connection electrode 2223 can still maintain a reliable connection with the fourth connection portion 450 through the fourth connection via 1213 .

[0217] Another embodiment of the present disclosure provides a display device, comprising any of the above display substrates. The display device comprising the above display substrate can avoid the occurrence of color shift as much as possible.

[0218] The display device provided by the embodiment of the present disclosure can apply fingerprint detection technology, and the display substrate included in the display device has high fingerprint detection sensitivity.

[0219] There are a few points to note:

[0220] (1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures can refer to the general design.

[0221] (2) In the absence of conflict, features in the same embodiment or in different embodiments of the present disclosure may be combined with each other.

[0222] The above description is merely an exemplary embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure. The protection scope of the present disclosure is determined by the appended claims.

Claims

1. A display substrate, comprising: A substrate substrate; A first power supply signal line located on the substrate substrate, the first power supply signal line includes a plurality of first sub-power supply signal lines extending in a first direction and a plurality of second sub-power supply signal lines extending in a second direction, and the first sub-power supply signal lines are connected to the second sub-power supply signal lines; A pixel defining layer located on a side of the first power supply signal line away from the substrate substrate, the pixel defining layer includes a plurality of openings to define effective light-emitting regions of a plurality of sub-pixels, the plurality of sub-pixels include a sub-pixel pair composed of two sub-pixels arranged in the second direction, and the sub-pixel pair includes two sub-effective light-emitting regions having a gap therebetween; Wherein, in a plan view, the first sub-power supply signal line passes through the gap between the two sub-effective light-emitting regions, at least one of the second sub-power supply signal lines includes at least one break, and the two sub-effective light-emitting regions and the gap therebetween are both located at the break, so that a virtual straight line extending in the second direction connecting two end points of the same break of the second sub-power supply signal line penetrates through the two sub-effective light-emitting regions and the gap; Each of the sub-pixels includes an organic light-emitting element, the organic light-emitting element includes a first electrode, a light-emitting layer, and a second electrode stacked in sequence, at least a part of the light-emitting layer is located in the opening, and the second electrode is located on a side of the pixel defining layer facing the substrate substrate, and the first power supply signal line is located between the second electrode and the substrate substrate.

2. The display substrate according to claim 1, wherein, In a direction perpendicular to the substrate substrate, the second sub-power supply signal line having the break does not overlap with the two sub-effective light-emitting regions and the gap.

3. The display substrate according to claim 1, further comprising: A plurality of second power supply signal lines extending in the second direction, located between the first power supply signal line and the substrate substrate, and the second power supply signal lines are electrically connected to the second sub-power supply signal lines through vias in an insulating layer located between the second sub-power supply signal lines and the second power supply signal lines, Wherein, a positive projection of the second sub-power supply signal line on the substrate substrate at least partially overlaps with a positive projection of the second power supply signal line on the substrate substrate, and a positive projection of the two sub-effective light-emitting regions on the substrate substrate overlaps with a positive projection of the second power supply signal line on the substrate substrate.

4. The display substrate according to claim 3, wherein, A ratio of a distance between two centers of two positive projections of the first sub-power supply signal line on the substrate substrate to two positive projections of the two sub-effective light-emitting regions on the substrate substrate is 0.9 to 1.

1.

5. The display substrate according to claim 3, wherein, Two centers of two positive projections of the two sub-effective light-emitting regions on the substrate substrate are located within a positive projection of the second power supply signal line on the substrate substrate.

6. The display substrate according to claim 3, wherein, The display substrate includes a plurality of repeating units located on the substrate substrate. Each of the plurality of repeating units includes a first color sub-pixel, a pair of second color sub-pixels arranged in sequence along the first direction, and a third color sub-pixel. The pair of second color sub-pixels includes two second color sub-pixels of the same color, and the sub-pixel pair formed by the two sub-pixels arranged along the second direction is the pair of second color sub-pixels; The first color sub-pixel includes a first effective light-emitting region, the two sub-effective light-emitting regions are two second effective light-emitting regions, and the third color sub-pixel includes a third effective light-emitting region.

7. The display substrate according to claim 6, wherein, Along the second direction, the size of the gap is smaller than the size of the first effective light-emitting region, and the size of the gap is smaller than the size of the third effective light-emitting region.

8. The display substrate according to claim 6, wherein, In the direction perpendicular to the substrate substrate, the first effective light-emitting region does not overlap with the second sub-power signal line and the second power signal line.

9. The display substrate according to claim 8, wherein, The first effective light-emitting region is located between adjacent second sub-power signal lines, and the first effective light-emitting region is located between adjacent second power signal lines.

10. The display substrate according to claim 8, wherein, The center of the orthographic projection of the first effective light-emitting region on the substrate substrate is located within the orthographic projection of the first sub-power signal line on the substrate substrate.

11. The display substrate according to claim 8, further comprising: A plurality of pads extending along the second direction and disposed on the same layer as the first power signal line, Wherein, the distances from two second sub-power signal lines located on both sides of the first effective light-emitting region and adjacent to the first effective light-emitting region to the center line extending along the second direction of the first effective light-emitting region are not equal, and the first effective light-emitting region is located between the pad and the second sub-power signal line closer to the center line of the first effective light-emitting region.

12. The display substrate according to claim 11, wherein, In the first direction, the ratio of the center line of the first effective light-emitting region to the distances from the pads and the second sub-power signal lines located on both sides of the first effective light-emitting region is 0.9 to 1.

1.

13. The display substrate according to claim 11, wherein, Along the direction perpendicular to the substrate substrate, the pad overlaps with the first sub-power signal line and is electrically connected to each other.

14. The display substrate according to claim 13, wherein, The shape of the pad is generally strip-shaped, and the center of the orthographic projection of the pad on the substrate substrate is located within the orthographic projection of the first sub-power signal line on the substrate substrate.

15. The display substrate according to claim 11, wherein, A pad is disposed between the first color sub-pixel and the third color sub-pixel arranged adjacent to each other along the first direction, and the pad is electrically connected to the second sub-power signal line located between the first color sub-pixel and the third color sub-pixel.

16. The display substrate according to claim 15, further comprising: A connecting portion disposed on the same layer as the pad and located between the second sub-power signal line and the pad, Wherein, the pad is connected to the second sub-power signal line through the connecting portion.

17. The display substrate according to claim 16, wherein, There is a gap between the spacer and the second sub-power signal line connected thereto. The connecting portion is located between the spacer and the second sub-power signal line, and the connecting portion, the spacer, and the second sub-power signal line form an annular structure.

18. The display substrate according to claim 16, wherein, The multiple second sub-power signal lines include a first sub-signal line and a second sub-signal line that are alternately arranged along the first direction. The first sub-signal line is a continuous signal line, and the second sub-signal line is a signal line having the break.

19. The display substrate according to claim 18, wherein, The spacer is connected to the second sub-signal line through the connecting portion, and the orthographic projection of the spacer on another second sub-signal line adjacent to the second sub-signal line connected to the spacer is located within the break of the other second sub-signal line.

20. The display substrate according to claim 11, wherein, Along the second direction, the size of the spacer is smaller than the size of the first effective light-emitting region.

21. The display substrate according to any one of claims 6-20, wherein, In a direction perpendicular to the substrate, the third effective light-emitting region does not overlap with the second sub-power signal line and the second power signal line.

22. The display substrate according to claim 21, wherein, The third effective light-emitting region is located between adjacent second sub-power signal lines, and the third effective light-emitting region is located between adjacent second power signal lines.

23. The display substrate according to claim 21, wherein The center of the orthographic projection of the third effective light-emitting region on the substrate is located within the orthographic projection of the first sub-power signal line on the substrate.

24. The display substrate according to claim 21, wherein, The ratio of the distances between the orthographic projections of two second sub-power signal lines on the substrate, which are located on both sides of the third color sub-pixel and adjacent to the third color sub-pixel, to the center of the orthographic projection of the third effective light-emitting region on the substrate is 0.9 to 1.

1.

25. The display substrate according to any one of claims 6-20, wherein, In the first color sub-pixel, the area ratio of the first effective light-emitting region to the second electrode is 53% to 55%; in the second color sub-pixel pair, the area ratio of the two second effective light-emitting regions to the two second electrodes is 43.5% to 48%; in the third color sub-pixel, the area ratio of the third effective light-emitting region to the second electrode is 67.5% to 69%.

26. The display substrate according to claim 25, wherein, The shapes of the first effective light-emitting region and the third effective light-emitting region include a hexagon or an ellipse, and the shape of each second effective light-emitting region included in the second color sub-pixel pair includes a pentagon, a circle, or a teardrop shape.

27. The display substrate according to claim 26, wherein, The second electrodes of the color sub-pixels each include a main electrode and a connecting electrode connected to each other. The shape of the main electrode is substantially the same as the shape of the effective light-emitting region of the corresponding sub-pixel; In each sub-pixel, a notch is provided at a portion where the connecting electrode is connected to the main electrode. Along a direction perpendicular to the substrate, at least a part of the display substrate corresponding to the notch is a transparent region.

28. The display substrate according to claim 27, further comprising: Multiple data lines extending along the second direction and provided on the same layer as the second power signal line; Multiple scan signal lines extending along the first direction and located on a side of the data line layer facing the substrate; Multiple reset power signal lines extending along the first direction and located between the scan signal line layer and the data line layer; Multiple reset control signal lines extending along the first direction and arranged on the same layer as the scan signal lines; and Multiple light emission control signal lines extending along the first direction and arranged on the same layer as the scan signal lines, wherein each of the sub-pixels further includes a pixel circuit for driving the organic light-emitting element, and the pixel circuit includes a driving transistor, a data writing transistor, a storage capacitor, a threshold compensation transistor, a first light emission control transistor, a second light emission control transistor, a first reset transistor, and a second reset transistor; A first pole of the data writing transistor is electrically connected to a first pole of the driving transistor, a second pole of the data writing transistor is electrically connected to the data line to receive a data signal, and a gate of the data writing transistor is electrically connected to the scan signal line to receive a scan signal; A first pole of the storage capacitor is electrically connected to the second power supply signal line, and a second pole of the storage capacitor is electrically connected to a gate of the driving transistor; A first pole of the threshold compensation transistor is electrically connected to a second pole of the driving transistor, a second pole of the threshold compensation transistor is electrically connected to a gate of the driving transistor, and a gate of the threshold compensation transistor is electrically connected to the scan signal line to receive a compensation control signal; A first pole of the first reset transistor is electrically connected to the reset power supply signal line to receive a first reset signal, a second pole of the first reset transistor is electrically connected to a gate of the driving transistor, and a gate of the first reset transistor is electrically connected to the reset control signal line to receive a first sub-reset control signal; A first pole of the second reset transistor is electrically connected to the reset power supply signal line to receive a second reset signal, a second pole of the second reset transistor is electrically connected to a first electrode of the organic light-emitting element, and a gate of the second reset transistor is electrically connected to the reset control signal line to receive a second sub-reset control signal; A first pole of the first light emission control transistor is electrically connected to the second power supply signal line, a second pole of the first light emission control transistor is electrically connected to a first pole of the driving transistor, and a gate of the first light emission control transistor is electrically connected to the light emission control signal line to receive a first light emission control signal; A first pole of the second light emission control transistor is electrically connected to a second pole of the driving transistor, a second pole of the second light emission control transistor is electrically connected to a second electrode of the organic light-emitting element, and a gate of the second light emission control transistor is electrically connected to the light emission control signal line to receive a second light emission control signal; Wherein, the display substrate further includes a first connection portion, a second connection portion, and a third connection portion that are disposed on the same layer as the data line, and a fourth connection portion that is disposed on the same layer as the first power signal line. The first connection portion is configured to connect the second pole of the threshold compensation transistor and the gate of the driving transistor. The second connection portion is configured to connect the reset power signal line and the first pole of the second reset transistor. The third connection portion is configured to connect the second pole of the second light-emitting control transistor and the fourth connection portion. The fourth connection portion is configured to connect the third connection portion and the connection electrode of the second electrode of the organic light-emitting element.

29. The display substrate according to claim 28, wherein, The transparent region includes a region where the pixel circuit, the first power signal line, the second power signal line, the data line, the scan signal line, the reset power signal line, the reset control signal line, and the light-emitting control signal line are not provided.

30. The display substrate according to claim 29, wherein, In a direction perpendicular to the substrate, the region surrounded by the light-emitting control signal line, the second power signal line, the active semiconductor layer including the channel regions and source-drain doping regions of the transistors of each sub-pixel, and the first pole of the storage capacitor, which are connected to the first color sub-pixel of the pixel circuit, overlaps with the notch of the second electrode of the first color sub-pixel.

31. The display substrate according to claim 30, wherein, In a direction perpendicular to the substrate, a partial region close to the light-emitting control signal line in the region surrounded by the light-emitting control signal line, the second power signal line, and the first pole of the storage capacitor, which are connected to the first sub-pixel of the second color sub-pixel pair of the pixel circuit, overlaps with the notch of the second electrode of the first sub-pixel.

32. The display substrate according to claim 30, wherein, In the second sub-pixel of the second color sub-pixel pair, the connection electrode includes a first portion extending in the second direction and a bent second portion. The first portion is located on a side of the second portion away from the main electrode. The second portion is connected to the main electrode, and the maximum dimension of the first portion in the first direction is greater than the maximum dimension of the second portion in the first direction.

33. The display substrate according to claim 32, wherein In the second sub-pixel, the connection electrode does not overlap with the source-drain doping region of the first light-emitting control transistor.

34. The display substrate according to claim 32, wherein, In a direction perpendicular to the substrate, a partial region close to the second power signal line and the light-emitting control signal line in the region surrounded by the light-emitting control signal line, the second power signal line, and the third connection portion, which are connected to the pixel circuit of the second sub-pixel, overlaps with the notch of the second electrode of the second sub-pixel.

35. The display substrate according to claim 34, wherein, In a direction perpendicular to the substrate, a partial region away from the light-emitting control signal line in the region surrounded by the data line, the active semiconductor layer, and the first pole of the storage capacitor of the pixel circuit connected to the second sub-pixel overlaps with the notch of the second electrode of the third color sub-pixel.

36. The display substrate according to any one of claims 6-20, wherein, The first color sub-pixel is a red sub-pixel, the second color sub-pixel is a green sub-pixel, and the third color sub-pixel is a blue sub-pixel.

37. A display device, comprising the display substrate according to any one of claims 1-36.

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