Display device and method of driving a display device

Abstract

A display device and a method of driving the display device are provided. The display device includes a display panel including pixels connected to data lines and scan lines, a data driving circuit driving the data lines, a scan driving circuit driving the scan lines, and a driving controller, the driving controller dividing the display panel into a first display area and a second display area, controlling the data driving circuit and the scan driving circuit to drive the first display area at a first driving frequency and to drive the second display area at a second driving frequency lower than the first driving frequency during a multi-frequency mode, and setting third driving frequencies respectively corresponding to horizontal lines in a boundary area during the multi-frequency mode, wherein the boundary area is defined by a portion of the second display area adjacent to the first display area. Each of the third driving frequencies has a frequency level between the first driving frequency and the second driving frequency.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2020-0114918, filed on September 8, 2020, which is hereby incorporated by reference in its entirety as if fully set forth herein, for all purposes. TECHNICAL FIELD

[0002] Embodiments of the present application relate to a display apparatus. BACKGROUND

[0003] An organic light emitting diode display apparatus among various types of display apparatuses displays an image using an organic light emitting diode that generates light through recombination of an electron and a hole. Such an organic light emitting diode display apparatus operates with low power while having a fast response time.

[0004] An organic light emitting diode display apparatus generally provides a pixel connected to a data line and a scan line. Generally, the pixel includes an organic light emitting diode and a circuit unit for controlling an amount of current flowing to the organic light emitting diode. The circuit unit controls an amount of current flowing from a first driving voltage to a second driving voltage via the organic light emitting diode in response to a data signal. Here, light of a predetermined brightness is generated based on the amount of current flowing through the organic light emitting diode.

[0005] As application fields of display apparatuses have recently been expanded, a plurality of different images can be displayed on a single display apparatus. SUMMARY

[0006] The present disclosure provides a display apparatus that reduces power consumption and prevents deterioration of display quality, and a method of driving the display apparatus.

[0007] Embodiments of the present application provide a display apparatus including a display panel including a plurality of pixels connected to a plurality of data lines and a plurality of scan lines, a data driving circuit driving the plurality of data lines, a scan driving circuit driving the plurality of scan lines, and a driving controller, wherein the driving controller divides the display panel into a first display area and a second display area, controls the data driving circuit and the scan driving circuit to drive the first display area at a first driving frequency and to drive the second display area at a second driving frequency lower than the first driving frequency during a multi-frequency mode, and sets a plurality of third driving frequencies respectively corresponding to a plurality of horizontal lines in a boundary area during the multi-frequency mode. In such an embodiment, each of the plurality of third driving frequencies has a frequency level between the first driving frequency and the second driving frequency, and the boundary area is defined by a portion of the second display area adjacent to the first display area.

[0008] In an embodiment, the plurality of horizontal lines in the boundary area can include H horizontal lines, wherein the H horizontal lines include a first horizontal line to an Hth horizontal line arranged sequentially from a position adjacent to the first display area, and wherein H is a natural number.

[0009] In an embodiment, the frequency levels of the plurality of third driving frequencies can decrease non-linearly from the first horizontal line to the Hth horizontal line.

[0010] In an embodiment, a difference between the third driving frequency corresponding to the first horizontal line among the H horizontal lines and the third driving frequency corresponding to the second horizontal line can be higher than a difference between the third driving frequency corresponding to an (H-1)th horizontal line among the H horizontal lines and the third driving frequency corresponding to the Hth horizontal line.

[0011] In an embodiment, the driving controller can drive or mask each of the H horizontal lines every A frames during the multi-frequency mode, and wherein A is a natural number.

[0012] In an embodiment, the driving controller can mask each of the H horizontal lines during M frames among the A frames, and drive each of the H horizontal lines during A-M frames, and wherein M is a natural number smaller than A.

[0013] In an embodiment, the value of M can increase non-linearly from the first horizontal line to the Hth horizontal line.

[0014] In an embodiment, the number of masked frames of the first horizontal line among the H horizontal lines can be greater than the number of masked frames of the Hth horizontal line.

[0015] In an embodiment, the driving controller can include a frequency mode determination part to determine an operation mode based on the image signal and the control signal and output a mode signal corresponding to the determined operation mode, a boundary controller to output a boundary masking signal when the mode signal indicates the multi-frequency mode, and a signal generator to output a data control signal and a scan control signal based on the image signal, the control signal, the mode signal, and the boundary masking signal, wherein the data control signal can be provided to a data driving circuit, and the scan control signal can be provided to a scan driving circuit.

[0016] In an embodiment, the boundary controller can include a memory, wherein the memory defines M consecutive frames among the H horizontal lines as a frame block, and stores a value of M corresponding to each frame block.

[0017] In an embodiment, the boundary controller can include a memory, wherein the memory defines M consecutive frames among the H horizontal lines as a frame block, and stores a value of M, and a masking change frame indicating a frame block position at which the value of M is changed.

[0018] In an embodiment, the boundary controller can include a memory, wherein the memory defines M consecutive frames of H horizontal lines as a frame block, and stores a mask change frame indicating a frame block position at which a value of M is changed, and an acceleration factor indicating a ratio between a previous value of M and a current value of M at the frame block position.

[0019] In an embodiment of the present disclosure, a display device includes a display panel, a data driving circuit, a scan driving circuit, and a driving controller, wherein the display panel has a first non-folded area, a folded area, and a second non-folded area defined in a plan view, wherein the display panel includes a plurality of pixels connected to a plurality of data lines and a plurality of scan lines, the data driving circuit drives the plurality of data lines, the scan driving circuit drives the plurality of scan lines, and the driving controller divides the display panel into a first display area and a second display area, and controls the data driving circuit and the scan driving circuit to drive the first display area at a first driving frequency and the second display area at a second driving frequency lower than the first driving frequency during a multi-frequency mode, and sets a plurality of third driving frequencies corresponding to a plurality of horizontal lines in a boundary area, respectively, during the multi-frequency mode. In this embodiment, each of the plurality of third driving frequencies has a frequency level between the first driving frequency and the second driving frequency, and the boundary area is defined by a portion of the second display area adjacent to the first display area.

[0020] In an embodiment, the plurality of horizontal lines in the boundary area can include H horizontal lines, wherein the H horizontal lines include a first horizontal line to an Hth horizontal line arranged sequentially from a position adjacent to the first display area, wherein H is a natural number.

[0021] In an embodiment, the frequency level of the plurality of third driving frequencies can decrease non-linearly from the first horizontal line to the Hth horizontal line.

[0022] In an embodiment, the driving controller can drive or mask each of the H horizontal lines every A frames during the multi-frequency mode, wherein A is a natural number.

[0023] In an embodiment, the driving controller can mask each of the H horizontal lines during M frames among A frames, and drive each of the H horizontal lines during A-M frames, wherein M is a natural number smaller than A.

[0024] In an embodiment of the present application, a method of driving a display apparatus includes dividing a display panel of the display apparatus into a first display area and a second display area, and driving the first display area at a first driving frequency and the second display area at a second driving frequency lower than the first driving frequency during a multi-frequency mode, and setting a plurality of third driving frequencies corresponding to a plurality of horizontal lines in a boundary area during the multi-frequency mode, wherein each of the plurality of third driving frequencies has a frequency level between the first driving frequency and the second driving frequency, and the boundary area is defined by a portion of the second display area adjacent to the first display area.

[0025] In an embodiment, the plurality of horizontal lines in the boundary area can include H horizontal lines, wherein the H horizontal lines include a first horizontal line to an Hth horizontal line arranged sequentially from a position adjacent to the first display area, wherein H is a natural number, and setting the plurality of third driving frequencies corresponding to the plurality of horizontal lines in the boundary area includes masking each of the H horizontal lines during M frames among A frames, and driving each of the H horizontal lines during A-M frames among the A frames, wherein M is a natural number, and A is a natural number greater than M.

[0026] In an embodiment, the frequency level of the plurality of third driving frequencies can decrease non-linearly from the first horizontal line to the Hth horizontal line.

[0027] In an embodiment, a value of M can increase non-linearly from the first horizontal line to the Hth horizontal line. BRIEF DESCRIPTION OF DRAWINGS

[0028] The above and other features of the present application will become more apparent by describing in detail embodiments thereof with reference to the attached drawings in which:

[0029] Figure 1 is a perspective view of an embodiment of a display apparatus according to the present application;

[0030] Figure 2A and Figure 2B is a perspective view of an embodiment of a display apparatus according to the present application;

[0031] Figure 3A is a diagram for describing an embodiment of an operation of a display apparatus in a normal mode;

[0032] Figure 3B is a diagram for describing an embodiment of an operation of a display apparatus in a multi-frequency mode;

[0033] Figure 4 is a block diagram of an embodiment of a display apparatus according to the present application;

[0034] Figure 5A is an equivalent circuit diagram of an embodiment of a pixel according to the present application;

[0035] Figure 5B is an equivalent circuit diagram of an alternative embodiment of the pixel according to the present application;

[0036] Figure 6 is Figure 5A is a timing chart of an embodiment of the operation of the pixel shown in

[0037] Figure 7 is a chart exemplarily showing a residual image effect due to a driving frequency difference between a first display area and a second display area; Figure 4

[0038] Figure 8 is a chart exemplarily showing a residual image effect due to a driving frequency difference between a first display area and a second display area;

[0039] Figure 9 is a chart for describing a driving method for reducing a luminance difference due to a residual image at a boundary between a first display area and a second display area;

[0040] Figure 10A and Figure 10B is a chart showing an embodiment of the method of driving the horizontal line of the boundary area;

[0041] Figure 11 is a chart showing a residual image effect due to a driving frequency difference between a first display area and a second display area after applying the method of driving the horizontal line of the boundary area shown in Figure 10A and Figure 10B

[0042] Figure 12 is a block diagram showing a configuration of an embodiment of the driving controller according to the present application;

[0043] Figure 13 is a flowchart exemplarily showing the operation of the driving controller shown in Figure 12

[0044] Figure 14A and Figure 14B is a chart showing an embodiment of the method of driving the horizontal line of the boundary area;

[0045] Figure 15 is a flowchart exemplarily showing the operation of the boundary controller shown in Figure 12

[0046] Figure 16 is a chart showing a residual image effect due to a driving frequency difference between a first display area and a second display area after applying the method of driving the horizontal line of the boundary area shown in Figure 14A and Figure 14B ​​​​​

[0047] Figure 17A and Figure 17B is a diagram showing another alternative embodiment of a method of driving the horizontal line of the boundary area;

[0048] Figure 18 is a flowchart exemplarily showing the operation of the boundary controller shown in Figure 12

[0049] Figure 19A and Figure 19B is a diagram showing another alternative embodiment of a method of driving the horizontal line of the boundary area. DETAILED DESCRIPTION

[0050] The present application will now be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments of the application are shown. The application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art.

[0051] It will be understood that when an element (or components, layer or section etc.) is referred to as being "on" or "connected to" or "coupled to" another element (or components, layer or section etc.), it can be directly on or connected / coupled to the other element or intervening elements can be present.

[0052] The same reference numerals refer to the same elements throughout the specification. In the drawings, the thickness, proportions and dimensions of elements can be exaggerated for clarity. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0053] The words "first", "second", and so on can be used to describe various elements, but the elements should not be construed as being limited by the words. The words are used only to distinguish one element from another. For example, a first element can be called a second element, and vice versa, without departing from the teachings of the present disclosure. Unless otherwise indicated, the singular forms "a", "an", and "the" can include plural forms.

[0054] In addition, the words "under", "lower side", "on", and "upper side" and the like are used to describe the relationship between the elements shown in the drawings. The words as relative concepts are used based on the direction shown in the drawings.

[0055] ​The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the terms "a," "an," "the," and "at least one" are not intended to refer to a quantity of one, but rather to be consistent with the definition of "a" that indicates at least one. For example, "a member" has the same meaning as "at least one member." "At least one" should be interpreted in the same manner as "one or more." "Or" means "and / or" as used herein. As used herein, the phrase "and / or" includes any and all combinations of one or more of the associated listed items. It will also be understood that, although the terms "first," "second," "third," etc. can be used herein to describe various elements, these elements should not be limited by these terms since such elements are commonly known to have temporal meanings as well. Thus, these terms are used merely to distinguish one element from another.

[0056] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. Terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0057] The embodiments described herein are not to be construed as limiting in any way to the specific shapes of the regions as set forth herein but are to include deviations in shapes that result, for example, from manufacturing. For example, regions shown or described as flat can often have rough and / or nonlinear features. Moreover, corners as depicted can typically be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present claims.

[0058] Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings.

[0059] Figure 1 is a perspective view showing a display device DD according to the present application.

[0060] Figure 1A portable terminal is shown as an example of a display device DD according to the present application. The portable terminal can include a tablet personal computer (PC), a smart phone, a personal digital assistant (PDA), a portable multimedia player (PMP), a game console, a watch-type electronic device, etc. However, the present application is not limited thereto. Embodiments of the present inventive concept can be used not only in large electronic devices such as outdoor billboards, but also in small and medium electronic devices such as personal computers, laptop computers, kiosks, vehicle navigation units, and cameras. However, these devices are only examples, and thus embodiments of the present application can be applied to other electronic devices without departing from the spirit of the present application described herein.

[0061] In embodiments, as shown in FIG. 1A, a display surface on which a first image IM1 and a second image IM2 are displayed is parallel to a surface defined by a first direction DR1 and a second direction DR2. The display device DD includes a plurality of zones divided on the display surface. The display surface includes a display zone DA on which the first image IM1 and the second image IM2 are displayed, and a non-display zone NDA adjacent to the display zone DA. The non-display zone NDA can be referred to as a bezel zone. In one embodiment, for example, the display zone DA can be rectangular. The non-display zone NDA surrounds the display zone DA. In an alternative embodiment, for example, the display device DD can include a partially curved shape. In such an embodiment, one of the display zones DA can have a curved shape. Figure 1

[0062] The display zone DA of the display device DD includes a first display zone DA1 and a second display zone DA2. In a particular application, the first image IM1 can be displayed in the first display zone DA1, and the second image IM2 can be displayed in the second display zone DA2. In one embodiment, for example, the first image IM1 can be a moving image, and the second image IM2 can be a still image or text information having a long change period.

[0063] In embodiments, the display device DD can drive the first display zone DA1 on which a moving image is displayed at a normal frequency, and drive the second display zone DA2 on which a still image is displayed at a low frequency lower than the normal frequency. The display device DD can reduce power consumption by reducing the driving frequency of the second display zone DA2.

[0064] ​The sizes of the first display area DA1 and the second display area DA2 can be preset and can be changed by an application program. In an embodiment, when the first display area DA1 displays a still image and the second display area DA2 displays a moving image, the first display area DA1 can be driven at a low frequency and the second display area DA2 can be driven at a normal frequency. In an embodiment, the display area DA can be divided into three or more display areas, and a driving frequency of each of the plurality of display areas can be determined according to a type (still image or moving image) of an image displayed in each of the plurality of display areas.

[0065] Figure 2A and Figure 2B is a perspective view showing a display device DD2 according to an embodiment of the present application. Figure 2A The display device DD2 is shown in an unfolded state, and Figure 2B The display device DD2 is shown in a folded state.

[0066] In an embodiment, as shown in Figure 2A and Figure 2B The display device DD2 includes a display area DA and a non-display area NDA. The display device DD2 can display an image through the display area DA. When the display device DD2 is unfolded, the display area DA can include a plane defined by a first direction DR1 and a second direction DR2. A thickness direction of the display device DD2 can be parallel to a third direction DR3 intersecting the first direction DR1 and the second direction DR2. Accordingly, a front surface (or a top surface) and a rear surface (or a bottom surface) of components constituting the display device DD2 can be defined based on the third direction DR3. The non-display area NDA can be referred to as a bezel area. In an embodiment, the display area DA can be rectangular. The non-display area NDA surrounds the display area DA.

[0067] The display area DA can include a first non-fold area NFA1, a fold area FA, and a second non-fold area NFA2. The fold area FA can be bent with respect to a fold axis FX extending in the first direction DR1.

[0068] When the display device DD2 is folded, the first non-fold area NFA1 and the second non-fold area NFA2 can face each other. Accordingly, in a state in which the display device DD2 is completely folded, the display area DA can not be exposed to the outside, and the state can be referred to as an inner folding state. However, this is only an example, and the operation of the display device DD2 is not limited thereto.

[0069] In an embodiment of the present application, when the display device DD2 is folded, the first non-fold area NFA1 and the second non-fold area NFA2 can face each other. Accordingly, in the folded state, the first non-fold area NFA1 can be exposed to the outside, and the state can be referred to as an outer folding state.

[0070] The display device DD2 can be configured to perform only one of the inward folding action and the outward folding action. Alternatively, the display device DD2 can be configured to perform both the inward folding action and the outward folding action. In such an embodiment, the same area (e.g., the folding area FA) in the display device DD2 can be inward folded and outward folded. Alternatively, a partial area of the display device DD2 can be inward folded, and another partial area of the display device DD2 can be outward folded.

[0071] Figure 2A and Figure 2B Embodiments in which one folding area and two non-folding areas are defined are illustrated, but the number of folding areas and the number of non-folding areas are not limited thereto. In alternative embodiments, the display device DD2 can include more than two non-folding areas and a plurality of folding areas arranged between adjacent non-folding areas.

[0072] Figure 2A and Figure 2B Embodiments in which the folding axis FX is parallel to the short axis or the width direction of the display device DD2 are illustrated, but embodiments of the present application are not limited thereto. In alternative embodiments, the folding axis FX can extend in a direction (e.g., the second direction DR2) parallel to the long axis or the length direction of the display device DD2. In such an embodiment, the first non-folding area NFA1, the folding area FA, and the second non-folding area NFA2 can be sequentially arranged in the first direction DR1.

[0073] A plurality of display areas DA1 and DA2 can be defined in the display area DA of the display device DD2. Figure 2A Embodiments in which two display areas DA1 and DA2 are defined are illustrated, but the number of the plurality of display areas DA1 and DA2 is not limited thereto.

[0074] The plurality of display areas DA1 and DA2 can include a first display area DA1 and a second display area DA2. In embodiments, for example, the first display area DA1 can be an area in which a first image IM1 is displayed, and the second display area DA2 can be an area in which a second image IM2 is displayed, but the present application is not limited thereto. In embodiments, for example, the first image IM1 can be a moving image, and the second image IM2 can be a still image or an image (text information, etc.) having a long change period.

[0075] In an embodiment, the display device DD2 can be operated differently depending on the operation mode. The operation mode can include a normal mode and a multi-frequency mode. During the normal mode, the display device DD2 can drive both the first display area DA1 and the second display area DA2 at a normal frequency. During the multi-frequency mode, the display device DD2 can drive the first display area DA1 displaying the first image IM1 at a first driving frequency, and drive the second display area DA2 displaying the second image IM2 at a second driving frequency lower than the normal frequency. In an embodiment, the first driving frequency can be the same as the normal frequency. The power consumption of the display device DD2 can be reduced by reducing the driving frequency of the second display area DA2 during the multi-frequency mode. Accordingly, the multi-frequency mode can also be referred to as a low power mode.

[0076] The sizes of the first display area DA1 and the second display area DA2 can be preset and can be changed by an application program. In an embodiment, the first display area DA1 can correspond to the first non-folded area NFA1, and the second display area DA2 can correspond to the second non-folded area NFA2. In an embodiment, a first portion of the folded area FA can correspond to the first display area DA1, and a second portion of the folded area FA can correspond to the second display area DA2.

[0077] In an embodiment, the entire folded area FA can correspond to only one of the first display area DA1 and the second display area DA2.

[0078] In an embodiment, the first display area DA1 can correspond to a first portion of the first non-folded area NFA1, and the second display area DA2 can correspond to a second portion of the first non-folded area NFA1, the folded area FA, and the second non-folded area NFA2. That is, the area of the first display area DA1 can be smaller than the area of the second display area DA2.

[0079] In an embodiment, the first display area DA1 can correspond to the first non-folded area NFA1, the folded area FA, and a first portion of the second non-folded area NFA2, and the second display area DA2 can correspond to a second portion of the second non-folded area NFA2. That is, the area of the second display area DA2 can be smaller than the area of the first display area DA1.

[0080] In an embodiment, as shown in FIG. 1A, when the folded area FA is in the unfolded state, the first display area DA1 can correspond to the first non-folded area NFA1, and the second display area DA2 can correspond to the folded area FA and the second non-folded area NFA2. Figure 2B

[0081] Figure 2A and Figure 2B ​Embodiments in which the display device DD2 includes a single folding region are shown, but embodiments of the present application are not limited thereto. In embodiments of the present application, the display device DD2 can also be applied to a display device including two or more folding regions, a multi-surface display device including two or more display surfaces, a rollable display device, or a slidable display device, etc.

[0082] In embodiments, a multi-surface display device including two or more display surfaces, a rollable display device, or a slidable display device can drive a viewing region through which an image is displayed to a user at a first driving frequency, and can drive a non-viewing region that is not displayed to a user at a second driving frequency that is lower than a normal frequency.

[0083] For the sake of convenience in description, embodiments of the display device DD shown in Figure 1 will be described in detail below, but the following description can also be applied to embodiments of the display device DD2 shown in Figure 2A and Figure 2B .

[0084] Figure 3A is a diagram for describing an embodiment of the operation of the display device DD in the normal mode NFM. Figure 3B is a diagram for describing an embodiment of the operation of the display device DD in the multi-frequency mode MFM.

[0085] Referring to Figure 3A , the first image IM1 displayed in the first display area DA1 can be a moving image, and the second image IM2 displayed in the second display area DA2 can be a still image or an image having a long change period (e.g., a game operation keypad). Figure 1 The first image IM1 displayed in the first display area DA1 and the second image IM2 displayed in the second display area DA2 shown in

[0086] In the normal mode NFM, the driving frequency of each of the first display area DA1 and the second display area DA2 of the display device DD is a normal frequency. In one embodiment, for example, the normal frequency can be 120 Hertz (Hz). In the normal mode NFM, images of the first frame F1 to the 120th frame F120 can be displayed in the first display area DA1 and the second display area DA2 of the display device DD during one second.

[0087] Referring to Figure 3BIn the multi-frequency mode MFM, the display device DD can set a driving frequency of the first display area DA1 in which the first image IM1 (i.e., a moving image) is displayed to a first driving frequency, and can set a driving frequency of the second display area DA2 in which the second image IM2 (i.e., a still image) is displayed to a second driving frequency lower than the first driving frequency. In an embodiment in which a normal frequency is 120 Hz, the first driving frequency can be 120 Hz, and the second driving frequency can be 1 Hz. The first driving frequency and the second driving frequency can be changed differently. In one embodiment, for example, the first driving frequency can be 144 Hz higher than the normal frequency, and the second driving frequency can be one selected from 120 Hz, 30 Hz lower than the normal frequency, and 10 Hz.

[0088] In an embodiment in which the first driving frequency is 120 Hz and the second driving frequency is 1 Hz in the multi-frequency mode MFM, during one second, the first image IM1 is displayed in each of the first frame F1 to the 120th frame F120 in the first display area DA1 of the display device DD. In the second display area DA2, the second image IM2 can be displayed only in the first frame F1, and can not be displayed in the other frames F2 to F120. The operation of the display device DD in the multi-frequency mode MFM will be described later in more detail.

[0089] Figure 4 is a block diagram illustrating a display device DD according to an embodiment of the present application.

[0090] Referring to Figure 4 An embodiment of the display device DD includes a display panel DP, a driving controller 100, a data driving circuit 200, and a voltage generator 300.

[0091] The driving controller 100 receives an image signal RGB and a control signal CTRL. The driving controller 100 generates an image data signal DATA by converting a data format of the image signal RGB so that the image signal RGB is compatible with an interface specification of the data driving circuit 200. The driving controller 100 outputs a scan control signal SCS, a data control signal DCS, and an emission control signal ECS.

[0092] The data driving circuit 200 receives the data control signal DCS and the image data signal DATA from the driving controller 100. The data driving circuit 200 converts the image data signal DATA into a data signal, and outputs the data signal to a plurality of data lines DL1 to DLm which will be described later. The data signal is an analog voltage corresponding to a gray value of the image data signal DATA.

[0093] Voltage generator 300 generates voltages for operating the display panel DP. In this embodiment, voltage generator 300 generates a first drive voltage ELVDD, a second drive voltage ELVSS, a first initialization voltage VINT1, and a second initialization voltage VINT2.

[0094] The display panel DP includes multiple scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1, multiple emission control lines EML1 to EMLn, multiple data lines DL1 to DLm and pixels PX. The display panel DP may also include a scan drive circuit SD and an emission drive circuit EDC. In an embodiment, the scan drive circuit SD is arranged on a first side of the display panel DP. The multiple scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1 may extend from the scan drive circuit SD in a first direction DR1.

[0095] The transmit drive circuit EDC is arranged on the second side of the display panel DP. Multiple transmit control lines EML1 to EMLn extend from the transmit drive circuit EDC in a direction opposite to the first direction DR1.

[0096] Multiple scan lines GIL1 to GILn, GCL1 to GCLn, and GWL1 to GWLn+1, as well as multiple transmit control lines EML1 to EMLn, are arranged spaced apart from each other in the second direction DR2. Multiple data lines DL1 to DLm extend from the data drive circuit 200 in the opposite direction to the second direction DR2 and are arranged spaced apart from each other in the first direction DR1.

[0097] In the implementation method, such as Figure 4 As shown, the scan drive circuit SD and the emission drive circuit EDC face each other with the pixel PX between them; however, embodiments of the invention are not limited to this. In an alternative embodiment, for example, the scan drive circuit SD and the emission drive circuit EDC may be arranged adjacent to each other on a first or second side of the display panel DP. In embodiments, the scan drive circuit SD and the emission drive circuit EDC may be configured as a single circuit or a single circuit chip.

[0098] Multiple pixels PX are electrically connected to multiple scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1, multiple emission control lines EML1 to EMLn, and multiple data lines DL1 to DLm. Each of the multiple pixels PX may be electrically connected to four scan lines and one emission control line. In one embodiment, for example, as... Figure 4As shown in FIG. 1, the pixels PX of the first row can be connected to the plurality of scan lines GIL1, GCL1, GWL1, and GWL2, and the emission control line EML1. In this embodiment, the pixels PX of the jth row can be connected to the plurality of scan lines GILj, GCLj, GWLj, and GWLj+1, and the emission control line EMLj.

[0099] Each of the plurality of pixels PX includes a light emitting diode ED (see Figure 5A ) and a pixel circuit unit PXC (see Figure 5A ) for controlling the light emitting diode ED. The pixel circuit unit PXC can include at least one transistor and at least one capacitor. The scan driving circuit SD and the emission driving circuit EDC can include transistors formed by the same process as the pixel circuit unit PXC.

[0100] Each of the plurality of pixels PX receives a first driving voltage ELVDD, a second driving voltage ELVSS, a first initialization voltage VINT1, and a second initialization voltage VINT2.

[0101] The scan driving circuit SD receives a scan control signal SCS from the driving controller 100. The scan driving circuit SD can output scan signals to the plurality of scan lines GIL1 to GILn, GCL1 to GCLn, and GWL1 to GWLn+1 in response to the scan control signal SCS. The circuit configuration and operation of the scan driving circuit SD will be described in detail later.

[0102] In an embodiment, the driving controller 100 can divide the display panel DP into a first display area DA1 (see Figure 1 ) and a second display area DA2 (see Figure 1 ), and set a driving frequency of each of the first display area DA1 and the second display area DA2 based on the image signal RGB. In one embodiment, for example, the driving controller 100 drives each of the first display area DA1 and the second display area DA2 at a normal frequency (e.g., 120 Hz) in a normal mode. In a multi-frequency mode, the driving controller 100 can drive the first display area DA1 at a first driving frequency (e.g., 120 Hz) and drive the second display area DA2 at a low frequency (e.g., 1 Hz).

[0103] Figure 5A is an equivalent circuit diagram of an embodiment of the pixel PX according to the present application.

[0104] Figure 5A shows connections to Figure 4An equivalent circuit diagram of an embodiment of a pixel PXij of an i-th data line DLi among a plurality of data lines DL1 to DLm, a plurality of j-th and j+1-th scan lines GILj, GCLj, GWLj, and GWLj+1 among a plurality of scan lines GIL1 to GILn, GCL1 to GCLn, and GWL1 to GWLn+1, and a j-th emission control line EMLj among a plurality of emission control lines EML1 to EMLn, as illustrated in FIG. 1A.

[0105] Figure 4 Each of the plurality of pixels PX illustrated in FIG. 1A can have the same circuit configuration as the equivalent circuit diagram of the pixel PXij illustrated in FIG. 1A. Figure 5A The equivalent circuit diagram of the pixel PXij illustrated in FIG. 1A is the same as the circuit configuration of the pixel PXij illustrated in FIG. 1A. In an embodiment, in the pixel circuit unit PXC of the pixel PXij, the third transistor T3 and the fourth transistor T4 among the first transistor T1 to the seventh transistor T7 are N-type transistors having an oxide semiconductor as a semiconductor layer, and the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are P-type transistors having a Low-Temperature Polycrystalline Silicon (LTPS) semiconductor layer. However, embodiments of the present application are not limited thereto, and alternatively, all of the first transistor T1 to the seventh transistor T7 can be P-type transistors or N-type transistors. In another alternative embodiment, at least one of the first transistor T1 to the seventh transistor T7 can be an N-type transistor, and the others can be P-type transistors. In an embodiment, the circuit configuration of the pixel PXij is not limited to Figure 5A the circuit configuration illustrated in FIG. 1A. Figure 5A The pixel circuit unit PXC illustrated in FIG. 1A is merely an example, and the configuration of the pixel circuit unit PXC can be variously modified.

[0106] Referring to Figure 5A , an embodiment of the pixel PXij of the display device DD can include the first transistor T1 to the seventh transistor T7, the capacitor Cst, and the light-emitting diode ED. In one embodiment, for example, each pixel PXij includes a single light-emitting diode ED, as illustrated in Figure 5A FIG. 1A.

[0107] The plurality of j-th scan lines GILj, GCLj, GWLj, and j+1-th scan lines GWLj+1 can transmit scan signals GIj, GCj, GWj, and GWj+1, respectively, and the j-th emission control line EMLj can transmit an emission signal EMj. The i-th data line DLi transmits a data signal Di. The data signal Di can have the same signal level as an image signal RGB (see Figure 4) corresponding voltage levels. The first driving voltage line VL1, the second driving voltage line VL2, the third driving voltage line VL3, and the fourth driving voltage line VL4 can transmit a first driving voltage ELVDD, a second driving voltage ELVSS, a first initialization voltage VINT1, and a second initialization voltage VINT2, respectively.

[0108] The first transistor T1 includes a first electrode connected to the first driving voltage line VL1 via the fifth transistor T5, a second electrode electrically connected to an anode of the light emitting diode ED via the sixth transistor T6, and a gate electrode connected to one end of the capacitor Cst. The first transistor T1 can receive a data signal Di transmitted through the i-th data line DLi based on a switching operation of the second transistor T2 to supply a driving current Id to the light emitting diode ED.

[0109] The second transistor T2 includes a first electrode connected to the i-th data line DLi, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the j-th scan line GWLj. The second transistor T2 can be turned on in response to a scan signal GWj received through the j-th scan line GWLj to transmit the data signal Di received through the i-th data line DLi to the first electrode of the first transistor T1.

[0110] The third transistor T3 includes a first electrode connected to the gate electrode of the first transistor T1, a second electrode connected to the second electrode of the first transistor T1, and a gate electrode connected to the j-th scan line GCLj. The third transistor T3 can be turned on in response to a scan signal GCj received through the j-th scan line GCLj to connect the gate electrode and the second electrode of the first transistor T1 to each other, thereby diode-connecting the first transistor T1.

[0111] The fourth transistor T4 includes a first electrode connected to the gate electrode of the first transistor T1, a second electrode connected to the third driving voltage line VL3 transmitting the first initialization voltage VINT1, and a gate electrode connected to the j-th scan line GILj. The fourth transistor T4 is turned on in response to a scan signal GIj received through the j-th scan line GILj and transmits the first initialization voltage VINT1 to the gate electrode of the first transistor T1 to perform an initialization operation for initializing a voltage of the gate electrode of the first transistor T1.

[0112] The fifth transistor T5 includes a first electrode connected to the first driving voltage line VL1, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the j-th emission control line EMLj.

[0113] The sixth transistor T6 includes a first electrode connected to the second electrode of the first transistor T1, a second electrode connected to the anode of the light emitting diode ED, and a gate electrode connected to the jth emission control line EMLj.

[0114] pulse The transistor T5 and the sixth transistor T6 can be simultaneously turned on in response to the emission signal EMj received through the jth emission control line EMLj, so that the first driving voltage ELVDD can be compensated for by the diode-connected first transistor T1 and transmitted to the light emitting diode ED.

[0115] The seventh transistor T7 includes a first electrode connected to the second electrode of the sixth transistor T6, a second electrode connected to the fourth driving voltage line VL4, and a gate electrode connected to the j+1th scan line GWLj+1. The seventh transistor T7 can be turned on in response to the scan signal GWj+1 received through the j+1th scan line GWLj+1, to bypass the current of the anode of the light emitting diode ED to the fourth driving voltage line VL4.

[0116] As described above, one end of the capacitor Cst is connected to the gate electrode of the first transistor T1, and the other end of the capacitor Cst is connected to the first driving voltage line VL1. The cathode of the light emitting diode ED can be connected to the second driving voltage line VL2 for transmitting the second driving voltage ELVSS. The structure of the pixel PXij according to the embodiment of the present application is not limited to the structure shown in Figure 5A and thus the number of transistors and the number of capacitors included in one pixel PXij and their connection relationship can be variously modified.

[0117] Figure 5B is an equivalent circuit diagram of an alternative embodiment of the pixel PX according to the present application.

[0118] In addition to the pixel PXbij shown in Figure 5B , the pixel PXbij shown in Figure 5B the embodiment of the pixel PXbij shown in Figure 5A is substantially the same as the embodiment of the pixel PXij shown in Figure 5A and thus any repetitive detailed description of elements identical to those shown in Figure 5B In this embodiment, as shown in

[0119] Figure 6 is a timing diagram for describing the operation of the embodiment of the pixel PXij shown in Figure 5A will be described with reference toFigure 5A and Figure 6 An operation of the display device DD according to the embodiment is described.

[0120] Referring to Figure 5A and Figure 6 A high-level scan signal GIj is supplied through the jth scan line GILj during an initialization period within one frame Fs. The fourth transistor T4 is turned on in response to the high-level scan signal GIj, and a first initialization voltage VINT1 is transferred to the gate electrode of the first transistor T1 via the fourth transistor T4, so that the first transistor T1 is initialized.

[0121] Next, when a high-level scan signal GCj is supplied through the jth scan line GCLj during a data programming and compensation period, the third transistor T3 is turned on. The first transistor T1 is diode-connected and forward-biased due to the turned-on third transistor T3. In addition, the second transistor T2 is turned on by the low-level scan signal GWj. As a result, a compensation voltage obtained by subtracting a threshold voltage of the first transistor T1 from a data signal Di supplied through the ith data line DLi is applied to the gate electrode of the first transistor T1. That is, a gate voltage applied to the gate electrode of the first transistor T1 can be the compensation voltage.

[0122] The first driving voltage ELVDD and the compensation voltage can be applied across the capacitor Cst, and a charge amount corresponding to a difference between the voltages across the two terminals can be stored in the capacitor Cst.

[0123] The seventh transistor T7 is supplied with a low-level scan signal GWj+1 through the j+1th scan line GWLj+1 to be turned on. A part of the driving current Id can pass through the seventh transistor T7 as a bypass current Ibp.

[0124] If the light emitting diode ED emits light even when the minimum current of the first transistor Tl for displaying a black image flows as the driving current Id, the black image is not normally displayed. Therefore, in the embodiment of the present application, the seventh transistor T7 included in the pixel PXij can distribute a part of the minimum current of the first transistor Tl as the bypass current Ibp to a current path other than the current path to the light emitting diode ED. Here, the minimum current of the first transistor Tl indicates a current under a condition that the first transistor Tl is turned off because the gate-source voltage of the first transistor Tl is smaller than the threshold voltage. The minimum driving current Id (e.g., about 10 pico ampere (pA) or less) under the condition that the first transistor Tl is turned off is delivered to the light emitting diode ED to be indicated as a black image. When the minimum driving current Id for displaying a black image flows, the bypass effect of the bypass current Ibp can be significant, whereas when a large driving current Id for displaying a general image or a white image flows, the effect of the bypass current Ibp can be negligible. Therefore, when the driving current Id flows to display a black image, the emission current Ied of the light emitting diode ED obtained by subtracting the amount of current of the bypass current Ibp that has passed through the seventh transistor T7 from the driving current Id has a minimum amount of current for clearly indicating a black image. Thus, a correct black image can be obtained using the seventh transistor T7, thereby improving the contrast. In this embodiment, the bypass signal is the scan signal GWj+1 at a low level, but the embodiment of the present application is not limited thereto.

[0125] Next, during the emission period, the emission signal EMj supplied through the jth emission control line EMLj changes from a high level to a low level. During the emission period, the fifth transistor T5 and the sixth transistor T6 are turned on by the emission signal EMj at a low level. As a result, a driving current Id corresponding to a voltage difference between the first driving voltage ELVDD and the gate voltage of the gate electrode of the first transistor Tl is generated, and the driving current Id is supplied to the light emitting diode ED via the sixth transistor T6 so that an emission current Ied flows through the light emitting diode ED.

[0126] Figure 7 is an exemplary view illustrating a plurality of scan signals GIl to GI3840 output from the scan driving circuit SD shown in Figure 4 FIG. 1.

[0127] Referring to Figure 4 and Figure 7 The scan control signal SCS supplied to the scan driving circuit SD from the driving controller 100 can include a masking signal MS. The masking signal MS can be a signal indicating a start position of the second display area DA2 shown in Figure 1 FIG. 1.

[0128] The scan driving circuit SD can output a plurality of scan signals GIl to GI3840 in response to the masking signal MS. During the normal mode, the masking signal MS can remain at a high level in all frames, and the scan driving circuit SD can sequentially output the plurality of scan signals GIl to GI3840 at a high level in each frame.

[0129] During the multi-frequency mode MFM, the masking signal MS can transition to a low level at a preset point within a frame. In an embodiment, as shown in FIG. 6, the masking signal MS can remain at a high level in the first frame Fl and can transition to a low level at a preset point within the second frame F2. In this embodiment, the first driving frequency of the first display area DA1 can be 120 Hz, and the second driving frequency of the second display area DA2 can be 1 Hz. In this embodiment, the first image IM1 can be displayed in each of the first frame Fl to the 120th frame F120 of the first display area DA1 of the display device DD. In the second display area DA2, the second image IM2 can be displayed only in the first frame Fl and can not be displayed in the other frames F2 to F120. Since the image is displayed in both the first display area DA1 and the second display area DA2 of the display device DD during the first frame Fl, the first frame Fl can be referred to as a normal frame. Since the image is displayed only in the first display area DA1 during the other frames F2 to F120, the other frames F2 to F120 can be referred to as partial frames. Figure 3B

[0130] The masking signal MS remains at a high level in the first frame Fl of the multi-frequency mode MFM. Accordingly, the plurality of scan signals GIl to GI3840 can be sequentially activated to a high level.

[0131] In the second frame F2 to the 120th frame F120 of the multi-frequency mode MFM, the masking signal MS changes from a high level to a low level at a preset point within each frame. In one embodiment, for example, in a case where the masking signal MS remains at a high level in the second frame F2, the plurality of scan signals GIl to GI1920 can be sequentially driven at a high level. When the masking signal MS changes to a low level in the second frame F2, the plurality of scan signals GI1921 to GI3840 remain at a low level without changing to a high level. Since this masking signal MS is provided to the scan driving circuit SD, the plurality of scan signals GI1921 to GI3840 can remain at a low level in the second frame F2 to the 120th frame F120.

[0132] Figure 7 The masking signal MS shown in FIG. 6 is an exemplary waveform for describing the operation of the scan driving circuit SD, and the waveform and / or signal level of the masking signal MS can be variously modified. Two or more masking signals can be provided from the driving controller 100 to the scan driving circuit SD.

[0133] Although Figure 7 ​Only the plurality of scan signals GI1 to GI3840 are shown, but the scan driving circuit SD can generate the plurality of scan signals GC1 to GC3840 and GW1 to GW3841 in a manner similar to that of the plurality of scan signals GI1 to GI3840 in response to the mask signal MS. Further, the emission driving circuit EDC can generate the plurality of emission signals EM1 to EM3840 in a manner similar to that of the plurality of scan signals GI1 to GI3840 in response to the mask signal MS.

[0134] Figure 8 FIG. 4 is a graph exemplarily showing a residual image effect due to a driving frequency difference between the first display area DA1 and the second display area DA2.

[0135] Referring to Figure 1 and Figure 8 , the first driving frequency of the first display area DA1 can be 100 Hz, and the second driving frequency of the second display area DA2 can be 1 Hz. Figure 8 FIG. 4 shows a case where, after an image of a white gray level (e.g., 255 gray scale) is displayed for a long time in the first display area DA1 and the second display area DA2, an image of a gray gray level (e.g., 32 gray scale) is displayed in the first display area DA1 and the second display area DA2.

[0136] The first curve CV1 indicates that, when an image corresponding to the gray gray level (e.g., 32 gray scale) is displayed in the first display area DA1, the luminance varies depending on the time for which an image of the white gray level (e.g., 255 gray scale) has been displayed in the first display area DA1.

[0137] The second curve CV2 indicates that, when an image corresponding to the gray gray level (e.g., 32 gray scale) is displayed in the second display area DA2, the luminance varies depending on the time for which an image of the white gray level (e.g., 255 gray scale) has been displayed in the second display area DA2.

[0138] In this case, when the image of the gray gray level is displayed in the first display area DA1 after the image of the white gray level has been displayed in the first display area DA1 for 5 hours, the measured luminance of the first display area DA1 is about 5.08 nits.

[0139] When the image of the gray gray level is displayed in the first display area DA1 after the image of the white gray level has been displayed in the first display area DA1 for 10 hours, the measured luminance of the first display area DA1 is about 5.2 nits.

[0140] In this case, when the image of the gray gray level is displayed in the second display area DA2 after the image of the white gray level has been displayed in the second display area DA2 for 5 hours, the measured luminance of the second display area DA2 is about 4.87 nits.

[0141] When a white grayscale image has been displayed in the second display area DA2 for 10 hours, and then a grayscale image is displayed in the second display area DA2, the measured brightness of the second display area DA2 is approximately 4.92 nits.

[0142] Therefore, as Figure 8 As shown, when an image with the same white grayscale has been displayed in the first display area DA1 and the second display area DA2 for 5 hours, and an image with the same grayscale has been displayed in the first display area DA1 and the second display area DA2, the first display area DA1 and the second display area DA2 can display images with different brightness (5.08 nits, 4.87 nits).

[0143] After 10 hours, when images with the same white grayscale have been displayed in the first display area DA1 and the second display area DA2, images with the same grayscale have been displayed in the first display area DA1 and the second display area DA2. At this time, images with different brightness (5.2 nits and 4.92 nits) are displayed in the first display area DA1 and the second display area DA2.

[0144] In addition, from Figure 8 It can be seen that as the display time of the white grayscale image increases, the difference (i.e., the brightness difference) between the first curve CV1 and the second curve CV2 increases. That is, from... Figure 8 It can be seen that when an image of the same grayscale is displayed for a long time, the image retention effect changes depending on the driving frequency of the first display area DA1 and the second display area DA2. In this case, the user may see a brightness difference due to the image retention at the boundary between the first display area DA1 and the second display area DA2.

[0145] Figure 9 This is a diagram describing a driving method for reducing the brightness difference caused by afterimages at the boundary between the first display area DA1 and the second display area DA2.

[0146] Reference Figure 9 In one embodiment, the display area DA of the display device DD may include a first horizontal line L1 to an nth horizontal line Ln. In one embodiment, for example, the pixel PX of the first horizontal line L1 may be connected to, for example, Figure 4 The diagram shows multiple first scan lines GIL1, GCL1, and GWL1, a second scan line GWL2, and a first emission control line EML1. In this embodiment, the pixel PX of the j-th horizontal line (or j-th pixel row) Lj can be connected to, for example... Figure 4 The diagram shows multiple j-th scan lines GILj, GCLj, and GWLj, as well as the (j+1)-th scan line GWLj+1 and the j-th transmit control line EMLj.

[0147] The first display area DA1 can include the first to kth horizontal lines L1 to Lk, and the second display area DA2 can include the (k+1)th to nth horizontal lines Lk+1 to Ln. In the second display area DA2, a boundary area between the first display area DA1 and the second display area DA2, i.e., an area between the (k+1)th to (k+16)th horizontal lines Lk+1 to Lk+16, can be referred to as a boundary area BR for stress boundary diffusion. Hereinafter, for convenience of description, an embodiment in which the number of horizontal lines included in the boundary area BR is 16 will be described in detail, but embodiments of the present application are not limited thereto. In an embodiment, as shown in Figure 9 The boundary area BR is included in the second display area DA2, but embodiments of the present application are not limited thereto. In an embodiment, for example, the boundary area BR can include a portion of the first display area DA1 and a portion of the second display area DA2. In an embodiment, the boundary area BR can include only a portion of the first display area DA1.

[0148] When the first display area DA1 is driven at a first driving frequency (e.g., 60 Hz) and the second display area DA2 is driven at a second driving frequency (e.g., 1 Hz), the boundary area BR can be driven at a driving frequency lower than the first driving frequency and higher than the second driving frequency.

[0149] In an embodiment, as shown in Figure 9 , the (k+1)th to (k+16)th horizontal lines Lk+1 to Lk+16 are driven at driving frequencies different from each other, and the driving frequencies gradually decrease in a direction away from the first display area DA1 (in a direction opposite to the second direction DR2).

[0150] Figure 10A and Figure 10B are diagrams showing embodiments of a method of driving the horizontal lines of the boundary area BR.

[0151] Referring to Figure 9 , Figure 10A and Figure 10B , the boundary area BR can include the (k+1)th to (k+16)th horizontal lines Lk+1 to Lk+16. Each of the (k+1)th to (k+16)th horizontal lines Lk+1 to Lk+16 can be driven (D) or masked (M) between the second frame and the 32nd frame.

[0152] In an embodiment, the first driving frequency of the first display area DA1 can be 60 Hz, and the second driving frequency of the second display area DA2 can be 1 Hz. In this embodiment, all of the k+1th to k+16th horizontal lines Lk+1 to Lk+16 can be driven (D) in the first frame. Here, the term "driven (D)" indicates that the scan signals GIl to GI1920 are sequentially driven with high levels in the case where the masking signal MS has a high level.

[0153] All of the k+1th to k+16th horizontal lines Lk+1 to Lk+16 can be masked (M) in the second frame.

[0154] In the third frame, the k+1th horizontal line Lk+1 is driven (D), and the other horizontal lines Lk+2 to Lk+16 are masked (M). Here, the term "masked (M)" indicates that all of the plurality of scan signals GIk+2 to GIk+16 remain at low levels due to the masking signal MS turning to a low level.

[0155] In this way, the number of horizontal lines driven (D) in the border area BR sequentially increases by one from the second frame to the 31st frame, and the number of horizontal lines driven (D) in the border area BR sequentially decreases by one from the 32nd frame to the 59th frame.

[0156] When the display device DD operates in this way from the first frame to the 60th frame, the driving frequency of the k+1th horizontal line Lk+1 is 58 Hz, the driving frequency of the k+2th horizontal line Lk+2 is 56 Hz, and the driving frequency of the k+16th horizontal line Lk+16 is 2 Hz.

[0157] In the embodiment shown in Figure 10A and Figure 10B , all of the k+1th to k+16th horizontal lines Lk+1 to Lk+16 are masked (M) in the second frame, and the k+1th to k+16th horizontal lines Lk+1 to Lk+16 are sequentially driven from the third frame, but embodiments of the present application are not limited thereto. Whether the k+1th to k+16th horizontal lines Lk+1 to Lk+16 are driven (D) or masked (M) from the second frame to the 60th frame can be determined based on the driving frequency of each of the k+1th to k+16th horizontal lines Lk+1 to Lk+16.

[0158] Figure 11 is a diagram showing a residual image effect due to a difference in driving frequency between the first display area DA1 and the second display area DA2 after the method of driving the horizontal lines of the border area BR shown in Figure 10A and Figure 10B .

[0159] Figure 11A case where an image of a gray scale (e.g., 32 gradation) is displayed in the first display area DA1 and the second display area DA2 after an image of a white scale (e.g., 255 gradation) is displayed for a long time in the first display area DA1 and the second display area DA2 is shown.

[0160] When an image of a white scale is displayed for a long time in the first display area DA1 and the second display area DA2, the luminance of the gray scale displayed in the first display area DA1 and the second display area DA2 can be different according to the driving frequency of each of the first display area DA1 and the second display area DA2.

[0161] When the method of applying a horizontal line to the boundary area BR shown in Figure 10A and Figure 10B , the luminance difference between the first display area DA1 and the second display area DA2 at the boundary line BL can be effectively prevented. However, in a predetermined position in the boundary area BR, a luminance boundary line BLa through which the luminance difference due to a residual image is watched or recognized occurs. This is caused by a non-linear proportional relationship between the driving frequency and the luminance.

[0162] Figure 12 is a block diagram showing a configuration of an embodiment of the driving controller 100 according to the present application.

[0163] Referring to Figure 4 and Figure 12 , an embodiment of the driving controller 100 includes a frequency mode determination part 110, a boundary controller 120, and a signal generator 130. The frequency mode determination part 110 determines a frequency mode based on an image signal RGB and a control signal CTRL, and outputs a mode signal MD corresponding to the determined frequency mode.

[0164] When the mode signal MD received from the frequency mode determination part 110 indicates a multi-frequency mode, the boundary controller 120 outputs a boundary mask signal BMS for controlling masking of the boundary area BR in response to the control signal CTRL. The boundary controller 120 can include a memory MEM in which masking information related to the boundary area BR is stored. The memory MEM can be a storage device such as a register, a Random Access Memory (RAM), or a flash memory, etc. that temporarily or permanently stores data.

[0165] The signal generator 130 receives an image signal RGB, a control signal CTRL, a mode signal MD from the frequency mode determination unit 110, and a boundary masking signal BMS from the boundary controller 120. In response to the image signal RGB, the control signal CTRL, the mode signal MD, and the boundary masking signal BMS, the signal generator 130 outputs an image data signal DATA, a data control signal DCS, a transmit control signal ECS, and a scan control signal SCS.

[0166] In this implementation, when the mode signal MD indicates the normal mode, the signal generator 130 can output a signal to drive the first display area DA1 at the normal frequency (see [link]). Figure 1 ) and the second display area DA2 (see Figure 1 Each of these signals consists of the image data signal DATA, the data control signal DCS, the transmit control signal ECS, and the scan control signal SCS. Figure 4 The data driving circuit 200, scan driving circuit SD, and transmit driving circuit EDC shown operate in response to the image data signal DATA, data control signal DCS, scan control signal SCS, and transmit control signal ECS, so that the image is displayed on the display panel DP.

[0167] In one embodiment, when the mode signal MD indicates a multi-frequency mode, the signal generator 130 can output image data signal DATA, data control signal DCS, transmit control signal ECS, and scan control signal SCS for driving the first display area DA1 at a first drive frequency and the second display area DA2 at a second drive frequency. In one embodiment, the first drive frequency may be the same as the normal frequency. In another embodiment, the first drive frequency may be higher than the normal frequency.

[0168] In this implementation, when the mode signal MD indicates a multi-frequency mode, the signal generator 130 can output an image data signal DATA, a data control signal DCS, a transmit control signal ECS, and a scan control signal SCS to drive the boundary area BR adjacent to the first display area DA1 at a third drive frequency between the first drive frequency and the second drive frequency.

[0169] Figure 12 The frequency mode determination unit 110, boundary controller 120, and signal generator 130 shown in the diagram illustrate the functions of the drive controller 100 in block form, and embodiments of the present invention are not limited to these. Figure 12 The embodiments shown are illustrated. In one embodiment, for example, the frequency mode determination unit 110 and the boundary controller 120 may be implemented as a single functional block, or the boundary controller 120 and the signal generator 130 may be implemented as a single functional block.

[0170] Figure 13 This is an example shownFigure 12 a flowchart of the operation of the drive controller 100 shown in FIG. 1.

[0171] Referring to Figure 9 , Figure 12 and Figure 13 , the frequency mode determination section 110 of the drive controller 100 can set the operation mode to the normal mode at an initial stage (e.g., after power-on).

[0172] The frequency mode determination section 110 determines the frequency mode based on the image signal RGB and the control signal CTRL. In one embodiment, for example, when a part of the image signal RGB of one frame (e.g., the image signal corresponding to the first display area DA1) is a moving image and another part (e.g., the image signal corresponding to the second display area DA2) is a still image, the frequency mode determination section 110 determines the operation mode to the multi-frequency mode (S10). When the operation mode is determined to the multi-frequency mode, the frequency mode determination section 110 outputs the mode signal MD corresponding to the multi-frequency mode.

[0173] When the mode signal MD indicates the multi-frequency mode, the signal generator 130 sets the drive frequency of the first display area DA1 to the first drive frequency (S20).

[0174] When the mode signal MD indicates the multi-frequency mode, the signal generator 130 sets the drive frequency of the second display area DA2 to the second drive frequency (S30). The second drive frequency can be lower than the first drive frequency.

[0175] When the mode signal MD indicates the multi-frequency mode, the signal generator 130 sets the drive frequency of the boundary area BR adjacent to the first display area DA1 in the second display area DA2 to the third drive frequency (S40). The third drive frequency can be lower than the first drive frequency and higher than the second drive frequency. The third drive frequency of the boundary area BR can be determined in accordance with the boundary mask signal BMS output from the boundary controller 120.

[0176] The signal generator 130 can output the image data signal DATA, the scan control signal SCS, the data control signal DCS, and the emission control signal ECS based on the set frequencies of the first display area DA1, the second display area DA2, and the boundary area BR.

[0177] Embodiments of the method of setting the third drive frequency of the boundary area BR will be described in detail hereinafter.

[0178] Figure 14A and Figure 14B are diagrams showing embodiments of the method of driving the horizontal line of the boundary area BR.

[0179] Referring to Figure 9 ,Figure 12 、 Figure 14A and Figure 14B In an embodiment, the boundary region BR can include H number of horizontal lines (where H is a natural number). In one embodiment, for example, the boundary region BR includes 16 horizontal lines including the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16. Each of the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16 can be driven (D) or masked (M) between the second frame and the 60th frame. The number of horizontal lines included in the boundary region BR can be variously changed.

[0180] In an embodiment, the first driving frequency of the first display region DA1 can be 60Hz, and the second driving frequency of the second display region DA2 can be 1Hz. In such an embodiment, all of the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16 can be driven (D) in the first frame. Here, the term "driven (D)" indicates that the plurality of scan signals GIl to GI3840 (see Figure 7 ) are sequentially driven with a high level in a case where the masking signal MS (see Figure 7 ) has a high level.

[0181] The boundary controller 120 included in the driving controller 100 masks (M) the 16 horizontal lines Lk+1 to Lk+16 during M number of frames (where M is a natural number, and A is a natural number greater than M) out of A number of frames, and drives (D) the 16 horizontal lines Lk+1 to Lk+16 during A-M number of frames.

[0182] In one embodiment, for example, the boundary controller 120 masks (M) the k+1th horizontal line Lk+1 during six frames including the second frame to the seventh frame out of 59 frames including the second frame to the 60th frame, and drives (D) the k+1th horizontal line Lk+1 from the eighth frame to the 60th frame. The boundary controller 120 masks (M) the k+2th horizontal line Lk+2 during 12 frames including the second frame to the 13th frame, and drives (D) the k+2th horizontal line Lk+2 from the 14th frame to the 60th frame.

[0183] In other words, from the eighth frame to the 13th frame, only the k+1th horizontal line Lk+1 is driven (D), and the other horizontal lines Lk+2 to Lk+16 are masked (M). Also, from the 14th frame to the 19th frame, only the k+1th horizontal line Lk+1 and the k+2th horizontal line Lk+2 are driven (D), and the other horizontal lines Lk+3 to Lk+16 are masked (M).

[0184] The consecutive frames having the same number of horizontal lines that are driven (D) or masked (M) within the boundary area BR are referred to as a frame block, and the number of frames Fn included in each frame block is stored in a memory MEM included in the boundary controller 120.

[0185] In an embodiment, as shown in Figure 14A and Figure 14B , each of some frame blocks FB1, FB2, FB3, FB5, FB6, and FB7 includes six frames, the frame block FB4 includes seven frames, the frame block FB8 includes four frames, each of a plurality of frame blocks FB9, FB10, and FB11 includes two frames, and each of a plurality of frame blocks FB12 to FB17 includes one frame.

[0186] In the following description, since the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16 of the boundary area BR are driven (D) or masked (M) starting at the second frame, the second frame is referred to as a boundary frame.

[0187] In an embodiment, as shown in Figure 14A and Figure 14B , all of the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16 are masked (M) from the second frame to the seventh frame, and the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16 are sequentially driven (D) from the eighth frame, but embodiments of the present application are not limited thereto. Whether the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16 are driven (D) or masked (M) from the second frame to the 60th frame can be determined based on a driving frequency of each of the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16.

[0188] Figure 15 is an exemplary flowchart illustrating the operation of the boundary controller 120 shown in Figure 12 .

[0189] Referring to Figure 12 , Figure 14A , Figure 14B and Figure 15 , in an embodiment, when the mode signal MD output from the frequency mode determination section 110 indicates the multi-frequency mode, the boundary controller 120 determines whether the current frame is a boundary frame based on the control signal CTRL (S100). In an embodiment, as shown in Figure 14A and Figure 14B , the second frame corresponds to the boundary frame.

[0190] If the current frame is the boundary frame, the boundary controller 120 initializes the number of driving lines L to 0 (S110).

[0191] The boundary controller 120 increments the frame count Fa by one (S120).

[0192] The boundary controller 120 determines whether the counted frame count Fa is equal to the frame number Fn stored in the memory MEM (S130). The frame number Fn stored in the memory MEM is 6 when the current frame is the second frame.

[0193] If the counted frame count Fa is not equal to the frame number Fn, the boundary controller 120 outputs the boundary mask signal BMS for driving (D) L horizontal lines and masking (M) the other horizontal lines (i.e., H-L horizontal lines) (S140). Since L=0 in the second frame, the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16 are masked (M).

[0194] In this way, the boundary controller 120 repeats the operation S120, the operation S130, and the operation S140 from the second frame to the seventh frame.

[0195] If the counted frame count Fa is equal to the frame number Fn in the seventh frame, the boundary controller 120 resets the counted frame count Fa to 0 and increments the number L of the driven lines by one (S150). The number L of the driven lines becomes 1.

[0196] The boundary controller 120 determines whether the current frame is the last frame (S160). In an embodiment, as shown in FIG. 1, the 60th frame corresponds to the last frame. Figure 14A and Figure 14B

[0197] If the current frame is not the last frame, the process returns to the operation S120.

[0198] In the eighth frame, the boundary controller 120 increments the frame count Fa by one (S120), and, since the counted frame count Fa is not equal to the frame number Fn (1≠6), the boundary controller 120 outputs the boundary mask signal BMS for driving (D) L horizontal lines (i.e., one horizontal line Lk+1) and masking (M) the other horizontal lines Lk+2 to Lk+16 (S140). That is, from the eighth frame, only the k+1th horizontal line Lk+1 is driven (D) and the other horizontal lines Lk+2 to Lk+16 are masked (M).

[0199] In this way, the boundary controller 120 can perform the operations for the second frame to the 60th frame.

[0200] ​If the mode signal MD output from the frequency mode determination unit 110 indicates a multi-frequency mode, the process returns to operation S100 (S170). If the mode signal MD output from the frequency mode determination unit 110 does not indicate a multi-frequency mode (i.e., it changes to normal mode), the boundary controller 120 stops outputting the boundary masking signal BMS.

[0201] Return to reference Figure 14A and Figure 14B Because the number of frames included in frame blocks FB1 to FB16 is set non-linearly (or unequally), the driving frequency of each of the (k+1)th horizontal line Lk+1 to the (k+16)th horizontal line Lk+16 can be reduced non-linearly. In this implementation, the frequency difference between horizontal lines farthest from the first display area DA1 can be adjusted slightly.

[0202] Figure 16 This shows the application such as Figure 14A and Figure 14B The diagram shows the afterimage effect caused by the difference in driving frequency between the first display area DA1 and the second display area DA2 after the method of driving the horizontal line of the driving boundary area BR shown.

[0203] Figure 16 This illustrates a scenario where an image with a white grayscale (e.g., 255 gray levels) is displayed for an extended period in the first display area DA1 and the second display area DA2, followed by an image with a grayscale (e.g., 32 gray levels) in the first display area DA1 and the second display area DA2.

[0204] When a white grayscale image is displayed for a long time in the first display area DA1 and the second display area DA2, the brightness of the grayscale displayed in the first display area DA1 and the second display area DA2 may be different depending on the driving frequency of each of the first display area DA1 and the second display area DA2.

[0205] When the application Figure 14A and Figure 14B When using the method shown to drive the horizontal line of the boundary region BR, the brightness within the boundary region BR can be gradually changed. As the brightness gradually changes within the boundary region BR, the user's perception of brightness differences can be minimized.

[0206] Figure 17A and Figure 17B This is a diagram illustrating an alternative implementation of a method for driving the horizontal line of the boundary region BR.

[0207] Figure 17A and Figure 17B The implementation of the method for driving the horizontal line of the boundary region BR shown is similar to the above reference. Figure 14A and Figure 14B Implementation methods described. According toFigure 14A and Figure 14B In an implementation of the method shown, the frame number Fn for each frame block is stored in a memory MEM included in the boundary controller 120. According to... Figure 17A and Figure 17B In an alternative implementation of the method shown, the masking change frame Fm indicating the position where the frame number Fn is changed and the frame number Fn used to mask the change frame Fm are stored in a memory MEM included in the boundary controller 120.

[0208] In one implementation, for example, since each of the multiple frame blocks FB1, FB2 and FB3 comprises six frames and the masking start position is the second frame, the number 6 indicating the frame number Fn and the number 2 indicating the masking change frame Fm are stored in the memory MEM.

[0209] Since frame block FB4 consists of seven frames and the masking change position is the 20th frame, the number 7 indicating the frame number Fn and the number 20 indicating the masking change frame Fm are stored in memory MEM.

[0210] Since each of the multiple frame blocks FB5, FB6 and FB7 comprises six frames, and the masking change position is the 27th frame, the number 6 indicating the frame number Fn and the number 27 indicating the masking change frame Fm are stored in the memory MEM.

[0211] Since frame block FB8 consists of four frames and the masking start position is frame 45, the number 4 indicating frame number Fn and the number 45 indicating masking change frame Fm are stored in memory MEM.

[0212] Since each of the multiple frame blocks FB9, FB10 and FB11 consists of two frames, and the masking start position is frame 49, the number 2 indicating the frame number Fn and the number 49 indicating the masking change frame Fm are stored in memory MEM.

[0213] Since each of the multiple frame blocks FB12 to FB17 includes one frame, the number 1 indicating the frame number Fn and the number 55 indicating the masking change frame Fm are stored in memory MEM.

[0214] Figure 18 This is an example shown Figure 12 The flowchart shows the operation of the boundary controller 120.

[0215] Reference Figure 12 , Figure 17A , Figure 17B and Figure 18When the mode signal MD output from the frequency mode determination section 110 indicates the multi-frequency mode, the boundary controller 120 determines whether the current frame is a boundary frame based on the control signal CTRL (S200). In an embodiment, as shown in Figure 17A and Figure 17B , the second frame corresponds to the boundary frame.

[0216] If the current frame is the boundary frame, the second frame count Fb is set to the current frame (e.g., the start of the boundary frame) (S210). In an embodiment, as shown in Figure 17A and Figure 17B , since the boundary frame starts at the second frame, Fb can be set to 2.

[0217] The boundary controller 120 initializes the number of drive lines L to 0 (S220).

[0218] The boundary controller 120 determines whether the second frame count Fb is equal to the mask change frame Fm stored in the memory MEM (S230). In an embodiment, as shown in Figure 17A and Figure 17B , since the mask change frame Fm stored in the memory MEM is 2, Fb = Fm.

[0219] If Fb = Fm, the boundary controller 120 sets the frame number Fn to the value corresponding to the mask change frame Fm stored in the memory MEM (S240). In an embodiment, as shown in Figure 17A and Figure 17B , since the frame number corresponding to the mask change frame (Fm = 2) (i.e., the second frame) stored in the memory MEM is 6, Fn = 6.

[0220] The boundary controller 120 can increase the first frame count Fa by one and increase the second frame count Fb by one (S250).

[0221] The boundary controller 120 determines whether the first frame count Fa is equal to the frame number Fn stored in the memory MEM (S260).

[0222] If the first frame count Fa is not equal to the frame number Fn stored in the memory MEM, the boundary controller 120 outputs a boundary mask signal BMS for driving (D) L horizontal lines and masking (M) the other horizontal lines (i.e., H-L horizontal lines) (S270). Since L = 0 in the second frame, 16 horizontal lines Lk+1 to Lk+16 are masked (M).

[0223] The operations S250, S260, and S270 are repeated until the first frame count Fa equals the frame number Fn stored in the memory MEM (Fa = Fn). Thus, in each of the second to seventh frames, all of the k+1st to k+16th horizontal lines Lk+1 to Lk+16 are masked (M).

[0224] Since Fa = Fn when the first frame count Fa is 6, the boundary controller 120 resets the first frame count Fa to 0 and increases the number of drive lines L by one (S280).

[0225] The boundary controller 120 determines whether the current frame is the last frame (S290). In embodiments, as shown in Figure 17A and Figure 17B , the 60th frame corresponds to the last boundary frame.

[0226] If the current frame is not the last frame, the process returns to operation S230.

[0227] The boundary controller 120 determines whether the second frame count Fb equals the mask change frame Fm (S230). The current second frame count Fb is 6. In embodiments, as shown in Figure 17A and Figure 17B , since the next mask change frame Fm stored in the memory MEM is 20, Fb does not equal Fm.

[0228] The process proceeds to operation S250, and the boundary controller 120 increases the first frame count Fa by one and increases the second frame count Fb by one.

[0229] In this way, the boundary controller 120 repeatedly performs operations S220 to S290.

[0230] Since Fb = Fm in the 20th frame, the boundary controller 120 sets the frame number Fn to a value corresponding to the mask change frame Fm stored in the memory MEM (S240). In embodiments, as shown in Figure 17A and Figure 17B , since the frame number corresponding to the mask change frame (Fm = 20) (i.e., the 20th frame) stored in the memory MEM is 7, Fn = 7.

[0231] Thus, in the 20th to 26th frames, three horizontal lines Lk+1 to Lk+3 are driven (D), and the other 13 horizontal lines Lk+4 to Lk+16 are masked (M).

[0232] According to Figure 17A , Figure 17B and Figure 18From the second frame to the 60th frame, some of the 16 horizontal lines Lk+1 to Lk+16 can be driven (D), and the other can be masked (M) in the embodiment of the driving method shown in FIG. 6.

[0233] In this embodiment, each of the H horizontal lines Lk+1 to Lk+H can be masked (M) during M frames out of A frames, and can be driven (D) during A-M frames. For example, the (k+1)th horizontal line Lk+1 is masked (M) in each of 6 frames (second frame to seventh frame) out of 59 frames, and is driven (D) in each of 53 frames (eighth frame to 60th frame).

[0234] In this embodiment, as shown in Figure 17A and Figure 17B indicated, since the M frames included in the plurality of frame blocks FB1 to FB17 are set non-linearly, the driving frequency of each of the (k+1)th to (k+16)th horizontal lines Lk+1 to Lk+16 can be decreased non-linearly. In this embodiment, the frequency difference between the horizontal lines away from the first display area DA1 can be adjusted slightly.

[0235] In one embodiment, for example, the frequency difference between the (k+1)th horizontal line Lk+1 and the (k+2)th horizontal line Lk+2 is 6 Hz, and the frequency difference between the (k+2)th horizontal line Lk+2 and the (k+3)th horizontal line Lk+3 is 6 Hz. In this embodiment, the frequency difference between the (k+14)th horizontal line Lk+14 and the (k+15)th horizontal line Lk+15 is 1 Hz, and the frequency difference between the (k+15)th horizontal line Lk+15 and the (k+16)th horizontal line Lk+16 is 1 Hz. Thus, as described above with reference to Figure 16 , the luminance in the border area BR can be changed gradually. When the luminance is changed gradually in the border area BR, the recognition of the user to the luminance difference can be minimized.

[0236] When the mode signal MD output from the frequency mode determination section 110 indicates the multi-frequency mode, the process returns to operation S200 (S300). If the mode signal MD output from the frequency mode determination section 110 does not indicate the multi-frequency mode (i.e., changed to the normal mode), the border controller 120 stops outputting the border masking signal BMS.

[0237] In the embodiment, as shown in Figure 14A and Figure 14B , for each frame block, the memory MEM stores the frame number Fn for the second frame to the 60th frame corresponding to the border area BR. In one embodiment, for example, when the frame number Fn is represented in 4 bits, 4 bits x 58 frames, i.e., a total of 240 bits of information can be stored in the memory MEM.

[0238] In an alternative embodiment, as shown in Figure 17A and Figure 17B , the memory MEM stores the mask change frame Fm corresponding to the frame number Fn in the second frame to the 60th frame and the frame number Fn corresponding to the mask change frame Fm. In one embodiment, for example, when the frame number Fn is represented by 4 bits and the mask change frame Fm is represented by 7 bits, (4 bits + 7 bits) x 6, i.e., only 66 bits of information can be stored in the memory MEM.

[0239] For the convenience of illustration, Figure 17A and Figure 17B the frame number Fn and the mask change frame Fm in the memory MEM are shown arranged in alignment with the corresponding frame positions, but the frame number Fn and the mask change frame Fm can be stored continuously in the memory MEM.

[0240] Figure 19A and Figure 19B is a diagram showing another alternative embodiment of the method of driving the horizontal lines of the border region BR.

[0241] Figure 19A and Figure 19B the embodiment of the method of driving the horizontal lines of the border region BR shown in Figure 17A and Figure 17B is similar to the embodiment of the method described above with reference to and

[0242] In an embodiment, as shown in Figure 19A and Figure 19B , the memory MEM can store the initialization value INT, the acceleration factor AF, and the mask change frame Fm indicating the position of the change of the acceleration factor AF (i.e., the FM shown in Figure 19A ).

[0243] The acceleration factor AF can be represented as the ratio between the number of previous frames and the number of current frames. In one embodiment, for example, the initialization value INT can be 6. The initialization value INT can represent the increase rate of the masked (M) lines in the border region BR (see Figure 9 ). When the initialization value INT is 6, the line increase rate is 6. The border controller 120 increases the number of masked (M) lines by 6 every six frames. In one embodiment, for example, the number of masked (M) lines during the second frame to the seventh frame is 6, the number of masked (M) lines during the eighth frame to the 13th frame is 12, and the number of masked (M) lines during the 14th frame to the 19th frame is 18.

[0244] When the next masking change frame Fm is frame 20, the border controller 120 can determine a changed line increase rate based on the acceleration factor AF and the previous line increase rate. In one embodiment, for example, when the previous line increase rate is 6, and the acceleration factor AF is 7 / 6, the changed line increase rate is 6 x 7 / 6, i.e., 7. Thus, the number of lines that are masked (M) during frames 20 through 26 is 25.

[0245] When the next masking change frame Fm is frame 27, the border controller 120 can determine a changed line increase rate based on the acceleration factor AF and the previous line increase rate. For example, when the previous line increase rate is 7, and the acceleration factor AF is 6 / 7, the changed line increase rate is 7 x 6 / 7, i.e., 6. Thus, the number of lines that are masked (M) during frames 27 through 32 is 31, the number of lines that are masked (M) during frames 33 through 38 is 37, and the number of lines that are masked (M) during frames 39 through 44 is 43.

[0246] When the next masking change frame Fm is frame 45, the border controller 120 can determine a changed line increase rate based on the acceleration factor AF and the previous line increase rate. In one embodiment, for example, when the previous line increase rate is 6, and the acceleration factor AF is 4 / 6, the changed line increase rate is 6 x 4 / 6, i.e., 4. Thus, the number of lines that are masked (M) during frames 45 through 48 is 47.

[0247] When the next masking change frame Fm is frame 49, the border controller 120 can determine a changed line increase rate based on the acceleration factor AF and the previous line increase rate. In one embodiment, for example, when the previous line increase rate is 4, and the acceleration factor AF is 2 / 4, the changed line increase rate is 4 x 2 / 4, i.e., 2. Thus, the number of lines that are masked (M) during frames 49 and 50 is 49, the number of lines that are masked (M) during frames 51 and 52 is 51, and the number of lines that are masked (M) during frames 53 and 54 is 53.

[0248] When the next masking change frame Fm is frame 55, the border controller 120 can determine a changed line increase rate based on the acceleration factor AF and the previous line increase rate. In one embodiment, for example, when the previous line increase rate is 2, and the acceleration factor AF is 1 / 2, the changed line increase rate is 2 x 1 / 2, i.e., 1. Thus, the number of lines that are masked (M) during frames 55 through 60 is 54, 55, 56, 57, 58, and 59, respectively.

[0249] In embodiments, as Figure 19A and Figure 19BAs shown in the drawing, the memory MEM stores an initialization value INT, a mask change frame Fm of a position where a frame number Fn changes among the second frame to the 60th frame corresponding to the boundary area BR, and a frame number Fn corresponding to the mask change frame Fm. Therefore, the frequency of each of the k+1th horizontal line Lk+1 to the k+16th horizontal line Lk+16 for the boundary area BR can be set using minimum data.

[0250] For the convenience of illustration, Figure 19A and Figure 19B The initialization value INT, the acceleration factor AF, and the mask change frame Fm in the memory MEM are shown arranged in alignment with the corresponding frame positions, but the initialization value INT, the acceleration factor AF, and the mask change frame Fm can be stored consecutively in the memory MEM.

[0251] In an embodiment of the present application, as described herein, the display device can operate in a multi-frequency mode in which, when a moving image is displayed in a first display area and a still image is displayed in a second display area, the first display area is driven at a first drive frequency and the second display area is driven at a second drive frequency. In the multi-frequency mode, the drive frequency of a boundary area adjacent to the first display area in the second display area can be set to a third drive frequency lower than the first drive frequency and higher than the second drive frequency. In this embodiment, deterioration of display quality can be prevented by setting the third drive frequency such that a brightness difference due to residual image is not recognizable in the boundary area.

[0252] The present application should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art.

[0253] While the present application has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details can be made therein without departing from the spirit or scope of the application as defined by the appended claims.

Claims

1. A display device, comprising: The display panel includes multiple pixels connected to multiple data lines and multiple scan lines; Data driving circuit, which drives the plurality of data lines; A scan driving circuit that drives the plurality of scan lines; as well as Drive controller, the drive controller The display panel is divided into a first display area and a second display area. During multi-frequency mode, the data driving circuit and the scan driving circuit are controlled to drive the first display area at a first driving frequency and drive the second display area at a second driving frequency lower than the first driving frequency. During the multi-frequency mode, multiple third driving frequencies are set, each corresponding to a multiple horizontal line in the boundary region. Each of the plurality of third driving frequencies has a frequency level between the first driving frequency and the second driving frequency, and The boundary area is defined by a portion of the second display area adjacent to the first display area. The plurality of horizontal lines in the boundary area includes H horizontal lines, which are arranged sequentially from a first horizontal line to the Hth horizontal line adjacent to the first display area, where H is a natural number. The drive controller drives or masks each of the H horizontal lines every A frames during the multi-frequency mode, where A is a natural number.

2. The display device according to claim 1, wherein, The frequency levels of the plurality of third driving frequencies decrease non-linearly from the first horizontal line to the Hth horizontal line.

3. The display device according to claim 2, wherein, The difference between the third driving frequency corresponding to the first horizontal line among the H horizontal lines and the third driving frequency corresponding to the second horizontal line is higher than the difference between the third driving frequency corresponding to the (H-1)th horizontal line among the H horizontal lines and the third driving frequency corresponding to the Hth horizontal line.

4. The display device according to claim 2, wherein, The drive controller masks each of the H horizontal lines during M frames out of the A frames, and drives each of the H horizontal lines during AM frames, where M is a natural number less than A.

5. The display device according to claim 4, wherein, The value of M increases non-linearly from the first horizontal line to the Hth horizontal line.

6. The display device according to claim 4, wherein, The number of frames masked on the first horizontal line among the H horizontal lines is greater than the number of frames masked on the Hth horizontal line.

7. The display device according to claim 4, wherein, The drive controller includes: A frequency mode determination unit determines an operation mode based on an image signal and a control signal, and outputs a mode signal corresponding to the determined operation mode. A boundary controller, which outputs a boundary masking signal when the mode signal indicates the multi-frequency mode; and A signal generator that outputs data control signals and scan control signals based on the image signal, the control signal, the pattern signal, and the boundary masking signal. The data control signal is provided to the data driving circuit, and the scan control signal is provided to the scan driving circuit.

8. The display device according to claim 7, wherein, The boundary controller includes a memory that defines M consecutive frames among the H horizontal lines as frame blocks and stores the value of M corresponding to each frame block.

9. The display device according to claim 7, wherein, The boundary controller includes a memory that defines M consecutive frames of the H horizontal lines as frame blocks and stores the value of M and masking change frames indicating the position of the frame block where the value of M is changed.

10. The display device according to claim 7, wherein, The boundary controller includes a memory that defines M consecutive frames among the H horizontal lines as frame blocks, and stores a mask-changing frame indicating the location of the frame block where the value of M is changed, and an acceleration factor indicating the ratio between the previous value of M and the current value of M at the frame block location.

11. A method for driving a display device, the method comprising: The display panel of the display device is divided into a first display area and a second display area, and the first display area is driven at a first driving frequency during a multi-frequency mode, and the second display area is driven at a second driving frequency that is lower than the first driving frequency. as well as During the multi-frequency mode, multiple third driving frequencies are set, each corresponding to a multiple horizontal line in the boundary region. Each of the plurality of third driving frequencies has a frequency level between the first driving frequency and the second driving frequency, and The boundary area is defined by a portion of the second display area adjacent to the first display area. The plurality of horizontal lines in the boundary area include H horizontal lines, which are arranged sequentially from a first horizontal line to the Hth horizontal line adjacent to the first display area, where H is a natural number. The plurality of third driving frequencies, which are respectively set to correspond to the plurality of horizontal lines in the boundary region, include: masking each of the H horizontal lines during M frames in A frames, and driving each of the H horizontal lines during AM frames in A frames, where M is a natural number and A is a natural number greater than M.

12. The method according to claim 11, wherein, The frequency levels of the plurality of third driving frequencies decrease non-linearly from the first horizontal line to the Hth horizontal line.

13. The method according to claim 11, wherein, The value of M increases non-linearly from the first horizontal line to the Hth horizontal line.

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