AFDX terminal system and method for reducing jitter

By using the Jitter configuration table and priority configuration table in the AFDX side system, the scheduling priority of virtual links is dynamically adjusted, which solves the problem of excessive Jitter value in the AFDX side system, and improves the certainty and stability of the network.

CN114157406BActive Publication Date: 2025-04-25SHANGHAI AVIATION ELECTRIC
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Patent Information

Application Number
CN202010832777.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-08-18
Publication Date
2025-04-25
Estimated Expiration
2040-08-18

AI Technical Summary

Technical Problem

In the AFDX system, the scheduler cannot schedule data from multiple virtual links in time, resulting in excessive Jitter value, affecting network delay and certainty.

Method used

By introducing Jitter configuration table and priority configuration table in the AFDX end system, use Jitter timer to judge the Jitter value of the virtual link and dynamically adjust its scheduling priority to ensure that the Jitter value meets the requirements.

Benefits of technology

It effectively reduces the probability of Jitter timeout, improves the certainty of aviation Ethernet, and ensures the stability and reliability of the network.

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Abstract

The present invention discloses an AFDX end system and method for reducing Jitter, comprising a virtual link, a link data memory, a link scheduler, a Jitter configuration table and a priority configuration table, wherein the input end of the link data memory is respectively connected to the output end of each virtual link, the output end of the link data memory is connected to the input end of the link scheduler, each virtual link corresponds to a Jitter timer, the Jitter configuration table defines the Jitter maximum value of the Jitter timer corresponding to each virtual link, and the priority configuration table defines the scheduling priority corresponding to each virtual link. Beneficial effects of the present invention: By utilizing the Jitter configuration table, the scheduling priority of each virtual link can be flexibly adjusted according to the Jitter value, which greatly reduces the probability of Jitter timeout and improves the determinism of aviation Ethernet.
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Description

Technical Field

[0001] The present invention relates to the field of avionics full-duplex switching Ethernet, in particular to an AFDX end system and method for reducing Jitter. Background Art

[0002] Avionics Full-Duplex Switched Ethernet (AFDX) is an electrical and protocol standard for data exchange between avionics systems. As airborne communications place higher and higher demands on bus capacity and determinism, AFDX is increasingly being used in airborne communications for its high speed, high load, and strong determinism.

[0003] At the sending end of the AFDX end system, if data from multiple virtual links arrives and the scheduler cannot schedule the data in time, jitter will occur. The AFDX protocol chip or board must meet the jitter requirements of ARINC664-P7, namely:

[0004]

[0005] It can be seen from the formula that the maximum value of jitter cannot exceed 500us. However, in the existing scheduling algorithm, if the polling scheduling method is adopted, the virtual link at the back of the queue may cause jitter to be larger than the specified value due to the polling order. If the priority scheduling method is adopted, if there is a lot of data in the high-priority virtual link and it always occupies the scheduler, the jitter value of the low-priority data will not meet the requirements. Especially now that the amount of data communicated by airborne communication systems is increasing, the number of virtual links will also be higher and higher. This jitter problem will become more and more serious when there are more virtual links. This causes network delays and uncertainties. Summary of the invention

[0006] The present invention aims to solve the problem of high jitter in the AFDX end system in the prior art, and provides a novel AFDX end system and method for reducing jitter.

[0007] In order to achieve this purpose, the technical solution of the present invention is as follows: an AFDX end system for reducing Jitter, comprising a virtual link, a link data memory, a link scheduler, a Jitter configuration table and a priority configuration table, wherein the input end of the link data memory is respectively connected to the output end of each virtual link, the output end of the link data memory is connected to the input end of the link scheduler, each virtual link corresponds to a Jitter timer, the Jitter configuration table defines the Jitter maximum value of the Jitter timer corresponding to each virtual link, and the priority configuration table defines the scheduling priority corresponding to each virtual link.

[0008] The present invention also provides a method for reducing Jitter in an AFDX end system, comprising the following steps, determining whether the Jitter timer corresponding to each of the virtual links has overflowed: if the Jitter timer corresponding to the virtual link has overflowed, the scheduling priority of the virtual link is set to the highest level; if the Jitter timer corresponding to the virtual link has not overflowed, the scheduling priority of the virtual link is determined according to the priority configuration table; wherein, the virtual link with a higher scheduling priority is scheduled first, and the virtual links with the same scheduling priority are scheduled using a polling method. The scheduling priority of each virtual link in the priority configuration table is lower than the highest level.

[0009] Compared with the prior art, the beneficial effects of the present invention are at least that: by utilizing the Jitter configuration table, the scheduling priority of each virtual link is flexibly adjusted according to the Jitter value, which greatly reduces the probability of Jitter timeout and improves the determinism of aviation Ethernet.

[0010] In addition to the technical problems solved by the present invention, the technical features that constitute the technical solution, and the beneficial effects brought about by the technical features of the technical solution described above, other technical problems that can be solved by the present invention, other technical features included in the technical solution, and the beneficial effects brought about by these technical features will be further described in detail in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a structural schematic diagram of the present invention.

[0012] Figure 2 The figure is a flow chart of the method of the present invention. DETAILED DESCRIPTION

[0013] The present invention is further described in detail below by means of specific embodiments connected with the accompanying drawings. It should be noted that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0014] See also Figure 1 , the figure shows an AFDX end system for reducing Jitter. The AFDX end system is composed of a virtual link, a link data memory 1, a link scheduler 2, a Jitter configuration table 3, a priority configuration table 4, a traffic shaping module 5 and a MAC sending module 6.

[0015] Before the data of each virtual link is scheduled by the link scheduler 2 and sent, the data is stored in the link data memory 1 and then waits for scheduling by the link scheduler 2. The link data memory 1 is used to store the data of the virtual link waiting to be scheduled.

[0016] The jitter configuration table 3 is the pre-configured maximum jitter value of each virtual link (the jitter value needs to meet the requirements of ARINC664-p7). Each virtual link is equipped with a jitter timer 7. When a virtual link has valid data and meets the traffic shaping requirements, the jitter timer 7 corresponding to the virtual link will be turned on.

[0017] The priority configuration table 4 is the pre-configured scheduling priority of each virtual link. In each scheduling cycle, if the Jitter timers 7 of all virtual links have not overflowed, the link scheduler 2 performs scheduling according to the scheduling priority in the priority configuration table 4. If the Jitter timer 7 of a certain virtual link overflows, the priority of the virtual link will be set to the highest, that is, 0. At this time, the link scheduler 2 will give priority to scheduling the data of the virtual link with a priority of 0. After the scheduling is completed, the priority of the virtual link is reset.

[0018] See also Figure 2 , priority 0 is the highest, 1 is the second, and 2 is the lowest. The scheduling priority in the priority configuration table 4 can only be set to 1 or 2. Only the scheduling priority of the virtual link with Jitter overflow can be adjusted to 0.

[0019] For virtual links with different priorities, the data of the virtual link with higher priority will be scheduled first. For virtual links with the same priority, the scheduler will schedule them in a round-robin manner.

[0020] The above only expresses the implementation mode of the present invention, and its description is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims.

Claims

1. A method for reducing jitter in an AFDX end system, wherein: The AFDX end system includes a virtual link, a link data memory, a link scheduler, a Jitter configuration table and a priority configuration table. The input end of the link data memory is respectively connected to the output end of each virtual link, and the output end of the link data memory is connected to the input end of the link scheduler. Each virtual link corresponds to a Jitter timer. The Jitter configuration table defines the Jitter maximum value of the Jitter timer corresponding to each virtual link. The priority configuration table defines the scheduling priority corresponding to each virtual link. It is characterized in that it includes the following steps to determine whether the Jitter timer corresponding to each virtual link overflows: if the Jitter timer corresponding to the virtual link overflows, the scheduling priority of the virtual link is set to the highest level; if the Jitter timer corresponding to the virtual link does not overflow, the scheduling priority of the virtual link is determined according to the priority configuration table; wherein, the virtual link with a higher scheduling priority is scheduled first, and the virtual links with the same scheduling priority are scheduled in a polling manner; the scheduling priority of each virtual link in the priority configuration table is lower than the highest level.

Citation Information

Patent Citations

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