Information encryption and decryption processing method and device
By optimizing the encryption and decryption process of the SM4 packet cipher algorithm, and using the S3 table search operation to reduce the synthetic and permutation operation steps, the problem of insufficient algorithm performance in resource-constrained scenarios is solved, and efficient encryption and decryption operations in the fields of the Internet of Things and other fields are achieved.
Patent Information
- Application Number
- CN202010928578.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-09-07
- Publication Date
- 2025-04-08
- Estimated Expiration
- 2040-09-07
AI Technical Summary
The SM4 packet cryptography algorithm has insufficient encryption and decryption computing performance in resource-constrained scenarios, especially in the fields of the Internet of Things and other fields. It is necessary to optimize the synthetic and permutation T processing process to improve the overall performance of the algorithm.
By optimizing the encryption and decryption process of the SM4 packet cipher algorithm, the S3 table search operation is used to reduce the synthesis and permutation operation steps, the input module is used to obtain plain text or cipher text, and K round non-linear iterative operations are performed through the encryption or decryption processing module, and inverse the inverse module is combined to finally realize encryption or decryption.
The optimized SM4 packet cipher algorithm significantly improves the encryption and decryption computing performance in resource-constrained scenarios, reduces the complexity of the algorithm, and improves the overall processing performance.
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Figure CN114157409B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of information technology, and in particular to an information encryption and decryption processing method and device. Background Art
[0002] The SM4 block cipher algorithm (formerly the SMS4 block cipher algorithm) is a solution configured in electronic devices and can be applied to confidential communications between electronic devices or confidential information processing in electronic devices themselves.
[0003] In January 2006, the China National Cryptography Administration issued an announcement on wireless LAN product cryptography, applying the SM4 block cipher algorithm to wireless LAN products, marking the entry of the SM4 block cipher algorithm into the commercialization stage.
[0004] As a simple, secure and efficient cryptographic algorithm, the SM4 block cipher algorithm has been widely used in the fields of information encryption protection and integrity verification. In the application of the SM4 block cipher algorithm, the algorithm operation efficiency has always been an important factor that algorithm users pay attention to. However, for fields such as the Internet of Things, the application of algorithms in resource-constrained scenarios also needs to receive corresponding attention.
[0005] SM4 block cipher algorithm, block length is 128 bits, key length is 128 bits, encryption and decryption algorithm and key expansion algorithm both use 32 rounds of nonlinear iterative structure. The encryption and decryption operation principle of the algorithm is described as follows: input the plain text, use the round key to perform 32 rounds of nonlinear iterative transformation, and then perform the reverse operation to obtain the ciphertext output, where the 32 rounds of nonlinear iterative transformation include synthetic permutation T, linear transformation L, nonlinear transformation τ and Sbox (S box) table lookup.
[0006] In the SM4 block cipher algorithm, the structure of the decryption algorithm is the same as that of the encryption algorithm, except that the order of using the round keys is reversed; analysis of the encryption and decryption operation process of the SM4 block cipher algorithm shows that the core of the SM4 block cipher algorithm operation steps is a 32-round nonlinear iterative structure (round function F), and the synthetic permutation T is the core of the nonlinear iterative structure, that is, the processing efficiency of the synthetic permutation T directly determines the encryption and decryption processing performance of the algorithm. Therefore, it is necessary to optimize the synthetic permutation T processing process to improve the single-round processing performance of the encryption and decryption operation of the SM4 block cipher algorithm, and then realize the improvement of the overall encryption and decryption operation performance of the algorithm in the 32-round loop call.
[0007] In summary, the present application proposes a method and device for optimizing the encryption and decryption process of the existing SM4 block cipher algorithm to improve the performance of encryption and decryption operations of the SM4 block cipher algorithm, while taking into account practical applications in resource-constrained scenarios when selecting the solution. Summary of the invention
[0008] The present application provides an information encryption and decryption processing method and device for optimizing the existing SM4 block cipher algorithm encryption and decryption process to improve the encryption and decryption operation performance of the SM4 block cipher algorithm.
[0009] In a first aspect, the present application provides an information encryption processing method, the method comprising:
[0010] Using the input module to obtain the input plaintext input sequence X of N bits in length;
[0011] The input module is used to obtain the N / 4-bit encryption key rk used in the K-round nonlinear iteration process of the input i , where each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0012] Using the encryption processing module based on the plain text input sequence X and the encryption key rk i Perform K rounds of nonlinear iterative operations: divide the plaintext sequence X into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding encryption key rk i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0013] The output results from the K-4th round to the K-1th round are reversed using a reverse module to obtain a ciphertext output sequence encrypted by the plaintext input sequence X.
[0014] In the above method, the synthetic permutation operation in the encryption process of the SM4 block cipher algorithm is optimized, and the S3 table lookup operation is used to reduce the synthetic permutation operation steps in the SM4 block cipher algorithm encryption algorithm, thereby reducing the complexity of the SM4 block cipher algorithm encryption algorithm and improving performance.
[0015] In a second aspect, the present application provides an information decryption processing method, the method comprising:
[0016] Using the input module to obtain the input ciphertext input sequence X' of N bits in length;
[0017] The input module is used to obtain the N / 4-bit decryption key rk used in the K-round nonlinear iteration process of the input i , where each round uses a decryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0018] The decryption processing module is used based on the ciphertext input sequence X' and the decryption key rk i Perform K rounds of nonlinear iterative operations: divide the ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding decryption key rk K-1-i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0019] The output results from the K-4th round to the K-1th round are reversed by using a reverse module to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'.
[0020] In the above method, the synthetic permutation operation in the decryption process of the SM4 block cipher algorithm is optimized, and the S3 table lookup operation is used to reduce the synthetic permutation operation steps in the decryption algorithm of the SM4 block cipher algorithm, thereby reducing the complexity of the decryption algorithm of the SM4 block cipher algorithm and improving the performance.
[0021] In a third aspect, the present application provides an encryption device for information encryption processing, comprising:
[0022] An input module is used to obtain an input plaintext input sequence X of N bits in length; and an N / 4-bit encryption key rk used in the K-round nonlinear iteration process of the input. i , where each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0023] An encryption processing module is used to process the plain text input sequence X and the encryption key rk iPerform K rounds of nonlinear iterative operations: divide the plaintext sequence X into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding encryption key rk i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0024] The reverse module is used to perform reverse operations on the output results of the K-4th round to the K-1th round to obtain a ciphertext output sequence encrypted by the plaintext input sequence X.
[0025] In a fourth aspect, the present application provides a decryption device for information decryption processing, comprising:
[0026] An input module is used to obtain an input ciphertext input sequence X' of N bits in length; and an N / 4-bit decryption key rk used in the input K-round nonlinear iteration process. i , where each round uses a decryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0027] A decryption processing module is used to decrypt the encrypted text based on the sequence X' and the decryption key rk i Perform K rounds of nonlinear iterative operations: divide the ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding decryption key rk K-1-i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4; Wherein, the lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0028] The reverse module is used to perform reverse operation on the output results of the K-4th round to the K-1th round to obtain the plaintext output sequence for decrypting the ciphertext input sequence X'.
[0029] In a fifth aspect, the present application provides an encryption device for information encryption processing, the device comprising a processor and a memory, the memory being used to store an executable program, and when the executable program is executed, the processor implements the following process:
[0030] Get the input plaintext input sequence X of N bits in length;
[0031] Get the N / 4 bit encryption key rk used in the K-round nonlinear iteration process of the input i , where each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0032] Based on the plaintext input sequence X and the encryption key rk i Perform K rounds of nonlinear iterative operations: divide the plaintext sequence X into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding encryption key rk i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0033] The output results from the K-4th round to the K-1th round are reversed to obtain the ciphertext output sequence of the plaintext input sequence X.
[0034] In a sixth aspect, the present application provides a decryption device for information decryption processing, the device comprising a processor and a memory, the memory being used to store an executable program, and when the executable program is executed, the processor implements the following process:
[0035] Get the input ciphertext input sequence X' of N bits in length;
[0036] Get the N / 4-bit decryption key rk used in the K-round nonlinear iteration process of the input i , where each round uses a decryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0037] Based on the ciphertext input sequence X' and the decryption key rk i Perform K rounds of nonlinear iterative operations: divide the ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding decryption key rk K-1-i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0038] The output results from the K-4th round to the K-1th round are reversed to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'.
[0039] In addition, the technical effects brought about by any implementation method in the third to sixth aspects can refer to the technical effects brought about by the first and second aspects, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor.
[0041] Figure 1 This is a flowchart of an information encryption processing method provided in Example 1 of the present application;
[0042] Figure 2This is a flowchart of an information decryption processing method provided in Example 1 of the present application;
[0043] Figure 3 This is a block diagram of an implementation principle of the synthetic substitution T provided in Example 2 of the present application;
[0044] Figure 4 This is a schematic diagram of the structure of an encryption device for information encryption processing provided in Example 3 of the present application;
[0045] Figure 5 This is a schematic diagram of the structure of an encryption device for information encryption processing provided in Example 3 of the present application;
[0046] Figure 6 A schematic diagram of the structure of a decryption device for information decryption processing provided in Example 4 of the present application;
[0047] Figure 7 This is a schematic diagram of the structure of a decryption device for information decryption processing provided in Example 4 of the present application. DETAILED DESCRIPTION
[0048] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.
[0049] The following are explanations of some of the terms that appear in the text:
[0050] In the embodiments of the present application, the term "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.
[0051] The application scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. It is known to those skilled in the art that with the emergence of new application scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems. In the description of the present application, unless otherwise specified, the meaning of "multiple" is two or more.
[0052] The SM4 block cipher algorithm has a block length of 128 bits and a key length of 128 bits. Both the encryption and decryption algorithms and the key expansion algorithms use a 32-round nonlinear iterative structure. The encryption and decryption operation principles of the algorithm are described as follows:
[0053] (1) Input plain text:
[0054] Assume that the plaintext input is X = (X0, X1, X2, X3), the ciphertext output is Y = (Y0, Y1, Y2, Y3), and the round key is rk i (i=0, 1, 2, ..., 31), where X0, X1, X2, X3, Y0, Y1, Y2, Y3, rk i All are 32-bit data, i is the identification information of the round of nonlinear iterative transformation in the encryption process or decryption process, and the value of i is a non-negative integer less than 32;
[0055] (2) 32 rounds of nonlinear iterative transformation:
[0056] X i+4 =F(X i , X i+1 , X i+2 , X i+3 , rk i )=X i ⊕T(X i+1 ⊕X i+2 ⊕X i+3 ⊕rk i ), i=0,
[0057] 1, 2, …, 31; among which:
[0058] Synthetic permutation T: T(A)=L(τ(A)), A=(a0, a1, a2, a3), where a0~a3 are all 8-bit data, and the above F is a round function;
[0059] Linear transformation L: L(B)=B⊕(B<<<2)⊕(B<<<10)⊕(B<<<18)⊕(B<<<24), where ⊕ is an XOR operation, <<< is a circular left shift, B=(b0, b1, b2, b3)=τ(A), where b0~b3 are all 8-bit data;
[0060] Nonlinear transformation τ: τ(A)=(Sbox(a0), Sbox(a1), Sbox(a2), Sbox(a3)); Sbox() is an S-table lookup operation, where the S-table is shown in Table 1:
[0061] Table 1
[0062] 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 d6 90 e9 fe cc e1 3d b7 16 b6 14 c2 28 fb 2c 05 1 2b 67 9a 76 2a be 04 c3 aa 44 13 26 49 86 06 99 2 9c 42 50 f4 91 ef 98 7a 33 54 0b 43 ed cf ac 62 3 e4 b3 1c a9 c9 08 e8 95 80 df 94 fa 75 8f 3f a6 4 47 07 a7 fc f3 73 17 ba 83 59 3c 19 e6 85 4f a8 5 68 6b 81 b2 71 64 da 8b f8 eb 0f 4b 70 56 9d 35 6 1e 24 0e 5e 63 58 d1 a2 25 22 7c 3b 01 21 78 87 7 d4 00 46 57 9f d3 27 52 4c 36 02 e7 a0 c4 c8 9e 8 ea bf 8a d2 40 c7 38 b5 a3 f7 f2 ce f9 61 15 a1 9 e0 ae 5d a4 9b 34 1a 55 ad 93 32 30 f5 8c b1 e3 a 1d f6 e2 2e 82 66 ca 60 c0 29 23 ab 0d 53 4e 6f b d5 db 37 45 de fd 8e 2f 03 ff 6a 72 6d 6c 5b 51 c 8d 1b af 92 bb dd bc 7f 11 d9 5c 41 1f 10 5a d8 d 0a c1 31 88 a5 cd 7b bd 2d 74 d0 12 b8 e5 b4 b0 e 89 69 97 4a 0c 96 77 7e 65 b9 f1 09 c5 6e c6 84 f 18 f0 7d ec 3a dc 4d 20 79 ee 5f 3e d7 cb 39 48
[0063] The data in the above Table 1 are all expressed in hexadecimal. When the input sequence of the S-table lookup operation is "ef", the value after passing through the above S-box is the value of the e-th row and f-th column in the above Table 1, that is, when the input sequence is "ef", the output result of the S-table lookup operation is "84" in hexadecimal.
[0064] (3) The result X of the nonlinear iterative transformation from the 28th to the 31st round is 32 , X 33 , X 34 , X 35 Perform reverse operation to obtain the output sequence Y;
[0065] That is, Y=(Y0, Y1, Y2, Y3)=R(X 32 , X 33 , X 34 , X 35 )=(X 35 , X 34 , X 33 , X 32 ), where R is the reverse operation.
[0066] In the SM4 block cipher algorithm, the structure of the decryption algorithm is the same as that of the encryption algorithm, except that the order of using the round keys is reversed. The order of using the decryption keys in the 32-round nonlinear iterative transformation process is the reverse order of the order of using the encryption keys, as follows:
[0067] The order of keys used during encryption is (rk0, rk1, ..., rk 31 );
[0068] The order in which the keys are used for decryption is (rk 31 ,rk 30 ,…,rk0).
[0069] The embodiments of the present application are further described in detail below in conjunction with the drawings in the specification.
[0070] In the present application, a lookup table S3 used in performing K rounds of nonlinear iterative operations in the encryption process and the decryption process is obtained in advance according to the encryption operation principle and the decryption operation principle, and the plaintext input sequence X is encrypted based on the obtained lookup table S3 to obtain the ciphertext output sequence of the plaintext input sequence X, or the ciphertext input sequence X' is decrypted based on the obtained lookup table S3 to obtain the plaintext output sequence of the ciphertext input sequence X'.
[0071] Example 1
[0072] The present application embodiment provides an information encryption processing method, and the pre-acquired lookup table S3 can be applied to the method of the present embodiment. The method can be applied to the above-mentioned scenario of using the SM4 block cipher algorithm for encryption processing. Figure 1 As shown, the specific steps include:
[0073] Step S101: using an input module to obtain an input plaintext input sequence X of N bits in length.
[0074] Step S102: using the input module to obtain the N / 4-bit encryption key rk used in the input K-round nonlinear iteration process i , where each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1.
[0075] Step S103: using the encryption processing module to generate the plain text input sequence X and the encryption key rk i Perform K rounds of nonlinear iterative operations: divide the plaintext input sequence X into sequences X0, X1, X2, and X3 of length N / 4 bits. In the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding encryption key rk i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 Among them, the lookup table S3 generates table S0, table S1, and table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner.
[0076] As an embodiment, in step S103, according to X i+1 , X i+2 , X i+3 The corresponding encryption key rk i When the input sequence A of synthetic permutation is obtained, X i+1 , X i+2 , X i+3 With the corresponding rk i Perform an XOR operation to obtain the input sequence A of the synthetic permutation.
[0077] Step S104, using the reverse module to perform reverse operations on the output results of the K-4th round to the K-1th round to obtain a ciphertext output sequence encrypted by the plaintext input sequence X.
[0078] As an embodiment, in step S104, the output results X from the K-4th round to the K-1th round can be converted into K , X K+1 , X K+2 , X K+3 , transformed into X K+3 , X K+2 , X K+1 , X K The sequence order of , constitutes the ciphertext output sequence for encrypting the above plaintext input sequence X.
[0079] As an embodiment, in the above steps S101 to S104, N can be 128, K can be 32, S table is a table consisting of 256-byte elements, and the above lookup table S3 includes at least one sub-lookup table, and the above sub-lookup table is a table consisting of 1024-byte elements.
[0080] In the embodiment of the present application, the lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 When the SM4 block cipher algorithm encryption process is implemented using the pre-acquired lookup table S3, the first sub-lookup table S can be used. 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the sub-lookup tables are implemented; that is, during the encryption process, by querying M0S 30 +M1S 31 +M2S 32 +M3S 33 (M0≥0, M1≥0, M2≥0, M3≥0, 0<M0+M1+M2+M3<4) to complete the synthetic replacement process in the encryption process; M0 to M3 respectively represent the first sub-lookup table S queried 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 The number of q S 3q (q is 0 or 1 or 2 or 3) Characterize the use of M q Sub-lookup table S 3q Perform a table lookup operation; the sub-lookup table S 30 , S 31 , S 32 , S 33 The relationship between them will be introduced later.
[0081] As an embodiment, in step S103, the sequence A may be input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T in the following manner: A :
[0082] Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length;
[0083] Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0 through the first sub-lookup table S 30 If the sequence B1 is obtained by the table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by the second sub-table S 31 If the sequence B2 is obtained by the table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by the third sub-table S 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the table lookup operation is performed, the sequence B3 is not shifted.
[0084] As an embodiment, the sequences a0, a1, a2, and a3 are respectively input into the lookup table S3 for table lookup operation, and the sequences B0, B1, B2, and B3 of N / 4 bit length are obtained correspondingly, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A During the process, you can query the above M0S 30 +M1S 31 +M2S 32 +M3S 33 (M0≥0, M1≥0, M2≥0, M3≥0, 0<M0+M1+M2+M3<4), and obtain the synthetic permutation output sequence T A .
[0085] Several illustrative examples are given below when 0<M0+M1+M2+M3<4, where Examples A1 to A4 are examples when M0+M1+M2+M3=1, Examples B1 to B2 are examples when M0+M1+M2+M3=2, and Example C is an example when M0+M1+M2+M3=3.
[0086] Example A1: Query only the first sub-lookup table S 30
[0087] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the first sub-lookup table S respectively. 30 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, shift B1, B2, B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits;
[0088] Example A2: Only query the second sub-lookup table S 31
[0089] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the second sub-lookup table S respectively. 31 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B2, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by 3N / 16 bits, B2 is circularly shifted left by N / 16 bits, and B3 is circularly shifted left by N / 8 bits;
[0090] Example A3: Only query the third sub-lookup table S 32
[0091] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the third sub-lookup table S respectively. 32 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 8 bits, B1 is circularly shifted left by 3N / 16 bits, and B3 is circularly shifted left by N / 16 bits;
[0092] Example A4: Only query the fourth sub-lookup table S 33
[0093] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the fourth sub-lookup table S respectively. 33 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B2 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 16 bits, B1 is circularly shifted left by N / 8 bits, and B2 is circularly shifted left by 3N / 16 bits.
[0094] Example B1: Query only two identical sub-lookup tables
[0095] Optionally, when querying two first sub-lookup tables S at the same time 30 When (M0=2, M1=0, M2=0, M3=0), the sequence a0 and the sequence a1 are input into the two first sub-lookup tables S respectively. 30 , corresponding to the N / 4 bit length sequence B0 and sequence B1, and then input sequence a2 and sequence a3 into the two first sub-lookup tables S respectively 30 , corresponding to the N / 4-bit length sequence B2 and sequence B3, shift and XOR operation of B1, B2, B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits.
[0096] It can be understood that when the two second sub-lookup tables S are queried simultaneously 31 , the third sub-lookup table S 32 And the fourth sub-lookup table S 33 The principle is the same as the above query two first sub-lookup tables S 30 Similarly, the corresponding shift operations can be referred to Examples A2-A4, which will not be described again here.
[0097] Example B2: Querying only two different sub-lookup tables
[0098] Optionally, when simultaneously querying the first sub-lookup table S 30 And the third sub-lookup table S 32 When (M0=1, M1=0, M2=1, M3=0), the sequence a0 is input into the first sub-lookup table S 30 , and at the same time input sequence a2 into the third sub-lookup table S 32 , corresponding to the N / 4 bit length sequence B0 and sequence B2, and then input sequence a1 into the first sub-lookup table S 30 , and at the same time input sequence a3 into the third sub-lookup table S 32 , corresponding to the N / 4-bit length sequence B1 and sequence B3, shift B1 and B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, and B3 is circularly shifted left by N / 16 bits.
[0099] Optionally, when simultaneously querying the first sub-lookup table S 30 and the second sub-lookup table S 31 When (i.e., M0=1, M1=1, M2=0, M3=0), the principle is the same as above, and the first sub-lookup table S is queried simultaneously. 30 And the third sub-lookup table S32 Similarly, the sequence a0 is input into the first sub-lookup table S 30 , and input sequence a1 into the first sub-lookup table S 31 , corresponding to the N / 4 bit length sequence B0 and sequence B1, and then input sequence a2 into the first sub-lookup table S 30 , and at the same time input sequence a3 into the second sub-lookup table S 31 , corresponding to the N / 4-bit length sequence B2 and sequence B3, shift B2 and B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by N / 8 bits.
[0100] It can be understood that the above only illustrates two cases in the combination of simultaneously querying two different sub-lookup tables, and the principles of other combinations are similar. The corresponding shifts can refer to examples A1-A4, which will not be repeated here.
[0101] Example C: Query three sub-lookup tables
[0102] The three sub-lookup tables queried in this example can be sub-lookup tables of the same type, or sub-lookup tables of different types. For example, the three sub-lookup tables are a first sub-lookup table S 30 and two second sub-lookup tables S 31 , or three sub-lookup tables are three fourth sub-lookup tables S 33 , or three sub-lookup tables as a second sub-lookup table S 31 , a third sub-lookup table S 32 and a fourth sub-lookup table S 33 wait.
[0103] When specifically querying, two input sequences among the synthetic permutation input sequences a0, a1, a2, and a3 can be grouped together, and the other two input sequences can be grouped separately. The three groups of input sequences can be input into three sub-lookup tables for query.
[0104] It should be noted that when four sub-lookup tables are used simultaneously during the encryption process, resource usage will increase significantly. Therefore, it is not recommended to use four sub-lookup tables for the encryption process simultaneously in this application. The following are only several exemplary examples when M0+M1+M2+M3=4:
[0105] Example D1: Query only four identical sub-lookup tables
[0106] Optionally, when four first sub-lookup tables S are queried simultaneously 30When (i.e., M0=4, M1=0, M2=0, M3=0), the sequence a0, sequence a1, sequence a2, and sequence a3 are simultaneously input into the four first sub-lookup tables S 30 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, shift B1, B2, B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits;
[0107] It can be understood that when four second sub-lookup tables S are queried simultaneously 31 , the third sub-lookup table S 32 And the fourth sub-lookup table S 33 The principle is the same as the above query four first sub-lookup tables S 30 Similarly, the corresponding shift operations can be referred to Examples A2-A4, which will not be described in detail here.
[0108] Example D2: Query two groups with four sub-lookup tables, where the two sub-lookup tables within a group are the same and the sub-lookup tables between groups are different
[0109] Optionally, when simultaneously querying the first group of two first sub-lookup tables S 30 and the second set of two third sub-lookup tables S 32 When (M0=2, M1=0, M2=2, M3=0), the sequence a0 and the sequence a1 are input into the first two first sub-lookup tables S respectively. 30 , corresponding to the N / 4 bit length sequence B0, sequence B1, and at the same time, the sequence a2, sequence a3 are respectively input into the second group of two third sub-lookup tables S 32 , corresponding to the N / 4-bit length sequence sequence B2, sequence B3, shift B1, B3 and XOR operation to obtain the N / 4-bit length of the synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, and B3 is circularly shifted left by N / 16 bits.
[0110] Example D3: Querying four different sub-lookup tables
[0111] When the first sub-lookup table S is queried simultaneously 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 And the fourth sub-lookup table S 33 When (i.e., M0=1, M1=1, M2=1, M3=1), the sequence a0, sequence a1, sequence a2, and sequence a3 are input into the first sub-lookup table S respectively. 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32And the fourth sub-lookup table S 33 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, B0, B1, B2, B3 are XORed to obtain the N / 4-bit length synthetic permutation output sequence T A , among which B0, B1, B2, and B3 are not shifted.
[0112] Specifically, the differences and advantages of the above encryption processing method over the traditional SM4 block cipher algorithm encryption processing process are as follows:
[0113] A. From the protocol level, the software implementation of the traditional SM4 block cipher algorithm encryption processing needs to define a 256-byte S-box (for inputting an 8-bit sequence and outputting an 8-bit sequence). The software implementation of the present application only needs to define a 1024-byte S-box (for inputting an 8-bit sequence and outputting a 32-bit sequence) during encryption processing. Although the hardware resources occupied are increased, the protocol implementation can reduce one cyclic shift and one XOR processing operation, and the performance is improved.
[0114] B. From the implementation perspective, the traditional SM4 block cipher algorithm encryption is implemented with 8-bit input and 8-bit output when performing S-box table lookup. For a 32-bit encryption platform, before performing S-box table lookup, it is first necessary to convert the 32-bit sequence into 4 8-bit sequences, and then perform table lookup on the 4 8-bit sequences, and output 4 8-bit sequences from the table lookup. Then, it is necessary to merge the 4 8-bit sequences output by the table lookup into a 32-bit sequence through loop operations, AND operations, and OR operations for subsequent operations. The S-box structure provided in the present application is an S-box that inputs an 8-bit sequence and outputs a 32-bit sequence. Therefore, after four table lookups, since its output is a 32-bit sequence, the conversion process from an 8-bit sequence to a 32-bit sequence is not involved, reducing multiple steps of loop operations, AND operations, and OR operations, thereby improving performance.
[0115] In the embodiment of the present application, a method for information decryption processing is provided. The pre-acquired lookup table S3 can be applied to the method of the present embodiment. The method can be applied to the above-mentioned scenario of using the SM4 block cipher algorithm for decryption processing, such as Figure 2 As shown, the specific steps include:
[0116] Step S201: using an input module to obtain an input ciphertext input sequence X' of N bits in length.
[0117] Step S202: using the input module to obtain the N / 4-bit length decryption key rk used in the input K-round nonlinear iteration process i, where each round uses a decryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1.
[0118] Step S203: using the decryption processing module to input the ciphertext sequence X' and the decryption key rk i Perform K rounds of nonlinear iterative operations: divide the above ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length. In the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding decryption key rk K-1-i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Among them, the above-mentioned lookup table S3 generates table S0, table S1, and table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner.
[0119] As an embodiment, in step S203, according to X i+1 , X i+2 , X i+3 The corresponding decryption key rk K-1-i When the input sequence A of synthetic permutation is obtained, X i+1 , X i+2 , X i+3 With the corresponding rk K-1-i Perform an XOR operation to obtain the input sequence A of the synthetic permutation.
[0120] Step S204, using a reverse module to perform reverse operations on the output results of the K-4th round to the K-1th round to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'.
[0121] As an embodiment, in the above steps S201 to S204, N can be 128, K can be 32, S table is a table consisting of 256-byte elements, and the above lookup table S3 includes at least one sub-lookup table, and the above sub-lookup table is a table consisting of 1024-byte elements.
[0122] In the embodiment of the present application, the lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33When the decryption process of the SM4 block cipher algorithm is implemented using the pre-acquired lookup table S3, the first sub-lookup table S can be used. 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the sub-lookup tables are implemented; that is, in the decryption process, the embodiment of the present application queries the above-mentioned M0S 30 +M1S 31 +M2S 32 +M3S 33 (M0≥0, M1≥0, M2≥0, M3≥0, 0<M0+M1+M2+M3<4) to complete the synthetic replacement process in the decryption process; wherein the sub-lookup table S 30 , S 31 , S 32 , S 33 The relationship between the encryption processing method and the neutron lookup table S 30 , S 31 , S 32 , S 33 The relationship between them is the same.
[0123] As an embodiment, in step S203, the sequence A may be input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T: A :
[0124] Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length;
[0125] Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0, by the first sub-lookup table S 30 If the sequence B1 is obtained by performing a table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by performing a table lookup operation ... 31 If the sequence B2 is obtained by performing a table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by performing a table lookup operation ... 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33If the sequence B3 is obtained by performing a table lookup operation, no shift processing is performed on the sequence B3.
[0126] As an embodiment, during the decryption process, the sequences a0, a1, a2, and a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, B1, B2, and B3 with a length of N / 4 bits are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XOR-operated to obtain the synthetic permutation output sequence T A For the specific implementation of the process, reference can be made to the contents of Examples A1 to A4, Examples B1 to B2 and Example C in the above encryption process, which will not be repeated here.
[0127] Specifically, the differences and advantages of the above decryption processing method over the traditional SM4 block cipher algorithm decryption processing process are as follows:
[0128] A. From the protocol level, the software implementation of the traditional SM4 block cipher algorithm decryption processing needs to define a 256-byte S-box (for inputting an 8-bit sequence and outputting an 8-bit sequence). The software implementation of the present application only needs to define a 1024-byte S-box (for inputting an 8-bit sequence and outputting a 32-bit sequence) during the decryption processing. Although the hardware resources occupied are increased, the protocol implementation can reduce one cyclic shift and one XOR processing operation, and the performance is improved.
[0129] B. From an implementation perspective, the traditional SM4 block cipher algorithm decryption is implemented with 8-bit input and 8-bit output when performing S-box table lookup. For a 32-bit decryption platform, before performing S-box table lookup, the 32-bit sequence needs to be converted into 4 8-bit sequences, and then a table lookup is performed for the 4 8-bit sequences, and the table lookup outputs 4 8-bit sequences. Then, the 4 8-bit sequences output by the table lookup need to be combined into a 32-bit sequence through loop operations, AND operations, and OR operations for subsequent operations. The S-box structure provided in the present application is an S-box that inputs an 8-bit sequence and outputs a 32-bit sequence. Therefore, after four table lookups, since its output is a 32-bit sequence, the conversion process from an 8-bit sequence to a 32-bit sequence does not involve, thereby reducing multiple steps of loop operations, AND operations, and OR operations, thereby improving performance.
[0130] In the encryption process of the above steps S101 to S104 and the decryption process of the above steps S201 to S204, when obtaining the lookup table S3, firstly, according to the synthetic permutation characteristics in the encryption algorithm and decryption algorithm of the SM4 block cipher algorithm, the S0 transformation, S1 transformation, and S2 transformation reflecting the bit transformation relationship between the synthetic permutation input sequence and the output sequence are determined, and then the device that can be applied to the encryption processing and the device that can be applied to the decryption processing are synthesized according to the S0 transformation, S1 transformation, and S2 transformation. Table S0, table S1, and table S2 are synthesized, and then the lookup table S3 is synthesized according to table S0, table S1, and table S2. This is described in detail below:
[0131] (I) Based on the synthetic permutation characteristics in the SM4 block cipher encryption and decryption algorithms, determine the bit transformation relationship between the synthetic permutation input sequence and the output sequence:
[0132] Step 1) dividing the 32-bit lookup table output sequence B into 8-bit sequences b0, b1, b2, b3;
[0133] Among them, when the traditional SM4 block cipher algorithm is used for encryption or decryption, since B = τ(A), b0, b1, b2, and b3 are the S-box query results of the synthetic permutation input sequences a0, a1, a2, and a3, that is, b0 = Sbox(a0), b1 = Sbox(a1), b2 = Sbox(a2), and b3 = Sbox(a3);
[0134] The sequence A is a synthetic permuted input sequence of 32 bits in length, and the input sequences a0, a1, a2, and a3 are sequences of A divided according to 8 bits in length;
[0135] in:
[0136] b0={bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0};
[0137] b1={bit15, bit14, bit13, bit12, bit11, bit10, bit9, bit8};
[0138] b2={bit23, bit22, bit21, bit20, bit19, bit18, bit17, bit16};
[0139] b3={bit31, bit30, bit29, bit28, bit27, bit26, bit25, bit24}.
[0140] In this embodiment, each bitj (j is an integer from 0 to 31) represents a bit;
[0141] In this embodiment, the above sequence B is represented in simplified bit form as shown in Table 2 below:
[0142] Table 2
[0143] 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[0144] In this embodiment, the result of cyclically shifting the above sequence B by 2 bits (B<<<2) in simplified bit form is shown in Table 3 below:
[0145] Table 3
[0146] 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 31 30
[0147] In this embodiment, the result of cyclically shifting the above sequence B by 10 bits (B<<<10) in simplified bit form is shown in Table 4 below:
[0148] Table 4
[0149] 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 31 30 29 28 27 26 25 24 23 22
[0150] In this embodiment, the above sequence B is cyclically shifted to the left by 18 bits (B<<<18) in simplified bit form as shown in Table 5 below:
[0151] Table 5
[0152] 13 12 11 10 9 8 7 6 5 4 3 2 1 0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14
[0153] In this embodiment, the above sequence B is represented by cyclic left shift of 24 bits (B<<<24) in simplified bit form as shown in Table 6 below:
[0154] Table 6
[0155] 7 6 5 4 3 2 1 0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8
[0156] Step 2) Circular shift and XOR on B to obtain L B ;
[0157] Where L B =B⊕(B<<<2)⊕(B<<<10)⊕(B<<<18)⊕(B<<<24). In this embodiment, the above sequence is represented in simplified bit form as shown in Table 7 below, where each column corresponds to each bit and performs an XOR operation:
[0158] Table 7
[0159] 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 31 30 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 31 30 29 28 27 26 25 24 23 22 13 12 11 10 9 8 7 6 5 4 3 2 1 0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 7 6 5 4 3 2 1 0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8
[0160] Step 3) L B Classify the bits b0, b1, b2, and b3 to obtain the simplified L BAs shown in Table 8 below:
[0161] Among them, due to L B In order to perform cyclic shift and XOR only on B, the L represented in simplified bit form is B Each bit in L is the corresponding bit in B, so L B Classify the bits b0, b1, b2, and b3 to obtain the transformed simplified bit form L B express;
[0162] Table 8
[0163]
[0164] Step 4) The transformed simplified bit form of L B Perform analysis to obtain the transformations corresponding to each row of b0, b1, b2, and b3;
[0165] Among them, for b0={bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0}, it includes the following three transformations about the bits:
[0166] Table 9
[0167]
[0168] Table 10
[0169] 5 4 3 2 1 0 7 6
[0170] Table 11
[0171]
[0172] For b1={bit15, bit14, bit13, bit12, bit11, bit10, bit9, bit8}, it includes the following three transformations on the bits:
[0173] Table 12
[0174] 13 12 11 10 9 8 15 14
[0175] Table 13
[0176]
[0177] Table 14
[0178]
[0179] For b2={bit23, bit22, bit21, bit20, bit19, bit18, bit17, bit16}, it includes the following three transformations on the bits:
[0180] Table 15
[0181] 21 20 19 18 17 16 23 22
[0182] Table 16
[0183]
[0184] Table 17
[0185]
[0186] For b3={bit31, bit30, bit29, bit28, bit27, bit26, bit25, bit24}, it includes the following three transformations on the Bit position:
[0187] Table 18
[0188]
[0189] Table 19
[0190]
[0191] Table 20
[0192] 29 28 27 26 25 24 31 30
[0193] Step 5) Analyze the three transformations corresponding to b0, b1, b2, and b3 to obtain the transformations performed on the bits in each byte of b0, b1, b2, and b3;
[0194] Through analysis, it can be seen that the three transformations performed on the bits in each byte of b0, b1, b2, and b3 are exactly the same in form, including the following S0 transformation, S1 transformation, and S2 transformation;
[0195] The above S0 transformation, S1 transformation, and S2 transformation are as follows: Table 21, Table 22, and Table 23 respectively;
[0196] Table 21
[0197]
[0198] Table 22
[0199] 5 4 3 2 1 0 7 6
[0200] Table 23
[0201]
[0202] According to the above S0 transformation, S1 transformation, and S2 transformation, we can know that the above L B The transformation layout corresponding to each byte of b0, b1, b2, and b3 is as shown in Table 24:
[0203] Table 24
[0204] <![CDATA[b3]]> <![CDATA[S2]]> <![CDATA[S0]]> <![CDATA[S1]]> <![CDATA[S1]]> <![CDATA[b2]]> <![CDATA[S1]]> <![CDATA[S2]]> <![CDATA[S0]]> <![CDATA[S1]]> <![CDATA[b1]]> <![CDATA[S1]]> <![CDATA[S1]]> <![CDATA[S2]]> <![CDATA[S0]]> <![CDATA[b0]]> <![CDATA[S0]]> <![CDATA[S1]]> <![CDATA[S1]]> <![CDATA[S2]]>
[0205] (II) Obtaining Tables S0, S1, and S2 Reflecting the Bit Transformation Relationships between the Synthetic Permutation Input Sequence and the Output Sequence
[0206] According to the S0 transformation, S1 transformation, and S2 transformation obtained in (a) above, tables S0, S1, and S2 for corresponding transformations of the bytes in the S box are obtained;
[0207] Since the above-mentioned S0 transformation, S1 transformation, and S2 transformation are all transformations of the corresponding bits of each byte b0, b1, b2, and b3, and b0, b1, b2, and b3 correspond to the table lookup outputs of a0, a1, a2, and a3 for Sbox (S box), if each byte in the Sbox table is subjected to the corresponding S0 transformation, S1 transformation, and S2 transformation, and a0, a1, a2, and a3 are searched, the corresponding transformed results of b0, b1, b2, and b3 can be obtained, and each byte in the Sbox table is subjected to the corresponding S0 transformation, S1 transformation, and S2 transformation, and its outputs correspond to table S0, table S1, and table S2 respectively;
[0208] That is, the 8 bits of each element in the preset S-box are subjected to the preset S0 transformation to generate the 8 bits of a corresponding element in the table S0;
[0209] Performing a preset S1 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S1;
[0210] Performing a preset S2 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S2;
[0211] The 8-bit values of each element in the above S-box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, and the 8-bit values of the elements in the corresponding table S0 are bit7, bit6, bit5, bit4, bit3, bit2, bit7⊕bit1, bit6⊕bit0, and the 8-bit values of the elements in the corresponding table S1 are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, and the 8-bit values of the elements in S2 are bit7⊕bit5, bit6⊕bit4, bit5⊕bit3, bit4⊕bit2, bit3⊕bit1, bit2⊕bit0, bit1, bit0;
[0212] Each of the above bitp (p is an integer from 0 to 7) represents a bit.
[0213] For the specific contents of the above Table S0, Table S1, and Table S2, please refer to the following Table 25, Table 26, and Table 27 respectively:
[0214] Table 25
[0215] 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 d5 92 ea fd cf e2 3d b5 16 b4 14 c1 28 f8 2c 05 1 2b 66 98 77 2a bc 04 c0 a8 45 13 26 48 84 06 9b 2 9e 43 51 f7 93 ec 9a 7b 33 55 0b 42 ee cc ae 63 3 e7 b1 1c ab ca 08 eb 97 82 dc 96 f9 74 8d 3f a4 4 46 07 a5 ff f0 72 17 b8 81 58 3c 19 e5 87 4e aa 5 69 6a 83 b0 70 65 d9 89 fb e8 0f 4a 71 57 9f 35 6 1e 24 0e 5f 62 59 d2 a0 25 22 7d 3b 01 21 79 85 7 d7 00 47 56 9d d0 27 53 4d 36 02 e4 a2 c7 cb 9c 8 e9 bd 88 d1 41 c4 38 b7 a1 f4 f1 cd fa 60 15 a3 9 e3 ac 5c a6 99 34 1a 54 af 91 32 30 f6 8e b3 e0 a 1d f5 e1 2e 80 67 c9 61 c3 29 23 a9 0d 52 4f 6e b d6 d8 37 44 dd fe 8c 2f 03 fc 6b 73 6c 6d 5a 50 c 8f 1b ad 90 b9 de be 7e 11 da 5d 40 1f 10 5b db d 0a c2 31 8a a7 ce 7a bf 2d 75 d3 12 ba e6 b6 b2 e 8b 68 95 4b 0c 94 76 7f 64 bb f2 09 c6 6f c5 86 f 18 f3 7c ef 3a df 4c 20 78 ed 5e 3e d4 c8 39 49
[0216] Table 26
[0217] 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 5b 42 a7 fb 33 87 f4 de 58 da 50 0b a0 ef b0 14 1 ac 9d 6a d9 a8 fa 10 0f aa 11 4c 98 25 1a 18 66 2 72 09 41 d3 46 bf 62 e9 cc 51 2c 0d b7 3f b2 89 3 93 ce 70 a6 27 20 a3 56 02 7f 52 eb d5 3e fc 9a 4 1d 1c 9e f3 cf cd 5c ea 0e 65 f0 64 9b 16 3d a2 5 a1 ad 06 ca c5 91 6b 2e e3 af 3c 2d c1 59 76 d4 6 78 90 38 79 8d 61 47 8a 94 88 f1 ec 04 84 e1 1e 7 53 00 19 5d 7e 4f 9c 49 31 d8 08 9f 82 13 23 7a 8 ab fe 2a 4b 01 1f e0 d6 8e df cb 3b e7 85 54 86 9 83 ba 75 92 6e d0 68 55 b6 4e c8 c0 d7 32 c6 8f a 74 db 8b b8 0a 99 2b 81 03 a4 8c ae 34 4d 39 bd b 57 6f dc 15 7b f7 3a bc 0c ff a9 c9 b5 b1 6d 45 c 36 6c be 4a ee 77 f2 fd 44 67 71 05 7c 40 69 63 d 28 07 c4 22 96 37 ed f6 b4 d1 43 48 e2 97 d2 c2 e 26 a5 5e 29 30 5a dd f9 95 e6 c7 24 17 b9 1b 12 f 60 c3 f5 b3 e8 73 35 80 e5 bb 7d f8 5f 2f e4 21
[0218] Table 27
[0219] 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 8e d0 4d 06 fc 65 c9 6b 4e 6e 44 ca 88 17 9c 11 1 87 fb f2 ae 82 46 14 cf 02 54 5f be 6d 9e 1e fd 2 ec 4a 10 24 d5 53 f8 92 ff 04 27 4f 59 f3 1c ea 3 74 7f 6c 0d ed 28 48 c1 80 a3 c4 12 a1 b3 c3 3e 4 5b 1b 3b 0c 3f bf 4b 52 8f 3d cc 7d e 91 73 08 5 c8 c7 85 7a b5 f4 b2 a7 18 47 33 67 b0 0e e9 e1 6 66 b4 36 26 ef 38 95 2a b1 aa 8c d7 05 a5 98 9b 7 84 00 5e 0b e3 9f bb 1a c ee 0a 7b 20 d4 e8 e6 8 42 43 a2 9a 40 db d8 61 2f 2b 3a f6 1d e5 41 25 9 60 16 29 34 f7 e4 72 01 19 df fa f0 21 bc 75 6f a 69 2e 6a 96 8a fe e2 e0 c0 8d af 07 39 1f 76 d3 b 81 b7 eb 51 a6 09 b6 93 0f 03 c2 ba d9 dc 37 15 c b9 77 13 da 57 a9 4c 83 55 bd 2c 45 63 50 32 b8 d 22 c5 f5 a8 31 f9 97 49 99 a4 90 5a 58 71 64 70 e ad cd cb 62 3c ce ab 86 f1 5d 35 2d d1 d6 de 94 f 78 30 89 5c d2 ac 79 a0 9d 56 23 c6 8b e7 dd 68
[0220] The data in the above Table 25, Table 26 and Table 27 are all expressed in hexadecimal.
[0221] (III) Obtaining Lookup Table S3 Based on Table S0, Table S1, and Table S2
[0222] Optionally, the table S0, the table S1, and the table S2 are combined in a preset manner to obtain a lookup table S3;
[0223] The above-mentioned combination of Table S0, Table S1, and Table S2 in a preset manner to obtain the lookup table S3 includes:
[0224] Combine table S0, table S1, table S2 in the order of table S0, table S1, table S1, table S2 to obtain the first sub-lookup table S 30 ; and / or
[0225] Combine table S0, table S1, table S2 in the order of table S1, table S1, table S2, table S0 to obtain the second sub-lookup table S 31 ; and / or
[0226] Combine table S0, table S1, table S2 in the order of table S1, table S2, table S0, table S1 to obtain the third sub-lookup table S 32 ; and / or
[0227] Combine table S0, table S1, table S2 in the order of table S2, table S0, table S1, table S1 to obtain the fourth sub-lookup table S 33 .
[0228] The lookup table S3 may include the first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 When using the pre-acquired lookup table S3 to implement the SM4 block cipher algorithm encryption process and decryption process, the first sub-lookup table S can be used 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the sub-lookup tables in the encryption process and the decryption process are implemented; that is, in the encryption process and the decryption process, by querying the above-mentioned MOS 30 +M1S 31 +M2S 32 +M3S 33 The synthetic replacement processing in the encryption process and the decryption process is completed in the manner of (M0≥0, M1≥0, M2≥0, M3≥0, 0<M0+M1+M2+M3<4).
[0229] The above-mentioned tables S0, S1 and S2 are all lookup tables with 8-bit input and 8-bit output, and the first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 They are all lookup tables with 8-bit input and 32-bit output. The first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Each table consists of 1024-byte elements.
[0230] Table 28 below gives the first sub-lookup table S 30 The specific content of the other second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33The only difference is the combination of S0, Table S1, and Table S2, and the specific tables are not given here.
[0231] Table 28
[0232] 0 1 2 ...... e f 0 d55b5b8e 924242d0 eaa7a74d ...... 2cb0b09c 05141411 1 2bacac87 669d9dfb 986a6af2 ...... 0618181e 9b6666fd 2 9e7272ec 4309094a 51414110 ...... aeb2b21c 638989ea 3 e7939374 b1cece7f 1c70706c ...... 3ffcfcc3 a49a9a3e 4 461d1d5b 071c1c1b a59e9e3b ...... 4e3d3d73 aaa2a208 5 69a1 a1c8 6aadadc7 83060685 ...... 9f7676e9 35d4d4e1 6 1e787866 249090b4 0e383836 ...... 79e1e198 851e1e9b 7 d7535384 00000000 4719195e ...... cb2323e8 9c7a7ae6 8 e9abab42 bdfefe43 882a2aa2 ...... 15545441 a3868625 9 e3838360 acbaba16 5c757529 ...... b3c6c675 e08f8f6f a 1d747469 f5dbdb2e e18b8b6a ...... 4f393976 6ebdbdd3 b d6575781 d86f6fb7 37dcdceb ...... 5a6d6d37 50454515 c 8f3636b9 1b6c6c77 adbebe13 ...... 5b696932 db6363b8 d 0a282822 c20707c5 31c4c4f5 ...... b6d2d264 b2c2c270 e 8b2626ad 68a5a5cd 955e5ecb ...... c51b1bde 86121294 f 18606078 f3c3c330 7cf5f589 ...... 39e4e4dd 49212168
[0233] The data in the above Table 28 are all expressed in hexadecimal.
[0234] Example 2
[0235] Based on the above embodiment 1, the embodiment of the present application provides a process of performing a synthetic permutation T operation in the encryption process or decryption process of the SM4 block cipher algorithm by querying the lookup table S3, wherein the above lookup table S3 is obtained by the first lookup table S1 obtained in the above embodiment 1. 30 constitute:
[0236] like Figure 3 As shown, it is a block diagram of an implementation principle of the synthetic permutation T, which includes a first sub-lookup table S 30 , sequence A = (a0, a1, a2, a3) is used as the input sequence of synthetic permutation T, T (A) is used as the output sequence of synthetic permutation T, where A is 32-bit data, a0, a1, a2 and a3 are all 8-bit data, and the specific implementation steps of synthetic permutation T are as follows:
[0237] Step S301: 8-bit data a0, a1, a2 and a3 are compared with the first sub-lookup table S 30 The table lookup operation is divided into four rounds, including:
[0238] First round S 30 Look up the table and perform S for a0 30 Look up the table and the output is B0;
[0239] Second round S 30 Look up the table and perform S on a1 30 Look up the table and the output is B1;
[0240] The third round 30 Look up the table and perform S on a2 30 Look up the table and the output is B2;
[0241] Fourth round S 30 Look up the table and perform S for a3 30 Look up the table and the output is B3;
[0242] Step S302, the table lookup result is formed into T according to B0⊕(B1<<<8)⊕(B2<<<16)⊕(B3<<<24) A , which is the output of the synthetic permutation T.
[0243] Example 3
[0244] like Figure 4 As shown, based on the same inventive concept, an embodiment of the present application provides an encryption device for information encryption processing, the device comprising:
[0245] Input module 401 is used to obtain an input plain text input sequence X of N bits in length; and to obtain an N / 4 bit encryption key rk used in the input K rounds of nonlinear iterations. i , where each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0246] Encryption processing module 402, used to process the plain text input sequence X and encryption key rk based on the plain text input sequence X and encryption key rk. i Perform K rounds of nonlinear iterative operations: divide the plaintext sequence X into sequences X0, X1, X2, and X3 of length N / 4 bits. In the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding encryption key rk i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the above-mentioned lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0247] The reverse module 403 is used to perform reverse operations on the output results of the K-4th round to the K-1th round to obtain the ciphertext output sequence encrypted by the plaintext input sequence X.
[0248] As an embodiment, the above N may be 128, K may be 32, the S table may be a table consisting of 256-byte elements, the above lookup table S3 may include at least one sub-lookup table, and the above sub-lookup table may be a table consisting of 1024-byte elements.
[0249] As an embodiment, the above-mentioned lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where:
[0250] The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2;
[0251] The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0;
[0252] The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1;
[0253] Fourth sub-lookup table S 33 It is obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, and Table S1.
[0254] As an embodiment, the encryption processing module 402 is specifically configured to convert X i+1 , X i+2 , X i+3 With the corresponding rk i Perform an XOR operation to obtain the input sequence A of the synthetic permutation.
[0255] As an embodiment, the encryption processing module 402 is specifically used to divide the sequence A into a sequence a0, a sequence a1, a sequence a2, and a sequence a3 with a length of N / 16 bits;
[0256] Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0 through the first sub-lookup table S 30 If the sequence B1 is obtained by the table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by the second sub-table S 31 If the sequence B2 is obtained by the table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by the third sub-table S 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the table lookup operation is performed, the sequence B3 is not shifted.
[0257] As an embodiment, the encryption processing module 402 is specifically used to input the sequence a0, sequence a1, sequence a2, and sequence a3 into the first sub-lookup table S30 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, shift B1, B2, B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits; or
[0258] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the second sub-lookup table S respectively. 31 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B2, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is cyclically shifted left by 3N / 16 bits, B2 is cyclically shifted left by N / 16 bits, and B3 is cyclically shifted left by N / 8 bits; or
[0259] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the third sub-lookup table S respectively. 32 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 8 bits, B1 is circularly shifted left by 3N / 16 bits, and B3 is circularly shifted left by N / 16 bits; or
[0260] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the fourth sub-lookup table S respectively. 33 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B2 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 16 bits, B1 is circularly shifted left by N / 8 bits, and B2 is circularly shifted left by 3N / 16 bits.
[0261] As an embodiment, when constructing the lookup table S3, the table S0, the table S1, and the table S2 are obtained in the following manner, including:
[0262] Performing a preset S0 transformation on the 8 bits of each element in the preset S-box to generate the 8 bits of a corresponding element in the table S0;
[0263] Performing a preset S1 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S1;
[0264] Performing a preset S2 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S2;
[0265] The 8-bit values of each element in the above S-box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, and the corresponding 8-bit values of the elements in table S0 are bit7, bit6, bit5, bit4, bit3, bit2, bit7⊕bit1, bit6⊕bit0, and the corresponding 8-bit values of the elements in table S1 are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, and the corresponding 8-bit values of the elements in S2 are bit7⊕bit5, bit6⊕bit4, bit5⊕bit3, bit4⊕bit2, bit3⊕bit1, bit2⊕bit0, bit1, bit0.
[0266] As an embodiment, the reverse module 403 is specifically used to convert the output results X from the K-4th round to the K-1th round K , X K+1 , X K+2 , X K+3 , transformed into X K+3 , X K+2 , X K+1 , X K The sequence order of , constitutes the ciphertext output sequence for encrypting the above input sequence X.
[0267] like Figure 5 As shown, based on the same inventive concept, an embodiment of the present application provides an information encryption device, which includes a processor 501 and a memory 502, wherein the memory 502 is used to store an executable program. When the executable program is executed, the processor 501 implements the following process:
[0268] Get the input plaintext input sequence X of N bits in length;
[0269] Get the N / 4 bit encryption key rk used in the K-round nonlinear iteration process of the input i , where each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0270] Based on the above plaintext input sequence X and encryption key rk i Perform K rounds of nonlinear iterative operations: divide the plaintext input sequence X into sequences X0, X1, X2, and X3 of length N / 4 bits. In the i-th round of nonlinear iterative operations, according to X i+1 , Xi+2 , X i+3 The corresponding encryption key rk i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the above-mentioned lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0271] The output results from the K-4th round to the K-1th round are reversed to obtain the ciphertext output sequence encrypted by the above plaintext input sequence X.
[0272] As an embodiment, N may be 128, K may be 32, S table may be a table consisting of 256-byte elements, and the above-mentioned lookup table S3 includes at least one sub-lookup table, and the above-mentioned sub-lookup table may be a table consisting of 1024-byte elements.
[0273] As an embodiment, the above-mentioned lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where:
[0274] The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2;
[0275] The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0;
[0276] The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1;
[0277] Fourth sub-lookup table S 33 It is obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, and Table S1.
[0278] As an embodiment, the processor 501 is specifically configured to convert X i+1 , X i+2 , X i+3With the corresponding rk i Perform an XOR operation to obtain the input sequence A of the synthetic permutation.
[0279] As an embodiment, the processor 501 is specifically configured to divide the sequence A into a sequence a0, a sequence a1, a sequence a2, and a sequence a3 with a length of N / 16 bits;
[0280] Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0 through the first sub-lookup table S 30 If the sequence B1 is obtained by the table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by the second sub-table S 31 If the sequence B2 is obtained by the table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by the third sub-table S 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the table lookup operation is performed, the sequence B3 is not shifted.
[0281] As an embodiment, the processor 501 is specifically configured to input the sequence a0, the sequence a1, the sequence a2, and the sequence a3 into the first sub-lookup table S respectively. 30 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, shift B1, B2, B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits; or
[0282] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the second sub-lookup table S respectively. 31 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B2, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is cyclically shifted left by 3N / 16 bits, B2 is cyclically shifted left by N / 16 bits, and B3 is cyclically shifted left by N / 8 bits; or
[0283] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the third sub-lookup table S respectively. 32, corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 8 bits, B1 is circularly shifted left by 3N / 16 bits, and B3 is circularly shifted left by N / 16 bits; or
[0284] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the fourth sub-lookup table S respectively. 33 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B2 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 16 bits, B1 is circularly shifted left by N / 8 bits, and B2 is circularly shifted left by 3N / 16 bits.
[0285] As an embodiment, when constructing the lookup table S3, the table S0, the table S1, and the table S2 are obtained in the following manner, including:
[0286] Performing a preset S0 transformation on the 8 bits of each element in the preset S-box to generate the 8 bits of a corresponding element in the table S0;
[0287] Performing a preset S1 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S1;
[0288] Performing a preset S2 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S2;
[0289] The 8-bit values of each element in the above S-box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, and the corresponding 8-bit values of the elements in table S0 are bit7, bit6, bit5, bit4, bit3, bit2, bit7⊕bit1, bit6⊕bit0, and the corresponding 8-bit values of the elements in table S1 are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, and the corresponding 8-bit values of the elements in S2 are bit7⊕bit5, bit6⊕bit4, bit5⊕bit3, bit4⊕bit2, bit3⊕bit1, bit2⊕bit0, bit1, bit0.
[0290] As an embodiment, the processor 501 is specifically configured to convert the output results X from the K-4th round to the K-1th round into K , X K+1 , XK+2 , X K+3 , transformed into X K+3 , X K+2 , X K+1 , X K The sequence order of , constitutes the ciphertext output sequence for encrypting the above input sequence X.
[0291] Example 4
[0292] like Figure 6 As shown, based on the same inventive concept, an embodiment of the present application provides a decryption device for information decryption processing, the device comprising:
[0293] Input module 601, used to obtain an input ciphertext input sequence X' of N bits in length; and used to obtain an input decryption key rk of N / 4 bits in length used in a K-round nonlinear iteration process. i , where each round uses a decryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1;
[0294] Decryption processing module 602, used to decrypt the ciphertext input sequence X' and the decryption key rk i Perform K rounds of nonlinear iterative operations: divide the above ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length. In the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding decryption key rk K-1-i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the above-mentioned lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0295] The reverse module 603 is used to perform reverse operations on the output results of the K-4th round to the K-1th round to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'.
[0296] As an embodiment, N may be 128, K may be 32, S table may be a table consisting of 256-byte elements, and the above-mentioned lookup table S3 includes at least one sub-lookup table, and the above-mentioned sub-lookup table may be a table consisting of 1024-byte elements.
[0297] As an embodiment, the above-mentioned lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where:
[0298] The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2;
[0299] The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0;
[0300] The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1;
[0301] Fourth sub-lookup table S 33 It is obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, and Table S1.
[0302] As an embodiment, the decryption processing module 602 is specifically configured to convert X i+1 , X i+2 , X i+3 With the corresponding rk K-1-i Perform an XOR operation to obtain the input sequence A of the synthetic permutation.
[0303] As an embodiment, the decryption processing module 602 is specifically used for:
[0304] Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length;
[0305] Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Where: if sequence B0 is sequence a0, by looking up the first sub-table S 30 If the sequence B1 is obtained by performing a table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by performing a table lookup operation ... 31 If the sequence B2 is obtained by performing a table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by performing a table lookup operation ...32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the sequence B3 is obtained by performing a table lookup operation, no shift processing is performed on the sequence B3.
[0306] As an embodiment, the decryption processing module 602 is specifically used for:
[0307] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the first sub-lookup table S respectively. 30 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, shift B1, B2, B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits; or
[0308] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the second sub-lookup table S respectively. 31 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B2, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is cyclically shifted left by 3N / 16 bits, B2 is cyclically shifted left by N / 16 bits, and B3 is cyclically shifted left by N / 8 bits; or
[0309] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the third sub-lookup table S respectively. 32 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 8 bits, B1 is circularly shifted left by 3N / 16 bits, and B3 is circularly shifted left by N / 16 bits; or
[0310] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the fourth sub-lookup table S respectively. 33 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B2 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 16 bits, B1 is circularly shifted left by N / 8 bits, and B2 is circularly shifted left by 3N / 16 bits.
[0311] As an embodiment, when constructing the lookup table S3, the table S0, the table S1, and the table S2 are obtained in the following manner, including:
[0312] Performing a preset S0 transformation on the 8 bits of each element in the preset S-box to generate the 8 bits of a corresponding element in the table S0;
[0313] Performing a preset S1 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S1;
[0314] Performing a preset S2 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S2;
[0315] The 8-bit values of each element in the above S-box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, and the corresponding 8-bit values of the elements in table S0 are bit7, bit6, bit5, bit4, bit3, bit2, bit7⊕bit1, bit6⊕bit0, and the corresponding 8-bit values of the elements in table S1 are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, and the corresponding 8-bit values of the elements in S2 are bit7⊕bit5, bit6⊕bit4, bit5⊕bit3, bit4⊕bit2, bit3⊕bit1, bit2⊕bit0, bit1, bit0.
[0316] As an embodiment, the reverse module 603 is specifically used to convert the output results X from the K-4th round to the K-1th round K , X K+1 , X K+2 , X K+3 , transformed into X K+3 , X K+2 , X K+1 , X K The sequence order constitutes the plaintext output sequence for decryption of the above input sequence X'.
[0317] like Figure 7 As shown, based on the same inventive concept, an embodiment of the present application provides an information decryption device, which includes a processor 701 and a memory 702. The memory 702 is used to store an executable program. When the executable program is executed, the processor 701 implements the following process:
[0318] Get the input ciphertext input sequence X' of N bits in length;
[0319] Get the N / 4-bit decryption key rk used in the K-round nonlinear iteration process of the input i , where each round uses a decryption key rk i, K is a natural number, and the value of i ranges from 0 to K-1;
[0320] Based on the above ciphertext input sequence X' and decryption key rk i Perform K rounds of nonlinear iterative operations: divide the above ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length. In the i-th round of nonlinear iterative operations, according to X i+1 , X i+2 , X i+3 The corresponding decryption key rk K-1-i The synthetic permutation input sequence A is obtained, and the sequence A is input into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the above-mentioned lookup table S3 generates table S0, table S1, table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner;
[0321] The output results from the K-4th round to the K-1th round are reversed to obtain the plaintext output sequence for decrypting the above ciphertext input sequence X'.
[0322] As an embodiment, N may be 128, K may be 32, S table may be a table consisting of 256-byte elements, and the above-mentioned lookup table S3 includes at least one sub-lookup table, and the above-mentioned sub-lookup table may be a table consisting of 1024-byte elements.
[0323] As an embodiment, the above-mentioned lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where:
[0324] The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2;
[0325] The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0;
[0326] The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1;
[0327] Fourth sub-lookup table S 33 It is obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, and Table S1.
[0328] As an embodiment, the processor 701 is specifically configured to convert X i+1 , X i+2 , X i+3 With the corresponding rk K-1-i Perform an XOR operation to obtain the input sequence A of the synthetic permutation.
[0329] As an embodiment, the processor 701 is specifically configured to:
[0330] Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length;
[0331] Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0, by the first sub-lookup table S 30 If the sequence B1 is obtained by performing a table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by performing a table lookup operation ... 31 If the sequence B2 is obtained by performing a table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by performing a table lookup operation ... 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the sequence B3 is obtained by performing a table lookup operation, no shift processing is performed on the sequence B3.
[0332] As an embodiment, the processor 701 is specifically configured to:
[0333] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the first sub-lookup table S respectively. 30 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, shift B1, B2, B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits; or
[0334] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the second sub-lookup table S respectively. 31 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B2, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is cyclically shifted left by 3N / 16 bits, B2 is cyclically shifted left by N / 16 bits, and B3 is cyclically shifted left by N / 8 bits; or
[0335] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the third sub-lookup table S respectively. 32 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 8 bits, B1 is circularly shifted left by 3N / 16 bits, and B3 is circularly shifted left by N / 16 bits; or
[0336] Sequence a0, sequence a1, sequence a2, sequence a3 are input into the fourth sub-lookup table S respectively. 33 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B2 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 16 bits, B1 is circularly shifted left by N / 8 bits, and B2 is circularly shifted left by 3N / 16 bits.
[0337] As an embodiment, when constructing the lookup table S3, the table S0, the table S1, and the table S2 are obtained in the following manner, including:
[0338] Performing a preset S0 transformation on the 8 bits of each element in the preset S-box to generate the 8 bits of a corresponding element in the table S0;
[0339] Performing a preset S1 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S1;
[0340] Performing a preset S2 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S2;
[0341] The 8-bit values of each element in the above S-box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, and the corresponding 8-bit values of the elements in table S0 are bit7, bit6, bit5, bit4, bit3, bit2, bit7⊕bit1, bit6⊕bit0, and the corresponding 8-bit values of the elements in table S1 are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, and the corresponding 8-bit values of the elements in S2 are bit7⊕bit5, bit6⊕bit4, bit5⊕bit3, bit4⊕bit2, bit3⊕bit1, bit2⊕bit0, bit1, bit0.
[0342] As an embodiment, the processor 701 is specifically configured to convert the output results X from the K-4th round to the K-1th round into K , X K+1 , X K+2 , X K+3 , transformed into X K+3 , X K+2 , X K+1 , X K The sequence order constitutes the plaintext output sequence for decryption of the above input sequence X'.
[0343] The present application is described above with reference to the block diagrams and / or flow charts showing the methods, devices (systems) and / or computer program products according to the embodiments of the present application. It should be understood that a block of the block diagram and / or flow chart diagram and a combination of blocks of the block diagram and / or flow chart diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer and / or other programmable data processing device to produce a machine, so that the instructions executed by the computer processor and / or other programmable data processing device create a method for implementing the functions / actions specified in the block diagram and / or flow chart block.
[0344] Accordingly, the present application may also be implemented with hardware and / or software (including firmware, resident software, microcode, etc.). Furthermore, the present application may take the form of a computer program product on a computer-usable or computer-readable storage medium, which has a computer-usable or computer-readable program code implemented in the medium, for use by an instruction execution system or in conjunction with an instruction execution system. In the context of the present application, a computer-usable or computer-readable medium may be any medium that may contain, store, communicate, transmit, or convey a program for use by an instruction execution system, device, or apparatus, or in conjunction with an instruction execution system, device, or apparatus.
[0345] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.
Claims
1. A method for information encryption processing, characterized in that: The method includes: Using the input module to obtain the input plaintext input sequence X of N bits in length; The input module is used to obtain the N / 4-bit encryption key rk used in the K-round nonlinear iteration process of the input i , where each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1; Using the encryption processing module based on the plain text input sequence X and the encryption key rk i Perform K rounds of nonlinear iterative operations: divide the plaintext input sequence X into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, X i+1 , X i+2 , X i+3 The corresponding encryption key rk i Perform XOR operation to obtain the synthetic permutation input sequence A, input sequence A into the lookup table S3 for table lookup operation, and obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, and table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner, and the S table is a table that conforms to the SM4 block cipher algorithm; Using the reverse module, the output results of the K-4th round to the K-1th round are reversed to obtain the encrypted ciphertext output sequence of the plaintext input sequence X; The lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where: The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2; The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0; The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1; Fourth sub-lookup table S 33 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, Table S1; Input sequence A into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A ,include: Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length; Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0 through the first sub-lookup table S 30 If the sequence B1 is obtained by the table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by the second sub-table S 31 If the sequence B2 is obtained by the table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by the third sub-table S 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the table lookup operation is performed, the sequence B3 is not shifted.
2. The method according to claim 1, characterized in that N is 128, K is 32, the S table is a table consisting of 256-byte elements, and the lookup table S3 includes at least one sub-lookup table, and the sub-lookup table is a table consisting of 1024-byte elements.
3. The method according to claim 1, characterized in that Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and sequences B0, sequence B1, sequence B2, sequence B3 with a length of N / 4 bits are obtained accordingly, and the table lookup operation results are processed based on the shift principle; Perform XOR operation on the processed table lookup operation results to obtain the synthetic permutation output sequence T A ,include: Sequence a0, sequence a1, sequence a2, sequence a3 are input into the first sub-lookup table S respectively. 30 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, shift B1, B2, B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits; or Sequence a0, sequence a1, sequence a2, sequence a3 are input into the second sub-lookup table S respectively. 31 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B2, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by 3N / 16 bits, B2 is circularly shifted left by N / 16 bits, and B3 is circularly shifted left by N / 8 bits; or Sequence a0, sequence a1, sequence a2, sequence a3 are input into the third sub-lookup table S respectively. 32 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 8 bits, B1 is circularly shifted left by 3N / 16 bits, and B3 is circularly shifted left by N / 16 bits; or Sequence a0, sequence a1, sequence a2, sequence a3 are input into the fourth sub-lookup table S respectively. 33 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B2 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 16 bits, B1 is circularly shifted left by N / 8 bits, and B2 is circularly shifted left by 3N / 16 bits.
4. The method according to claim 1 or 2, characterized in that: When constructing the lookup table S3, the table S0, table S1, and table S2 are obtained in the following manner, including: Performing a preset S0 transformation on the 8 bits of each element in the preset S-box to generate the 8 bits of a corresponding element in the table S0; Performing a preset S1 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S1; Performing a preset S2 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S2; The 8-bit values of each element in the S-box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, and the 8-bit values of the elements in the corresponding table S0 are bit7, bit6, bit5, bit4, bit3, bit2, bit7⊕bit1, bit6⊕bit0, and the 8-bit values of the elements in the corresponding table S1 are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, and the 8-bit values of the elements in S2 are bit7⊕bit5, bit6⊕bit4, bit5⊕bit3, bit4⊕bit2, bit3⊕bit1, bit2⊕bit0, bit1, bit0.
5. The method according to claim 1, characterized in that The output results of the K-4th round to the K-1th round are reversed by using the reverse module to obtain the ciphertext output sequence of the input sequence X, including: Use the reverse module to convert the output results X from the K-4th round to the K-1th round K , X K+1 , X K+2 , X K+3 , transformed into X K+3 , X K+2 , X K+1 , X K The sequence order constitutes the ciphertext output sequence for encrypting the input sequence X.
6. A method for information decryption processing, characterized in that: The method includes: Using the input module to obtain the input ciphertext input sequence X' of N bits in length; The input module is used to obtain the N / 4-bit decryption key rk used in the K-round nonlinear iteration process of the input i , where each round uses a decryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1; The decryption processing module is used based on the ciphertext input sequence X' and the decryption key rk i Perform K rounds of nonlinear iterative operations: divide the ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, X i+1 , X i+2 , X i+3 With the corresponding rk K-1-i Perform XOR operation to obtain the synthetic permutation input sequence A, input sequence A into the lookup table S3 for table lookup operation, and obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, and table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner, and the S table is a table that conforms to the SM4 block cipher algorithm; Using the reverse module, the output results of the K-4th round to the K-1th round are reversed to obtain the plaintext output sequence for decrypting the ciphertext input sequence X'; The lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where: The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2; The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0; The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1; Fourth sub-lookup table S 33 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, Table S1; Input sequence A into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A ,include: Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length; Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0, by the first sub-lookup table S 30 If the sequence B1 is obtained by performing a table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by performing a table lookup operation ... 31 If the sequence B2 is obtained by performing a table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by performing a table lookup operation ... 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the sequence B3 is obtained by performing a table lookup operation, no shift processing is performed on the sequence B3.
7. The method according to claim 6, characterized in that N is 128, K is 32, the S table is a table consisting of 256-byte elements, and the lookup table S3 includes at least one sub-lookup table, and the sub-lookup table is a table consisting of 1024-byte elements.
8. The method according to claim 6, characterized in that Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and sequences B0, sequence B1, sequence B2, sequence B3 with a length of N / 4 bits are obtained accordingly, and the table lookup operation results are processed based on the shift principle; Perform XOR operation on the processed table lookup operation results to obtain the synthetic permutation output sequence T A ,include: Sequence a0, sequence a1, sequence a2, sequence a3 are input into the first sub-lookup table S respectively. 30 , corresponding to the N / 4-bit length sequence B0, sequence B1, sequence B2, sequence B3, shift B1, B2, B3 and perform XOR operation to obtain the N / 4-bit length synthetic permutation output sequence T A , where B1 is circularly shifted left by N / 16 bits, B2 is circularly shifted left by N / 8 bits, and B3 is circularly shifted left by 3N / 16 bits; or Sequence a0, sequence a1, sequence a2, sequence a3 are input into the second sub-lookup table S respectively. 31 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B2, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by 3N / 16 bits, B2 is circularly shifted left by N / 16 bits, and B3 is circularly shifted left by N / 8 bits; or Sequence a0, sequence a1, sequence a2, sequence a3 are input into the third sub-lookup table S respectively. 32 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B3 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 8 bits, B1 is circularly shifted left by 3N / 16 bits, and B3 is circularly shifted left by N / 16 bits; or Sequence a0, sequence a1, sequence a2, sequence a3 are input into the fourth sub-lookup table S respectively. 33 , corresponding to the N / 4-bit length sequences B0, B1, B2, and B3, shift and XOR operations are performed on B0, B1, and B2 to obtain the N / 4-bit length synthetic permutation output sequence T A , where B0 is circularly shifted left by N / 16 bits, B1 is circularly shifted left by N / 8 bits, and B2 is circularly shifted left by 3N / 16 bits.
9. The method according to claim 6 or 7, characterized in that When constructing the lookup table S3, the table S0, table S1, and table S2 are obtained in the following manner, including: Performing a preset S0 transformation on the 8 bits of each element in the preset S-box to generate the 8 bits of a corresponding element in the table S0; Performing a preset S1 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S1; Performing a preset S2 transformation on 8 bits of each element in the preset S-box to generate 8 bits of a corresponding element in table S2; The 8-bit values of each element in the S-box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, and the 8-bit values of the elements in the corresponding table S0 are bit7, bit6, bit5, bit4, bit3, bit2, bit7⊕bit1, bit6⊕bit0, and the 8-bit values of the elements in the corresponding table S1 are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, and the 8-bit values of the elements in S2 are bit7⊕bit5, bit6⊕bit4, bit5⊕bit3, bit4⊕bit2, bit3⊕bit1, bit2⊕bit0, bit1, bit0.
10. The method according to claim 6, characterized in that The output results of the K-4th round to the K-1th round are reversed by using the reverse module to obtain the plaintext output sequence for decrypting the ciphertext input sequence X', including: Use the reverse module to convert the output results X from the K-4th round to the K-1th round K , X K+1 , X K+2 , X K+3 , transformed into X K+3 , X K+2 , X K+1 , X K The sequence order constitutes the plaintext output sequence for decryption of the ciphertext input sequence X'.
11. An encryption device for information encryption processing, characterized in that: include: An input module is used to obtain an input plaintext input sequence X of N bits in length; and the N / 4-bit encryption key rk used in the K-round nonlinear iteration process to obtain the input i , where each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1; An encryption processing module is used to process the plain text input sequence X and the encryption key rk i Perform K rounds of nonlinear iterative operations: divide the plaintext input sequence X into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, X i+1 , X i+2 , X i+3 The corresponding encryption key rk i Perform XOR operation to obtain the synthetic permutation input sequence A, input sequence A into the lookup table S3 for table lookup operation, and obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, and table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner, and the S table is a table that conforms to the SM4 block cipher algorithm; A reverse module, used to perform reverse operation on the output results of the K-4th round to the K-1th round to obtain a ciphertext output sequence encrypted by the plaintext input sequence X; The lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where: The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2; The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0; The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1; Fourth sub-lookup table S 33 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, Table S1; Input sequence A into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A ,include: Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length; Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0 through the first sub-lookup table S 30 If the sequence B1 is obtained by the table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by the second sub-table S 31 If the sequence B2 is obtained by the table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by the third sub-table S 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the table lookup operation is performed, the sequence B3 is not shifted.
12. A decryption device for information decryption processing, characterized in that: include: An input module is used to obtain an input ciphertext input sequence X' of N bits in length; And the N / 4-bit length decryption key rk used in the K-round nonlinear iteration process to obtain the input i , where each round uses a decryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1; A decryption processing module is used to decrypt the encrypted text based on the sequence X' and the decryption key rk. i Perform K rounds of nonlinear iterative operations: divide the ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, X i+1 , X i+2 , X i+3 With the corresponding rk K-1-i Perform XOR operation to obtain the synthetic permutation input sequence A, input sequence A into the lookup table S3 for table lookup operation, and obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, and table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner, and the S table is a table that conforms to the SM4 block cipher algorithm; A reverse module, used to perform reverse operation on the output results of the K-4th round to the K-1th round to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'; The lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where: The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2; The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0; The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1; Fourth sub-lookup table S 33 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, Table S1; Input sequence A into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A ,include: Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length; Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0, by the first sub-lookup table S 30 If the sequence B1 is obtained by performing a table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by performing a table lookup operation ... 31 If the sequence B2 is obtained by performing a table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by performing a table lookup operation ... 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the sequence B3 is obtained by performing a table lookup operation, no shift processing is performed on the sequence B3.
13. An encryption device for information encryption processing, the device comprising a processor and a memory, the memory being used to store an executable program, and when the executable program is executed, the processor implements the following process: Get the input plaintext input sequence X of N bits in length; Get the N / 4 bit encryption key rk used in the K-round nonlinear iteration process of the input i ,in, Each round uses an encryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1; Based on the plaintext input sequence X and the encryption key rk i Perform K rounds of nonlinear iterative operations: divide the plaintext input sequence X into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, X i+1 , X i+2 , X i+3 The corresponding encryption key rk i Perform XOR operation to obtain the synthetic permutation input sequence A, input sequence A into the lookup table S3 for table lookup operation, and obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, and table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner, and the S table is a table that conforms to the SM4 block cipher algorithm; Perform a reverse operation on the output results of the K-4th round to the K-1th round to obtain a ciphertext output sequence encrypted by the plaintext input sequence X; The lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where: The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2; The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0; The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1; Fourth sub-lookup table S 33 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, Table S1; Input sequence A into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A ,include: Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length; Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0 through the first sub-lookup table S 30 If the sequence B1 is obtained by the table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by the second sub-table S 31 If the sequence B2 is obtained by the table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by the third sub-table S 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the table lookup operation is performed, the sequence B3 is not shifted.
14. A decryption device for information decryption processing, the device comprising a processor and a memory, the memory being used to store an executable program, and when the executable program is executed, the processor implements the following process: Get the input ciphertext input sequence X' of N bits in length; Get the N / 4-bit decryption key rk used in the K-round nonlinear iteration process of the input i ,in, Each round uses a decryption key rk i , K is a natural number, and the value of i ranges from 0 to K-1; Based on the ciphertext input sequence X' and the decryption key rk i Perform K rounds of nonlinear iterative operations: divide the ciphertext input sequence X' into sequences X0, X1, X2, and X3 of N / 4 bit length, wherein in the i-th round of nonlinear iterative operations, X i+1 , X i+2 , X i+3 With the corresponding rk K-1-i Perform XOR operation to obtain the synthetic permutation input sequence A, input sequence A into the lookup table S3 for table lookup operation, and obtain the synthetic permutation output sequence T A , T A With X i Perform XOR operation to obtain the output result X of the i-th round of nonlinear iterative operation i+4 ; Wherein, the lookup table S3 generates table S0, table S1, and table S2 by performing preset S0 transformation, S1 transformation, and S2 transformation on each element in the preset S table, and combines table S0, table S1, and table S2 in a preset manner, and the S table is a table that conforms to the SM4 block cipher algorithm; Perform a reverse operation on the output results of the K-4th round to the K-1th round to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'; The lookup table S3 includes a first sub-lookup table S 30 , the second sub-lookup table S 31 , the third sub-lookup table S 32 , the fourth sub-lookup table S 33 Any one, any two or any three of the following, where: The first sub-lookup table S 30 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S0, Table S1, Table S1, Table S2; The second sub-lookup table S 31 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S1, Table S2, Table S0; The third sub-lookup table S 32 Obtained by combining Table S0, Table S1, Table S2, in the order of Table S1, Table S2, Table S0, Table S1; Fourth sub-lookup table S 33 Obtained by combining Table S0, Table S1, Table S2 in the order of Table S2, Table S0, Table S1, Table S1; Input sequence A into the lookup table S3 for table lookup operation to obtain the synthetic permutation output sequence T A ,include: Divide sequence A into sequence a0, sequence a1, sequence a2, and sequence a3 of N / 16 bit length; Sequence a0, sequence a1, sequence a2, sequence a3 are respectively input into the lookup table S3 for table lookup operation, and the corresponding sequences B0, sequence B1, sequence B2, sequence B3 of N / 4 bit length are obtained, and the table lookup operation results are processed based on the shift principle; the processed table lookup operation results are XORed to obtain the synthetic permutation output sequence T A ; Wherein, the shift principle includes, if the sequence B0 is the sequence a0, by the first sub-lookup table S 30 If the sequence B1 is obtained by performing a table lookup operation, the sequence B0 is not shifted; if the sequence B1 is obtained by performing a table lookup operation ... 31 If the sequence B2 is obtained by performing a table lookup operation, the sequence B1 is not shifted; if the sequence B2 is obtained by performing a table lookup operation ... 32 If the sequence B3 is obtained by performing a table lookup operation, the sequence B2 is not shifted; if the sequence B3 is obtained by performing a table lookup operation ... 33 If the sequence B3 is obtained by performing a table lookup operation, no shift processing is performed on the sequence B3.
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