A method and apparatus for testing an abnormal word line, a memory, and a memory system

Abstract

Embodiments of the present application disclose a test method and device for abnormal word lines, a memory and a memory system. The test method comprises: providing a test device; wherein the test device comprises a comparison circuit; dividing word lines into a plurality of word line groups, and connecting each word line group to the comparison circuit; comparing working voltages of each word line group by the comparison circuit during programming, to determine abnormal word lines in the word line groups.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of semiconductor technology, and in particular to a method, device, memory, and memory system for testing abnormal word lines. Background Art

[0002] With the advancement of semiconductor technology, NAND structures are receiving increasing attention. To further increase storage density, various three-dimensional (3D) NAND devices have emerged. In 3D NAND memory structures, word lines (WLs) are typically designed with dozens to hundreds of layers. During failure analysis, it is sometimes necessary to analyze abnormalities in each layer of the product's word lines.

[0003] However, considering the size of 3D NAND memory and the size of the test device, it is difficult to test every word line layer during the actual measurement process, making it difficult to directly identify abnormal word lines. If all word lines are tested, it will consume a lot of time, resulting in low test efficiency. Summary of the Invention

[0004] The embodiments of the present application aim to provide a method, device, memory, and memory system for testing abnormal word lines.

[0005] The technical solution of the embodiment of the present application is implemented as follows:

[0006] A first aspect of an embodiment of the present application provides a method for testing an abnormal word line, the method comprising:

[0007] A testing device is provided; wherein the testing device includes a comparison circuit;

[0008] dividing the word lines into a plurality of word line groups, and connecting each of the word line groups to the comparison circuit;

[0009] During programming, the operating voltage of each of the word line groups is compared by the comparison circuit to determine abnormal word lines in the sub-line group.

[0010] Optionally, the comparison circuit includes a voltage comparator.

[0011] Optionally, the testing device further comprises a selection switch;

[0012] Connecting each of the word line groups to the comparison circuit comprises:

[0013] Each of the word line groups is connected to the comparison circuit through the selection switch.

[0014] Optionally, the selection switch includes a plurality of path switches, each path switch connecting a corresponding word line group to the comparison circuit.

[0015] Optionally, comparing each of the word line groups by the comparison circuit to determine an abnormal word line in the word line group includes:

[0016] Comparing each of the word line groups by the comparison circuit to determine the word line group in which an abnormal word line exists;

[0017] The word lines in the word line group where the abnormal word line exists are compared by the comparison circuit to obtain a comparison result.

[0018] Optionally, the comparing each word line group by the comparison circuit to determine the word line group having an abnormal word line includes:

[0019] During programming, the word line group is connected to the first input terminal of the comparison circuit, and a preset reference voltage is connected to the second input terminal of the comparison circuit;

[0020] The comparison circuit compares the operating voltage of the word line group with the preset reference voltage and outputs first comparison information;

[0021] The word line group including abnormal word lines is determined according to the first comparison information.

[0022] Optionally, comparing the word lines in the word line group where the abnormal word line exists by the comparison circuit to determine the abnormal word line includes:

[0023] Connecting any two word lines in the word line group where the abnormal word line exists to two input terminals of the comparison circuit respectively;

[0024] performing a precharging operation on the word line, and obtaining second comparison information output by the comparison circuit during the precharging period;

[0025] Based on the second comparison information, the word line with the smaller voltage is determined as an abnormal word line.

[0026] Optionally, comparing the word lines in the word line group where the abnormal word line exists by the comparison circuit to determine the abnormal word line includes:

[0027] Connecting any two word lines in the word line group where the abnormal word line exists to two input terminals of the comparison circuit respectively;

[0028] performing a discharge operation on the word line to obtain third comparison information output by the comparison circuit during the discharge period;

[0029] Based on the third comparison information, the word line with a larger voltage is determined as an abnormal word line.

[0030] Optionally, comparing the word lines in the word line group where the abnormal word line exists by the comparison circuit to determine the abnormal word line includes:

[0031] Connecting any two word lines in the word line group where the abnormal word line exists to two input terminals of the comparison circuit respectively;

[0032] performing a discharge operation on the word line, and acquiring fourth comparison information output by the comparison circuit after the discharge is completed;

[0033] Based on the fourth comparison information, the word line with a larger voltage is determined as an abnormal word line.

[0034] Optionally, the abnormal word line includes a word line with high resistance.

[0035] Optionally, comparing the word lines in the word line group where the abnormal word line exists by the comparison circuit to determine the abnormal word line includes:

[0036] When the connected word line is in a floating state, obtaining fifth comparison information output by the comparison circuit during the floating period;

[0037] Based on the fifth comparison information, the word line with the smaller voltage is determined as an abnormal word line.

[0038] Optionally, the abnormal word line includes a leaky word line.

[0039] A second aspect of an embodiment of the present application provides a device for testing abnormal word lines, the device being used to test word lines, including:

[0040] a plurality of word line groups, each of the word line groups being connected to a comparison circuit;

[0041] The comparison circuit is used for comparing the operating voltage of each word line group to obtain abnormal word lines.

[0042] Optionally, the comparison circuit includes a voltage comparator.

[0043] Optionally, the method further includes: a selection switch, wherein the selection switch is used to divide the word lines into a plurality of word line groups and connect each of the word line groups to the comparison circuit.

[0044] Optionally, the selection switch includes a plurality of path switches, each path switch connecting a corresponding word line group to the comparison circuit. A third aspect of the present application provides a memory, comprising: the test device according to the second aspect;

[0045] a memory array comprising a plurality of memory cell rows;

[0046] a plurality of word lines, the plurality of word lines being coupled to the plurality of memory cell rows respectively;

[0047] The testing device is connected to the word line.

[0048] A fourth aspect of an embodiment of the present application provides a memory system, comprising a controller and the memory described in the third aspect; the controller is coupled to the memory and is used to control the memory.

[0049] The embodiment of the present application discloses a method and device for testing abnormal word lines, wherein the testing method comprises: providing a testing device; wherein the testing device comprises a comparison circuit; dividing the word lines into a plurality of word line groups, and connecting each of the word line groups to the comparison circuit; during programming, comparing the operating voltage of each of the word line groups through the comparison circuit to determine the abnormal word lines in the word line group. In the present application, by grouping the word lines and connecting the grouped word line groups to the comparison circuit, the operating voltage of the word line groups is compared through the comparison circuit, and then the abnormal word lines can be determined from the word line groups based on the comparison results. In this way, abnormal word lines are detected in units of word line groups, which is conducive to simplifying the test process and structure and shortening the test time. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 A schematic diagram of a three-dimensional memory device provided in an embodiment of the present application;

[0051] Figure 2 A schematic diagram of a word line test structure provided in some embodiments;

[0052] Figure 3 A schematic diagram of a leaky word line provided in an embodiment of the present application;

[0053] Figure 4 A flowchart of a method for testing abnormal word lines provided in an embodiment of the present application;

[0054] Figure 5 A schematic diagram of the comparative principles provided for the embodiments of the present application;

[0055] Figure 6 A schematic diagram of a connection circuit between a selection switch and a comparison circuit provided in an embodiment of the present application;

[0056] Figure 7 A schematic diagram of a comparison result of a high resistance word line provided in an embodiment of the present application;

[0057] Figure 8 A schematic diagram of leakage word line comparison results provided in an embodiment of the present application;

[0058] Figure 9A A schematic diagram of the structure of a memory system provided in an embodiment of the present application Figure 1 ;

[0059] Figure 9B A schematic diagram of the structure of a memory system provided in an embodiment of the present application Figure 2 . DETAILED DESCRIPTION

[0060] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0061] In addition, the accompanying drawings are merely schematic illustrations of embodiments of the present application and are not necessarily drawn to scale. Identical reference numerals in the figures denote identical or similar parts, and thus their repeated descriptions will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities that do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0062] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all steps. For example, some steps may be decomposed, while some steps may be combined or partially combined, so the actual execution order may change according to actual circumstances.

[0063] The purpose of the terms used herein is only to describe specific embodiments and is not intended to limit the present application. When used herein, the singular forms "a", "an", and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0064] For 3D NAND memory devices, abnormalities in their internal storage cells often affect the programming process and even directly cause programming failure. Therefore, failure analysis requires measuring and analyzing the resistance of each layer of the product's word lines. However, existing testing methods either have complex test structures and difficulty directly identifying abnormal word lines, or are inefficient and time-consuming.

[0065] See also Figure 1 , Figure 1Schematic diagram of a three-dimensional memory device provided in an embodiment of the present application. The three-dimensional memory device can be a memory chip, such as Figure 1 As shown in , a wafer 101 includes a plurality of memory chips 102. On the wafer 101, each memory chip 102 is separated by a cutting path. Each memory chip 102 may include a memory array formed by a plurality of memory cells, wherein each memory cell can be addressed by interconnections such as bit lines and word lines. The memory array includes a plurality of memory cell rows and a plurality of memory cell strings, each of the memory cell rows is coupled to a corresponding word line, and each of the memory cell strings is coupled to a corresponding bit line. The bit lines and word lines can be arranged vertically (for example, in rows and columns, respectively) and the memory cells form a memory array along rows and columns. The wafer of the embodiment of the present application is a wafer for producing a 3D NAND memory chip, and the memory chip of the embodiment of the present application is a chip of a 3D NAND memory device.

[0066] In an example, see Figure 2 , Figure 2 Figure 2 is a schematic diagram of a wordline test structure in some embodiments. Here, a memory array may include 192 wordlines. Considering the spacing between adjacent wordlines and the size of a probe pad 201, a probe pad 201 can only be placed every other wordline. This results in multiple rounds of testing required to complete all wordline tests. After each round of testing, the wordlines and probe pads 201 need to be reconnected, which not only increases the complexity of the test process but also significantly increases test time.

[0067] In another example, see Figure 3 , Figure 3 Schematic diagram of leakage word lines provided in an embodiment of the present application, wherein WL0, WL1, WL2, WL3...WL188, WL189, WL190, WL191 represent different word lines respectively, vpe and vss represent the working voltage and ground voltage respectively, the selected word line is applied with vpe, and the unselected word line is applied with vss. Each word line is electrically connected to the monitoring pad 301. If there is a leakage word line, the voltage detected by the monitoring pad 301 will eventually be lower than the target value. Figure 3 As shown, even word lines are selected and odd word lines are unselected, so that each word line operates alternately. In this example, leakage exists between WL0 and WL1. Here, leakage can be leakage current. Due to the presence of leakage, WL0 is easily disturbed during the programming process, resulting in programming errors. For example, during an erase operation, some content may not be completely erased. Therefore, identifying abnormal word lines is very important for programming.

[0068] Based on this, this application proposes a method for testing abnormal word lines. Figure 4 , Figure 4 A flowchart of a method for testing abnormal word lines provided in an embodiment of the present application is provided. The method includes:

[0069] S401, providing a testing device, wherein the testing device includes a comparison circuit;

[0070] S402, dividing the word lines into a plurality of word line groups, and connecting each word line group to a comparison circuit;

[0071] S403 , during programming, comparing the operating voltage of each word line group through a comparison circuit to determine an abnormal word line in the word line group.

[0072] In this embodiment, the word lines are divided into multiple word line groups, each of which is connected to a comparison circuit, so that a comparison circuit can be used to compare the multiple word line groups. For example, the comparison circuit may include a voltage comparator. By connecting the word line groups to the input terminals of the voltage comparator, the operating voltages thereof are compared. Based on the comparison result, it is determined whether any abnormal word line exists in the connected word line groups.

[0073] In some embodiments, the test device further includes a selection switch; and each word line group is connected to the comparison circuit via the selection switch.

[0074] Here, the selection switch can be used as a data selector to select any one of the multiple word line groups as needed as a valid input and connect it to the comparison circuit.

[0075] In some embodiments, the selection switch includes a plurality of path switches, each path switch connecting a corresponding word line group to the comparison circuit.

[0076] The selector switch can be a logic-controlled switch, for example, an Xpath Switch. The Xpath Switch includes a programmable SRAM cell. By configuring the contents of the programmable SRAM cell, one word line group can be selected from multiple word line groups as an effective input terminal. That is, the selector switch can control the switching between the corresponding word line group and the comparison circuit to be in a conductive state or a disconnected state. Here, the number of word lines included in each word line group can be equal or unequal. In a preferred embodiment, the number of word lines included in each word line group is equal.

[0077] In one example, a memory may include multiple memory planes, each memory plane may include multiple memory blocks, each memory block may include multiple memory pages, and each memory page may include multiple memory cells. Each memory plane may include 192 word lines, namely WL0, WL1, WL2, WL3, ..., WL188, WL189, WL190, and WL191. Select switches divide all word lines into 16 word line groups, each word line group including 12 word lines. For example, word lines numbered WL0 to WL11 constitute a word line group, ..., and word lines numbered WL180 to WL191 constitute a word line group. It should be noted that all word lines may also be divided into 10 groups, 20 groups, and so on. The number of word lines contained in each word line group may be the same or different, and this is not limited to this. In addition, a select switch is provided for each memory plane. If the memory includes four memory planes, the test device includes four select switches, and multiple memory planes can be tested in parallel.

[0078] Here, the abnormal word line may be a high-resistance word line or a word line with leakage.

[0079] In an embodiment of the present application, step 403 includes: comparing each word line group through a comparison circuit to determine a word line group with an abnormal word line; comparing the word lines in the word line group with an abnormal word line through a comparison circuit to determine the abnormal word line in the word line group.

[0080] In the embodiment of the present application, a comparison is first performed using word line groups as units to determine abnormal word line groups, that is, the word line group containing abnormal word lines is determined; then, the word lines in the word line group containing abnormal word lines are compared to determine the abnormal word line from the word line group containing abnormal word lines.

[0081] In an embodiment of the present application, when comparing word lines in a word line group containing an abnormal word line, in order to improve comparison efficiency, a selection switch can be used to first connect the even word lines in the word line group containing an abnormal word line to a comparison circuit to determine whether there is an abnormal word line in the even word line. If there is an abnormal word line in the even word line, the even word lines are divided into two groups, and a pairwise comparison is performed to obtain a pairwise comparison result. If there is no abnormal word line in the even word line, the even word lines are no longer compared, and the odd word lines are compared to determine whether there is an abnormal word line in the odd word line. If there is an abnormal word line in the odd word line, the odd word lines are divided into two groups, and a pairwise comparison is performed to obtain a pairwise comparison result. If there is no abnormal word line in the odd word line, the comparison of the word lines in the word line group containing the abnormal word line is terminated. As a result, the abnormal word line can be determined without having to test each word line one by one. In this way, the detection time of the abnormal word line can be greatly reduced.

[0082] In an embodiment of the present application, the specific process of comparing each word line group using a comparison circuit to determine the word line group containing an abnormal word line is as follows: the voltage of each word line group is compared using the comparison circuit, and if an abnormal voltage is present, the word line group corresponding to the abnormal voltage is determined to be the word line group containing the abnormal word line. It should be noted that during this comparison process, the selection switch can connect each word line group to the comparison circuit, so that the comparison circuit performs comparison on a word line group basis.

[0083] During the test, word lines go through a pre-charge phase, a discharge phase, and a detection phase. For abnormal word lines, such as high-resistance word lines, the operating voltage rises more slowly during the pre-charge phase due to their inherently higher resistance. Therefore, at the same time, the operating voltage of abnormal word lines in a word line group is lower than that of normal word lines. During the discharge phase, the operating voltage of high-resistance word lines decreases more slowly. At the same time, the operating voltage of abnormal word lines in a word line group is higher than that of normal word lines. Therefore, by comparing the voltages during the pre-charge and discharge phases, abnormal word lines in a word line group can be identified.

[0084] In an example, a comparison circuit may be used to compare word lines in the word line group where abnormal word lines exist, to obtain pairwise comparison results. For example, when an abnormal word line is detected in the word line group numbered WL0 to WL11, even word lines WL0, WL2, WL4, WL6, WL8, and WL10 can be connected to a comparison circuit via a selection switch. The even word lines are compared to determine whether there is an abnormal word line in the even word lines. If there is an abnormal word line in the even word lines, the even word lines are compared pairwise to obtain a pairwise comparison result. If there is no abnormal word line in the even word lines, the comparison of the even word lines is terminated. Odd word lines WL1, WL3, WL5, WL7, WL9, and WL11 can then be connected to a comparison circuit via a selection switch. The odd word lines are compared to determine whether there is an abnormal word line in the odd word lines. If there is an abnormal word line in the odd word lines, the odd word lines are compared pairwise to obtain a pairwise comparison result. If there is no abnormal word line in the odd word lines, the comparison of the word lines in the word line group containing the abnormal word line is terminated. In this way, the abnormal word line can be determined without having to detect each word line one by one. In this way, the detection time of abnormal word lines can be greatly reduced.

[0085] In an example, see Figure 5 , Figure 5This is a schematic diagram of the comparison principle provided in an embodiment of the present application. After the test begins, the word lines are divided into multiple word line groups via the selection switch 501. Each word line group is connected to the comparison circuit 502 via the selection switch 501. The comparison circuit 502 performs the comparison and outputs the comparison result (ICS flag). For example, when the comparison circuit 502 is a voltage comparator, when the comparison result is a high level, it indicates that the voltage connected to the positive input terminal of the voltage comparator is higher than the voltage connected to the negative input terminal of the voltage comparator; conversely, when the comparison result is a low level, it indicates that the voltage connected to the positive input terminal of the voltage comparator is lower than the voltage connected to the negative input terminal of the voltage comparator.

[0086] In this application, word lines are grouped using selector switches and connected to a comparison circuit to compare the word line groups. This allows abnormal word lines to be identified from the word line groups based on the comparison results. This allows abnormal word lines to be detected in word line groups, simplifying the test process and structure and shortening test time.

[0087] In one embodiment, see Figure 6 , Figure 6 Schematic diagram of the connection circuit between the selection switch and the comparison circuit provided in the embodiment of the present application, the word line in the storage plane (plane) 603 is connected to the comparison circuit through the selection switch 602, and the selection switch 602 is electrically connected to the level conversion unit (LS, level shifter) 601 through the connection line. Figure 6 As shown, each memory plane 603 corresponds to a selection switch 602. Here, the level conversion unit 601 is used to convert the voltage signal of the word line group connected through the selection switch 602 into an input signal of the comparison circuit (ICS Unit) 604. The comparison circuit 604 performs comparison and outputs the comparison result.

[0088] In one embodiment, see Figure 7 , Figure 7This is a schematic diagram of the high-resistance wordline comparison results provided by an embodiment of the present application. The horizontal line represents time, and the vertical line represents voltage. t0, t1, t2, and t3 represent the times of the precharge phase, discharge phase, detection phase, and reset phase, respectively. The curves, from top to bottom, show the voltage timing of a normal wordline 701, the voltage timing of a selected wordline in a wordline group 702, the voltage timing of an unselected wordline in a wordline group 703, and the comparison result (ICS flag) 704. A normal wordline represents a wordline that is functioning normally without any anomalies, while an abnormal wordline represents a wordline that is functioning normally due to an anomaly. The voltage timing 702 of the selected word line in the word line group goes through a pre-charge phase, a discharge phase, a detection phase, and a reset phase; the unselected word lines in the word line group are connected to a low voltage VSS; the voltage timing 702 of the selected word line in the word line group includes normal word lines and abnormal word lines, the normal word lines are shown as solid lines, and the abnormal word lines are shown as dotted lines; the comparison result 704 includes two states, namely a high level state (as shown by the dotted line), representing the abnormal word line, and a low level state (as shown by the solid line), representing the normal word line.

[0089] For example, taking the comparison circuit as a voltage comparator as an example, when the voltage connected to the positive input terminal of the voltage comparator is greater than the voltage connected to the reverse input terminal, the comparison result is a high level; when the voltage connected to the positive input terminal of the voltage comparator is less than the voltage connected to the reverse input terminal, the comparison result is a low level.

[0090] In some embodiments, during programming, the word line group is connected to a first input terminal of a comparison circuit, and a preset reference voltage is connected to a second input terminal of the comparison circuit;

[0091] The comparison circuit compares the operating voltage of the word line group with a preset reference voltage and outputs first comparison information;

[0092] A word line group including abnormal word lines is determined according to the first comparison information.

[0093] Here, the preset reference voltage can be approximately but slightly lower than the normal operating voltage of the wordline group, and the first input terminal and the second input terminal can be the positive input terminal and the negative input terminal of the comparison circuit. In this way, when there are no abnormal wordlines in the wordline group, the voltage at the first input terminal of the comparison circuit is greater than the voltage at the second input terminal; when there are abnormal wordlines in the wordline group, the voltage at the first input terminal of the comparison circuit is less than the voltage at the second input terminal. In these two cases, the first comparison information at the output terminal of the comparison circuit is different, thereby determining whether there are abnormal wordlines in the connected wordline group. By comparing the fixed preset reference voltage with the operating voltage of the wordline group, the situation where an abnormal wordline is present in both wordline groups when compared with each other is avoided, thereby improving the accuracy of the test results.

[0094] In one example, any two word lines in a word line group containing abnormal word lines are connected to two input terminals of a comparison circuit respectively; a precharge operation is performed on the word lines to obtain second comparison information output by the comparison circuit during the precharge period; and based on the second comparison information, the word line with a smaller voltage is determined as an abnormal word line.

[0095] See also Figure 7 In the precharge phase, the solid line represents the voltage change of a normal wordline, and the dashed line represents the voltage change of an abnormal wordline. An abnormal wordline is, for example, a high-resistance wordline. Because a high-resistance wordline has a higher resistance than a normal wordline, its voltage increases more slowly during the precharge phase than a normal wordline. By comparing the voltages of each wordline at the same moment in the precharge phase, the abnormal wordline can be identified. That is, the wordline with the lower voltage during time t0 is the abnormal wordline. Here, t0 represents approximately 150µs, and t2 represents approximately 120µs.

[0096] For another example, see Figure 7 , connect any two word lines in the word line group where the abnormal word line exists to the two input terminals of the comparison circuit respectively; perform a discharge operation on the word lines, and obtain third comparison information output by the comparison circuit during the discharge period; based on the third comparison information, determine the word line with a larger voltage as the abnormal word line.

[0097] from Figure 7 As can be seen from the graph, during the discharge phase, the solid line represents the voltage change of a normal wordline, while the dashed line represents the voltage change of an abnormal wordline. An abnormal wordline, for example, is a high-resistance wordline. Because a high-resistance wordline has a higher resistance than a normal wordline, its voltage drops more slowly during the discharge phase. By comparing the voltages of each wordline at the same moment in the discharge phase, the abnormal wordline can be identified; that is, the wordline with the higher voltage is the abnormal wordline. For a normal wordline, the duration t1 represents is approximately 4 to 18 μs.

[0098] For another example, see Figure 7 , connect any two word lines in the word line group with abnormal word lines to the two input terminals of the comparison circuit respectively; perform a discharge operation on the word lines, and obtain the fourth comparison information output by the comparison circuit after the discharge is completed; based on the fourth comparison information, determine the word line with a larger voltage as an abnormal word line. In some embodiments, after the word lines in the word line group with abnormal word lines have experienced the same discharge time, the current voltages of the word lines can be compared through the comparison circuit, and the word line with a larger voltage, i.e., the abnormal word line, can be determined from the word line group with abnormal word lines. Wherein, the voltage on the normal word line drops from the operating voltage to the target voltage, such as Figure 7The solid line portion of the detection phase, and the voltage on the abnormal word line does not drop to the target voltage due to its low voltage drop rate, and the voltage on it is greater than the target voltage, such as Figure 7 The dotted part of the detection stage is used to determine the abnormal word line.

[0099] from Figure 7 It can be seen that in the discharge stage, the solid line represents the voltage change of the normal word line, and the dotted line represents the voltage change of the abnormal word line. Here, the abnormal word line is, for example, a high-resistance word line. Since the high-resistance word line has a larger resistance, its voltage drop rate is smaller in the discharge stage. By comparing the voltages of each word line after the same discharge time, the high-resistance word line, that is, the word line with a larger voltage, can be determined.

[0100] It should be noted that t0, t1, and t2 can be adjusted according to actual needs.

[0101] In an embodiment of the present application, the controller can read the comparison result before the end of the detection phase and determine whether the corresponding word line is passed or failed based on the comparison result. Pass indicates that the corresponding word line is a normal word line, and fail indicates that the corresponding word line is an abnormal word line.

[0102] In this application, word lines are grouped and connected to a comparison circuit via a selection switch. The comparison circuit compares the word line groups, and abnormal word lines are then identified from the word line groups based on the comparison results. In this way, abnormal word lines are detected in units of word line groups, which helps simplify the test process and structure and shorten the test time.

[0103] Based on the above embodiment, after comparing each word line group through the comparison circuit, the word line group containing abnormal word lines is determined, and then the word line group containing abnormal word lines can be compared by adjusting the selection switch, thereby determining the word line with high resistance from the word line group containing abnormal word lines.

[0104] In one embodiment, when the connected word line is in a floating state, fifth comparison information output by the comparison circuit during the floating period is obtained; based on the fifth comparison information, the word line with a smaller voltage is determined as an abnormal word line. In other embodiments, when the word lines in a word line group where an abnormal word line exists are in a floating state, the duration of the floating state of each word line can be compared by a comparison circuit, and a word line with a shorter duration can be determined from the word line group where the abnormal word line exists, and the word line with a shorter duration is the abnormal word line.

[0105] In this embodiment, the abnormal word line may be a leakage word line. Figure 8 , Figure 8Schematic diagram of leakage wordline comparison results provided by an embodiment of the present application, wherein the horizontal direction represents time and the vertical direction represents voltage, with t4 and t5 representing programming time and floating time, respectively. During the test process, the curves, from top to bottom, represent the voltage timing 801 of a selected wordline in a wordline group, the voltage timing 802 of an unselected wordline in the wordline group, a floating parameter 803, and a comparison result 804. The selected subset is connected to the operating voltage, the unselected subset is grounded, the selected wordline in the wordline group experiences a floating state under the operating voltage, the unselected wordline in the wordline group is connected to a low voltage VSS, and the selected wordlines in the wordline group include normal wordlines and abnormal wordlines. Normal wordlines are shown as solid lines, and abnormal wordlines are shown as dashed lines. The floating parameter 803 represents the floating state of the wordline, where a high-level state indicates that the selected wordline is in a floating state. The comparison result 804 includes two states: a high-level state (shown as the dashed line), which represents the abnormal wordline, and a low-level state (shown as the solid line), which represents the normal wordline.

[0106] Since the abnormal word line in the word line group has leakage, at this time, a short circuit occurs between the abnormal word line and the unselected word line 802 in the adjacent word line group. Therefore, an additional voltage divider circuit is added. Therefore, the voltage of the abnormal word line will drop faster. Therefore, when the connected word line is in a floating state, based on the fifth comparison information output by the comparison circuit, the word line with a smaller voltage can be determined as a leakage word line.

[0107] In one embodiment, each word line group may include a different number of word lines. In a preferred embodiment, each word line group includes the same number of word lines. In practical applications, if data programmed during a programming process is found to be erroneous, the word lines involved in the programming process may be grouped into a word line group, so that anomalies can be selectively detected for the word lines involved in the programming process.

[0108] In an embodiment of the present application, the controller can read the comparison result before the word line floating state ends, and determine whether the corresponding word line passes or fails based on the comparison result. Pass indicates that the corresponding word line is a normal word line, and fail indicates that the corresponding word line is an abnormal word line.

[0109] In the embodiment of the present application, the leakage word line test can be performed by a test device inside the memory during the aging test, thereby eliminating the need to perform the leakage word line test by an external test device.

[0110] The abnormal word line testing method provided in the embodiment of the present application can not only test the storage array word line (Array WL), but also test other special word lines, including special word lines not used for storing data, such as top selection lines and dummy word lines.

[0111] By performing testing using the abnormal word line testing method provided in the embodiments of the present application, the test time for each wafer can be reduced to 3 minutes.

[0112] The second aspect of the present application provides a test device for abnormal word lines. Figure 5 , the testing device is used to test the word line, including:

[0113] a plurality of word line groups, each word line group being connected to a comparison circuit;

[0114] The comparison circuit is used for comparing each word line group to obtain abnormal word lines.

[0115] It should be noted that the abnormal word line test device provided in the embodiment of the present application is arranged inside the memory, that is, the abnormal word line test device is an internal device of the memory.

[0116] In some embodiments, the comparison circuit includes a voltage comparator. The word line group is connected to the input terminal of the voltage comparator, and the voltage comparator compares the operating voltages of the connected word line group, thereby determining whether there is an abnormal word line in the connected word line group based on the output comparison result.

[0117] In some embodiments, the test device further includes a selection switch; and each word line group is connected to the comparison circuit via the selection switch.

[0118] Here, the selection switch can be used as a data selector to select any one of the multiple word line groups as needed as a valid input and connect it to the comparison circuit.

[0119] In some embodiments, the selection switch includes a plurality of path switches, each path switch connecting a corresponding word line group to the comparison circuit.

[0120] In some embodiments, the selection switch can be a logic-controlled switch, such as an XpathSwitch. The XpathSwitch includes a programmable SRAM cell. By configuring the contents of the programmable SRAM cell, one word line group can be selected from multiple word line groups as an effective input terminal. That is, the selection switch can control the corresponding word line group or the switching between the word line and the comparison circuit to be in an on state or a off state. Here, the number of word lines in each word line group can be equal or unequal. In a preferred embodiment, the number of word lines in each word line group is equal.

[0121] When comparing word lines in the word line group where an abnormal word line exists, to improve comparison efficiency, a selection switch can be used to first connect the even word lines in the word line group where an abnormal word line exists to a comparison circuit to determine whether there is an abnormal word line in the even word line. If there is an abnormal word line in the even word line, a pairwise comparison is performed on the even word lines to obtain a pairwise comparison result. If there is no abnormal word line in the even word line, the even word line is not compared, but the odd word line is compared to determine whether there is an abnormal word line in the odd word line. If there is an abnormal word line in the odd word line, a pairwise comparison is performed on the odd word line to obtain a pairwise comparison result. If there is no abnormal word line in the odd word line, the comparison of the word lines in the word line group where the abnormal word line exists is terminated. As a result, the abnormal word line can be determined without having to test each word line one by one. In this way, the detection time of the abnormal word line can be greatly reduced.

[0122] In this embodiment, abnormal wordlines include high-resistance wordlines and leaky wordlines. For high-resistance wordlines, due to their inherently high resistance, the voltage on the abnormal wordline is lower at the same time during the precharge phase, and higher at the same time during the discharge phase. Therefore, abnormal wordlines in a wordline group can be identified by comparing the voltage or time during the precharge and discharge phases.

[0123] For abnormal wordlines, such as leaky wordlines, after the wordlines in the wordline group containing the abnormal wordline undergo the same discharge time, a comparison circuit compares the current voltage of each wordline after the discharge is completed. The wordline with the higher voltage in the wordline group containing the abnormal wordline is identified as the abnormal wordline. The abnormal wordline is identified as such because the voltage on the normal wordline decreases from the operating voltage to the target voltage, while the voltage on the abnormal wordline has difficulty decreasing to the target voltage and therefore exceeds the target voltage. For specific examples, please refer to the above method examples and will not be elaborated on here.

[0124] This embodiment groups word lines into groups and connects the word line groups to a comparison circuit via a selector switch. The comparison circuit then compares the word line groups and identifies abnormal word lines from the word line groups based on the comparison results. This allows abnormal word lines to be detected in word line groups, simplifying the test process and structure and shortening test time.

[0125] An embodiment of the present application also provides a memory, comprising the above-mentioned test device; a memory array comprising multiple rows of memory cells; multiple word lines, the multiple word lines being respectively coupled to the multiple rows of memory cells; and the test device being connected to the word lines.

[0126] An embodiment of the present application also provides a memory system, including a controller and the above-mentioned memory; the controller is coupled to the memory and is used to control the memory to perform testing.

[0127] In one example, if Figure 9A As shown, the memory system 900 may include only one memory 901 and one corresponding memory controller 902 .

[0128] In another example, Figure 9B As shown, the memory system 900 may include multiple memories 901 and a corresponding memory controller 902 .

[0129] Of course, in other examples, the memory system may also include multiple memories and corresponding multiple memory controllers, which are not enumerated here.

[0130] In some embodiments, the memory system may be implemented as a storage device such as a Universal Flash Storage (UFS) device, a solid-state drive (SSD), a multimedia card in the form of MMC, eMMC, RS-MMC and micro MMC, a secure digital card in the form of SD, mini SD and micro SD, a Personal Computer Memory Card International Association (PCMCIA) card type, a Foreign Component Interconnect (PCI) type storage device, a PCI-Express (PCI-E) type storage device, a Compact Flash (CF) card, a smart media card or a memory stick, etc.

[0131] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

[0132] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

[0133] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0134] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as: multiple modules or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or modules can be electrical, mechanical or other forms.

[0135] The modules described above as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical units, that is, they may be located in one place or distributed on multiple network modules; some or all of the modules may be selected according to actual needs to achieve the purpose of this embodiment.

[0136] In addition, all functional modules in the embodiments of the present application can be integrated into one processing module, or each module can be a separate module, or two or more modules can be integrated into one module; the above-mentioned integrated modules can be implemented in the form of hardware or in the form of hardware plus software functional modules.

[0137] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A method for testing abnormal word lines, characterized in that: The method comprises: A testing device is provided; wherein the testing device includes a comparison circuit; dividing the word lines into a plurality of word line groups, and connecting each of the word line groups to the comparison circuit; During programming, the operating voltage of each word line group is compared by the comparison circuit to determine an abnormal word line in the word line group, including: Comparing each of the word line groups by the comparison circuit to determine the word line group in which an abnormal word line exists; comparing the word lines in the word line group where the abnormal word line exists by the comparison circuit to obtain a comparison result; The comparing circuit compares the word lines in the word line group where the abnormal word line exists, including connecting any two word lines in the word line group where the abnormal word line exists to two input terminals of the comparing circuit respectively.

2. The testing method according to claim 1, wherein: The comparison circuit includes a voltage comparator.

3. The testing method according to claim 1, wherein: The testing device further includes a selection switch; Connecting each of the word line groups to the comparison circuit comprises: Each of the word line groups is connected to the comparison circuit through the selection switch.

4. The testing method according to claim 3, wherein: The selection switch includes a plurality of path switches, each path switch connecting a corresponding word line group to the comparison circuit.

5. The testing method according to claim 1, wherein: The comparing circuit compares each word line group to determine the word line group where an abnormal word line exists, including: During programming, the word line group is connected to the first input terminal of the comparison circuit, and a preset reference voltage is connected to the second input terminal of the comparison circuit; The comparison circuit compares the operating voltage of the word line group with the preset reference voltage and outputs first comparison information; The word line group including abnormal word lines is determined according to the first comparison information.

6. The testing method according to claim 1, wherein: The comparing circuit compares the word lines in the word line group where the abnormal word line exists to determine the abnormal word line, including: performing a precharging operation on the word line, and obtaining second comparison information output by the comparison circuit during the precharging period; Based on the second comparison information, the word line with the smaller voltage is determined as an abnormal word line.

7. The testing method according to claim 1, wherein: The comparing circuit compares the word lines in the word line group where the abnormal word line exists to determine the abnormal word line, including: performing a discharge operation on the word line to obtain third comparison information output by the comparison circuit during the discharge period; Based on the third comparison information, the word line with a larger voltage is determined as an abnormal word line.

8. The testing method according to claim 1, wherein: The comparing circuit compares the word lines in the word line group where the abnormal word line exists to determine the abnormal word line, including: performing a discharge operation on the word line, and acquiring fourth comparison information output by the comparison circuit after the discharge is completed; Based on the fourth comparison information, the word line with a larger voltage is determined as an abnormal word line.

9. The testing method according to any one of claims 6 to 8, characterized in that: The abnormal word lines include word lines having high resistance.

10. The testing method according to claim 5, characterized in that: The comparing circuit compares the word lines in the word line group where the abnormal word line exists to determine the abnormal word line, including: When the connected word line is in a floating state, obtaining fifth comparison information output by the comparison circuit during the floating period; Based on the fifth comparison information, the word line with the smaller voltage is determined as an abnormal word line.

11. The testing method according to claim 10, characterized in that: The abnormal word line includes a leaky word line.

12. A device for testing abnormal word lines, characterized in that: The testing device is used to test a word line, and includes: a plurality of word line groups, each of the word line groups being connected to a comparison circuit; The comparison circuit is used to compare the operating voltage of each word line group to obtain an abnormal word line, including: Comparing each of the word line groups by the comparison circuit to determine the word line group in which an abnormal word line exists; comparing the word lines in the word line group where the abnormal word line exists by the comparison circuit to obtain a comparison result; The comparing circuit compares the word lines in the word line group where the abnormal word line exists, including connecting any two word lines in the word line group where the abnormal word line exists to two input terminals of the comparing circuit respectively.

13. The testing device according to claim 12, characterized in that: The comparison circuit includes a voltage comparator.

14. The testing device according to claim 12, characterized in that: Also includes: A selection switch is configured to divide the word lines into a plurality of word line groups and connect each of the word line groups to the comparison circuit.

15. The testing device according to claim 14, characterized in that: The selection switch includes a plurality of path switches, each path switch connecting a corresponding word line group to the comparison circuit.

16. A memory, characterized in that: include: The testing device according to any one of claims 12 to 15; a memory array comprising a plurality of memory cell rows; a plurality of word lines, the plurality of word lines being coupled to the plurality of memory cell rows respectively; The testing device is connected to the word line.

17. A memory system, characterized in that: The invention comprises a controller and the memory according to claim 16; the controller is coupled to the memory and is used to control the memory.

Images