Solar cell and method of production, cell assembly
By adopting the structure of emitter layer, N-type silicon substrate, back surface field layer and metal-doped amorphous silicon layer in solar cells, and utilizing abundant hydrogen atoms to passivate defects and improve carrier selectivity, the problems of interface recombination and resistance loss caused by direct contact between metal electrodes and silicon materials are solved, thereby improving cell performance.
Patent Information
- Application Number
- CN202010963063.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-09-14
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2040-09-14
AI Technical Summary
The direct contact between metal electrodes and silicon materials in solar cells causes serious interface recombination and large resistance loss.
A structure of an emitter layer, an N-type silicon substrate, a back surface field layer and a metal-doped amorphous silicon layer stacked in sequence is adopted. The percentage of hydrogen atoms in the metal-doped amorphous silicon layer is 20% ≥ w ≥ 5%, and a metal-doped amorphous silicon layer is arranged between the back metal electrode and the back surface field layer to improve carrier selectivity and passivate defects, thereby reducing interface recombination and resistance loss.
The interface recombination between the back metal electrode and the back surface field layer is effectively reduced, the resistance loss is reduced, and the fill factor of the solar cell is improved.
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Figure CN114188424B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of photovoltaic technology, in particular to a solar cell, a production method and a battery assembly. BACKGROUND
[0002] At present, the electrode in the solar cell is mostly a metal electrode, and the direct contact between the metal electrode and the silicon material has a large interface recombination.
[0003] In order to reduce the interface recombination caused by the direct contact between the metal electrode and the silicon material, a dielectric layer is usually added between the two in the prior art. However, the setting of the dielectric layer will obviously increase the resistance loss. SUMMARY
[0004] The present application provides a solar cell, a production method and a battery assembly, and aims to solve the problems of serious interface recombination and large resistance loss of the metal electrode and the silicon material in the solar cell.
[0005] According to a first aspect of the present application, a solar cell is provided, comprising:
[0006] An emitter layer, an N-type silicon substrate, a back surface field layer and a metal-doped amorphous silicon layer are sequentially stacked;
[0007] The emitter layer is located on the light-facing surface of the N-type silicon substrate;
[0008] The front electrode is located on the light-facing surface of the emitter layer;
[0009] The back surface field layer is located on the back light-facing surface of the N-type silicon substrate;
[0010] The back metal electrode is located on the back light-facing surface of the metal-doped amorphous silicon layer.
[0011] In the present application, the metal-doped amorphous silicon layer between the back surface field layer and the back metal electrode can improve the blocking effect on the minority carriers and selectively pass the majority carriers to improve the carrier selectivity, so that the interface recombination of the back metal electrode and the back surface field layer is reduced, and the resistance loss is reduced. At the same time, the metal-doped amorphous silicon layer has a semi-metallic conductivity, and has good conductivity. The atomic percentage of hydrogen atoms in the metal-doped amorphous silicon layer is w, and 20% ≥ w ≥ 5%. The abundant hydrogen atoms can effectively passivate the internal defects and interface defects of the N-type silicon substrate and the back surface field layer, so that the interface recombination of the back metal electrode and the back surface field layer is reduced, and the resistance loss is reduced. Moreover, the above-mentioned solar cell has a one-dimensional carrier transport mode, which can improve the fill factor of the solar cell. At the same time, the metal-doped amorphous silicon layer is arranged on the back light-facing surface of the N-type silicon substrate, and will not affect the light absorption.
[0012] Optionally, the atomic percentage of metal atoms in the metal-doped amorphous silicon layer decreases in turn from the vicinity of the back metal electrode to the direction away from the back metal electrode.
[0013] The atomic percentage of metal atoms in the metal-doped amorphous silicon layer near the back metal electrode is 30%-100%.
[0014] Optionally, the solar cell further comprises a tunneling layer; the material of the tunneling layer is selected from at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, silicon carbide or amorphous silicon; the thickness of the tunneling layer is 0.5nm-3nm.
[0015] The tunneling layer is located between the back metal electrode and the metal-doped amorphous silicon layer.
[0016] Or, the tunneling layer is located between the back surface field layer and the metal-doped amorphous silicon layer.
[0017] Optionally, the solar cell further comprises a back passivation layer; the back passivation layer is located on the back light surface of the back surface field layer; the back passivation layer has at least one opening.
[0018] The back metal electrode and the metal-doped amorphous silicon layer are filled in the opening.
[0019] The back metal electrode and the metal-doped amorphous silicon layer both cover the part of the back passivation layer which is not opened.
[0020] Optionally, the area of the projection of the opening on the back light surface of the N-type silicon substrate accounts for 5-30% of the area of the back light surface of the N-type silicon substrate.
[0021] Optionally, the back metal electrode is at least one of aluminum electrode, silver electrode, copper electrode and ruthenium electrode.
[0022] Optionally, the solar cell further comprises a local heavy doping layer near the N-type silicon substrate and in contact with the front electrode.
[0023] The doping type of the local heavy doping layer is the same as that of the emitter layer, and the doping concentration is greater than that of the emitter layer.
[0024] Optionally, the solar cell further comprises a front passivation anti-reflection layer on the light surface of the emitter layer; the material of the front passivation anti-reflection layer is selected from at least one of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide and amorphous silicon, and the thickness of the front passivation anti-reflection layer is 20nm-200nm.
[0025] According to a second aspect of the present application, there is further provided a method for producing a solar cell, comprising the following steps:
[0026] providing an N-type silicon substrate;
[0027] forming an emitter layer on a light-receiving surface of the N-type silicon substrate;
[0028] providing a front electrode on the light-receiving surface of the emitter layer;
[0029] forming a back surface field layer on a back surface of the N-type silicon substrate;
[0030] depositing an intrinsic hydrogenated amorphous silicon layer on the back surface of the back surface field layer;
[0031] depositing a back metal electrode on the back surface of the intrinsic hydrogenated amorphous silicon layer to obtain a cell precursor;
[0032] annealing the cell precursor, the intrinsic hydrogenated amorphous silicon layer and the back metal electrode diffusing into each other during the annealing process to form a metal-doped amorphous silicon layer; the atomic percentage of hydrogen atoms in the metal-doped amorphous silicon layer is w, and 20%≥w≥5%.
[0033] According to a third aspect of the present application, there is further provided a cell assembly, comprising any of the aforementioned solar cells.
[0034] The method for producing a solar cell and the cell assembly have the same or similar advantages as the aforementioned solar cell. BRIEF DESCRIPTION OF DRAWINGS
[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments of the present application will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.
[0036] Figure 1 a structure schematic diagram of a first solar cell in the embodiments of the present application is shown;
[0037] Figure 2 a structure schematic diagram of a second solar cell in the embodiments of the present application is shown;
[0038] Figure 3 a structure schematic diagram of a third solar cell in the embodiments of the present application is shown;
[0039] Figure 4 a structure schematic diagram of a fourth solar cell in the embodiments of the present application is shown.
[0040] Brief Description of Drawings
[0041] 1 - front electrode, 2 - front passivation anti-reflection layer, 3 - emitter layer, 4 - local heavily doped layer, 5 - N-type silicon substrate, 6 - back surface field layer, 7 - tunneling layer, 8 - metal-doped amorphous silicon layer, 9 - back metal electrode, 10 - back passivation layer. DETAILED DESCRIPTION
[0042] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.
[0043] In the embodiments of the present application, reference is made to Figure 1 , as shown in the drawings, Figure 1 A structure schematic diagram of a first solar cell in the embodiments of the present application is shown. The solar cell comprises: an emitter layer 3, an N-type silicon substrate 5, a back surface field layer 6, and a metal-doped amorphous silicon layer 8, which are sequentially stacked. The back surface field layer 6 here is a silicon-based surface field. The metal-doped amorphous silicon layer 8 is formed by mutual diffusion of an intrinsic hydrogenated amorphous silicon layer and a back metal electrode 9 in an annealing process. The atomic percentage of hydrogen atoms in the metal-doped amorphous silicon layer 8 is w, and 20% ≥ w ≥ 5%. The abundant hydrogen atoms can effectively passivate internal defects and interface defects of the N-type silicon substrate 5 and the back surface field layer 6, so as to reduce interface recombination of the back metal electrode 6 and the back surface field layer 9 and reduce resistance loss.
[0044] The light-receiving surface of the N-type silicon substrate 5 is a surface of the N-type silicon substrate 5 that receives light. The back surface of the N-type silicon substrate 5 is a surface opposite to the light-receiving surface. The emitter layer 3 is located on the light-receiving surface of the N-type silicon substrate 5.
[0045] The front electrode 1 is located on the light-receiving surface of the emitter layer 3, and the front electrode 1 is used to collect carriers on the emitter layer 3. The front electrode 1 can be any one of an Al electrode, an Al / Ag electrode, a Ni / Cu electrode, a Ni / Cu / Sn electrode, a Cr / Pd / Ag electrode, or a Ni / Cu / Ag electrode. In the embodiments of the present application, whether the emitter layer 3 is a selective contact layer is not specifically limited. For example, the emitter layer 3 can be a hole-selective contact layer.
[0046] The back surface field layer 6 is located on the back side of the N-type silicon substrate 5, and further, the metal-doped amorphous silicon layer 8 is arranged on the back side of the N-type silicon substrate 5, which does not affect the absorption of light. The back surface field layer 6 is not specifically limited to be a selective contact layer. For example, the back surface field layer 6 can be an electron-selective contact layer. The back metal electrode 9 is located on the back side of the metal-doped amorphous silicon layer 8.
[0047] In the embodiment of the present application, the metal-doped amorphous silicon layer 8 between the back surface field layer 6 and the back metal electrode 9 can improve the blocking effect on the minority carriers and selectively pass the majority carriers, so as to improve the carrier selectivity, reduce the interface recombination between the back metal electrode 9 and the back surface field layer 6, and reduce the resistance loss. Meanwhile, the metal-doped amorphous silicon layer 8 has a semi-metallic conductivity, and has a good conductivity. The atomic percentage of hydrogen atoms in the metal-doped amorphous silicon layer 8 is w, and 20%≥w≥5%. The abundant hydrogen atoms can effectively passivate the internal defects and interface defects of the N-type silicon substrate 5 and the back surface field layer 6, so as to reduce the interface recombination between the back metal electrode 9 and the back surface field layer 6, and reduce the resistance loss. Moreover, the above-mentioned solar cell has a one-dimensional carrier transport mode, which can improve the fill factor of the solar cell.
[0048] Optionally, the atomic percentage of metal atoms in the metal-doped amorphous silicon layer 8 decreases from the position close to the back metal electrode 9 to the position far from the back metal electrode 9. The above-mentioned distribution of the atomic percentage of metal atoms is more conducive to improving the carrier selectivity, reducing the interface recombination between the back metal electrode 9 and the back surface field layer 6, and reducing the resistance loss, and has a good conductivity.
[0049] Optionally, the atomic percentage of metal atoms in the metal-doped amorphous silicon layer 8 close to the back metal electrode 9 is 30%-100%, which is conducive to improving the carrier selectivity, reducing the interface recombination between the back metal electrode 9 and the back surface field layer 6, and reducing the resistance loss, and has a good conductivity.
[0050] Optionally, the solar cell further comprises a tunneling layer 7. The material of the tunneling layer 7 is selected from at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, silicon carbide or amorphous silicon. The thickness of the tunneling layer 7 is 0.5 nm-3 nm. The thickness of the tunneling layer 7 is the size in the stacking direction of the emitter layer 3, the N-type silicon substrate 5, the back surface field layer 6 and the metal-doped amorphous silicon layer 8. The above-mentioned tunneling layer 7 can prevent the back metal electrode 9 from diffusing to the back surface field layer 6 or even diffusing to the N-type silicon substrate 5 during the annealing process.
[0051] Figure 2 A structure schematic diagram of a second solar cell in the embodiment of the present application is shown. As shown in FIG. 2, the solar cell comprises an N-type silicon substrate 5, an emitter layer 3, a back surface field layer 6, a metal-doped amorphous silicon layer 8 and a back metal electrode 9. The emitter layer 3 is located on the front side of the N-type silicon substrate 5. The back surface field layer 6 is located on the back side of the N-type silicon substrate 5. The metal-doped amorphous silicon layer 8 is arranged on the back side of the back surface field layer 6. The back metal electrode 9 is located on the back side of the metal-doped amorphous silicon layer 8. Figure 2As shown, the tunneling layer 7 is located between the back metal electrode 9 and the metal-doped amorphous silicon layer 8. During the annealing process, the intrinsic hydrogenated amorphous silicon layer and the back metal electrode 9 need to cross the tunneling layer 7 to diffuse into each other to form the metal-doped amorphous silicon layer 8. On the basis of the diffusion to form the metal-doped amorphous silicon layer 8, the back metal electrode 9 can be further prevented from diffusing into the back surface field layer 6 or even into the N-type silicon substrate 5 during the annealing process. The degree of mutual diffusion between the two can be controlled by adjusting the thickness and density of the tunneling layer 7, thereby affecting the doping level of the intrinsic hydrogenated amorphous silicon layer.
[0052] For example, if the material of the tunneling layer 7 is SiO2 and the back metal electrode 9 is an aluminum electrode, the metal atoms and the Si atoms in the intrinsic hydrogenated amorphous silicon layer cannot directly diffuse into each other, and need to diffuse into each other after passing through the SiO2 interface layer. The metal atoms enter the Si gap in the form of interstitial diffusion, and the Si-Si bond is transformed from a covalent bond to a metallic bond, which weakens the bond strength of the Si-Si bond. The intrinsic hydrogenated amorphous silicon layer / SiO2 interface provides a preferential crystallization nucleation site for amorphous silicon. After annealing, Si crystallization occurs in the original Al layer and the interface SiO2 layer. Since the diffusion rate of Si in Al is greater than the diffusion rate of Si in Si, Si atoms will diffuse through it and dissolve in Al. In this way, the Si atoms that first diffuse into Al will preferentially nucleate at the Al grain boundary and grow as the Si atoms continue to diffuse. Since aluminum metal has a strong affinity for oxygen, Al atoms can easily attract oxygen atoms from the SiO2 interface layer, consume oxygen in the SiO2 interface layer, and ultimately thin the interface layer, thereby increasing the tunneling probability of the interface layer and providing good protection for the back surface field layer 6 and even the N-type silicon substrate 5.
[0053] Or, refer to Figure 1 As shown, the tunneling layer 7 is located between the back surface field layer 6 and the metal-doped amorphous silicon layer 8 . The tunneling layer 7 can prevent the back metal-doped amorphous silicon layer 8 from diffusing into the back surface field layer 6 or even into the N-type silicon substrate 5 .
[0054] It should be noted that the tunneling layer 7 can be formed by annealing an oxide layer formed by deposition or natural oxidation to reduce its thickness by at least 50%. The deposited or naturally oxidized oxide layer blocks the interface diffusion between the metal and the intrinsic hydrogenated amorphous silicon layer to a certain extent.
[0055] Figure 3 A schematic structural diagram of a third solar cell in an embodiment of the present invention is shown. Figure 4 FIG. 4 shows a schematic diagram of the structure of a fourth solar cell in an embodiment of the present invention. Figure 3 or Figure 4 As shown, the solar cell optionally further includes a back passivation layer 10, which is located on the backlight side of the back surface field layer 6. The back passivation layer 10 has at least one opening, and the number and size of the opening are not specifically limited.
[0056] The back metal electrode 9 and metal-doped amorphous silicon layer 8 fill the opening, extending from the backlit side of the opening to form a single, integrated structure. The back passivation layer 10 creates a partial contact between the back surface field layer 6 and the back metal electrode 9, reducing contact resistance and recombination. The back metal electrode 9 and metal-doped amorphous silicon layer 8 outside the opening have higher conductivity, facilitating current flow to the contact point and boosting the open-circuit voltage.
[0057] The back metal electrode 9 and the metal-doped amorphous silicon layer 8 both cover the unopened portion of the back passivation layer 10 to maintain good selective contact and passivation effects.
[0058] Optionally, the projection area of the opening on the backlight surface of the N-type silicon substrate 5 accounts for 5-30% of the area of the backlight surface of the N-type silicon substrate 5. In this case, the contact resistance is small, the conductivity is high, and the passivation effect is also good.
[0059] Figure 3 The tunneling layer 7 is located between the back surface field layer 6 and the metal-doped amorphous silicon layer 8. Figure 4 In the embodiment, the tunneling layer 7 is located between the back surface field layer 6 and the back metal electrode 9 . Figure 4 In the case of setting the back passivation layer 10, the tunneling layer 7 is set on the entire surface, and the production method is relatively simple. It should be noted that Figure 3 、 Figure 4 In the embodiment, the positions of the metal-doped amorphous silicon layer 8 and the tunneling layer 7 can be interchanged.
[0060] Optionally, the back metal electrode 9 is at least one of an aluminum electrode, a silver electrode, a copper electrode, and a ruthenium electrode. The metal-doped amorphous silicon layer formed by the back metal electrode 9 of the above materials has good selective contact effect, small contact resistance, high conductivity, and good passivation effect.
[0061] Ruthenium (Ru) can be introduced into a-Si:H by magnetron sputtering, with the thickness of the Ru film being 2-200nm, and then aluminum electrodes, silver electrodes, etc. are deposited. Ru doping greatly improves the electrical conductivity of the a-Si:H film. The introduction of Ru causes disturbances and structural reorganization in the amorphous network of a-Si:H, resulting in a large number of defects. Ru atoms randomly replace Si atoms therein. Due to the difference in atomic properties, the chemical bonds are further distorted and large local stresses are generated. Si atoms weaken the huge stress in the amorphous silicon film by local random movement, further making the structure more disordered. The conductivity of the film increases with increasing doping concentration, and the conductivity is similar to the conductivity characteristics of metallization. The Ru doping concentration in the a-Si:H film is less than 10% by atomic percentage.
[0062] The introduction of metal Ru can not only dope a-Si:H thin film to improve its conductivity, but also can be used as a barrier layer for the overlying electrode of electroplated aluminum, silver and the like. For example, copper can be electroplated on the Ru layer, which can block the diffusion of copper atoms. Ru has good thermal stability, good interface contact with copper and other medium layers, and does not react with copper and medium materials.
[0063] The back surface metal electrode 9 can be a full back electrode layer. Even if the contact resistance is relatively large (such as 100 mΩcm 2 , it will not cause significant efficiency loss. This structure also simplifies the current flow in the solar cell to one dimension, eliminates lateral resistance loss, produces a high fill factor, and allows the use of a lower doped concentration of crystalline silicon substrate, reduces Auger recombination and bandgap narrowing effects, improves the lifetime and diffusion length of minority carriers, and increases the current density of the cell, thereby achieving high conversion efficiency on a low doped concentration of crystalline silicon substrate.
[0064] Optionally, the solar cell further comprises a local heavy doping layer 4 close to the N-type silicon substrate 5 and in contact with the front electrode 1. The doping type of the local heavy doping layer 4 is the same as that of the emitter layer 3, and the doping concentration is greater than that of the emitter layer 3. That is, the emitter layer 3 is p+, and the local heavy doping layer 4 is p++, forming a p+p++ high-low junction. This can not only passivate the contact of the solar cell and reduce the surface recombination of the contact area, but also form a good ohmic contact with the front electrode 1, further improving the open circuit voltage and conversion efficiency of the cell.
[0065] Optionally, the solar cell further comprises a front passivation anti-reflection layer 2 on the light-facing surface of the emitter layer 3. The material of the front passivation anti-reflection layer 2 is selected from at least one of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide, and amorphous silicon. The thickness of the front passivation anti-reflection layer 2 is 20-200 nm, which has good passivation and anti-reflection effects. The thickness of the front passivation anti-reflection layer 2 is the size in the direction of the stacking of the emitter layer 3, the N-type silicon substrate 5, the back surface field layer 6, and the metal-doped amorphous silicon layer 8.
[0066] The embodiment of the present application also provides a production method of a solar cell, which comprises the following steps:
[0067] Step S1, providing an N-type silicon substrate.
[0068] Step S2, forming an emitter layer on the light-facing surface of the N-type silicon substrate.
[0069] Specifically, the emitter layer 3 can be formed by texturing and diffusion on the light-facing surface of the N-type silicon substrate 5. For example, an N-type 180 μm c-Si crystalline silicon substrate with a resistivity of 2 Ω.cm grown using the Czochralski method is cleaned and texturized on the front surface. Boron is then diffused on the texturized surface to form the emitter layer 3. The diffusion resistance is approximately 110 Ω / square.
[0070] Step S3: providing a front electrode on the light-facing surface of the emitter layer.
[0071] Step S4: forming a back surface field layer on the backlight surface of the N-type silicon substrate.
[0072] For example, phosphorus is diffused on the backlight surface of the N-type silicon substrate 5 to form the back surface field layer 6 .
[0073] Step S5 , depositing an intrinsic hydrogenated amorphous silicon layer on the backlight side of the back surface field layer.
[0074] It can be formed by a chemical vapor deposition process supported by plasma excitation or thermal excitation, for example, by depositing an intrinsic hydrogenated amorphous silicon layer at around 300°C with a thickness of 5nm-50nm by PECVD. The PECVD-deposited intrinsic hydrogenated amorphous silicon layer (a-Si:H) has a high hydrogen content (e.g., 10-20%), which can effectively passivate interface defects.
[0075] Step S6: depositing a back metal electrode on the backlight side of the intrinsic hydrogenated amorphous silicon layer to obtain a battery precursor.
[0076] Step S7, annealing the battery precursor, wherein the intrinsic hydrogenated amorphous silicon layer and the back metal electrode diffuse into each other during the annealing process to form a metal-doped amorphous silicon layer; the atomic percentage of hydrogen atoms in the metal-doped amorphous silicon layer is w, 20% ≥ w ≥ 5%.
[0077] For example, aluminum is thermally evaporated to a thickness of approximately 1 μm on the backlight side of the intrinsic hydrogenated amorphous silicon layer to form the back metal electrode 9. If a front passivation anti-reflection layer 2 is provided on the light-facing side of the emitter layer, the front surface passivation anti-reflection layer 2 is laser-opened, and a Ni / Cu / Ag metal stack is electroplated to form the front electrode 1 (the front electrode occupies approximately 3% of the area of the light-facing side of the N-type silicon substrate). Finally, the cell precursor is annealed at a temperature of 300°C to 450°C to sinter the front contact and alloy the back Al / a-Si:H stack. At this annealing temperature, the quality of the front passivation anti-reflection layer 2 is relatively stable. The thickness of the front passivation anti-reflection layer 2 and the heat treatment of the alloying step achieve a good fill factor (FF) without affecting the open-circuit voltage (Voc).
[0078] It is noted that the annealing temperature of the battery precursor can be between 200-500°C, and the annealing time can be between 10 minutes and 60 minutes. The annealing temperature is selected to be a temperature at which the back metal electrode interacts with the a-Si:H but not with the tunneling layer. For example, for the Al / SiO2system, the maximum stable temperature is estimated to be in the range of 200-400°C, while the Al / Al2O3interaction is expected to start at a lower temperature. SiO2and Al2O3are materials of the tunneling layer.
[0079] At an annealing temperature of 200°C, the diffusion rate of Si atoms in Si is relatively small, and the Si atoms are difficult to recombine to transform from a disordered non-stable state to an ordered crystalline state. However, the diffusion rate of Si atoms in Al is much faster (D≈5xlO -12 cm -2 s -1 ). Thus, the Si atoms diffused into Al form crystal nuclei in Al, and grow with the continued diffusion of Si atoms. Al acts as a medium in the formation and growth of Si crystal nuclei. The diffusion of Al in Si is the rate-limiting stage of the entire reaction process.
[0080] At this annealing temperature, the SiO2layer appears to limit any significant movement of Al further into the c-Si. Al is aggregated on the surface of SiO2, and due to interdiffusion, Si is partially dissolved in Al, and there is a small amount of Si (about 1% atomic percentage) in the Al layer. However, the atomic percentage of Al in the underlying a-Si:H thin film is between 40-100%. These concentrations are much higher than the solubility limit of doping, and the intrinsic a-Si:H layer is effectively doped and exhibits a semi-metallic phase, and thus has high conductivity. This is due to the low-temperature interaction of a-Si:H with metals, particularly Al. At an annealing temperature much lower than the Al-Si eutectic temperature (577°C), Si will dissolve in Al at a low concentration. The dissolution rate is faster if the silicon is amorphous, and the dissolution rate is faster if the amorphous thin film has a high hydrogen concentration. Once dissolved, the Si atoms can diffuse through the Al and crystallize at nucleation points (defects, surfaces, grain boundaries, etc.), and the Al doping concentration is likely to be at the solubility limit.
[0081] Optionally, the intrinsic hydrogenated amorphous silicon layer and the back metal electrode 9 can be prepared by ion beam evaporation, electron beam evaporation, or radio frequency magnetron sputtering. For example, both can be prepared in the same reaction chamber by any of the above three methods.
[0082] Optionally, the intrinsic hydrogenated amorphous silicon layer can be prepared by PECVD under vacuum conditions. The back metal electrode 9 can be prepared by vacuum thermal evaporation or ion beam evaporation under vacuum conditions. Both can be prepared in different reaction chambers.
[0083] It should be noted that the vacuum thermal evaporation and PECVD have a lower crystallization temperature, such as 180℃. The magnetron sputtering and thermal evaporation method have a higher crystallization temperature, such as 500℃.
[0084] Optionally, the front passivation anti-reflection layer 2 can be deposited on the light-emitting surface of the emitter layer, and the tunneling layer 7 can be deposited at the corresponding position. The front passivation anti-reflection layer 2 is deposited by PECVD at about 400℃ to form a SiN film with a thickness of about 80nm. x and an Al2O3 film deposited by ALD at about 200℃ to form a film with a thickness of about 15nm. The tunneling layer 7 is formed by a thin oxide layer through thermal oxidation, wet chemical oxidation, oxidation by irradiation in the presence of ozone or LPCVD, and has a thickness of 0.5nm-3nm.
[0085] The embodiments of the present application also provide a battery assembly, which comprises any of the above-mentioned solar cells. The emitter layer, N-type silicon substrate, back surface field layer, metal-doped amorphous silicon layer and the like in the assembly can refer to the above-mentioned descriptions and achieve the same or similar beneficial effects. To avoid repetition, the above-mentioned descriptions will not be repeated here.
[0086] The embodiments of the present application are described above in combination with the accompanying drawings, but the present application is not limited to the above-mentioned specific embodiments, and the above-mentioned specific embodiments are only illustrative and not restrictive. Those skilled in the art can make many forms under the inspiration of the present application without departing from the purpose of the present application and the scope protected by the claims, and these all belong to the protection of the present application.
Claims
1. A solar cell, characterized in that: include: An emitter layer, an N-type silicon substrate, a back surface field layer, and a metal-doped amorphous silicon layer are stacked in sequence; the atomic percentage of hydrogen atoms in the metal-doped amorphous silicon layer is w, and 20% ≥ w ≥ 5%; The emitter layer is located on the light-facing surface of the N-type silicon substrate; The front electrode is located on the light-facing surface of the emitter layer; The back surface field layer is located on the backlight side of the N-type silicon substrate; The back metal electrode is located on the backlight side of the metal-doped amorphous silicon layer; It also includes a tunneling layer, wherein the tunneling layer is located between the back metal electrode and the metal-doped amorphous silicon layer, or the tunneling layer is located between the back surface field layer and the metal-doped amorphous silicon layer; The atomic percentage of metal atoms in the metal-doped amorphous silicon layer decreases from close to the back metal electrode to away from the back metal electrode; in the metal-doped amorphous silicon layer, the atomic percentage of metal atoms close to the back metal electrode is 30%-100%.
2. The solar cell according to claim 1, characterized in that The material of the tunneling layer is selected from at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, silicon carbide or amorphous silicon; and the thickness of the tunneling layer is 0.5 nm-3 nm.
3. The solar cell according to claim 1, wherein Also includes: Back passivation layer; The back passivation layer is located on the backlight side of the back surface field layer; The back passivation layer has at least one opening; The back metal electrode and the metal-doped amorphous silicon layer are filled in the opening; The back metal electrode and the metal-doped amorphous silicon layer both cover the unopened portion of the back passivation layer.
4. The solar cell according to claim 3, characterized in that The projection area of the opening on the backlight surface of the N-type silicon substrate accounts for 5-30% of the area of the backlight surface of the N-type silicon substrate.
5. The solar cell according to claim 1, wherein The back metal electrode is at least one of an aluminum electrode, a silver electrode, a copper electrode, and a ruthenium electrode.
6. The solar cell according to any one of claims 1 to 5, characterized in that: Also includes: a local heavily doped layer close to the N-type silicon substrate and in contact with the front electrode; The doping type of the local heavily doped layer is the same as the doping type of the emitter layer, and the doping concentration is greater than the doping concentration of the emitter layer.
7. The solar cell according to any one of claims 1 to 5, characterized in that: Also includes: A front passivation anti-reflection layer is located on the light-facing surface of the emitter layer; the material of the front passivation anti-reflection layer is selected from: at least one of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, silicon carbide, and amorphous silicon, and the thickness of the front passivation anti-reflection layer is 20nm-200nm.
8. A method for producing a solar cell, characterized in that: The steps include: Providing an N-type silicon substrate; forming an emitter layer on the light-facing surface of the N-type silicon substrate; Disposing a front electrode on the light-facing surface of the emitter layer; forming a back surface field layer on the backlight surface of the N-type silicon substrate; depositing an intrinsic hydrogenated amorphous silicon layer on the backlit surface of the back surface field layer; Depositing a back metal electrode on the backlit surface of the intrinsic hydrogenated amorphous silicon layer to obtain a battery precursor; Annealing the battery precursor, wherein the intrinsic hydrogenated amorphous silicon layer and the back metal electrode diffuse into each other during the annealing process to form a metal-doped amorphous silicon layer; the atomic percentage of hydrogen atoms in the metal-doped amorphous silicon layer is w, and 20% ≥ w ≥ 5%; the atomic percentage of metal atoms in the metal-doped amorphous silicon layer decreases from close to the back metal electrode to away from the back metal electrode; the atomic percentage of metal atoms in the metal-doped amorphous silicon layer close to the back metal electrode is 30%-100%; A tunneling layer is formed between the back metal electrode and the metal-doped amorphous silicon layer, or the tunneling layer is formed between the back surface field layer and the metal-doped amorphous silicon layer.
9. A battery assembly, characterized in that: include: The solar cell according to any one of claims 1 to 7.
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