A power semiconductor module with low parasitic parameters and a packaging method

Abstract

The application discloses a power semiconductor module with low parasitic parameters and a packaging method. The power module of the application comprises two substrates, a top cover is used as a second substrate, and a diode or a resistance element is attached inside the second substrate; the power module of the application is obtained by marking the position of the element to be fixed by using the top cover as the second substrate before the die bonding process step of the traditional packaging. The application adopts the design of fixing the diode or the resistance element and other non-main heating elements on the top cover, and the improvement of the structural design helps to reduce the parasitic parameters and other electrical losses of the power module under high-frequency operation. Meanwhile, the application does not need to add new materials and new structures to the existing structure, does not need to introduce new process schemes, and can be implemented under the existing manufacturing process, so that the application is convenient for popularization and application.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and in particular relates to a power semiconductor module with low parasitic parameters and a packaging method. Background Art

[0002] Power semiconductor devices, core components in rail transit equipment, power equipment, and new energy vehicles, have seen significant growth in recent years. In particular, with the rapid development of the new energy vehicle industry and the associated expansion of charging stations, the power semiconductor device industry has entered a golden period of development. An increasing number of high-power devices and modules have entered the market, significantly boosting the research and development of power semiconductors. Energy equipment applications are moving towards high switching frequencies and high power densities, making the high-frequency performance of power semiconductor devices a critical parameter. High-frequency devices pose challenges to the development of entire modules. In the semiconductor field, packaging serves as the bridge between power devices and their applications. Due to packaging limitations, the performance advantages of chips cannot be fully realized in power devices of the same specifications.

[0003] High-power devices have the characteristics of small junction capacitance and low gate charge. While achieving high switching frequency and low switching loss, extremely high di / dt states will produce greater voltage overshoot and oscillation, causing device voltage stress, increased loss, and electromagnetic interference problems. Similarly, under the same stray capacitance, higher dv / dt will also increase common-mode current. High switching speeds increase the sensitivity of parasitic symmetry, making it difficult to maintain current balance at high switching speeds. In addition, the packaging of devices and modules will need to withstand higher electric fields. This characteristic leads to the urgent need for new insulating packaging materials to be compatible with various high-power operating conditions. These electrical loss issues become particularly difficult in power modules that use a large number of chips.

[0004] Traditionally, the circuit topology of power modules with traditional packaging structures has been on a two-dimensional plane, with power chips, diodes, resistors, and other components mounted on direct copper bonding substrates (DBCs). After years of development, this type of packaging method has become a mature packaging technology. However, for power modules moving towards high frequencies, traditional packaging methods will face numerous electrical challenges in terms of parasitic parameters and electromagnetic shielding in high-power module packaging. During the development of power module packaging, a new multi-substrate packaging method has emerged. This method utilizes the concept of a three-dimensional multi-layer substrate while maintaining the original circuit topology. Multiple substrates can achieve the functions of separating devices and current switching channels. For example, by placing another "substrate" at the vertical height of the original DBC substrate, the current can be switched between the upper and lower substrates when the module is operating, and the power loop current flows vertically between different layers. This advanced structure greatly reduces the current loop area and significantly reduces parasitic inductance. A common design is to build a new substrate on the DBC substrate by setting up metal support pillars. The second substrate uses a mature printed circuit board (PCB). This method has mature technology and high feasibility, but a large number of product yield issues arise in actual production, especially in the reliability of the support pillars. Summary of the Invention

[0005] In view of the shortcomings of the existing technology, in order to cope with the challenges of parasitic parameters and electromagnetic shielding in high-power module packaging, in order to control the cost of packaging and reduce the complexity of the process, the present invention proposes a power module with low parasitic parameters and a packaging method thereof with a novel packaging layout.

[0006] The technical solution of the present invention is specifically described as follows.

[0007] The present invention provides a power semiconductor module with low parasitic parameters, which includes a base plate, a DBC substrate, a chip, a power terminal, a non-primary heating element and a shell. The module adopts a dual-substrate structure, wherein a DBC substrate is welded on the base plate, the DBC substrate serves as a first substrate, the chip is mounted on the copper layer of the DBC substrate, the power terminal is welded on the DBC substrate, the shell is packaged on the base plate, the top cover of the shell serves as a second substrate, the non-primary heating element is mounted on the inner side of the top cover via a first metal patch, and the non-primary heating element is electrically interconnected with the power terminal via a second metal patch provided on the top cover.

[0008] In the present invention, the non-essential heating elements include resistors and freewheeling diodes.

[0009] In the present invention, the first metal patch is a copper sheet.

[0010] In the present invention, the non-primary heating element and the chip on the DBC substrate are flexibly bonded via ribbon bonding wires.

[0011] The present invention also provides a packaging method for the above-mentioned power semiconductor module, the specific steps of which are as follows:

[0012] The first step is to prepare the base plate for power module packaging. At the same time, a temporary base plate is added next to it. The top cover is placed on the temporary base plate and fixed to the temporary base plate with bolts.

[0013] The second step is to weld and fix the DBC substrate to the bottom plate, and install the first metal patch on the top cover. The first metal patch serves as a welding support plate and also plays the role of electrical connection.

[0014] The third step is to mount the chip on the DBC substrate through reflow soldering, and to mount the non-main heating components on the top cover through reflow soldering;

[0015] The fourth step is to fix the power terminals to the DBC substrate by ultrasonic welding, and complete the wire bonding between the electronic components on the DBC substrate. After that, the housing frame is welded to the DBC substrate, and the non-main heating components on the top cover and the chip on the DBC substrate are flexibly bonded by ribbon bonding wires.

[0016] Step 5: Install a second metal patch on the top cover, electrically interconnect the power terminals and non-main heating components through the second metal patch, install the top cover on the housing frame, and add potting material by injection;

[0017] The sixth step is to carry out module molding, terminal bending and laser marking processes.

[0018] In the present invention, in the second step, the first metal patch is a copper sheet; in the third step, the non-main heating elements include a resistor and a freewheeling diode; in the fifth step, the potting material is an epoxy resin-based potting material or silicone gel.

[0019] In the present invention, if a sintered silver pressure sintered chip is used in the third step, the chip is sintered first and then the DBC substrate is mounted.

[0020] Compared with the prior art, the present invention has the following beneficial effects:

[0021] The power module packaging design proposed in the present invention adopts a 3D dual-substrate top-mounted packaging design, which utilizes the concept of multi-layer substrates, with two "substrates" placed on the top and bottom. When the module is working, the current can be switched between the top substrate and the bottom substrate, and the power loop current flows vertically between different layers. The module using this structural design greatly reduces the current loop area and can significantly reduce parasitic inductance.

[0022] The design of fixing the non-main heating element such as diode or resistance element to the top cover of the application helps to reduce the parasitic parameters and other electrical losses of the power module under high frequency operation. Meanwhile, the change of the position of the element does not affect the operation of the main heat dissipation channel of the module. Compared with the previous multi-substrate packaging, the application does not need to add new materials and structures, and does not need to introduce new process schemes, and can be realized under the existing manufacturing process. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 The figure is a cross-sectional view of the traditional packaging and 3D multi-substrate packaging.

[0024] Figure 2 The figure is a cross-sectional view of the 3D double-substrate top-attached packaging design of the application.

[0025] Figure 3 The figure is a top view of the top cover of the packaging design of the application.

[0026] Figure 4 The figure is a process flow chart of the 3D double-substrate top-attached packaging design.

[0027] Figure 5 The figure is a process flow chart comparison of three types of packaging designs. DETAILED DESCRIPTION

[0028] The technical solutions of the application will be described in detail below in combination with the drawings and examples.

[0029] Example 1

[0030] In the example, a power module packaging design with low parasitic parameters and a new packaging layout is provided, which is similar to the traditional module circuit topology. The concept of multi-substrate is used, and the multi-substrate can realize the functions of the separation device and the current commutation channel. For example, assuming that two "substrates" are placed on the top and bottom respectively, when the module is working, the current can be commutated between the top substrate and the bottom substrate, and the power loop current flows vertically between different layers. Using this structure of the module, the current loop area is greatly reduced, and the parasitic inductance is also significantly reduced.

[0031] The packaging design of the application does not use new DBC substrates, but transfers and fixes the non-main heating elements such as resistance or freewheeling diode to the inner top of the packaging shell. The top cover is made of organic polymer material to maintain the mechanical stability of the module, so it has sufficient reliability as a second substrate. Such a structure does not increase the demand for new materials under the premise of retaining the advantages of multi-substrate, and can be realized by only changing the process steps. Figure 2This is a cross-sectional schematic diagram of the 3D dual-substrate top-mounted package design of the present invention. Unlike traditional packages, non-essential heat-generating components such as resistors and diodes are placed on the top cover. The top cover is attached with a copper sheet to support the electronic components. Components on the same horizontal plane are connected by aluminum wire bonding, and the interconnection between the top cover and DBC is achieved by flexible bonding. Figure 3 This is a top view of the top cover of the package design of the present invention. The framed part indicates the position of the metal patch. By adding a metal patch to the top cover, the electrical connection between the electronic components and the busbar at the top cover is achieved, thereby avoiding the establishment of additional interconnections with the DBC substrate, increasing the process steps and making the process more difficult.

[0032] In the embodiment, non-primary heating components such as resistors and diodes are transferred to the original package top cover, and the top cover becomes the second substrate. The distance between the top and bottom substrates is about 10-20mm. Since the top cover is an epoxy resin-based organic polymer, in order to firmly mount the electronic components on the top cover, a DBC-like copper plate should be added to the top cover as a carrier plate for component welding. The electrical signal interconnection between the components and the bottom first substrate is achieved through flexible bonding. This step can be completed simultaneously with the traditional bonding step, avoiding the impact on the subsequent shell assembly step. Figure 3 As shown, the power terminals carry the operating current to the module and are typically connected directly to the module's first substrate. However, when active components such as freewheeling diodes require a load current path, metal patches are placed on the top cover to enable direct connection to the power terminals, eliminating the need for a current connection interface from the first substrate. Similarly, components such as gate protection resistors require interconnection with signal terminals. This connection is achieved by placing metal patches on the top cover corresponding to the terminals, avoiding the complex bonding process from the first substrate.

[0033] In the embodiment, a metal layer should be preset between the top cover and the bonded device, such as a copper plate of the same specifications as the DBC substrate, to facilitate the use of metal brazing materials to bond the diode and resistor to the top cover. The electrical interconnection between the components on the top cover and the components on the DBC substrate can be achieved through a preset ribbon bonding wire, such as Figure 2 As shown in Figure 1, ribbon bonding can carry larger currents and has higher reliability, which can avoid practical problems during operation and processing. Figure 4 The specific steps are as follows:

[0034] The first step is to prepare the base plate for power module packaging based on the traditional power module packaging process. The base plate is made of aluminum-plated copper plate. A temporary base plate is also added next to it. The temporary base plate is not limited in material, but alloy materials with good mechanical and thermal properties are preferred. Its main function is to provide mechanical support for the top cover packaging process. The top cover is placed on the temporary base plate and fixed to the temporary base plate with bolts.

[0035] The second step is to weld and fix the DBC substrate to the bottom plate, and install a copper sheet on the top cover using the same process as the DBC substrate. The copper sheet serves as a carrier plate for welding electronic components and also plays the role of electrical connection.

[0036] The third step is chip soldering. If the die bonding process is based on lead-free alloy solder, the chip is mounted on the DBC substrate through reflow soldering. If the electronic components use pressure sintering such as sintered silver, this step should be completed in advance before DBC mounting. Then the DBC mounting step is performed, that is, the DBC is mounted after the chip is sintered. Non-main heating components are mounted on the top cover through reflow soldering. Non-main heating components include resistors and freewheeling diodes.

[0037] In the fourth step, the power terminals are fixed to the DBC substrate using ultrasonic welding, and wire bonding between components is completed. After that, the housing frame is welded to the DBC substrate, and the non-primary heating components on the top cover and the chip on the DBC substrate are flexibly bonded using ribbon bonding wire (polyimide-coated aluminum wire).

[0038] Step 5: Install a second metal patch on the top cover, electrically interconnect the power terminals and non-essential heating components through the second metal patch, install the top cover on the module housing, and inject potting material, using epoxy resin-based potting material or silicone gel;

[0039] The sixth step is to carry out subsequent processes such as module molding, terminal bending, and laser marking.

[0040] Figure 5 By comparing the process flows for the three types of package designs, it can be seen that the new packaging solution does not add unnecessary process steps and is achieved by improving some manufacturing sequences. Compared with the traditional packaging process, the position of the components that need to be fixed on the "second substrate" is calibrated before the die bonding process step to prepare for welding. A temporary substrate is preset for component placement at the top cover. The temporary substrate is slightly higher than the original module in order to reduce the flexible bonding distance and simplify the difficulty of the subsequent capping steps. A DBC-like copper plate is also required on the top cover for component welding support. The remaining bonding steps are the same as the traditional method. After completing the overall circuit connection, the package can be closed and the final potting step can be completed.

Claims

1. A power semiconductor module with low parasitic parameters, comprising a base plate, a DBC substrate, a chip, a power terminal, a non-primary heating element and a housing, characterized in that: It adopts a dual-substrate structure, with a DBC substrate welded on the bottom plate, the DBC substrate being the first substrate, the chip being mounted on the copper layer of the DBC substrate, the power terminals being welded on the DBC substrate, the outer shell being packaged on the bottom plate, the top cover of the outer shell being the second substrate, the non-main heating elements being mounted on the inside of the top cover through the first metal patch, and the non-main heating elements being directly electrically interconnected through the second metal patch and the power terminals provided on the top cover.

2. The power semiconductor module according to claim 1, wherein: Non-essential heating components include resistors and freewheeling diodes.

3. The power semiconductor module according to claim 1, wherein: The first metal patch is a copper sheet.

4. The power semiconductor module according to claim 1, wherein: The non-primary heating components and the chip on the DBC substrate are flexibly bonded via ribbon bonding wires.

5. A method for packaging a power semiconductor module according to any one of claims 1 to 4, comprising the following steps: The first step is to prepare the base plate for power module packaging. At the same time, a temporary base plate is added next to it. The top cover is placed on the temporary base plate and fixed to the temporary base plate with bolts. The second step is to weld and fix the DBC substrate to the bottom plate, and install the first metal patch on the top cover. The first metal patch serves as a welding support plate and also plays the role of electrical connection. The third step is to mount the chip on the DBC substrate through reflow soldering, and to mount the non-main heating components on the top cover through reflow soldering; The fourth step is to fix the power terminals to the DBC substrate by ultrasonic welding, and complete the wire bonding between the electronic components on the DBC substrate. After that, the housing frame is welded to the DBC substrate, and the non-main heating components on the top cover and the chip on the DBC substrate are flexibly bonded by ribbon bonding wires. Step 5: Install a second metal patch on the top cover, electrically interconnect the power terminals and non-main heating components through the second metal patch, install the top cover on the housing frame, and add potting material by injection; The sixth step is to carry out module molding, terminal bending and laser marking processes.

6. The packaging method according to claim 5, characterized in that: In the second step, the first metal patch is a copper sheet; in the third step, the non-main heating components include resistors and freewheeling diodes; in the fifth step, the potting material is an epoxy resin-based potting material or silicone gel.

7. The packaging method according to claim 5, characterized in that: In the third step, if a silver pressure sintering chip is used, the chip should be sintered first and then the DBC substrate should be mounted.

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