A method, system and medium for image acquisition testing

Abstract

The purpose of this application is to provide a method, system and medium for image acquisition testing. This application sets up a camera module through a test box, wherein a system-on-chip including an FPGA and a processor is set up in the test box; the image output by the camera module after setting up is transmitted to the test box through a specified transmission method; the image is tested by the system-on-chip according to the test items to obtain the test results; and the test results are displayed on the user interface. It can solve the increasing bandwidth demand in the image test module, reduce the test cycle of a single module, and increase the reliability of the product.

Description

Technical Field

[0001] The present application relates to the field of electronic systems, and in particular to a method, system and medium for image acquisition testing. Background Art

[0002] At present, the main electronic systems of image test equipment on the market are mainly divided into image test boxes, motion control systems, computers, etc. However, the current image test boxes do not have algorithm capabilities. If you want to get the test results, you need to transfer the image data to the computer, and the computer will analyze the image data. Among them, the interaction between the image test box and the computer is mainly completed by the USB3.0 interface, and USB3.0 needs to complete the transmission of control instructions and image data. The image test systems on the market mainly have the following defects:

[0003] 1) As the resolution of camera modules on the market is gradually increasing, the transmission bandwidth of USB3.0 severely limits the transmission of image data, which directly leads to a significant decrease in the frame rate of the transmitted image data, affecting the test results;

[0004] 2) Since the computer processes the image test algorithm at a relatively slow rate, the test cycle will be relatively long;

[0005] 3) There is a large delay in the USB transmission path, which will also prolong the test cycle;

[0006] 4) Poor contact of the USB interface can also lead to data transmission errors and cause malfunctions. Summary of the invention

[0007] One purpose of the present application is to provide a method, system and medium for image acquisition testing, so as to solve the problems in the prior art that the frame rate of the transmitted image data is greatly reduced, affecting the test results, the test cycle is relatively long, and data transmission errors cause failures.

[0008] According to one aspect of the present application, a system for image acquisition testing is provided, the system comprising:

[0009] A camera module, a test box and a host computer, wherein a system on chip including an FPGA and a processor is arranged in the test box, the test box is connected to the camera module, and the system on chip configures the camera module, and the configuration includes register configuration;

[0010] The camera module is used to adjust the camera module according to the configured register, and transmit the image to the test box according to the specified transmission method;

[0011] The test box is used to use the system on chip to test the image according to the test items respectively, and transmit the test results to the host computer;

[0012] The host computer is used to display the test results.

[0013] According to another aspect of the present application, a method for image acquisition testing is provided, the method comprising:

[0014] The camera module is set up through a test box, wherein a system on a chip including an FPGA and a processor is set up in the test box;

[0015] Transmitting the image output by the camera module to the test box via a specified transmission method;

[0016] Testing the image according to the test items respectively by the system on chip to obtain the test results;

[0017] The test results are displayed on the user interface.

[0018] According to another aspect of the present application, a computer-readable medium is provided, on which computer-readable instructions are stored. The computer-readable instructions can be executed by a processor to implement the method described above.

[0019] Compared with the prior art, the present application sets up the camera module through a test box, wherein the test box is provided with a system on chip including an FPGA and a processor; the image output by the camera module after setting up is transmitted to the test box through a specified transmission method; the image is tested by the system on chip according to the test items respectively to obtain the test results; and the test results are displayed on the user interface. This can solve the increasing bandwidth demand in the image test module, reduce the test cycle of a single module, and increase the reliability of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0021] Figure 1 A schematic diagram showing the structure of a system for image acquisition testing provided according to one aspect of the present application is shown;

[0022] Figure 2 A schematic diagram showing the structure of a test box in an embodiment of the present application is shown;

[0023] Figure 3 A schematic diagram showing a flow chart of an image acquisition test method provided in another aspect of the present application;

[0024] Figure 4 A schematic diagram showing a process of defective pixel compensation test in one embodiment of the present application is shown;

[0025] Figure 5 A schematic diagram showing a process of low-contrast defect testing in an embodiment of the present application is shown;

[0026] Figure 6 A schematic diagram showing a process of horizontal fixed noise testing in one embodiment of the present application is shown;

[0027] Figure 7 A schematic diagram showing a process of a vertical fixed noise test in an embodiment of the present application is shown;

[0028] Figure 8 A schematic diagram showing a process of a line defect test according to an embodiment of the present application is shown;

[0029] Fig. 9 A schematic diagram showing a process of random noise testing in an embodiment of the present application is shown;

[0030] Fig.10 A schematic diagram showing a process of a read noise test in an embodiment of the present application is shown;

[0031] Fig.11 A schematic diagram showing a relative illumination test process in an embodiment of the present application is shown;

[0032] Fig.12 A schematic diagram showing a process of relative consistency testing in an embodiment of the present application is shown;

[0033] Fig.13 A schematic diagram showing the process of optical center testing in one embodiment of the present application is shown;

[0034] Fig.14 A schematic diagram showing a process of color uniformity testing in an embodiment of the present application is shown;

[0035] Fig.15 A schematic diagram showing a process of color accuracy testing in an embodiment of the present application is shown;

[0036] Fig.16 A schematic diagram showing the process of image resolution testing in one embodiment of the present application is shown.

[0037] The same or similar reference numerals in the drawings represent the same or similar components. DETAILED DESCRIPTION

[0038] The present application is described in further detail below in conjunction with the accompanying drawings.

[0039] Figure 1A structural schematic diagram of a system for image acquisition testing provided according to one aspect of the present application is shown, the system comprising: a camera module 1, a test box 2 and a host computer 3, wherein a system on chip including an FPGA and a processor is arranged in the test box 2, the test box 2 is connected to the camera module 1, the system on chip configures the camera module 1, and the configuration includes register configuration; the camera module 1 is used to adjust the camera module 1 according to the configured register, and transmit the image to the test box 2 according to a specified transmission method; the test box 2 is used to use the system on chip to test the image according to the test items respectively, and transmit the test results to the host computer 3; the host computer 3 is used to display the test results. Here, the system described in this application is a low-latency processing system, including a camera module, a test box and a host computer, the camera module is used to output the image data of the image, which is collected by the product; the test box includes an open-short circuit and power supply power detection board and an image acquisition test board, wherein the open-short circuit and power supply power detection board are used to complete the open-short circuit detection and power detection functions, and the image acquisition test board includes an FPGA and a processor, using an FPGA+RAM architecture, specifically, it can be composed of an FPGA+CPU (or SOC, MPSOS), hereinafter referred to as the "SOC system", wherein the FPGA is the PL end and the CPU end is the PS end. The image data of the camera module is collected and the register setting of the camera module is completed through the test box, and the image data is analyzed and processed, so that the test results of the camera are output to the host computer.

[0040] In some embodiments of the present application, Figure 2As shown, the system on chip includes an image data receiving module 21, an image test module 22, a test result output module 23, a register configuration module 24, a memory control module 25 and an instruction parsing module 26. Among them, the image data receiving module 21 is connected to the image test module 22, and the image data receiving module 21 is used to receive the image image according to the specified transmission mode, and the image test module 22 is used to receive the image image transmitted by the image data receiving module 21 and test the image image according to the test items, and transmit the test result to the test result output module 23, and the test result output module 23 includes a peripheral interface, and the test result is transmitted to the host computer through the peripheral interface. Here, the image data receiving module 21 receives the image data, and the image data input mode is usually a serial mode (MIPI interface) or a parallel mode (PPI protocol / DVP interface), and multiple modes can be supported through internal settings, wherein the internal settings are set by the user through the host computer, and the set parameters are transmitted to the SOC system through the communication interface. The image data test module tests the image data according to the test items, including dirt test, fixed noise test, line defect test, random noise test, read noise test, relative illumination test, relative consistency test, optical center test, color uniformity test and color accuracy test. The test result output module outputs the test results through peripherals and receives control instructions from the host computer through peripherals, including but not limited to USB, PCIE, Ethernet, serial port, CAN bus and other interface methods.

[0041] Continuing with the above embodiment, the register configuration module 24 is used to configure the internal register data of the FPGA according to the parameters sent by the host computer, and the content of the register configuration information is used for the control and management of the memory control module; the memory control module 25 is used to control the DDR cache image; the instruction parsing module 26 is connected to the memory control module 25, and is used to receive the instruction protocol from the host computer, and classify and forward the received instructions according to the content of the instruction protocol, and send the register configuration information to the camera module. Here, the register configuration module mainly sets the internal register data of the FPGA with the parameters sent by the host computer, so as to manage the memory control module according to the content obtained by the configuration, including the allocation of memory size, the frame rate of the image, the number of memory frame buffers and other information. The register configuration information is sent to each processing module. The memory control module mainly includes the read and write control and read and write address management of DDR, which is used to cache the image data and some temporary data; the instruction parsing module receives instructions from the peripherals and classifies and forwards the instructions according to the protocol content.

[0042] In some embodiments of the present application, the camera module includes an image sensor, a motor and a connector, the image sensor and the motor are configured on the interface on the connector, the FPGA or the processor configures the register of the image sensor according to the configuration information of the register sent by the instruction parsing module, and adjusts the exposure parameters of the image sensor and the position of the motor. Here, the camera module is mainly composed of an image sensor, a motor, an optical lens and a connector, and the image sensor and the motor are configured through the IIC / SPI interface on the connector so that the camera module outputs image data. The PL end or the PS end configures the IIC or SPI interface register of the camera module through the configuration information sent by the instruction parsing module to complete the register configuration process of the camera module, wherein the configuration information includes the register address information and register data of the camera sensor, and the configuration process includes register initialization, exposure parameters and motor position configuration, etc.

[0043] The image acquisition test system provided in the present application can enable the image test box to have algorithm capabilities, and there is no need to transmit image data to a computer for analysis and processing, which greatly improves the test effect and shortens the test cycle.

[0044] Figure 3 A flow chart of a method for image acquisition test provided by another aspect of the present application is shown, the method comprising: steps S11 to S14, step S11, setting the camera module through a test box, wherein the test box is provided with a system on a chip including an FPGA and a processor; step S12, transmitting the image output by the camera module after setting to the test box through a specified transmission method; step S13, testing the image according to the test items through the system on a chip to obtain the test results; step S14, displaying the test results on the user interface. Through the design of the test box, the camera module can be set and the image data output by the camera module can be obtained and analyzed and processed, so that the test box has algorithmic capabilities, avoiding the problems of extending the test cycle and causing failures caused by the transmission delay of the USB path and the poor contact of the USB interface, and directly analyzing and processing on the test box, shortening the test cycle.

[0045] Specifically, step S11, the camera module is set up through a test box, wherein the test box is provided with a system on chip including an FPGA and a processor; here, the test box adopts an FPGA+RAM architecture, specifically, it can be FPGA+CPU (or SOC, MPSOS), hereinafter referred to as "SOC system", wherein the FPGA is the PL end and the CPU end is the PS end. The image data of the camera module is collected and the register setting of the camera module is completed through the test box.

[0046] Step S12, transmitting the image output by the camera module after setting to the test box through a specified transmission method; here, after setting the camera module, the camera module is used to output image data, and the image data input method is usually a serial method (MIPI interface) or a parallel method (PPI protocol / DVP interface), and multiple methods can be supported through internal settings, wherein the internal settings are set by the user through the host computer, and the set parameters are transmitted to the SOC system through the communication interface.

[0047] Next, in step S13, the image is tested according to the test items by the system on chip to obtain the test results; in step S14, the test results are displayed on the user interface. Here, the image data is tested according to the test items on the SOC system, and the test items include dirt test, fixed noise test, line defect test, random noise test, read noise test, relative illumination test, relative consistency test, optical center test, color uniformity test and color accuracy test. The test results are output to the host computer through the peripherals, and the control instructions from the host computer are received through the peripherals. The peripherals include but are not limited to USB, PCIE, Ethernet, serial port, CAN bus and other interface methods. The test results are displayed on the host computer and user settings can be provided on the host computer, such as setting the transmission mode.

[0048] In some embodiments of the present application, in step S11, the address information of the registers of the camera module is set on the system on chip; a memory for storing the image data obtained using the camera module and an instruction parsing module for processing the image data are configured on the system on chip; the relevant parameters of the camera module are set according to the address information of the register, and the transmission method when the camera module transmits the image data to the instruction parsing module is set. Here, in the embodiments of the present application, it is necessary to configure the registers of the FPGA and the registers of the camera in the camera module, wherein the registers of the FPGA are configured first, and the parameters sent by the host computer are used to set the internal register data of the FPGA, so as to manage the memory control module according to the content obtained by the configuration, including the allocation of memory size, the frame rate of the image, the number of memory frame buffers and other information. Subsequently, the PL or PS end of the on-chip system configures the IIC or SPI interface register of the camera module through the configuration information sent by the instruction parsing module to complete the register configuration process of the camera module, wherein the configuration information includes the register address information and register data of the camera sensor. The configuration process includes register initialization, exposure parameters, and motor position configuration, etc.; and sets the transmission mode when receiving data transmitted by the camera module.

[0049] In some embodiments of the present application, when the test item includes a dirt test, in step S13, the difference of each pixel of the image is traversed through the mask filtering algorithm, and the ratio of the number of pixels whose difference is greater than a first threshold to the pixels of the entire image is calculated, and whether the defective pixel compensation test is passed is judged according to the ratio and the corresponding threshold value set; the image image is subjected to mean filtering to obtain a first image, and the image image is subjected to adaptive filtering to obtain a second image, and the pixel difference between the first image and the second image is calculated. After processing the obtained pixel difference, the ratio of the number of pixels whose processed pixel difference is greater than the second threshold to the pixels of the entire image is calculated, and whether the low-contrast defect test is passed is judged according to the ratio and the corresponding threshold value set. Here, the dirt test is divided into a low-contrast defect test and a defective pixel compensation test, wherein the defective pixel compensation test is as follows: Figure 4 As shown, the image format used in the embodiment of the present application is the RAW format. The input RAW image is subjected to a mask filtering algorithm, and the difference between each pixel and the pixel at the feature position is calculated. If the threshold is exceeded (the threshold can be set to a value between 10-100), the number of pixels exceeding the pixel is recorded and accumulated. When the entire image is traversed, the percentage of the number of pixels in the entire image is compared with the threshold value set by the user. If the percentage is less than the threshold value, the test passes, otherwise it fails, wherein the threshold value ranges from 10% to 40%. Low contrast defect test as shown in FIG. Figure 5 As shown, an image (first image) is generated after mean filtering calculation is performed on the input RAW image, and an adaptive filtering algorithm is performed on the image. The image processed by the mean filtering algorithm is subtracted from the image processed by the adaptive filtering algorithm to obtain the difference; the obtained difference is subjected to histogram equalization processing, and then some noise is removed by using a morphological algorithm. Subsequently, the image is binarized through a threshold value, and the percentage of the number of points in the dirty area is calculated. If the percentage is less than a second threshold value set by the user, the test passes, otherwise the test fails, and the second threshold value is a limit value (in the range of 2%-3%).

[0050] In some embodiments of the present application, when the test item includes a fixed noise test, in step S13, the image is subjected to median filtering to obtain a median filtered image; the pixel difference between the image and the median filtered image is calculated; the mean accumulated in the horizontal direction and the mean accumulated in the vertical direction are calculated according to the pixel difference; it is determined whether there is fixed noise in the horizontal direction according to the mean accumulated in the horizontal direction, and it is determined whether there is fixed noise in the vertical direction according to the mean accumulated in the vertical direction. Here, the fixed noise test includes a fixed noise test in the horizontal direction and a fixed noise test in the vertical direction. The fixed noise in the horizontal direction is as follows: Figure 6As shown in the figure, a median filter is applied to the RAW image. For example, in the image, a region with 3 to 10 columns and 1 row is selected for median filtering. The obtained image is subtracted from the input RAW image according to each pixel to obtain a difference in the size of an image. All the differences are accumulated to determine whether the accumulated value exceeds the limit set by the user. If it exceeds, it means that there is fixed noise in the horizontal direction, otherwise it does not exist. The vertical test is as follows: Figure 7 As shown in the figure, perform a median filter on the RAW image, for example, select a median filter with 3 to 10 rows and 1 column, subtract the image obtained by the median filter from the input RAW image according to each pixel to obtain a difference of the size of an image, and accumulate all the differences. Determine whether the accumulated value exceeds the limit value set by the user. If it exceeds, it means that there is fixed noise in the vertical direction, otherwise, it is normal.

[0051] In some embodiments of the present application, when the test item includes a row defect test, in step S13, the horizontal and vertical means of the three RGB components of the image are calculated to obtain an image of the three RGB components; the image of the three RGB components is processed by mean filtering to calculate the fixed noise position of the row and column; the position with the largest number of fixed noises in the row and column is searched from the fixed noise positions of the row and column, and the maximum number of numbers is recorded; and whether the row defect test is passed is determined based on the maximum number of numbers and the user's setting value. Here, if Figure 8 As shown in the figure, the input RAW image is a RAW image of the light source under the two scenes of sufficient light and no light. Then, the means of the three RGB components in the horizontal and vertical directions are calculated, and the three components are processed separately using the mean filtering algorithm to calculate the fixed noise in the horizontal and vertical directions, and the value with the largest number of rows and columns of fixed noise is recorded, and the number of rows and columns is compared with the limit set by the user. If the number is greater than the limit, the test fails, otherwise the test passes.

[0052] In some embodiments of the present application, when the test items include a random noise test, in step S13, the image is separated into different color channels, and the image mean of a set number of frames, the single frame image mean, the row mean, and the column mean are calculated; the total row noise and the total column noise are calculated, and the random noise of a frame image, the ratio of row random noise, and the ratio of column random noise are calculated; whether the random noise test is passed is determined based on the row noise ratio or the column noise ratio and the set noise limit. Here, if Fig. 9As shown, the random noise test is to continuously collect multiple RAW images under the test light source (which can be D50 or other standard light sources), separate the data of the three RGB channels of the RAW images, calculate the mean of the pixels of the multiple images collected, the mean of the pixels of a single image, the row mean, and the column mean, calculate the total row noise and column noise, and determine whether the row and column noise is greater than the limit set by the user. If it is greater than the limit, the test fails, otherwise the test passes, wherein the limit set by the user is generally 60%-95%.

[0053] In some embodiments of the present application, when the test item includes a read noise test, in step S13, a difference calculation is performed on the first image and the second image, wherein the first image and the second image are adjacent images obtained by exposure under a specified environment; a mean of the difference is calculated based on the obtained difference, and a standard deviation is calculated based on the obtained difference and the mean of the difference; and whether the read noise test is passed is determined based on the standard deviation and a threshold set by the user. Here, if Fig.10 As shown, the read noise test process is to obtain a RAW image by short exposure in a dark environment (0Lut-5Lut), obtain two adjacent RAW images, perform difference calculation on the two adjacent images, and then calculate the sample standard deviation of the difference between the two adjacent images. If the difference is greater than the limit (the limit is generally between 1-5), the test fails, otherwise the test passes.

[0054] In some embodiments of the present application, when the test item includes a relative illumination test, in step S13, the coordinates and sizes of a specified number of rectangles in the image are calculated based on the image pixels; a target number of rectangles and their locations are selected based on the coordinates and sizes of the specified number of rectangles, and the pixel mean of the target number of rectangles at the locations is calculated to obtain a first mean; the pixel mean of the area corresponding to the specified number of rectangles is calculated to obtain a second mean; the contrast is calculated based on the first mean and the second mean, and whether the relative illumination test has passed is determined based on the contrast. Here, if Fig.11 As shown in the figure, the relative illumination test process is to obtain n*n rectangular areas at equal intervals from the RAW image, where n can be 3 to 9, obtain 10% small rectangles at the corners of the rectangular area where the four corners are located, and calculate the average of the pixels in the small rectangles, named MinMean; calculate the average of the pixel values ​​in the n*n rectangular areas, named MaxMean; the calculation formula for relative illumination is: When the relative illumination value is greater than the limit set by the user (usually 1%-10%), the test fails, otherwise, the test passes.

[0055] In some embodiments of the present application, when the test item includes a relative consistency test, in step S13, the image is separated into RGB, and the RGB image obtained after separation is divided into regional blocks according to the resolution calculation; the pixel means of the divided regional blocks of the RGB image are calculated respectively, and the relative consistency coefficient is calculated according to the mean; and whether the relative consistency test is passed is determined according to the relative consistency coefficient. Here, if Fig.12 As shown, the relative consistency test process is to separate the RGB of the input RAW image, calculate the coordinate position of the appropriate rectangular area of ​​the separated RGB image according to the resolution, and calculate its mean, and calculate the relative consistency coefficient according to the mean. If the coefficient is greater than the limit (generally 2%-15%), the test fails, otherwise, the test passes.

[0056] In some embodiments of the present application, when the test item includes an optical center test, in step S13, multiple rectangular boxes at designated positions are determined according to the resolution of the image; the pixel average of the rectangular boxes at the designated positions is calculated. The pixel average is used as a threshold; the image is binarized according to the threshold, and the distance between the center of the binarized image and the resolution center of the image is calculated; and whether the optical center test is passed is determined according to the distance. Here, if Fig.13 As shown, the optical center test process is to select multiple matrix areas according to the resolution of the input RAW image, for example, 5, located at the top, bottom, left, right and middle positions, and the matrix size is 100*100 resolution, and calculate the mean of the pixels in the 5 matrix areas respectively. The average value of the 5 means is taken as the center point, and the number of pixels offset is calculated by subtracting the center point of the pixel. If the number of pixels is less than the limit (generally 5%-30%), the test passes, otherwise the test fails.

[0057] In some embodiments of the present application, when the test item includes a color uniformity test, in step S13, the image is subjected to multi-channel separation to obtain multiple single-channel images; each single-channel image is divided into preset regions according to actual pixels; the mean value and RG value, BG value and CG value of each region are calculated, and the deviation value is calculated based on the calculated mean value and RG value, BG value and CG value; and whether the color uniformity test is passed is determined based on the deviation value. Here, if Fig.14As shown in the figure, the color uniformity test process is to perform shadow correction algorithm and white balance algorithm on the input RAW image, and then separate the RGB channels of the image into four channels of Gr, R, Gb, and B according to the Bell mode. The four images are divided into multiple regions according to the pixel values, for example, each region is 17*13 pixels, and the mean of each region is calculated, and then the RG value, BG value, and CG value are calculated. The deviation value is calculated and compared with the limit value. If it is greater than the limit value, the test fails, otherwise the test passes.

[0058] In some embodiments of the present application, when the test item includes a color accuracy test, in step S13, the gain of the white balance channel of the image is calculated, and the color blocks are extracted according to the gain of the white balance channel; the parameters of the LAB color space domain and the LCH color space domain of each extracted color block are calculated; the corresponding mean and maximum values ​​are calculated according to the parameters of the LAB color space domain, and the corresponding mean and maximum values ​​are calculated according to the parameters of the LCH color space domain; and whether the color accuracy test is passed is determined based on all the calculated mean and maximum values. Here, if Fig.15 As shown in the figure, the color accuracy test is to calculate the gain of the white balance channel for the input RGB data, extract the color blocks in the image according to the calculated gain, and calculate the ΔE and ΔH of each color block respectively. The ΔE calculation method is to convert the image to the LAB color space domain. The pixel points of the image are divided into three parameters (L1, A1, B1). The standard parameters set for the input are L0, A0, and B0 respectively. The ΔH calculation method is to convert the image to the LCH color space domain. The pixels of the image are divided into three parameters (L1, C1, H1). The standard input parameters are set as L0, C0, and H0, respectively, then ΔH = H1-H0. Then, the mean ΔE, ΔH and the maximum ΔE, ΔH are calculated based on the ΔE and ΔH of each color block. The limit of the mean ΔE is generally 2 to 8, the maximum ΔE is generally 5 to 15, the limit of the mean ΔH is generally 1 to 5, and the maximum ΔH is generally 2 to 12. These values ​​are compared with the corresponding limit values. When these values ​​are within the limit values, the test passes, otherwise the test fails.

[0059] In some embodiments of the present application, when the test item includes an image resolution test, in step S13, the hypotenuse of the image is searched to determine a rectangular area with a hypotenuse; a discrete Fourier transform is performed on the rectangular area using a sampling method; the rectangular area after the discrete Fourier transform is normalized to obtain a normalized rectangular area; the MTF value of the normalized rectangular area is found according to a specified Nyquist frequency, and whether the image resolution test is passed is determined according to the found MTF value. Fig.16As shown, the image resolution test process is to search for the hypotenuse of the input image, lock the rectangular area with the hypotenuse, and perform phase shift on the rectangular area to generate a multiple oversampling data, such as 3 to 8 times oversampling. The generated sampling data is discrete Fourier transformed through a Hamming window, and then the MTF value is calculated at the set frequency after normalization, where the set frequency can be 0.1 to 0.5 times the Nyquist frequency. The test passes when the MTF value is greater than the limit, otherwise the test fails.

[0060] In addition, an embodiment of the present application further provides a computer-readable medium on which computer-readable instructions are stored. The computer-readable instructions can be executed by a processor to implement the aforementioned image acquisition test method.

[0061] In a typical configuration of the present application, computer-readable media include permanent and non-permanent, removable and non-removable media that can be used to store information by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change RAM (Phase-Change RAM, PRAM), static random access memory (Static Random Access Memory, SRAM), dynamic random access memory (Dynamic Random Access Memory, DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), flash memory or other memory technology, compact disc read-only memory (Compact Disc Read-Only Memory, CD-ROM), digital versatile disc (Digital Versatile Disk, DVD) or other optical storage, magnetic cassettes, tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. According to the definition in this article, computer-readable media does not include non-transitory media such as modulated data signals and carrier waves.

[0062] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

[0063] It should be noted that the present application can be implemented in software and / or a combination of software and hardware, for example, can be implemented using an application specific integrated circuit (ASIC), a general purpose computer or any other similar hardware device. In one embodiment, the software program of the present application can be executed by a processor to implement the steps or functions described above. Similarly, the software program of the present application (including relevant data structures) can be stored in a computer-readable recording medium, for example, a RAM memory, a magnetic or optical drive or a floppy disk and similar devices. In addition, some steps or functions of the present application can be implemented using hardware, for example, as a circuit that cooperates with a processor to perform each step or function.

[0064] In addition, a part of the present application may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present application through the operation of the computer. The program instruction for calling the method of the present application may be stored in a fixed or removable recording medium, and / or transmitted through a data stream in a broadcast or other signal-bearing medium, and / or stored in a working memory of a computer device that runs according to the program instruction. Here, according to an embodiment of the present application, a device is included, the device including a memory for storing computer program instructions and a processor for executing program instructions, wherein, when the computer program instruction is executed by the processor, the device is triggered to run the method and / or technical solution based on the aforementioned multiple embodiments according to the present application.

[0065] It is obvious to those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, and that the present application can be implemented in other specific forms without departing from the spirit or basic features of the present application. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-restrictive, and the scope of the present application is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the present application. Any figure mark in the claims should not be regarded as limiting the claims involved. In addition, it is obvious that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. The words first, second, etc. are used to indicate names, and do not indicate any particular order.

Claims

1. A system for image acquisition testing, characterized in that: The system comprises: A camera module, a test box and a host computer, wherein a system on chip including an FPGA and a processor is arranged in the test box, the test box is connected to the camera module, the system on chip configures the camera module, the system on chip includes a register configuration module, a memory control module and an instruction parsing module, and the configuration includes register configuration; The register configuration module is used to configure the internal register data of the FPGA according to the parameters sent by the host computer, and use the content of the register configuration information for the control management of the memory control module, so as to manage the memory control module according to the configuration information, wherein the management of the memory control module includes the allocation of memory size, the frame rate of the image, and the number of memory frame buffers; The memory control module is used to control the DDR cache image; The instruction parsing module is connected to the memory control module, and is used to receive the instruction protocol from the host computer, classify and forward the received instructions according to the content of the instruction protocol, and send the configuration information of the register to the camera module; The camera module includes an image sensor, a motor and a connector, the image sensor and the motor are configured on an interface on the connector, the FPGA or the processor configures the register of the image sensor according to the configuration information of the register sent by the instruction parsing module, and adjusts the exposure parameter of the image sensor and the position of the motor, wherein the configuration information of the register includes register address information and register data of the camera sensor; The camera module is used to adjust the camera module according to the configured register, and transmit the image to the test box according to the specified transmission method; The test box is used to use the system on chip to test the image according to the test items respectively, and transmit the test results to the host computer; The host computer is used to display the test results.

2. The system according to claim 1, characterized in that The system on chip includes an image data receiving module, an image testing module, and a test result output module.

3. The system according to claim 2, characterized in that The image data receiving module is connected to the image testing module, and the image data receiving module is used to receive image images according to a specified transmission method. The image testing module is used to receive the image images transmitted by the image data receiving module and test the image images according to test items, and transmit the test results to the test result output module. The test result output module includes a peripheral interface, and the test results are transmitted to the host computer through the peripheral interface.

4. A method for image acquisition testing using the system according to any one of claims 1 to 3, characterized in that: The method comprises: The camera module is set up through a test box, wherein a system on a chip including an FPGA and a processor is set up in the test box; Transmitting the image output by the camera module to the test box via a specified transmission method; Testing the image according to the test items respectively by the system on chip to obtain the test results; The test results are displayed on the user interface.

5. The method according to claim 4, characterized in that The camera module is set up through the test box, including: Set the address information of the register of the camera module on the FPGA; A memory for storing image data obtained using a camera module and an instruction parsing module for processing the image data are configured on the processor; The relevant parameters of the camera module are set according to the address information of the register, and the transmission method when the camera module transmits the image data to the instruction parsing module is set.

6. The method according to claim 4, characterized in that: The test items include: one or any combination of dirt test, fixed noise test, line defect test, random noise test, read noise test, relative illumination test, relative consistency test, optical center test, color uniformity test, and color accuracy test.

7. The method according to claim 6, characterized in that When the test item includes a dirt test, the dirt test includes a low contrast defect test and a defective pixel compensation test, and the image is tested respectively according to the test items by the on-chip system, including: The difference of each pixel of the image is traversed by a mask filtering algorithm, and the ratio of the number of pixels whose difference is greater than a first threshold to the number of pixels of the entire image is calculated, and whether the defective pixel compensation test is passed is determined according to the ratio and the corresponding threshold value set; The image is subjected to mean filtering to obtain a first image, and the image is subjected to adaptive filtering to obtain a second image, and the pixel difference between the first image and the second image is calculated. After the obtained pixel difference is processed, the ratio of the number of pixel points whose processed pixel difference is greater than a second threshold value to the number of pixels of the entire image is calculated, and whether the low-contrast defect test is passed is determined based on the ratio and the corresponding threshold value that is set.

8. The method according to claim 6, characterized in that When the test items include a fixed noise test, the image is tested by the system on chip according to the test items respectively, including: Performing median filtering on the image to obtain a median filtered image; Calculating pixel differences between the image and the median filtered image; Calculating the mean value accumulated in the horizontal direction and the mean value accumulated in the vertical direction respectively according to the pixel difference; Whether there is fixed noise in the horizontal direction is determined according to the mean value accumulated in the horizontal direction, and whether there is fixed noise in the vertical direction is determined according to the mean value accumulated in the vertical direction.

9. The method according to claim 6, characterized in that When the test items include a row defect test, the image is tested by the system on chip according to the test items respectively, including: Calculate the horizontal and vertical means of the three RGB components of the image to obtain an image of the three RGB components; Perform mean filtering on the images of the three components of RGB to calculate the fixed noise positions of the rows and columns; Searching for the position with the largest number of fixed noises in the row and column from the fixed noise positions in the row and column, and recording the maximum number of numbers; Whether the row defect test passes is determined according to the maximum number and a user's setting value.

10. The method according to claim 6, characterized in that When the test items include a random noise test, the image is tested by the system on chip according to the test items respectively, including: Separate the image into different color channels, and calculate the image mean of a set number of frames, the single-frame image mean, the row mean, and the column mean; Calculate the total row noise and the total column noise, and calculate the ratio of random noise, row random noise, and column random noise in a frame of image; Whether the random noise test passes is determined based on the row noise ratio or column noise ratio and the set noise limit.

11. The method according to claim 6, characterized in that When the test items include a read noise test, the image is tested by the system on chip according to the test items respectively, including: Performing difference calculation on the obtained first image and second image, wherein the first image and second image are adjacent images obtained by exposure under a specified environment; Calculate the mean of the differences based on the obtained differences, and calculate the standard deviation based on the obtained differences and the mean of the differences; Whether the read noise test passes is determined based on the standard deviation and a threshold set by the user.

12. The method according to claim 6, characterized in that When the test items include a relative illumination test, the image is tested by the system on chip according to the test items respectively, including: Calculate the coordinates and sizes of a specified number of rectangles in the image according to the image pixels; Selecting a target number of rectangles and their locations according to the coordinates and sizes of the designated number of rectangles, calculating the pixel mean of the target number of rectangles at the locations, and obtaining a first mean; Calculate the pixel mean of the area corresponding to the specified number of rectangles to obtain the second mean; The contrast ratio is calculated according to the first mean value and the second mean value, and whether the relative illumination test is passed is determined based on the contrast ratio.

13. The method according to claim 6, characterized in that When the test items include a relative consistency test, the image is tested by the system on chip according to the test items respectively, including: Performing RGB separation on the image, and dividing the RGB image obtained after separation into regional blocks according to resolution calculation; Calculate the pixel mean values ​​of the divided regional blocks of the RGB image respectively, and calculate the relative consistency coefficient according to the mean values; Whether the relative consistency test is passed is determined according to the relative consistency coefficient.

14. The method according to claim 6, characterized in that When the test items include an optical center test, the image is tested by the system on chip according to the test items respectively, including: Determine a plurality of rectangular frames at designated positions according to the resolution of the image; Calculate the pixel average value of the rectangular frames at the multiple specified positions, and use the pixel average value as a threshold; Binarizing the image according to the threshold, and calculating the distance between the center of the binarized image and the resolution center of the image; Whether the optical center test passes is determined based on the distance.

15. The method according to claim 6, characterized in that When the test items include a color uniformity test, the image is tested by the system on chip according to the test items respectively, including: Performing multi-channel separation on the image to obtain multiple single-channel images; Divide each single-channel image into preset areas according to actual pixels; Calculate the mean value and RG value, BG value and CG value of each area, and calculate the deviation value based on the calculated mean value and RG value, BG value and CG value; Whether the color uniformity test is passed is determined according to the deviation value.

16. The method according to claim 6, characterized in that When the test items include a color accuracy test, the image is tested by the system on chip according to the test items respectively, including: Calculating the gain of the white balance channel of the image, and extracting the color block according to the gain of the white balance channel; Calculate the parameters of the LAB color space domain and the LCH color space domain of each extracted color block; Calculating the corresponding mean and maximum value according to the parameters of the LAB color space domain, and calculating the corresponding mean and maximum value according to the parameters of the LCH color space domain; Whether the color accuracy test passes is determined based on all the calculated mean and maximum values.

17. The method according to claim 6, characterized in that When the test items include an image resolution test, the image is tested by the system on chip according to the test items respectively, including: Searching for the hypotenuse of the image to determine a rectangular area with the hypotenuse; Performing a discrete Fourier transform on the rectangular area using a sampling method; Normalizing the rectangular area after discrete Fourier transform to obtain a normalized rectangular area; The MTF value of the normalized rectangular area is found according to the specified Nyquist frequency, and whether the image resolution test is passed is determined according to the found MTF value.

18. A computer-readable medium having computer-readable instructions stored thereon, wherein the computer-readable instructions can be executed by a processor to implement the method according to any one of claims 4 to 17.

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