Signal reading circuit and signal reading method thereof, signal processing circuit

Abstract

The signal reading circuit and the signal reading method thereof, and the signal processing circuit, the signal reading circuit comprises: a direct current signal source, a plurality of gating control units, a logic control unit and an alternating current-direct current coupling unit, wherein: the direct current signal source is adapted to provide direct current signals to the plurality of gating control units; the logic control unit is adapted to output control signals to the plurality of gating control units to select one gating control unit; the plurality of gating control units are adapted to be connected to alternating current signal sources respectively, and can transmit alternating current signals of the corresponding connected alternating current signal sources when selected; and the alternating current-direct current coupling unit is adapted to filter the direct current signals in the signal reading circuit and output the alternating current signals transmitted by the selected gating control unit. By using the above scheme, the flexibility of the circuit structure can be improved, the transmission performance of the signal reading circuit can be enhanced, and the hardware cost can be reduced.

Description

Technical Field

[0001] The embodiments in this specification relate to the field of signal processing technology, and in particular to a signal readout circuit and its signal readout method, as well as a signal processing circuit. Background Technology

[0002] Currently, during signal transmission, the bandwidth or capacity of communication lines often exceeds the requirements for transmitting a single signal. In order to effectively utilize communication lines and enable one channel to correspond to multiple signals, multiplexing technology can be used to combine multiple signals and transmit them through the same communication line, thereby saving costs and space.

[0003] For example, for systems with multi-channel signal transmission requirements, a signal readout circuit based on a multiplexer (MUX) can be used, enabling multiple sensors to share the same signal readout circuit to transmit the acquired signals, thus realizing the multiplexing of the signal readout circuit.

[0004] However, multiplexers themselves have hardware defects, resulting in poor bandwidth and isolation, limited number of channels, high hardware costs, and poor compatibility.

[0005] like Figure 1 The diagram shows a schematic of a signal readout circuit based on a multiplexer. The signal readout circuit 10 includes a multiplexer 101.

[0006] Multiplexer 101 may include a P-channel switch (P being a positive integer), one end of which serves as the input terminals S1 to SP of the multiplexer, and can be connected to sensors respectively, such as... Figure 1 Sensors 1 to P are connected to each other. The other ends of the P switches are combined into one channel as the output terminal D1 of the multiplexer 101, thus forming P transmission channels.

[0007] The multiplexer 101 may also include a decoding circuit that controls P switches. After the decoding circuit is started by the enable terminal EN, the corresponding level signals are connected to the selection terminals A0, A1 to AQ of each channel, which can control the closing or opening of each switch. The transmission channel of the closed switch can output the signal collected by the corresponding sensor through the output terminal D1.

[0008] Therefore, by switching the closed transmission channel of the multiplexer 101, the signals collected by the corresponding sensors 1 to P can be output.

[0009] In practical applications, multiplexers can use analog switches to select multiplexing channels. That is, multiplexers can be analog multiplexers, and analog switches usually use metal-oxide-semiconductor field-effect transistors (MOSFETs) to achieve the closing and opening of the switch.

[0010] like Figure 2a The diagram shown is a schematic of an analog switch. The analog switch 20 may include a MOSFET 21 and necessary operating circuitry. Figure 2a (Not shown in the diagram). The source S of MOSFET 21 can serve as the input S1 of analog switch 20. When applied to a multiplexer, it acts as one input terminal of the multiplexer and is connected to the output of a sensor. The drain D of MOSFET 21 can serve as the output D1 of analog switch 20. When applied to a multiplexer, it acts as the output of the multiplexer. When MOSFET 21 is turned on, analog switch 20 is closed, and the transmission channel containing analog switch 20 can output the signal acquired by the sensor. The gate G of MOSFET 21 can be connected to a power supply V. DD This is used to control the on and off of MOSFET 21. When applied to a multiplexer, the power supply V can be provided by the multiplexer. DD .

[0011] MOSFET 21 has an on-resistance R when it is turned on. on and channel capacitance C on ,like Figure 2b As shown, Figure 2a The equivalent circuit diagram after the analog switch is closed is shown below. Figure 2a MOSFET 21 in the diagram is equivalent to a circuit with on-resistance R. on Source capacitor C S SW and drain capacitor C D The circuit consists of the following components. The source capacitor C is an example of this. S The source capacitance of MOSFET 21 when it is in the off state is C. D This is the equivalent capacitance of the drain when MOSFET 21 is off. When MOSFET 21 is on, the channel capacitance C is... ON =C S +C D .

[0012] When the on-resistance R on and channel capacitance C onWhen at least one of the on-resistance R on and the channel capacitance C on increases, the bandwidth of the MOSFET 21 will decrease, and thus the bandwidth of the MOSFET 21 is affected by the on-resistance R

[0013] Based on the above description, in one aspect, if the bandwidth and isolation of the multiplexer are not good, the front edge of the electrical signal of the sensor will become slow after passing through the multiplexer, so that the amplitude is reduced and the pulse width is widened. At present, the signal amplitude is improved by adding a post-processing circuit after the multiplexer. As shown in the reference Figure 1 , the signal readout circuit can also include a post-processing circuit 102. However, the post-processing circuit cannot improve the pulse width problem of the output signal of the multiplexer, and still affects the signal quality. Therefore, a high-speed and high-bandwidth multiplexer needs to be selected to meet the bandwidth requirement and transmission rate requirement, but such a multiplexer has a high cost and is limited by the compatibility of the hardware circuit, and the number of models that can be selected is small.

[0014] On the other hand, the structural framework of the multiplexer is fixed. If there are many sensors, in order to enable the multiplexer to provide enough transmission channels, a multiplexer with a large number of channels or a plurality of multiplexers needs to be combined to obtain a combined multiplexer with more channels. However, no matter which way is adopted to increase the number of channels, the on-resistance and / or the channel capacitance will increase, further reducing the bandwidth of the multiplexer, and making it more difficult to transmit the collected signals. In addition, the more the number of channels of the multiplexer, the more expensive the multiplexer, and the total cost of the combined multiplexer is also high, and the size is large, which is not conducive to arrangement and installation.

[0015] In summary, the signal readout circuit based on the multiplexer has many disadvantages in actual application, greatly increasing the design difficulty and structural complexity of the signal readout circuit. Therefore, how to design a multi-channel signal readout scheme has become a problem to be solved by those skilled in the art. SUMMARY

[0016] Therefore, the embodiments of the present specification provide a signal readout circuit and a signal readout method and a signal processing circuit thereof, which can improve the flexibility of the circuit structure, enhance the transmission performance of the signal readout circuit, and reduce the hardware cost.

[0017] The embodiments of the present specification provide a signal readout circuit, which comprises a direct-current signal source, a plurality of gating control units, a logic control unit, and an alternating-current coupling unit, wherein:

[0018] The direct-current signal source is adapted to provide a direct-current signal to the plurality of gating control units.

[0019] The logic control unit is adapted to output a control signal to the plurality of gating control units, so that one gating control unit is gated;

[0020] The plurality of gating control units are adapted to respectively access an alternating current signal source, and can transmit the alternating current signal of the accessed alternating current signal source when gated;

[0021] The AC-DC coupling unit is adapted to filter the direct current signal in the signal readout circuit, and output the alternating current signal transmitted by the gated gating control unit.

[0022] The embodiments of the present specification also provide a signal processing circuit, comprising a plurality of alternating current signal sources, the signal readout circuit according to any one of the preceding embodiments, and a signal processing unit, wherein the output ends of the alternating current signal sources are respectively connected to the input ends of the signal readout circuits, and the output end of the signal readout circuit is connected to the input end of the signal processing unit.

[0023] The embodiments of the present specification also provide a laser radar, comprising the signal processing circuit according to any one of the preceding embodiments, and the alternating current signal source is a photoelectric detector.

[0024] The embodiments of the present specification also provide a signal readout method, applied to the signal readout circuit according to any one of the preceding embodiments, and the signal readout method comprises:

[0025] The logic control unit is adapted to output a control signal to the plurality of gating control units, so that one gating control unit is gated;

[0026] The plurality of gating control units are adapted to respectively access an alternating current signal source, and can transmit the alternating current signal of the accessed alternating current signal source when gated;

[0027] The AC-DC coupling unit is adapted to filter the direct current signal in the signal readout circuit, and output the alternating current signal transmitted by the gated gating control unit.

[0028] The signal readout circuit provided by the embodiments of the present specification controls the plurality of gating control units through the logic control unit, so that one gating control unit is gated, the transmission channel where the gating control unit is located can output the alternating current signal, and the AC-DC coupling unit filters the direct current signal in the signal readout circuit, avoids the interference of the direct current signal on the output alternating current signal, improves the stability and reliability of the signal readout circuit, and thus realizes the multiplexing signal readout circuit. The structure of the above signal readout circuit replaces the multiplexer through the hardware combination, thereby avoiding the on-resistance and channel capacitance generated by the multiplexer, improving the bandwidth of the signal readout circuit, effectively guaranteeing the quality of the output signal, improving the flexibility of the circuit structure, enhancing the transmission performance of the signal readout circuit, and thus eliminating the need for using a post-processing circuit to improve the signal amplitude, thereby reducing the hardware cost. BRIEF DESCRIPTION OF DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present specification, the drawings needed to be used in the present specification or prior art description will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present specification, and other drawings can also be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0030] Figure 1 It is a structural schematic diagram of a signal readout circuit based on a multiplexer;

[0031] Figure 2a It is a structural schematic diagram of an analog switch;

[0032] Figure 2b It is an equivalent circuit diagram of the analog switch after closing;

[0033] Figure 3 It is a structural schematic diagram of a signal readout circuit in the embodiments of the present specification;

[0034] Figure 4 It is a structural schematic diagram of another signal readout circuit in the embodiments of the present specification;

[0035] Figure 5a It is a structural schematic diagram of another signal readout circuit in the embodiments of the present specification

[0036] Figure 5b It is Figure 5a a structural schematic diagram of a shunt unit in

[0037] Figure 6a It is a connection schematic diagram of a signal readout circuit in the embodiments of the present specification;

[0038] Figure 6b It is Figure 6a a connection schematic diagram of a direct current equivalent circuit after a corresponding diode is turned on;

[0039] Figure 6c It is Figure 6a a connection schematic diagram of an alternating current equivalent circuit after a corresponding diode is turned on;

[0040] Figure 7 It is a connection schematic diagram of another signal readout circuit in the embodiments of the present specification

[0041] Figure 8a It is a connection schematic diagram of another signal readout circuit in the embodiments of the present specification;

[0042] Figure 8b It is Figure 8a a connection schematic diagram of a direct current equivalent circuit after a corresponding diode is turned on;

[0043] Figure 8c yes Figure 8a A schematic diagram of the AC equivalent circuit after the diode is turned on;

[0044] Figure 9 This is a schematic diagram of the structure of a signal processing circuit in one of the embodiments of this specification;

[0045] Figure 10 This is a flowchart of a signal readout method in one of the embodiments of this specification. Detailed Implementation

[0046] As discussed in the background section, signal readout circuit schemes based on multiplexers have many disadvantages, significantly increasing the design difficulty and structural complexity of the signal readout circuit. To enable those skilled in the art to clearly understand the problems associated with multiplexers, the following section will first elaborate on them through specific application scenarios.

[0047] In lidar, the number of transmit and receive channels is usually equal to the number of emitted laser pulse lines. For example, a Y-line lidar has Y transmit and receive channels. When a lidar is in operation, the lasers in each transmit channel are activated in a specified order to emit laser pulses (i.e., detection signals). External objects reflect these laser pulses (i.e., echo signals). Because ambient light and interference signals also exist, the incident light received by the lidar contains a mixture of multiple signals. The lidar activates the photodetector in the corresponding receive channel to detect the echo signals in the incident light, converting the optical signals into electrical signals. Therefore, the photodetector array is the core component of lidar reception.

[0048] When transmitting the echo signals detected by the photodetectors of each receiving channel, typically only a limited number (e.g., 1 or 2) of the receiving channels in the lidar are active at any given time. Therefore, a signal readout circuit composed of a multiplexer and a post-processing circuit can be used, allowing multiple photodetectors to share the same signal readout circuit to output the acquired electrical signals, thus achieving multiplexing of the signal readout circuit. The post-processing circuit may include filters, amplifiers, etc.

[0049] Depend on Figure 1 , Figures 2a-2b As can be seen from the relevant content, the bandwidth of each transmission channel in the multiplexer is affected by the on-resistance R of the MOSFET. on and on-capacitance C on The impact of multiplexers on lidar can be summarized as follows:

[0050] 1) The width of the laser pulse emitted by the laser is usually several nanoseconds, and the electrical signal output by the photodetector is also a short pulse with a width of several nanoseconds, and the main frequency component is usually distributed in tens of megahertz to hundreds of megahertz. If the bandwidth and isolation of the multiplexer are not good, the front edge of the electrical signal of the photodetector will become slow after passing through the multiplexer, so that the amplitude is reduced and the pulse width is widened, and the signal amplitude can only be improved by the post-processing circuit, but the pulse width cannot be improved, thereby affecting the working performance of the laser radar and reducing the quality of the data such as ranging accuracy, resolution, and long-distance measurement. Therefore, in order to meet the bandwidth requirement and transmission rate requirement, a high-speed and high-bandwidth multiplexer needs to be selected, and such a multiplexer has a high cost and is limited by hardware circuit compatibility, so that the number of models that can be selected is small.

[0051] 2) As the number of laser radars increases, the multiplexer is required to provide a sufficient number of channels. In addition to using a multiplexer with a large number of channels, a plurality of multiplexers can be combined to obtain a combined multiplexer with a larger number of channels. However, no matter which way is used to increase the number of channels, the on-resistance and / or on-capacitance will be increased, which reduces the bandwidth of the multiplexer and is more detrimental to the transmission of the electrical signal of the photodetection circuit. Moreover, the more the number of channels, the more expensive the multiplexer, and the total cost of the combined multiplexer is also high, and the size is large, which is not conducive to arrangement and installation.

[0052] In summary, in order to solve the problems described in the background art, the embodiments of the present specification provide a signal readout circuit. The signal readout circuit is controlled by a direct current signal to select a gating control unit, so that the alternating current signal of the corresponding alternating current signal source can be transmitted through the transmission channel of the selected gating control unit, and the direct current signal is filtered through the alternating current-direct current coupling unit to output the alternating current signal. Therefore, the flexibility of the circuit structure can be improved, the transmission performance of the signal readout circuit can be enhanced, and the hardware cost can be reduced.

[0053] In order to enable those skilled in the art to more clearly understand and implement the concept, implementation scheme and advantages of the embodiments of the present specification, the following will be described in detail with reference to the accompanying drawings through specific application scenarios.

[0054] Referring to Figure 3 The structure of a signal readout circuit in the embodiments of the present specification is shown in the schematic diagram. In the embodiments of the present specification, the signal readout circuit 30 can include a direct current signal source 31, m gating control units 32a, 32b, 32m, a logic control unit 33 and an alternating current-direct current coupling unit 34, m is a positive integer, wherein:

[0055] The direct current signal source 31 is adapted to provide direct current signals to the plurality of gating control units 32a, 32b-32m.

[0056] The logic control unit 33 is adapted to output control signals to the plurality of gating control units 32a, 32b-32m, so that one gating control unit is gated.

[0057] The plurality of gating control units 32a, 32b-32m are adapted to access alternating current signal sources through ports IN1-Inm respectively, and when gated, can transmit alternating current signals of the corresponding accessed alternating current signal sources.

[0058] The alternating current-direct current coupling unit 34 is adapted to filter out direct current signals in the signal readout circuit 30, and output the alternating current signals transmitted by the gated gating control unit through the port OUT.

[0059] The signal readout circuit has the above structure, which replaces the multiplexer by hardware combination, thereby avoiding the on-resistance and channel capacitance generated by the use of the multiplexer, improving the bandwidth of the signal readout circuit, effectively guaranteeing the quality of the output signal, adjusting the number of gating control units according to actual needs, improving the flexibility of the circuit structure, enhancing the transmission performance of the signal readout circuit, and thus eliminating the need for post-processing circuit to improve the signal amplitude, thereby reducing the hardware cost.

[0060] It can be understood that, according to actual conditions, the gating control unit, alternating current-direct current coupling unit, etc. in the specification can be composed of one device or multiple devices, thereby realizing the corresponding functions, and the embodiments of the specification do not limit this.

[0061] In specific implementation, considering the voltage drop in the circuit, the voltage output by the direct current signal source is greater than the voltage size that the gating control unit can gate, and according to actual use conditions and voltage requirements of each device in the circuit, the voltage output by the direct current signal source can be set, so that it can adapt to various circuit application scenarios.

[0062] In actual application, according to the connection relationship of the signal readout circuit, multiple circuit branches and branch nodes can be formed, and the direct current signals and alternating current signals will be transmitted from high voltage nodes to low voltage nodes according to the voltage level of the circuit branches. Therefore, in order to avoid the signal readout circuit from losing control and being unable to output alternating current signals, the signal readout circuit can further include a voltage dividing unit with a resistance value, which plays a voltage dividing effect in the signal readout circuit, thereby meeting the voltage dividing requirements of different circuit branches in the signal readout circuit.

[0063] It should be noted that the voltage dividing unit in the present specification can include any device having resistance performance, but this does not mean that the voltage dividing unit cannot include devices with other performance. According to actual circuit requirements and application scenarios, the voltage dividing unit can achieve the voltage dividing effect through one device or a combination of multiple devices. Moreover, the devices included in the voltage dividing unit can change according to the actual circuit branch. The present specification does not limit the type of devices included in the voltage dividing unit, nor the connection relationship between the devices when multiple devices are included in the voltage dividing unit.

[0064] For example, since each gating control unit and AC-DC coupling unit has voltage dividing requirements, different voltage dividing units can be connected to each gating control unit and AC-DC coupling unit, thereby dividing the voltage for the AC-DC coupling unit and the plurality of gating control units.

[0065] Specifically, refer to the signal readout circuit 40 shown in Figure 4 Compared with the circuit 30 shown in Figure 3 , the similarities or differences can be referred to the related description in Figure 3 , which will not be repeated here. The difference is that the voltage dividing unit 411, 41a-41m are included.

[0066] The voltage dividing unit 411 is connected to the plurality of gating control units 32a, 32b-32m and the AC-DC coupling unit 34, and is also connected to the DC signal source 31; the voltage dividing units 41a-41m are respectively connected to the gating control units 32a, 32b-32m. Therefore, the voltage dividing units 411, 41a-41m can determine the voltage values of each branch node in the signal readout circuit 40, so that the DC signal and the AC signal can be transmitted in the expected direction, thereby effectively guaranteeing the output stability of the signal readout circuit.

[0067] In a specific implementation, as shown in Figure 4 , the logic control unit 33 can be connected to the m gating control units through m voltage dividing units, and the control signal output by the logic control unit 33 can include m-bit level signals. The level signals can include a first level signal corresponding to the gating control unit that needs to be gated, and a second level signal corresponding to the gating control unit that does not need to be gated; the first level signal and the second level signal are not the same, and the first level signal can be a high level signal or a low level signal, and correspondingly, the second level signal can be a low level signal or a high level signal.

[0068] Then, the gate control units 32a, 32b-32m can receive the corresponding voltage-divided level signals through the voltage-dividing units 41a-41m, respectively, and the gate control unit receiving the voltage-divided first level signal implements gating, and the gate control unit receiving the voltage-divided second level signal does not implement gating.

[0069] As the signal reading circuit includes the DC signal source and is externally connected to the AC signal source, and according to the gating conditions of the plurality of gate control units, a DC path and an AC path can be formed in the signal reading circuit, and the AC signal of the AC signal source connected to the gated gate control unit can be transmitted along the AC path and output, in other words, the AC path can be regarded as a transmission channel for transmitting the AC signal in the signal reading circuit.

[0070] For example, referring to Figure 4 , the logic control unit 33 outputs m-bit control signals to the gate control units 32a, 32b-32m through the voltage-dividing units 41a-41m, respectively, the gate control unit 32b receives the voltage-divided first level signal, and the remaining gate control units receive the voltage-divided second level signal, according to the voltage-divided control signals, the gate control unit 32b implements gating, and the remaining gate control units do not implement gating.

[0071] The DC path in the signal reading circuit 40 can include the DC signal source 31, the voltage-dividing unit 411, the gate control unit 41b, the voltage-dividing unit 41b, and the logic control unit 33. The AC path in the signal reading circuit 40 can include the gate control unit 32b and the AC-DC coupling unit 34.

[0072] Thus, the control signals output by the logic control unit can control the plurality of gate control units, and thus the corresponding AC signal output can be selected, achieving the effect of multiplexing.

[0073] In specific implementation, the gate control unit can include a unidirectional conduction unit and an AC-DC coupling unit, wherein:

[0074] The unidirectional conduction unit can withstand the DC voltage applied by the logic control unit and the DC signal source through the voltage-dividing unit, and the unidirectional conduction unit also connects to the corresponding AC signal source through the AC-DC coupling unit.

[0075] The AC-DC coupling unit is adapted to filter out the mixed DC signal in the externally connected AC signal, avoiding interference with the unidirectional conduction unit; the unidirectional conduction unit is adapted to conduct when the DC voltage applied across the two ends reaches the conduction condition, and the AC signal passing through the AC-DC coupling unit continues to be transmitted in the designated direction, so that the corresponding gate control unit implements gating and can transmit the AC signal of the corresponding connected AC signal source.

[0076] Further, the unidirectional conducting unit can include any device capable of realizing the unidirectional conducting function, such as a diode, and the like, and is connected according to the voltage-current characteristic of the device, so that when conducting, the alternating current signal can be transmitted in a specified direction.

[0077] Taking a diode as an example, the cathode of the diode is connected to the logic control unit through a voltage dividing unit, and the anode of the diode is connected to the direct current signal source through a voltage dividing unit. Specifically, the signal reading circuit can include a plurality of voltage dividing units, the cathode of the diode can be connected to the logic control unit through one voltage dividing unit, and the anode of the diode can be connected to the direct current signal source through another voltage dividing unit.

[0078] It should be noted that the unidirectional conducting function described in the present specification is realized according to the type of the device, the connection mode of the device, and the direct current signal. The embodiments of the present specification are only illustrative and do not limit the type of the device realizing the unidirectional conducting function, the connection mode, and the direction and size of the direct current signal.

[0079] It can be understood that in the specific implementation process of the embodiments of the present specification, the actual hardware structure of the signal reading circuit is different according to different application scenarios. The AC-DC coupling unit and the unidirectional conducting unit of the gating control part can be contained in the same device, or can be contained in different devices. For example, in some signal reading circuits, the AC-DC coupling unit can be included in the bearing device of the alternating current signal source, and the unidirectional conducting unit can be contained in other devices and connected to the bearing device of the alternating current signal source. In some other signal reading circuits, the unidirectional conducting unit and the AC-DC coupling unit are contained in the same device. The embodiments of the present specification do not make specific limitations on the hardware distribution position of the AC-DC coupling unit and the unidirectional conducting unit.

[0080] In specific implementation, if the same signal reading circuit is multiplexed by directly increasing the transmission channel (i.e., increasing the gating control part and the circuit branch adapted thereto) to transmit more alternating current signals of sensors, when the transmission channel reaches a certain number, the wiring between the output end and the input end of the signal reading circuit will be too long, which will generate parasitic inductance and parasitic capacitance that cannot be ignored, and the bandwidth of the signal reading circuit will decrease rapidly, thereby affecting the transmission performance of the signal reading circuit. Moreover, the too long wiring is more susceptible to interference, which reduces the signal-to-noise ratio of the signal reading circuit.

[0081] In order to enhance the reliability and stability of the circuit, the signal reading circuit can further comprise a shunt component adapted to shunt direct current for each of the gating control groups. Specifically, the shunt component can comprise at least two shunt branches, each of the gating control groups being connected to one of the shunt branches of the shunt component, so that each of the gating control groups is in parallel in the signal reading circuit, and thus the direct current of the direct current signal source can be controlled to flow to the corresponding gating control group through the shunt component.

[0082] In an embodiment of the present specification, as shown in Figure 5a the signal reading circuit 50 comprises a direct current signal source 51, a plurality of gating control units 521a, 521b-521m, 522a, 522b-522n, a plurality of voltage dividing units 5301, 531a, 531b-531m, 532a, 532b-532n, a plurality of logic control units 541, 542, an AC-DC coupling unit 55 and a shunt component 56. Wherein, m and n are positive integers, and m and n can be equal or not equal.

[0083] Compared with Figure 3 and Figure 4 , Figure 5a the same or similar in the present specification will not be repeated, the main difference is that in the signal reading circuit 50, the gating control unit is divided into two gating control groups 521 and 522 with the same connection structure, the gating control groups 521 and 522 are respectively connected to one of the shunt branches of the shunt component 56, and the direct current of the direct current signal source 51 is distributed to the gating control groups 521 and 522 through the shunt component 56.

[0084] It can be understood that the shunt component can be composed of any device capable of realizing the shunt function, for example, the shunt component can comprise at least one of an analog switch and a unidirectional conduction unit; according to actual requirements, the shunt component can adopt different devices and structures, taking the unidirectional conduction unit as an example, the shunt component can comprise a plurality of unidirectional conduction units connected corresponding to the gating control groups, so as to flow the direct current of the direct current signal source into the corresponding gating control groups. And, Figure 5a the grouping is only illustrative, in actual application, the shunt component can be connected to a larger number of gating control groups, and the present specification does not limit the type of device in the shunt component, the connection relationship and the number of connections of the shunt component.

[0085] It can also be understood that Figure 5a the two logic control units in the present specification are only illustrative, according to the number of ports of the actual logic control unit and the number of gating control units, the gating control groups and the logic control units can be one-to-one, one-to-many or many-to-one, for example, inFigure 5a Alternatively, a single logic control unit with a sufficient number of ports can be used to control the corresponding gating control unit by connecting all voltage divider units; or, if the number of ports of the logic control unit is insufficient, more logic control units can be added to control all gating control units. This specification does not impose specific limitations on the number or model of the logic control units in the embodiments.

[0086] In practical implementation, the devices in the shunt assembly can be hierarchically divided according to the number of gating control groups, thereby avoiding excessively long traces between the devices in the shunt assembly and the gating control groups, which would generate parasitic inductance and parasitic capacitance, and ensuring the bandwidth margin of the signal readout circuit.

[0087] Taking a unidirectional conduction unit as an example, multiple unidirectional conduction units can be divided into at least two levels. The levels are set from low to high according to the connection order between the unidirectional conduction unit and the gating control group. The lowest level unidirectional conduction unit is connected to the corresponding gating control group, the highest level unidirectional conduction unit is suitable for receiving the DC current of the DC signal source, and the lower level unidirectional conduction unit is connected to a higher level unidirectional conduction unit.

[0088] like Figure 5b As shown, the shunt unit 56 may include multiple unidirectional conduction units. These units are divided into a first-level unidirectional conduction unit and a second-level unidirectional conduction unit through hierarchical division. The first level is lower than the second level according to the connection order of the unidirectional conduction units and the gating control group. The first-level unidirectional conduction units A11-A1U and A21-A2U are connected to their respective gating control groups. The first-level unidirectional conduction units A11-A1U and A21-A2U are each connected to a corresponding unidirectional conduction unit in the second level. For example, the first-level unidirectional conduction units A11-A1U are connected to the first-level unidirectional conduction unit B11, and the first-level unidirectional conduction units A21-A2U are connected to the first-level unidirectional conduction unit B1W. The second-level unidirectional conduction units B11-B1W receive DC current provided by a DC signal source.

[0089] It is understandable that "lower" and "higher" are relative to the level, and do not restrict the arrangement order, importance, or number of unidirectional conduction units.

[0090] In a specific implementation, the DC signal source can provide DC voltage to the logic control unit. As a result, the range of the level signal output by the logic control unit is controlled by the DC signal source, which facilitates circuit design and gating control.

[0091] In some optional examples, the unidirectional conducting unit can include a diode, an anode of the diode being connected to the logic control unit through the voltage dividing unit, and a cathode of the diode being connected to the direct current signal source through the voltage dividing unit. When the direct current voltage between the two poles of the diode is in the same direction as the conducting direction of the diode, the direct current voltage between the two poles of the diode is a forward bias voltage. If the forward bias voltage is greater than the conducting voltage, the direct current voltage between the two poles of the diode meets the conducting condition, and the diode is conducting. If the forward bias voltage is not greater than the conducting voltage, the direct current voltage between the two poles of the diode does not meet the conducting condition, and the diode is not conducting, being in a dead zone state. When the direct current voltage between the two poles of the diode is in the opposite direction of the conducting direction of the diode, the direct current voltage between the two poles of the diode is a reverse bias voltage. At this time, the direct current voltage between the two poles of the diode does not meet the conducting condition, and the diode is not conducting, being in a cut-off state.

[0092] If the reverse bias voltage of the diode is too large, that is, the voltage of the second level signal output by the logic control unit is too high, resulting in a too large voltage difference between the two poles of the diode, the diode will be reverse breakdown. In order to avoid the problem of reverse breakdown of the diode, the power supply of the logic control unit can be provided by the direct current signal source, so as to ensure that the direct current voltage between the two poles of the diode will not cause reverse breakdown when the logic control unit outputs the second level signal.

[0093] In the formula, the conducting voltage of the diode is determined by the manufacturing material. For example, the conducting voltage of a silicon diode is about 0.7 V (volt), and the conducting voltage of a germanium diode is about 0.2 V.

[0094] In some optional examples, the AC-DC coupling unit can include a capacitor, a first end of the capacitor being connected to the gating control unit as an input end of the AC-DC coupling unit, and a second end of the capacitor being connected to the signal readout circuit as an output end. Through the voltage-current characteristic of the capacitor, the direct current signal in the signal readout circuit is blocked, and an alternating current signal is output.

[0095] In some optional examples, the voltage dividing unit can include a resistance for voltage division. Further, the voltage dividing unit can further include a capacitor connected in parallel with the resistance, for filtering signals.

[0096] In some optional examples, the control logic unit is any device capable of outputting a direct current level signal. Optionally, the control logic unit can be obtained by packaging a digital logic circuit. For example, the control logic unit can be any one of the following:

[0097] a controller;

[0098] a decoder;

[0099] a shift register.

[0100] The controller can output corresponding level signals to the gate control units in response to the signal reading message, and control whether the gate control units are gated or not.

[0101] In practical applications, the controller can include a CPU (Central Processing Unit), an FPGA (Field Programmable Gate Array), or the like.

[0102] It should be noted that the above describes a plurality of embodiment schemes provided by the embodiments of the present specification, and each optional mode introduced by each embodiment scheme can be combined with each other and cross-referenced without conflict, thereby extending a plurality of possible embodiment schemes, which can be considered as the embodiment schemes disclosed and disclosed by the embodiments of the present specification.

[0103] In order for those skilled in the art to clearly understand and implement the above technical solutions, the signal reading circuit is described in detail below through several specific embodiments.

[0104] In an embodiment of the present specification, as shown in Figure 6a , it is a connection diagram of a signal reading circuit. The signal reading circuit 60 can include a DC signal source VS, a plurality of gate control units 61a, 61b-61m, a voltage dividing unit 621-622, 62a, 62b-62m, a logic control unit M1, and an AC-DC coupling unit 63.

[0105] As Figure 6a can be seen, the signal reading circuit 60 includes m gate control units, each gate control unit has the same structure and the same connection relationship between devices. Hereinafter, the connection relationship between devices in the signal reading circuit 60 will be described by way of example of the gate control unit 61a, and the connection relationship of the remaining gate control units 61b-61m in the signal reading circuit 60 can be analogized by referring to the description of the gate control unit 61a, which will not be described one by one here.

[0106] Continuing to refer to Figure 6a , the DC signal source VS provides a positive DC signal, and the output DC voltage is U vs , and U vs is greater than the conduction voltage of the diode. The DC signal source VS is connected to the anode of the diode D1 in the gate control unit 61a through the resistor R v1 of the voltage dividing unit 621, and the cathode of the diode D1 in the gate control unit 61a is connected to the output port 1 of the logic control unit M1 through R1.

[0107] The input port IN1 of the signal readout circuit 60 can access an alternating current signal source VG1. The input port IN1 is connected to the cathode of a diode D1 in the gating control unit 61a through a capacitor C1 in the gating control unit 61a. The cathode of the diode D1 in the gating control unit 61a is connected to the anode of a diode D2 in the gating control unit 61a through a capacitor C2 in the alternating current coupling unit 63. out The anode of the diode D2 in the gating control unit 61a is connected to the output port OUT of the alternating current coupling unit 63. out A grounding voltage dividing unit 622 is further provided between the output port OUT and the ground. The voltage dividing unit 622 includes a resistor R out .

[0108] Reference Figure 6a It can be seen that the gating control units 61a, 61b-61m respectively include diodes D1-D m Since the anodes of the diodes D1-D m correspond to the positive pole of the direct current signal source VS, and the cathodes of the diodes D1-D m correspond to the output port of the logic control unit M1, when it is necessary to control the gating of a gating control unit, the logic control unit M1 outputs a low level signal as a first level signal through the corresponding port, so that the positive bias voltage of the two poles of the corresponding diode is greater than the conduction voltage of the diode, and the logic control unit M1 outputs a high level signal as a second level signal through other ports, so that the diodes of other gating control units are not conductive, i.e., the corresponding gating control units are not gated.

[0109] Therefore, on the premise that the direct current signal source provides a direct current signal in the same direction as the two poles of the diode, the level signal output by the logic control unit can control whether each gating control unit is gated. For example, Figure 6a If the logic control unit M1 has m output ports, it can control whether m gating control units are gated. The alternating current and direct current signals in the signal readout circuit are analyzed by way of example as follows.

[0110] The output port 1 of the logic control unit M1 outputs a low level signal, and the other output ports 2-m output high level signals. For ease of description, the value "1" represents a high level signal, and the value "0" represents a low level signal, i.e., the control signals output by the output ports 1-m of the logic control unit M1 are: 01...1, in which there are m-1 high level signals "1".

[0111] The output control signal makes the diode D1 conductive, and the direct current voltage between the two poles of the diode D1 is a forward bias voltage, which is greater than the conduction voltage; and the diodes D2-D m are not conductive, and the diodes D2-D mThe DC voltage at the two poles may be a forward bias voltage less than the turn-on voltage, or it may be a reverse bias voltage, depending on the magnitude of the high-level signal voltage.

[0112] Based on the conducting diode D1, the DC current supplied by the DC signal source VS flows in the circuit, such as... Figure 6a The arrows indicate the direction. For the DC path, the DC current flows sequentially from the DC signal source VS to the voltage divider unit 621, the gating control unit 61a, the voltage divider unit 62a, and finally to the output port 1 of the logic control unit M1.

[0113] like Figure 6b As shown, this is the DC equivalent circuit 60' after diode D1 is turned on, where C x The junction capacitance C of the other m-1 cutoff diodes d The equivalent capacitance after parallel calculation, i.e., C x = (m-1)*C d In the equivalent circuit 60', if the forward voltage drop of diode D1 is U... D1 Then the DC current (also called the bias current) is I. b =(U vs –U D1 ) / (R v1 +R1), capacitor C out DC voltage U at the first terminal DC =U D1 + I b *R1, other diodes D2~D m The DC voltage is U vs –U DC =U vs -U D1 -I b *R1.

[0114] like Figure 6c As shown, this is the AC equivalent circuit 60” after diode D1 is turned on. Diode D1 is biased by current I. b The on-resistance is R. D1 The DC signal source is equivalent to a resistor R. VS R VS The resistance can be considered as 0, while the resistance between C1 and C2 is... out and R out If they are large enough, C1, C out and R out It does not affect bandwidth. Therefore, it can be based on the aforementioned R. D1 R v1 and C x Determine the bandwidth f bwFor example, for the equivalent circuit 60", in the case of attenuation of -3dB (i.e. the amplitude is equal to two times the square root of half of the maximum value), the frequency bandwidth f bw is as follows:

[0115] f bw = 1 / [2π*(R D1 ||R v1 )*C x ].

[0116] In a specific implementation, based on the structure and manufacturing process of the diode D1, the on-resistance R D1 can be controlled to be tens of ohms, and the value of R v1 can also be adjusted according to the bandwidth requirement, so that the value of R D1 ||R v1 is smaller, and the bandwidth is increased. Therefore, the signal readout circuit provided by the embodiments of the present specification can provide more abundant bandwidth, effectively guarantee the quality of the output signal, and the structure is more flexible, which can enhance the transmission performance while saving hardware cost.

[0117] Further, in the actual application of the above-mentioned embodiments of the present specification, considering that the diode has a junction capacitance C d , thereby generating a capacitive reactance X c = 1 / (2π*f*C d ), wherein f represents the frequency of the entire circuit. The capacitive reactance X c is a main factor affecting the high-frequency performance of the diode. From the perspective of the use range, in order to be able to be used in a high-frequency and high-speed circuit, a diode with a smaller capacitive reactance X c can be used, such as a radio frequency (RF) Schottky diode.

[0118] The RF Schottky diode has an extremely low junction capacitance (such as a junction capacitance <1 pf), a low on-voltage drop (such as an on-voltage drop = 0.3V), and a small on-resistance (such as an on-resistance = 10Ω), which can obtain a higher bandwidth. Moreover, the packaging volume of the RF Schottky diode can be less than 0.2 square meters (mm 2 ), such as the packaging volume can be reduced to 0.6*0.3 (mm 2 ). The price of a single RF Schottky diode is about 0.1 US dollars. Compared with the multiplexer solution, the device cost of the RF Schottky diode is lower, and the small volume can be more flexible in layout, thereby reducing the volume of the overall circuit, which is conducive to semiconductor integration and facilitates printed circuit board (PCB) layout.

[0119] For referenceFigures 6a-6c and the corresponding description, if 8 RF Schottky diodes are used, and R v1 >>R D1 , then R v1 can be ignored, the -3dB bandwidth f bw ≈3.8GHz, which is much higher than the bandwidth of the existing multiplexer (for example, the bandwidth of a common multiplexer is only about 90MHz). Even if the number of circuit branches in which the RF Schottky diodes in the signal readout circuit are increased, such as to 16 RF Schottky diodes, the -3dB bandwidth of the AC path is still about 1.8GHz, and the bandwidth of the signal readout circuit still has a large margin.

[0120] It can be understood that Figures 6a-6c the devices included in each voltage dividing unit are only illustrative and do not limit the devices included in the voltage dividing unit. Depending on the actual application scenario, the voltage dividing unit can include different devices. For example, as shown in Figure 7 , it is a connection diagram of another signal readout circuit. Compared with the signal readout circuit 60 shown in FIG. 6a, the difference between the two is that the voltage dividing unit 71 in the signal readout circuit 70 further includes a capacitor C v and a resistor R v2 . Among them, the resistor R v2 and the capacitor C v are connected in parallel, and then R v1 is connected in series. Thus, through the resistors R v1 and R v2 with resistance characteristics, the voltage dividing unit 71 can achieve a voltage dividing effect, and through the capacitor C v , a signal filtering effect can also be achieved. The circuit connection relationship of the signal readout circuit 70 and the AC and DC signal analysis can refer to the description of Figures 6a-6c and the related parts thereof, which will not be repeated here.

[0121] In another embodiment of the present specification, as shown in Figure 8a , it is a connection diagram of another signal readout circuit. Compared with the signal readout circuit 60 of Figure 6a , the DC signal source, the plurality of gating control units, the AC and DC coupling units, the voltage dividing units and the logic control unit use the same or similar devices and connection relationships, which can refer to the description of Figures 6a-6c , Figure 7The relevant description part is not repeated here, and the main difference between the two is that the plurality of the gate control units in the signal readout circuit 80 is divided into two gate control groups 8a and 8b, the gate control group 8a can include m gate control units, and the gate control group 8b can include n gate control units. The signal readout circuit 80 further includes a shunt component 81, which can include two shunt branches, each of which includes a diode. The gate control groups 81a and 81b are connected to one shunt branch of the shunt component 81, that is, the gate control group 81a is connected to the diode D s1 , and the gate control group 81b is connected to the diode D s2 . The AC and DC signals in the signal readout circuit are analyzed by way of example as follows:

[0122] The output port 11 of the logic control unit M1 outputs a low-level signal “0”, and the other output ports 12-1m output high-level signals “1”. The diodes D s1 and D 11 are in the on state, and the DC voltage between the two poles is the forward bias, which is greater than the conduction voltage. s1 11 The diodes D 12 -D 1m may be in the on state, and the DC voltage between the two poles may be the forward bias less than the conduction voltage or the reverse bias according to the voltage size of the high-level signal.

[0123] The output ports 21, 22-2n of the logic control unit M2 all output high-level signals “1”. The diodes D 21 -D 2n may be in the on state, and the DC voltage between the two poles may be the forward bias less than the conduction voltage or the reverse bias according to the voltage size of the high-level signal.

[0124] The diodes D s1 and D 11 are in the on state, and the DC current provided by the DC signal source VS flows in the circuit, as indicated by the arrows in Figure 8a . For the DC path, the flow path of the DC current is: from the DC signal source VS to the resistors R v2 , R v1 , D s1 , D 11 , R 11 , and finally to the output port 11 of the logic control unit M1.

[0125] As shown in Figure 8b , the diodes D s1 and D 11 ​The DC equivalent circuit after conduction is 80', where C xa To determine the junction capacitance C of the m-1 diodes that are cut off in the gate control group 8a da The equivalent capacitance after parallel calculation, i.e., C xa = (m-1)*C da C y The equivalent capacitance is calculated by paralleling the junction capacitance of the diodes cut off in the shunt assembly 81. Since, in this embodiment, the diodes cut off in the shunt assembly 81 are D... s2 Therefore, C y Equal to diode D s2 junction C d2 .

[0126] In the equivalent circuit 80', if diode D s1 The on-state voltage drop is U Ds1 diode D 11 The on-state voltage drop is U D11 Then the DC current (also called the bias current) is I. b =(U vs –U Ds1 –U D11 ) / (R v1 + R v2 +R 11 ), capacitor C out DC voltage U at the first terminal DC =U Ds1 +U D11 +I b *R 11 Other diodes D in the selector control group 8a 12 ~D 1m The DC voltage is U vs –U DC =U vs -U Ds1 -U D11 -I b *R 11 .

[0127] like Figure 8c As shown, this is diode D. 11 The AC equivalent circuit after conduction is 80", diode D s1 Bias current I b The on-resistance is R. Ds1 diode D 11 Bias current I b The on-resistance is R. D11 A DC signal source is equivalent to a resistor R. VS Under normal circumstances, R VSThe resistance can be considered as 0, and the AC equivalent circuit has a -3dB bandwidth f of 60". bw It can be obtained through simulation software or experimental testing (such as using an oscilloscope).

[0128] Compared to the solution of directly increasing the number of transmission channels, Figures 8a-8c The circuit structure shown can shorten the trace between the output and input terminals of the signal readout circuit through the shunt component, reduce parasitic inductance and capacitance, avoid a rapid decrease in bandwidth, thereby ensuring the transmission performance of the signal readout circuit and enabling a multiple increase in the gating control unit of the signal readout circuit.

[0129] For example, in situations requiring access to 64 or even 128 AC signal sources, if using... Figures 6a-6c The circuit structure shown is implemented by directly adding transmission channels. When the signal readout circuit has 64 transmission channels, its -3dB bandwidth is only 420MHz; when it has 128 transmission channels, its -3dB bandwidth is only 210MHz. Therefore, the parallel connection of diodes and capacitors results in an excessively narrow bandwidth for the signal readout circuit.

[0130] And adopt Figures 8a-8c When the circuit structure shown implements 128 transmission channels, consider using a shunt unit to multiplex more transmission channels. With the rest of the circuit structure unchanged, the number of channels can be increased exponentially simply by adding diodes. Still taking the diode junction capacitance as 0.6pF and the diode on-resistance as 10Ω, for the case of 64 transmission channels, C... x =C y =4.2pF, resulting in a -3dB bandwidth of approximately 2GHz; For the case of 128 transmission channels, C x =9pF, -3dB bandwidth is approximately 1.4GHz, relative to Figures 6a-6c The circuit structure and multiplexer shown, under the same transmission channel requirements, Figures 8a-8c The circuit structure shown can provide more bandwidth.

[0131] It is understood that the above embodiments are for illustrative purposes only, and variations can be made according to specific scenarios and needs, such as... Figures 8a-8c The diagram only illustrates diode D. s1 and D s2 In practical applications, more diodes can be included, and the diodes can be hierarchically divided to obtain at least two levels. This avoids excessively long traces between the devices in the shunt assembly and the gating control group, which would generate parasitic inductance and capacitance. It also ensures the bandwidth margin of the signal readout circuit. The embodiments in this specification do not limit the structural modifications of the circuit.

[0132] The specification also provides a signal processing circuit corresponding to the signal readout circuit described above, which will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the content of the signal processing circuit described below can be mutually corresponding with the content of the signal readout circuit described above.

[0133] Referring to Figure 9 The structure diagram of a signal processing circuit in an embodiment of the specification is shown. In the embodiment of the specification, the signal processing circuit 90 can include a plurality of alternating current signal sources 91a, 91b-91m, the signal readout circuit 92 described in any of the above embodiments, and a signal processing unit 93. The output terminals of the alternating current signal sources 91 are respectively connected to the input terminals of the signal readout circuit 92, and the output terminal of the signal readout circuit 92 is connected to the input terminal of the signal processing unit 93. The structure and signal analysis of the signal readout circuit 92 can refer to the related description in the above signal readout circuit part, which will not be described here.

[0134] The structure of the signal processing circuit described above replaces the multiplexer with the signal readout circuit, thereby avoiding the on-resistance and channel capacitance generated by the multiplexer, improving the bandwidth of the signal processing circuit, effectively ensuring the signal quality obtained by the signal processing unit, without the need to use a post-processing circuit to improve the signal amplitude, reducing the hardware cost, improving the flexibility of the circuit structure, and thereby improving the signal processing efficiency and quality.

[0135] In specific implementation, the gating control unit in the signal readout circuit can include a unidirectional conduction unit and an AC-DC coupling unit. According to different application scenarios, the AC-DC coupling unit and the alternating current signal source can be included in the same device, or can be included in different devices respectively.

[0136] In specific implementation, the function of the logic control unit can be realized by the controller of the system in which the signal processing circuit is located, or the logic control unit can be controlled by the controller of the system in which the signal processing circuit is located to perform corresponding operations. The embodiments of the specification do not make specific limitations on the corresponding devices of the logic control unit in the system.

[0137] Similarly, the function of the signal processing unit can be realized by the controller of the system in which the signal processing circuit is located, or the function of the signal processing unit can be realized by other chips, such as a DSP (Digital Signal Processing) chip.

[0138] In specific implementations, the AC signal source in the signal processing circuit can be any sensor capable of collecting information and outputting an AC signal. Among them, the sensor can be determined according to the specific application scenario of the signal processing circuit. For example, when the signal processing circuit is applied to a laser radar, the sensor can be a photodetector; when the signal processing circuit is applied to a loudspeaker device (such as a microphone), the sensor can be an acoustoelectric detector.

[0139] Taking the application scenario of a laser radar as an example, the laser radar can include the signal processing circuit described in any of the above embodiments, and the AC signal source is a photodetector. Specifically, the signal processing circuit applied to the laser radar can include: a plurality of photodetectors, the signal readout circuit described in any of the above embodiments, and a signal processing unit, the output ends of the photodetectors are respectively connected to the input ends of the signal readout circuits in correspondence, and the output end of the signal readout circuit is connected to the input end of the signal processing unit. By the gating control part in the gating signal readout circuit, the AC signal collected by the corresponding photodetector can be output to the signal processing unit.

[0140] With the above scheme, since the signal processing circuit includes the signal readout circuit described in any of the above embodiments, in terms of bandwidth, the signal processing circuit has more abundant bandwidth, which can effectively guarantee the signal transmission quality, so that it is not necessary to use a post-processing circuit to improve the signal amplitude, thereby improving the signal processing efficiency and quality. For example, for SiPM (Silicon Photo-Multiplier, Silicon Photo-Multiplier) and other photodetectors with high optical gain, the signal amplitude output by such photodetectors is large, and the high-bandwidth signal readout circuit can save the subsequent amplification circuit; in terms of manufacturing process, appropriate device models and packaging can be used according to actual needs, and the flexibility of the circuit structure is higher, and the selection space is larger; in terms of hardware cost, the signal processing circuit can use a more mature device instead of a multiplexer, so that the hardware cost is lower.

[0141] The present specification also provides a signal readout method corresponding to the above signal readout circuit, which will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the content of the signal readout method described below can be mutually corresponding to the content of the signal readout circuit described above.

[0142] Referring to Figure 10 The flowchart of a signal readout method in the embodiment of the present specification is shown in the figure, in the embodiment of the present specification, the signal readout method can be applied to the signal readout circuit described in any of the above embodiments, and specifically can include:

[0143] S101, output a control signal to the plurality of gating control parts to make a gating control part gated.

[0144] The logic control unit in the signal reading circuit can generate the control signal after meeting the trigger condition, or other controllers in communication connection with the logic control unit can send a trigger message to the logic control unit after meeting the trigger condition, and the logic control unit generates the corresponding control signal in response to the trigger message.

[0145] S102, the corresponding alternating current signal is transmitted through the gated gating control unit.

[0146] S103, output the alternating current signal after AC-DC coupling processing.

[0147] By using the above method, the multiplexer is replaced by a combination of hardware, thereby avoiding the on-resistance and channel capacitance generated by using the multiplexer, improving the bandwidth of the signal reading circuit, effectively guaranteeing the quality of the output signal, improving the flexibility of the circuit structure, enhancing the transmission performance of the signal reading circuit, and further eliminating the need for using a post-processing circuit to improve the signal amplitude, thereby reducing the hardware cost.

[0148] The embodiments of the present specification also provide a laser radar, which can include a memory and a controller, wherein the memory is adapted to store one or more computer executable instructions; the controller is adapted to invoke one or more computer executable instructions in the memory to execute the steps of any of the above methods.

[0149] In specific implementation, the laser radar can further include a communication interface, through which the laser radar can be in communication connection with other devices. The other devices can include a server, a terminal, a display device, etc.

[0150] It should be noted that the "one embodiment" or "an embodiment" referred to in the present specification means that a specific feature, structure or characteristic described in the implementation manner can be included in at least one implementation manner of the present specification. In the description of the embodiments of the present specification, since there are multiple units or components with the same function in the circuit, the prefixes of "first", "second" and the like can be used for differentiation, but the prefix terms of "first", "second" and the like are only used for description purpose, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by the terms of "first", "second" and the like can be explicitly or implicitly included one or more of the features. In addition, the terms of "first", "second" and the like are used to distinguish similar objects, and do not have to be used to describe a specific order or represent importance.

[0151] It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting thereof. Thus, unless the context clearly indicates otherwise, it is understood that the terms and phrases discussed above can be used interchangeably.

[0152] While the present specification disclosure has been disclosed with reference to various embodiments, it will be understood by those of ordinary skill in the art that various changes in form and details can be made therein without departing from the spirit and scope of the present specification disclosure. Therefore, the scope of the present specification disclosure should be defined not by the detailed description, but by the appended claims, and their equivalents.

Claims

1. A signal readout circuit, characterized by The signal readout circuit comprises a direct current signal source, a plurality of gating control units, a logic control unit and an AC-DC coupling unit, wherein: the plurality of gating control units comprises at least two parallel gating control groups, and each of the at least two parallel gating control groups comprises a first gating control unit and a second gating control unit; the direct current signal source is adapted to provide direct current signals to the first gating control unit and the second gating control unit; the logic control unit is adapted to output a level control signal to the first gating control unit and the second gating control unit to control the first gating control unit or the second gating control unit to be gated; the first gating control unit is adapted to access a first alternating current signal source and transmit alternating current signals of the first alternating current signal source when gated; the second gating control unit is adapted to access a second alternating current signal source and transmit alternating current signals of the second alternating current signal source when gated; the AC-DC coupling unit is adapted to filter out direct current signals in the signal readout circuit and output alternating current signals transmitted by the gated gating control unit. The first gating control unit and the second gating control unit each comprise a unidirectional conduction unit, one end of the unidirectional conduction unit is connected to the level control signal output by the logic control unit and connected to the corresponding alternating current signal source, and the other end of the unidirectional conduction unit is connected to the direct current voltage applied by the direct current signal source. The first gating control unit and the second gating control unit each further comprise an AC-DC coupling unit, wherein:

2. The signal readout circuit of claim 1, wherein, The unidirectional conduction unit accesses the corresponding alternating current signal source through the AC-DC coupling unit. The unidirectional conduction unit comprises a diode, a cathode of the diode is connected to the logic control unit through a first voltage dividing unit, and an anode of the diode is connected to the direct current signal source through a second voltage dividing unit.

3. The signal readout circuit of claim 2, wherein The AC-DC coupling unit and the unidirectional conduction unit are contained in different devices.

4. The signal readout circuit of claim 2, wherein, The signal readout circuit further comprises a shunt assembly, the shunt assembly comprises at least two shunt branches, each gating control group is connected to one shunt branch of the shunt assembly, and the shunt assembly is adapted to control the flow direction of direct current of the direct current signal source to the corresponding gating control group.

5. The signal readout circuit of claim 1, wherein, The plurality of unidirectional conduction units are divided into at least two levels, and the levels are set from low to high according to the connection order of the unidirectional conduction units and the gating control groups; 6. The signal readout circuit of claim 5, wherein, The unidirectional conduction unit of the lowest level is connected to the corresponding gating control group, the unidirectional conduction unit of the highest level is adapted to receive the direct current of the direct current signal source, and the unidirectional conduction unit of a lower level is connected to the unidirectional conduction unit of a higher level. The AC-DC coupling unit comprises a capacitor, a first end of the capacitor is connected to the first gating control unit and the second gating control unit as an input end of the AC-DC coupling unit, and a second end of the capacitor is an output end of the signal readout circuit to output alternating current signals.

7. The signal readout circuit according to any one of claims 1 to 6, characterized in that, The direct current signal source provides a direct current voltage to the logic control unit.

8. The signal readout circuit according to any one of claims 1 to 6, characterized in that, ​ 9. A signal processing circuit, characterized by comprising: The signal reading circuit comprises a plurality of AC signal sources, a signal reading circuit according to any one of claims 1-8, and a signal processing unit, the output terminals of the AC signal sources are respectively connected to the input terminals of the signal reading circuit, and the output terminal of the signal reading circuit is connected to the input terminal of the signal processing unit.

10. The signal processing circuit of claim 9, wherein, The first gating control unit and the second gating control unit in the signal reading circuit respectively comprise a unidirectional conduction unit and an AC / DC coupling unit, and the AC / DC coupling unit and the AC signal source are contained in the same device.

11. The signal processing circuit of claim 10, wherein, The AC signal source is a sensor for collecting information and outputting an AC signal.

12. A lidar, comprising: The signal processing circuit comprises the signal processing circuit according to claim 10, and the AC signal source is a photodetector.

13. A signal readout method, characterized by, The signal reading method is applied to the signal reading circuit according to any one of claims 1-8, and the signal reading method comprises: Outputting a level control signal to the first gating control unit and the second gating control unit to select one gating control unit; Transferring the corresponding AC signal through the selected gating control unit; Outputting the AC signal after AC / DC coupling processing.

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