491results about "Logic circuit coupling arrangements" patented technology

The invention discloses an isolation activation circuit. The circuit comprises a voltage division isolation module which is used for dividing a power supply voltage into a first voltage and a second voltage and isolating the power supply voltage from the first voltage; the pulse activation module is used for generating a first pulse signal according to the first voltage and the second voltage; the first power supply conversion module is used for converting a power supply voltage into a first power-on voltage according to the first pulse signal or the second pulse signal; the second power supply conversion module is used for converting the first power-on voltage into a second power-on voltage according to the first control signal, or terminating the conversion of the first power-on voltage into the second power-on voltage according to the second control signal; the power-on self-holding module is used for generating a second pulse signal according to the second power-on voltage and the second voltage; and the detection module is used for enabling the battery management system to output a second control signal. The isolation activation circuit provided by the invention directly takes electricity from the power supply module, and realizes the isolation driving of a low-voltage battery management system by using high-voltage direct current.

The invention provides a control method and device of a radio frequency power supply, the radio frequency power supply and semiconductor process equipment, and is applied to the technical field of semiconductor process equipment, the method is applied to the radio frequency power supply which provides at least one pulse signal in each work period, and in the at least one pulse signal in each work period of the radio frequency power supply, the pulse signal is transmitted to the radio frequency power supply. Wherein one pulse signal is controlled according to a first control mode, and the first control mode is as follows: according to a forward power feedback value, a reflection power feedback value, a dissipation power feedback value and a bus voltage threshold value of a current radio frequency power supply, a bus voltage output to the radio frequency power supply is adjusted, and a bias voltage output to the radio frequency power supply is kept unchanged; compared with a protection circuit built according to electronic components in the prior art, the invention provides a software protection mechanism, the execution process is not easily influenced by factors such as environment temperature and electromagnetic interference, the protection mechanism is more reliable, and the safety of the radio frequency power supply in the operation process can be ensured.

The invention discloses a novel heterogeneous neuron memristor coupling model and circuit. A resistor, a capacitor, a triode, an operational amplifier, a multiplier, a direct current voltage source and a direct current source construct five circuit paths, namely a hyperbolic tangent simulation equivalent circuit and a hyperbolic tangent memristor simulation equivalent circuit. The calculation result of the coupling network shows that the network does not have a balance point, and the network shows hidden dynamic behaviors. The coupling network can generate five stable discharge modes such as periodic peak, chaotic peak, random bursting, chaotic bursting and periodic bursting. Due to the fact that different discharging modes can control the system to show different behavior modes, the circuit has important value for development of a bionic system.

A quantum random number generator (QRNG) system including optocoupler including at least one light emitter and at least two light receivers that are electrically coupled to each other in a configuration that rejects common mode noise. The system also includes a controller configured to control the at least one light emitter to emit photons randomly towards the at least two light receivers, measure a shot noise signal generated by the at least two light receivers in response to receiving the photons, and extract a random number from the shot noise signal.

The invention relates to the technical field of industrial automation field data acquisition, in particular to an ultrahigh-precision load data implementation method and circuit and a measurement and control instrument. The method comprises the steps that an excitation signal is provided for the load sensor through the precise low-drift direct-current power supply, and the excitation signal is applied to the power input end of the sensor after high-frequency noise is eliminated through the pi-type filter network. According to the method, a temperature-load coupled multi-broken-line nonlinear regression curve cluster is constructed, and a temperature variable is introduced into dynamic interpolation calculation of segmented endpoints, so that an error nonlinear cumulative effect caused by endpoint drift under a wide-temperature working condition is effectively inhibited. In the hardware level, the background noise of a sensor signal is suppressed to a microvolt level through the collaborative design of a precise low-drift power supply and multi-stage anti-aliasing filtering, and original data with a high signal-to-noise ratio is provided for a software compensation algorithm.

A digital isolator includes a receiver configured to receive digital raw data at a primary side of the digital isolator. A digital-to-digital encoder is disposed at the primary side of the digital isolator. The digital-to-digital encoder is configured to create coded data. One or more digital isolators are configured to transmit the coded data across a transformer and an isolation barrier to create output coded data. A digital-to digital decoder is disposed at a secondary side of the digital isolator. The digital-to digital decoder is configured to decode the output coded data to create decoded data, determine error in coupling across the digital isolator based on the decoded data and the digital raw data, and provide an error signal based the error in coupling across the digital isolator.

The invention provides a harmonic enhancement type load traction system. The harmonic enhancement type load traction system comprises a circulator, an impedance tuner, a high-pass filter, a radio frequency power amplifier and a non-reflection duplexer which are connected end to end to form a closed-loop structure, the input end of the circulator is connected with a bias structure of a to-be-tested device, and the non-reflection duplexer is connected with a fundamental wave signal to form an open-loop structure; the active closed-loop load traction structure is used at the harmonic wave position, the active open-loop load traction structure is used at the fundamental wave position, tuning of the fundamental wave and tuning of the second harmonic wave are effectively compatible, the integration level is high, and impedance tuning of the harmonic wave can be achieved under the condition that other equipment such as a signal source is not introduced.

The invention discloses a balanced frequency tripling structure and terahertz equipment, which are applied to the technical field of terahertz, and comprise an odd-mode excitation structure connected with an input waveguide, a waveguide mode excitation structure connected with an output waveguide, and two coupling lines connected with the odd-mode excitation structure and the waveguide mode excitation structure, the two coupling lines are arranged in parallel to transmit differential signals; one coupling line is connected with a frequency doubling diode, the other coupling line is connected with another frequency doubling diode, and the two frequency doubling diodes form a balanced frequency doubling diode pair. Through the odd-mode excitation structure, electromagnetic waves can be converted into coupling line odd-mode work, so that radio frequency reverse excitation is carried out on the two frequency doubling diodes, and basic conditions for realizing idle harmonic suppression are constructed. And meanwhile, the odd mode excitation structure and the waveguide mode excitation structure can lock even harmonics generated by the frequency doubling diode in a nonlinear manner in the coupling line to form a high-integration-level idle harmonic loop, so that high efficiency of third harmonics can be ensured.

In some examples, a method comprises communicating first data between a first circuit and a second circuit via a differential communication channel across a galvanic isolation barrier within a circuit package, wherein the first data is coded via a first coding technique that comprises ON-OFF shift Keying (OOK) with a differential carrier signal. The method also includes communicating second data between the first circuit and the second circuit via the differential communication channel across the galvanic isolation barrier within the circuit package, wherein the second data is coded via a second coding technique comprises differential pulse coding.

The invention provides an isolation driving circuit and a charging and discharging controller, and relates to the technical field of photovoltaic charging and discharging, and the isolation driving circuit comprises a photoelectric coupler, an input module, a control module and an output module. The output module is a passive device; under the condition that the first control signal provided by the control module is low level, the photoelectric coupler is turned off, and the output module outputs a low level value; under the condition that the first control signal provided by the control module is a high level and the input signal provided by the input module is a high level, the photoelectric coupler is conducted, and the output module outputs a high level value; under the condition that the first control signal provided by the control module is high level and the input signal provided by the input module is low level, the photoelectric coupler is turned off, and the output module outputs a low level value; on the basis of optimizing the circuit structure, a passive device is adopted to replace an active power device on the output side, so that the technical problems that in the prior art, standby power is large, cost is high, and large-scale application is not facilitated are solved.

In some examples, a method comprises communicating first data between a first circuit and a second circuit via a differential communication channel across a galvanic isolation barrier within a circuit package, wherein the first data is coded via a first coding technique that comprises ON-OFF shift Keying (OOK) with a differential carrier signal. The method also includes communicating second data between the first circuit and the second circuit via the differential communication channel across the galvanic isolation barrier within the circuit package, wherein the second data is coded via a second coding technique comprises differential pulse coding.

The invention provides an oscillation signal energy detection circuit and an isolator, two paths of received oscillation signals with a difference of half a cycle are used as clock signals through a first trigger and a second trigger, charge and discharge current of a capacitor is controlled by alternately turning on and turning off a third switch, the charge current of the capacitor is greater than the discharge current, and the discharge current of the capacitor is greater than the discharge current. Energy accumulation can be achieved through continuous switching actions, signal overturning is completed when the voltage obtained through energy accumulation exceeds a set threshold value, and energy detection is achieved. The anti-interference capability and the transient common mode rejection capability of the signal are improved by detecting the energy corresponding to the number of the pulses of the continuous oscillation signal, high and low levels are judged by taking the accumulated energy corresponding to the N continuous pulses as a reference, the propagation delay and the distortion degree of the signal are reduced, and the problem that the anti-interference capability of single-channel isolation transmission is insufficient is solved.

The invention discloses a level shift circuit, a control method thereof and electronic equipment, and relates to the technical field of integrated circuits. The circuit comprises a logic control module, an AC / DC coupling module and an inverted output module, in the logic control module, a first signal input end is connected with an input signal source, and a second signal input end is connected with an enable signal source; the AC-DC coupling module comprises a DC coupling unit and an AC coupling unit; in the direct current coupling unit, a first control input end is connected with a first control output end, and a second control input end is connected with a second control output end; in the AC coupling unit, an AC coupling input end is connected with a first control output end; the AC coupling output end is connected with the DC coupling output end; the inverted input end of the inverted output module is connected with the DC coupling output end, and the inverted output end is used for outputting a target level shift signal. And a low-delay, high-speed and good-duty-ratio level shifting function can be realized for an alternating current signal and a direct current signal.

The invention discloses a built-in double-feedback hysteresis solid-state switching circuit which comprises a triode, a first photoelectric coupler, a second photoelectric coupler and a field effect transistor, a resistor R2 is connected between an emitting electrode and a collecting electrode of the triode in parallel, and the input end of the resistor R2 is sequentially connected with a resistor R1 and a voltage stabilizing diode D1 in series. The input end of the voltage stabilizing diode D1 and the second pin end of the second photoelectric coupler are connected to the control end for power supply, the output end of the field effect transistor is connected with a voltage stabilizing diode D2 in parallel, and the output end of the voltage stabilizing diode D2 is connected with a power end for power supply. The circuit has a double-feedback hysteresis circuit function, the reliability of circuit control can be improved, the service life of the circuit is prolonged, and the circuit is high in reliability, long in service life, low in noise, free of sparks, free of electromagnetic interference, wider in application range and suitable for product equipment with requirements for power amplification conversion control.

The present application discloses a digital isolator including a signal transmitting circuit, a signal receiving circuit, and an isolation circuit. The isolation circuit is coupled between the signal transmitting circuit and the signal receiving circuit. The isolation circuit includes a first isolation unit for converting a received input modulation signal into a differential signal and a second isolation unit for providing an output modulation signal in response to receiving the differential signal. The first isolation unit and the second isolation unit have symmetrical circuit structures. By using a fully differential structure and a fully symmetrical structure, the circuit has improved immunity capability, and can suppress common mode transient interference greater than 200 kv / us.

The invention provides a digital isolator with both high-speed communication and high common-mode transient immunity. The digital isolator comprises a transmitter, a coupling inductor and a receiver, the transmitter comprises an oscillator, a modulation capacitor assembly and a common-mode transient immunity enhancement module; the oscillator is configured to receive a data signal and generate a first differential signal based on the data signal; the modulation capacitor assembly is configured to modulate a code element 0 into a first frequency and modulate a code element 1 into a second frequency; the common-mode transient immunity enhancement module is configured to determine a bias control signal according to the first differential signal; the receiver is configured to receive the second differential signal and obtain a square wave signal based on the second differential signal; obtaining a triangular wave signal based on the square wave signal; obtaining the maximum value of a triangular wave signal according to the falling edge signal of the square wave signal; and obtaining a target data signal based on the maximum value, so as to solve the problem of low communication and common-mode transient immunity performance of the existing digital isolator.

The invention relates to a full duplex digital isolator. A circuit is provided. The circuit comprises: a first transmitter circuit having a first input terminal arranged to receive first input data and a first node arranged to transmit first intermediate data corresponding to the first input data; a first receiver circuit including a second node arranged to receive the first intermediate data and a first output terminal arranged to generate first output data corresponding to the first input data; comprising a second input terminal and said second node, the second input terminal arranged to receive second input data, the second node further arranged to transmit second intermediate data corresponding to the second input data; and a second receiver circuit comprising a first node and a second output terminal, the first node being further arranged to receive the second intermediate data, and the second output terminal being arranged to generate second output data corresponding to the second input data.

The invention relates to a time sequence generation device. The present specification relates to an apparatus comprising a ring oscillator comprising a plurality of gates, each gate transmitting a fast clock signal. The first shift register includes successive first flip-flops, each of which is synchronized with a same first clock signal corresponding to one of the fast clock signals. The first shift register is looped back on itself and implements a second oscillator in which each first flip-flop transmits a slow clock signal. The second shift register includes successive second flip-flops, each of which is synchronized with a same second clock signal corresponding to one of the slow clock signals.

The application provides an inhibitor circuit, a signal sending device and a communication system, and relates to the field of digital information transmission.The inhibitor circuit provided by the application comprises a first transistor and a second transistor, a first switch, a second switch and a first voltage generation module.When communication ends, the first switch and the second switch are closed, and the first transistor and the second transistor are turned on.When the signals on the first communication bus and the second communication bus reach a common mode state, the first switch and the second switch are turned off.The application further provides an inhibitor circuit which adds an additional path on the basis of the above inhibitor circuit.The application further provides a signal sending device which comprises the above inhibitor circuit.The application further provides a communication system which comprises the above signal sending device.The inhibitor circuit, the signal sending device and the communication system provided by the application can reduce the amplitude of tailing overshoot and ensure accurate decoding at the receiving end.

The invention relates to a signal transmission circuit (1) for analog current signals in an explosion-proof region, comprising: a transformer (2) having one or more primary coils (4, 4a, 4b) and one or more secondary coils (6, 6a, 6b) coupled in a common magnetic circuit via a transformer yoke (J); a control circuit (10) configured to control a voltage across the one or more secondary coils (6, 6a, 6b) to zero by providing a compensation current for flux compensation, where the control variable corresponds to a measurement voltage that is one of: obtained from a voltage across a measurement coil (8) arranged in the magnetic circuit; the analog current signal to be transmitted corresponds to or depends on the compensation current, and is obtained as a function of the voltage across one of the plurality of secondary coils (6a, 6b) in the magnetic circuit when it is powered off.

A device (105) including a first circuit (110, 203), a second circuit (203), and a third circuit (115). The first circuit (110, 203) to receive a first signal and a second signal, and the first circuit (110, 203) to provide a third signal. The second circuit (203) to receive a fourth signal and a fifth signal, and the second circuit (203) to provide a sixth signal. The third circuit (115) to receive the third signal and the sixth signal, and the third circuit (115) to provide a seventh signal to indicate whether to track a difference between an amount of voltage provide to a driver (125) and an amount of voltage provided by the driver (125) or track a difference between an amount of voltage provided by a source and the amount of voltage provided to the driver (125).

A reference clock signal generation system, comprising a first coupler, a selection switch control module, a selection switch, a crystal oscillator, a second coupler, a phase-locked loop module and an adjustable resistor; the input end of the crystal oscillator is connected with the output end of the selection switch, and the output end of the crystal oscillator is connected with the input end of the second coupler; the input end of the adjustable resistor is connected with the output end of the crystal oscillator, and the output end of the adjustable resistor is connected with the input end of the selection switch; the input end of the selection switch control module is connected with the output end of the first coupler, and the output end of the selection switch control module is connected with the input end of the selection switch; the input end of the phase-locked loop module is connected with the input end of the first coupler and the input end of the second coupler respectively; the output end of the phase-locked loop module is connected with the input end of the selection switch; the system can ensure that the output reference clock signal is phase coherent when the internal and external reference clock signals of different sources are switched, and can also adjust the frequency of the output signal of the internal crystal oscillator.

There are provided an apparatus and method for performing impedance control (ZQ) calibration without a ZQ pin and an external resistor. The apparatus includes an output driver circuit connected to a signal pin interfacing with an external device; a register control word (RCW) configured to store an output driver impedance parameter related to a pull-up output voltage (VOH) condition of the signal pin; and a ZQ calibration circuit connected to the signal pin and configured to perform calibration using a VOH target level of the signal pin and control a termination resistance of the signal pin.

The embodiment of the invention provides a high-performance single-pole double-throw switch, and belongs to the technical field of wireless communication. The switch comprises a first coupling coil, the first coupling coil is provided with a first port and a fourth port, the first port is in an open circuit state, and the fourth port is connected with a signal receiving unit; the second coupling coil is provided with a second port and a third port, the second port is connected with the antenna unit, the third port is connected with the first control unit, and the first control unit controls the conduction state of the third port; the third coupling coil is provided with a fifth port and an eighth port, the fifth port is in an open circuit state, and the eighth port is connected with the signal transmitting unit; and the fourth coupling coil is provided with a sixth port and a seventh port, the sixth port is electrically connected with the antenna unit, the seventh port is connected with the second control unit, and the second control unit controls the conduction state of the seventh port. According to the embodiment of the invention, low insertion loss and high isolation can be realized.

In an integrated circuit component having a command interface to receive commands, a data interface to receive write data during a write-data reception interval, and first and second registers, control circuitry within the integrated circuit component responds to one or more of the commands by storing within the first register and the second register, respectively, a first control value that specifies a first termination to be applied to the data interface during the write-data reception interval, and a second control value that specifies a second termination to be applied to the data interface after the write-data reception interval transpires.

The invention relates to runtime antenna matching for near field communication wireless power transfer. Systems and methods for runtime antenna matching of wireless power devices are presented. The integrated circuit may include a controller. The integrated circuit may also include circuitry configured to sense a voltage in the switching converter. The circuit may be further configured to determine the presence or absence of a negative voltage spike in the sensed voltage. The controller may be configured to tune a capacitance of the antenna interface circuit between the switching converter and the antenna to perform impedance matching based on the presence or absence of a negative voltage spike in the sensed voltage.

Local on-die termination controllers for effecting termination of a high-speed signaling links simultaneously engage on-die termination structures within multiple integrated-circuit memory devices disposed on the same memory module, and / or within the same integrated-circuit package, and coupled to the high-speed signaling link. A termination control bus is coupled to memory devices on a module, and provides for peer-to-peer communication of termination control signals.

A circuit can include a closed loop bus line having a plurality of connections. The circuit can include a plurality of integrated circuits disposed on the close loop bus line at a respective connection of the plurality of connections. One or more of the integrated circuits can be configured to drive a signal on the closed loop bus line. The closed loop bus line can be configured to prevent signal reflection. For example, in certain embodiments, there are no termination resistors at any of the terminations to reduce size, weight, and / or part count of the circuit.

The invention discloses digital-to-analog converter circuitry. In described examples, a circuit (100) includes a digital-to-analog converter (DAC) cell element switch circuit (120) including first and second symbol switch inputs, first and second select switch inputs, and first, second, and third DAC outputs. Synchronizer logic (122) includes a select input and first and second sync outputs, where the first sync output is coupled to the first select switch input and the second sync output is coupled to the second select switch input. Selection logic (106) includes a data input, a symbol control output, and a selection control output, where the symbol control output is coupled to the first and second symbol switch inputs, and the selection control output is coupled to the selection input.

The invention is suitable for the technical field of terahertz frequency mixing, and provides a terahertz monolithic integrated harmonic mixer. The mixer comprises a substrate and devices. The radio frequency port, the local oscillator port and the first matching transition structure are respectively connected with each coupling end of the coupler; the output end of the first matching transition structure is connected with the input end of the second matching transition structure and the first end of the anti-parallel diode pair. The second end of the anti-parallel diode pair is provided with a third grounding through hole. The output end of the second matching transition structure is connected with the input end of the low-pass filter; the output end of the low-pass filter is connected with the intermediate frequency port; the radio frequency port, the local oscillator port and the intermediate frequency port are GSG interfaces with grounding through holes; and a layer of metal is integrally arranged on the back surface of the substrate to connect the grounding through holes to form a coplanar waveguide. According to the mixer, harmonic mixing is realized through a simple process, the complexity is low, and meanwhile, the problems that the mixer cannot be integrated and the working frequency is low can be solved.