Oscillation signal energy detection circuit and isolator

Abstract

The invention provides an oscillation signal energy detection circuit and an isolator, two paths of received oscillation signals with a difference of half a cycle are used as clock signals through a first trigger and a second trigger, charge and discharge current of a capacitor is controlled by alternately turning on and turning off a third switch, the charge current of the capacitor is greater than the discharge current, and the discharge current of the capacitor is greater than the discharge current. Energy accumulation can be achieved through continuous switching actions, signal overturning is completed when the voltage obtained through energy accumulation exceeds a set threshold value, and energy detection is achieved. The anti-interference capability and the transient common mode rejection capability of the signal are improved by detecting the energy corresponding to the number of the pulses of the continuous oscillation signal, high and low levels are judged by taking the accumulated energy corresponding to the N continuous pulses as a reference, the propagation delay and the distortion degree of the signal are reduced, and the problem that the anti-interference capability of single-channel isolation transmission is insufficient is solved.

Description

Technical Field

[0001] The embodiments of the present application belong to the technical field of isolators, and in particular, relate to an oscillation signal energy detection circuit and an isolator. Background Art

[0002] As the insulated gate bipolar transistor (IGBT) switching device is widely popular in the market, the demand for isolation drive technology is also growing. Isolation technology is to completely isolate two independent systems in terms of electrical performance to prevent electrical energy leakage from causing circuit damage or safety accidents. Therefore, isolation chips with isolation technology are widely used in industrial automation control, medical electronics, motor drive, isolation bus, photovoltaic inverter, hybrid electric vehicles, etc.

[0003] According to the different isolation media, digital isolators can be divided into optocoupler isolators, magnetic coupler isolators and capacitive isolators. Optocoupler isolators have simple structures and low costs, and are widely used in places with low requirements; but their disadvantages are also very obvious, such as easy aging of devices, high transmission delay, slow speed, nonlinearity, etc., and they are gradually eliminated with the development of integrated circuits. The development of silicon-based technology has made CMOS process inductor isolators and capacitive isolators with high compatibility with it win wide attention, and their superior performance such as small size, fast speed and low power consumption has gradually replaced optocoupler isolators. Magnetic coupling isolation represented by on-chip transformers can transmit signals and power at the same time, but due to the large on-chip inductor area and weak anti-magnetic field interference ability, it is not favored in the pursuit of small area and low cost. Capacitive isolation uses high-voltage capacitors with small isolation area and strong anti-magnetic field interference ability, but it cannot transmit power, and the signal and noise transmission interference in the same channel is large. The application environment of isolator chips mostly has very harsh conditions such as strong magnetic fields, high surges, and high noise, so the use of capacitive isolators has become the first choice. In such a harsh environment, it is extremely challenging for circuit design to ensure that the isolator continues to transmit accurate data. The signal modulation technologies that match the capacitive isolation transmission mainly include ordinary On-Off Keying (OOK) modulation and pulse signal modulation technology. Among them, the transmission method based on On-Off Keying (OOK) modulation has higher reliability and does not require the refresh circuit in pulse signal modulation to ensure the accuracy of the signal. The circuit structure is greatly simplified. In order to optimize noise interference, most of them adopt differential dual-channel isolation capacitor transmission, and the signal demodulation side uses differential amplification to shield common mode noise, while differential capacitors will greatly increase the chip area.

[0004] The existing isolated signal transmission schemes include pulse signal modulation based on magnetic isolation (abbreviated as icoupler) technology and modulation technology based on the combination of pulse and on-off keying (abbreviated as OOK). The pulse signal modulation based on magnetic isolation (abbreviated as icoupler) technology has poor single-channel transmission noise suppression capability and is easily interfered with to form bit errors. Although a refresh circuit can be used to refresh the signal in real time to prevent bit errors, interference within the refresh time may also occur and cannot be completely avoided, and the refresh circuit greatly increases the complexity of the circuit; for the technical scheme based on the modulation combined with pulse and on-off keying (abbreviated as OOK), the use of differential capacitors greatly increases the chip area and manufacturing cost, and the use of a bandpass amplifier structure and is more sensitive to signal frequency, frequency drift is prone to bit errors, and the fully differential signal modulation and demodulation method has extremely high requirements on circuit matching, and it is easy to amplify common-mode interference as a differential-mode signal, resulting in bit errors. Summary of the invention

[0005] In order to solve or alleviate the above technical problems, the present application provides an oscillation signal energy detection circuit, including a detection module and a decoding module;

[0006] The detection module includes a first trigger, a second trigger, a third trigger and a fourth trigger. When the first trigger and the second trigger receive an oscillation signal, the rising edge of the oscillation signal triggers the first trigger to sample the power supply, the output end of the first trigger outputs a high level, and the second trigger flips to a high level;

[0007] The output end of the second trigger is connected to the first buffer, the output end of the third trigger is connected to the input end of the second buffer, the output end of the first buffer is connected to a first resistor combination and a second resistor combination arranged in parallel, the first resistor combination is also connected to the ground end, the first trigger is connected to a first switch, and the fourth trigger is connected to a second switch;

[0008] The second resistor combination is connected to the first common end and the second common end between the first switch and the second switch respectively, a third resistor combination is arranged on the third common end between the first switch and the second switch, the third resistor combination is connected to the input end of the third buffer, the output end of the third buffer is connected to the input end of the inverter, the common end between the third buffer and the inverter is connected to one end of the first resistor; the common end between the other end of the first resistor and one end of the second current source is connected to the first end of the capacitor;

[0009] The output end of the inverter is connected to the first end of the third switch, the second end of the third switch is connected to the first current source, the common end between the second end of the third switch and the second end of the capacitor is connected to the other end of the second current source, the first end of the capacitor is also connected to the ground end, and the common end between the second end of the third switch and the second end of the capacitor is also connected to the decoding module;

[0010] The first trigger and the second trigger will receive two oscillation signals with a half-cycle difference as clock signals, and control the charging and discharging current of the capacitor by alternately opening and closing the third switch. The charging current of the capacitor is greater than the discharging current. Energy accumulation can be achieved through continuous switching actions. The voltage obtained by energy accumulation exceeds the set threshold to complete the signal flipping, so as to realize energy detection.

[0011] As a preferred embodiment of the present application, the first trigger, the second trigger, the third trigger and the fourth trigger are all triggered by a rising edge.

[0012] As a preferred embodiment of the present application, the first resistor combination includes a second resistor and a third resistor arranged in series with each other, an end of the second resistor away from the third resistor is connected to the output end of the first buffer, an end of the third resistor away from the second resistor is connected to the output end of the second buffer, and a common end between the second resistor and the third resistor is connected to the ground end.

[0013] As a preferred embodiment of the present application, the second resistor combination includes a fourth resistor, a fifth resistor and a sixth resistor which are arranged in series with each other;

[0014] One end of the fourth resistor away from the fifth resistor is connected to the output end of the first buffer, and one end of the sixth resistor away from the fifth resistor is connected to the output end of the second buffer;

[0015] The common end between the fourth resistor and the fifth resistor is connected to the first common end between the first switch and the second switch; the common end between the fifth resistor and the sixth resistor is connected to the second common end between the first switch and the second switch.

[0016] As a preferred embodiment of the present application, the third resistor combination includes a seventh resistor and an eighth resistor which are arranged in series with each other;

[0017] One end of the seventh resistor away from the eighth resistor is connected to the first switch, and one end of the eighth resistor away from the seventh resistor is connected to the second switch;

[0018] A common terminal between the seventh resistor and the eighth resistor is connected to an input terminal of the third buffer.

[0019] As a preferred embodiment of the present application, the current of the first current source is greater than the current of the second current source.

[0020] As a preferred embodiment of the present application, the resistance value of the seventh resistor is greater than the resistance value of the eighth resistor.

[0021] As a preferred embodiment of the present application, the decoding module is a Schmitt trigger circuit, the upper flip threshold of the decoding circuit is the voltage value converted by the energy detection circuit accumulating N pulse energies, and the lower flip threshold of the decoding circuit is the voltage value of the N pulse energies after the capacitor is released, where N is a natural number.

[0022] Compared with the prior art, the embodiment of the present application provides an oscillation signal energy detection circuit, which receives two oscillation signals with a half-cycle difference as clock signals through the first trigger and the second trigger, and controls the charge and discharge current of the capacitor by alternately opening and closing the third switch. The charging current of the capacitor is greater than the discharge current. Energy accumulation can be achieved through continuous switching actions. The voltage obtained by energy accumulation exceeds the set threshold to complete the signal flipping, so as to achieve signal detection. The present application improves the signal's anti-interference ability and transient common-mode suppression ability by detecting the energy corresponding to the number of pulses of the continuous oscillation signal, and judges the high and low levels based on the accumulated energy corresponding to N continuous pulses, which reduces the propagation delay and distortion of the signal, and makes up for the problem of insufficient anti-interference ability of single-channel isolated transmission.

[0023] In a second aspect, the present application further provides a single-channel capacitive isolator based on energy detection, characterized in that it includes the signal modulation module, the isolation channel, the signal amplification and shaping module and the energy detection circuit described in the first aspect;

[0024] The input end of the signal modulation module is input with a control square wave signal, the output end of the signal modulation module is connected to the input end of the isolation channel, the input end of the signal amplification and shaping module is connected to the output end of the isolation channel, and the output end of the signal amplification and shaping module is connected to the energy detection circuit;

[0025] After the input control square wave signal is processed by the signal adjustment module, it is sent to the isolation channel to transmit the signal through the single-channel isolation transmission path. The signal output by the isolation channel is shaped and filtered by the signal amplification and shaping module, and then input into the energy detection circuit for energy detection.

[0026] Compared with the prior art, the present application also provides a single-channel capacitor isolator based on energy detection, the beneficial effects of which are the same as the beneficial effects of the energy detection circuit provided in the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. Some specific embodiments of the present application will be described in detail in an illustrative and non-restrictive manner with reference to the drawings. The same reference numerals in the drawings indicate the same or similar components or parts. It should be understood by those skilled in the art that these drawings are not necessarily drawn to scale. In the drawings:

[0028] Figure 1 is a circuit schematic diagram of an oscillation signal energy detection circuit provided in an embodiment of the present application;

[0029] Figure 2 is a structural diagram of a single-channel capacitive isolator based on energy detection provided in an embodiment of the present application;

[0030] Figure 3 It is a signal waveform diagram during the implementation process of the oscillation signal energy detection circuit provided in the embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only embodiments of a part of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work should fall within the scope of protection of the present application.

[0032] First, as Figure 1 As shown, the present application provides an oscillation signal energy detection circuit, including a detection module 61 and a decoding module 62;

[0033] The detection module 61 includes a first trigger Dff1, a second trigger Tff1, a third trigger Tff2 and a fourth trigger Dff2. When the first trigger Dff1 and the second trigger Tff1 receive an oscillation signal, the rising edge of the oscillation signal triggers the first trigger Dff1 to sample the power supply VDD, the output end of the first trigger Dff1 outputs a high level, and the second trigger Tff1 flips to a high level;

[0034] The output end of the second trigger Tff1 is connected to the first buffer Buffer1, the output end of the third trigger Tff2 is connected to the input end of the second buffer Buffer2, the output end of the first buffer Buffer1 is connected to a first resistor R8 combination and a second resistor R1 combination arranged in parallel, the first resistor R8 combination is also connected to the ground end, the first trigger Dff1 is connected to the first switch TG1, and the fourth trigger Dff2 is connected to the second switch TG2;

[0035] The second resistor R1 combination is connected to the first common end and the second common end between the first switch TG1 and the second switch TG2 respectively, a third resistor R2 combination is provided on the third common end between the first switch TG1 and the second switch TG2, the third resistor R2 combination is connected to the input end of the third buffer Buffer3, the output end of the third buffer Buffer3 is connected to the input end of the inverter Tnv3, the common end between the third buffer Buffer3 and the inverter Tnv3 is connected to one end of the first resistor R8; the common end between the other end of the first resistor R8 and one end of the second current source I2 is connected to the first end of the capacitor C1;

[0036] The output end of the inverter is connected to the first end of the third switch MP, the second end of the third switch MP is connected to the first current source I1, the common end between the second end of the third switch MP and the second end of the capacitor C1 is connected to the other end of the second current source I2, the first end of the capacitor C1 is also connected to the ground end, and the common end between the second end of the third switch MP and the second end of the capacitor C1 is also connected to the decoding module;

[0037] The first trigger Dff1 and the second trigger Tff1 will receive two oscillation signals with a half-cycle difference as clock signals, and control the charging and discharging currents of the capacitor C1 by alternately opening and closing the third switch MP. The charging current of the capacitor C1 is greater than the discharging current. Energy accumulation can be achieved through continuous switching actions. The voltage obtained by energy accumulation exceeds the set threshold to complete the signal flipping, so as to realize energy detection.

[0038] In the embodiment of the present application, the first trigger Dff1 and the fourth trigger Dff2 are D triggers, the second trigger Tff1 and the third trigger Tff2 are T triggers, when no oscillation signal is generated, the second current source I2 releases the charge of the capacitor C1, the first resistor R8 turns off the third switch MP, the current source path of the first current source I1 is blocked, and the energy detection module outputs a low level; when there is an oscillation signal, the first input terminal INA2 of the energy detection module receives the OUTA1 signal as the clock signal of the first trigger Dff1 and the second trigger Tff1, and the second input terminal INB2 of the energy detection module receives the OUTB1 signal as the fourth trigger Dff2 , the clock signal of the third trigger Tff2, wherein the first trigger Dff1, the second trigger Tff1, the third trigger Tff2 and the fourth trigger Dff2 are all triggered by the rising edge; when the oscillation signal arrives, the rising edge of the first input terminal INA2 of the energy detection module which is in phase with the modulated oscillation signal is first detected by the first trigger Dff1 and the second trigger Tff1, at this time, the first trigger Dff1 samples the power supply VDD, the output terminal of the first trigger Dff1 outputs a high level, the second trigger Tff1 flips to a high level, and the driving capability is increased through the first buffer Buffer1; at this time, the third trigger Tff2 has not yet flipped , is pulled down to the ground by the third resistor R2, and the fourth resistor R3, the fifth resistor R4, and the sixth resistor R5 form a forward current path, and open the first switch TG1 and close the second switch TG2 through voltage division; the resistance of the fourth resistor R3 and the sixth resistor R5 is much smaller than the resistance of the fifth resistor R4, so that the voltage division point is close to the power supply VDD and the ground terminal, which is convenient for controlling the first switch TG1 and the second switch TG2; at this time, the high level turns on the third switch MP through the third buffer Buffer3 and the inverter Inv3 to open the first current source I1 path, and the current of the first current source I1 is greater than the current of the second current source I2, and the capacitor C1 begins to charge; when the first pulse ends, When the rising edge of the inverting signal INB2 arrives, the fourth trigger Dff2 samples the low level, and at this time the third trigger Tff2 starts to flip, turning on the second switch TG2. Since the second trigger Tff1 has not flipped, at this time the first switch TG1 and the second switch TG2 are both turned on, and the high level output of the first trigger Dff1 and the low level of the fourth trigger Dff2 form a path through the seventh resistor R6 and the eighth resistor R7; since the resistance of the seventh resistor R6 is much greater than the resistance of the eighth resistor R7, at this time the input voltage of the third buffer Buffer3 is still at a low level, the third switch MP is turned off, and the second current source I2 discharges the capacitor C1, and the discharge current is less than the charging current;When the second pulse arrives, the first trigger Dff1 and the second trigger Tff1 detect the rising edge, the first trigger Dff1 is still at a high level, and the second trigger Tff1 flips to a low level. At this time, the fourth resistor R3, the fifth resistor R4 and the sixth resistor R5 flow through the reverse current, and the first switch TG1 is closed through the voltage division, and the second switch TG2 is opened. At this time, the third switch MP is still closed, and the second current source I2 continues to discharge the capacitor C1; when the second pulse ends, the rising edge of the inverted signal INB2 arrives, the third trigger Tff2 and the fourth trigger Dff2 detect the rising edge signal, and the third trigger Tff2 flips to a low level. Since the second trigger Tff1 has not flipped yet, the voltage division points output by the fourth resistor R3, the fifth resistor R4 and the sixth resistor R5 are all low levels, and the first switch T G1 and the second switch TG2 are both turned on. At this time, since the resistance of the seventh resistor R6 is much greater than the resistance of the eighth resistor R7, the input terminal of the third buffer Buffer3 is still at a low level, the third switch MP is turned off, and the second current source I2 continues to discharge the capacitor C1, thus completing the charge and discharge cycle until the third pulse arrives to continue the above charge and discharge cycle. Every two pulses are a charge and discharge cycle. Since the charging current is greater than the discharging current, a certain amount of energy can be accumulated in each cycle until the Nth pulse arrives. The accumulated energy corresponds to a voltage that exceeds the flip threshold of the demodulation side, completing the detection of signal energy. It can be seen that only when continuous pulses appear will sufficient energy flip level be detected, which greatly improves the decoding anti-interference ability and reliability; the decoding module 62 is a high-speed Schmitt trigger, and there is a certain hysteresis between the upper flip threshold and the lower flip threshold. ;

[0039] The present application provides an oscillation signal energy detection circuit, which receives two oscillation signals with a half-cycle difference as clock signals through the first trigger Dff1 and the second trigger Tff1, and controls the charge and discharge current of the capacitor C1 by alternately opening and closing the third switch MP, wherein the charging current of the capacitor C1 is greater than the discharge current, and energy accumulation can be achieved through continuous switching actions, and the voltage obtained by energy accumulation exceeds the set threshold value to complete the signal flipping, so as to achieve signal detection. The present application improves the anti-interference ability and transient common-mode suppression ability of the signal by detecting the energy corresponding to the number of pulses of the continuous oscillation signal, and judges the high and low levels based on the accumulated energy corresponding to N continuous pulses, which reduces the propagation delay and distortion of the signal, and makes up for the problem of insufficient anti-interference ability of single-channel isolated transmission.

[0040] In an embodiment of the present application, the decoding module 62 is a Schmitt trigger circuit, the upper flip threshold of the decoding circuit 62 is the voltage value converted by the energy detection circuit accumulating N pulse energies, and the lower flip threshold of the decoding circuit 62 is the voltage value of the N pulse energies after the capacitor C1 is released, where N is a natural number. In the optimal embodiment of the present application, N is 5.

[0041] like Figure 2 As shown, Vin is the input square wave control signal, TX is the oscillation signal at the signal modulation end, RX is the oscillation signal received at the signal demodulation side, and Out is the demodulation recovery signal. After two complete charge and discharge cycles and one charging cycle, that is, five pulses, the voltage value corresponding to the accumulated energy reaches the upper flip threshold, and a high level is output. When there is no oscillation signal, the capacitor C1C1 releases energy through I2, and a low level is output when it is lower than the lower flip threshold.

[0042] In a second aspect, the present application also provides a single-channel capacitive isolator based on energy detection, comprising the signal modulation module 3, an isolation channel 4, a signal amplification and shaping module 5 and an energy detection circuit 6;

[0043] The input end of the signal modulation module 3 is input with a control square wave signal, the output end of the signal modulation module 3 is connected to the input end of the isolation channel 4, the input end of the signal amplification and shaping module is connected to the output end of the isolation channel 4, and the output end of the signal amplification and shaping module is connected to the energy detection circuit 6;

[0044] After the input control square wave signal is processed by the signal modulation module 3, it is transmitted to the isolation channel 4 through the single-channel isolation transmission path to transmit the signal. The signal output by the isolation channel 4 is shaped and filtered by the signal amplification and shaping module 5, and then input into the energy detection circuit 6 for signal detection.

[0045] The input of the signal modulation module 3 is a PWM control square wave signal, including a signal shaping and clutter filtering circuit 31, a signal power-on wake-up circuit 33, an oscillation signal generating circuit 32, and a high-pass filtering circuit 34; the signal shaping and clutter filtering circuit 31 is used to shape and filter the input signal to prevent abnormal signal modulation; the signal power-on wake-up circuit 33 is used to detect the signal power-on state, and the oscillation circuit is awakened and transmitted only when the power-on reaches a certain threshold; the oscillation signal generating circuit 32 is used to generate an oscillation signal of a specific frequency, and modulate the high level of the control square wave signal into an oscillation signal, and the low level is not transmitted;

[0046] Furthermore, the high-pass filter circuit is composed of a capacitor C2 and a resistor R9, and is used to suppress low-frequency noise.

[0047] The isolation channel 4 uses high-voltage isolation capacitors, which are a single-channel isolation transmission path composed of two identical high-voltage capacitors HC1 and HC2, and is integrated into one signal encoding module and one signal decoding module.

[0048] The signal amplification and shaping module 5 includes a two-stage differential amplifier circuit 51 and a high-speed Schmitt trigger 52;

[0049] Furthermore, the input end of the two-stage differential amplifier circuit 51 includes a resistor voltage divider structure to control the common mode level, amplifies the oscillation signal attenuated by the isolation channel 4 in a single-ended input and single-ended output mode, and outputs two oscillation signals with a half-cycle difference in phase through a two-stage inversion structure;

[0050] Furthermore, the high-speed Schmitt trigger circuit 52 is used to reshape the deformed pulse signal so as to output a regular pulse signal to the subsequent energy detection circuit 6;

[0051] The energy detection circuit 6 includes a detection circuit 61 and a demodulation circuit 62, which receives the oscillation signal processed by the signal amplification and shaping circuit 5, and obtains a high level by detecting the energy of N pulses as the reference flip level, otherwise the energy is released and flipped to obtain a low level. In the embodiment of the present application, N is 5.

[0052] The present invention provides a single-channel capacitor C1 isolator based on energy detection. The single-channel isolation transmission structure is adopted to greatly reduce the chip area and manufacturing cost. The energy of the continuous oscillation signal is accumulated or released by energy detection and converted into voltage. The high and low levels are judged by the difference in voltage values, ignoring the interference of noise on the oscillation signal frequency. The interference signal at a low level cannot accumulate energy to a specific voltage, which greatly improves the decoding rate and reliability and reduces the signal delay. Compared with the prior art, the example of the present application has higher noise suppression capability and reliability, lower signal delay and distortion, and lower chip area and manufacturing cost.

[0053] Compared with the prior art, the present application also provides a single-channel capacitor C1 isolator based on energy detection, the beneficial effects of which are the same as those of the first aspect and will not be repeated here.

[0054] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. An oscillation signal energy detection circuit, characterized in that: Including detection module and decoding module; The detection module includes a first trigger, a second trigger, a third trigger and a fourth trigger. When the first trigger and the second trigger receive an oscillation signal, the rising edge of the oscillation signal triggers the first trigger to sample the power supply, the output end of the first trigger outputs a high level, and the second trigger flips to a high level; The output end of the second trigger is connected to the first buffer, the output end of the third trigger is connected to the input end of the second buffer, the output end of the first buffer is connected to a first resistor combination and a second resistor combination arranged in parallel, the first resistor combination is also connected to the ground end, the first trigger is connected to a first switch, and the fourth trigger is connected to a second switch; The second resistor combination is connected to the first common end and the second common end between the first switch and the second switch respectively, a third resistor combination is arranged on the third common end between the first switch and the second switch, the third resistor combination is connected to the input end of the third buffer, the output end of the third buffer is connected to the input end of the inverter, the common end between the third buffer and the inverter is connected to one end of the first resistor; the common end between the other end of the first resistor and one end of the second current source is connected to the first end of the capacitor; The output end of the inverter is connected to the first end of the third switch, the second end of the third switch is connected to the first current source, the common end between the second end of the third switch and the second end of the capacitor is connected to the other end of the second current source, the first end of the capacitor is also connected to the ground end, and the common end between the second end of the third switch and the second end of the capacitor is also connected to the decoding module; The first trigger and the second trigger will receive two oscillation signals with a half-cycle difference as clock signals, and control the charging and discharging current of the capacitor by alternately opening and closing the third switch. The charging current of the capacitor is greater than the discharging current. Energy accumulation can be achieved through continuous switching actions. The voltage obtained by energy accumulation exceeds the set threshold to complete the signal flipping, so as to realize energy detection.

2. An oscillation signal energy detection circuit as claimed in claim 1, characterized in that: The first trigger, the second trigger, the third trigger and the fourth trigger are all triggered by a rising edge.

3. An oscillation signal energy detection circuit as claimed in claim 1, characterized in that: The first resistor combination includes a second resistor and a third resistor arranged in series with each other, an end of the second resistor away from the third resistor is connected to the output end of the first buffer, an end of the third resistor away from the second resistor is connected to the output end of the second buffer, and a common end between the second resistor and the third resistor is connected to the ground end.

4. An oscillation signal energy detection circuit as claimed in claim 3, characterized in that: The second resistor combination includes a fourth resistor, a fifth resistor and a sixth resistor which are arranged in series with each other; One end of the fourth resistor away from the fifth resistor is connected to the output end of the first buffer, and one end of the sixth resistor away from the fifth resistor is connected to the output end of the second buffer; The common end between the fourth resistor and the fifth resistor is connected to the first common end between the first switch and the second switch; the common end between the fifth resistor and the sixth resistor is connected to the second common end between the first switch and the second switch.

5. An oscillation signal energy detection circuit as claimed in claim 4, characterized in that: The third resistor combination includes a seventh resistor and an eighth resistor which are arranged in series with each other; One end of the seventh resistor away from the eighth resistor is connected to the first switch, and one end of the eighth resistor away from the seventh resistor is connected to the second switch; A common terminal between the seventh resistor and the eighth resistor is connected to an input terminal of the third buffer.

6. An oscillation signal energy detection circuit as claimed in claim 1, characterized in that: The current of the first current source is greater than the current of the second current source.

7. An oscillation signal energy detection circuit as claimed in claim 1, characterized in that: The resistance value of the seventh resistor is greater than the resistance value of the eighth resistor.

8. An oscillation signal energy detection circuit as claimed in claim 1, characterized in that: The decoding module is a Schmitt trigger circuit, the upper flip threshold of the decoding circuit is the voltage value converted by the energy detection circuit accumulating N pulse energies, and the lower flip threshold of the decoding circuit is the voltage value of the N pulse energies after the capacitor is released, where N is a natural number.

9. A single-channel capacitive isolator based on energy detection, characterized in that: It comprises the signal modulation module, the isolation channel, the signal amplification and shaping module and the energy detection circuit according to any one of claims 1 to 7; The input end of the signal modulation module is input with a control square wave signal, the output end of the signal modulation module is connected to the input end of the isolation channel, the input end of the signal amplification and shaping module is connected to the output end of the isolation channel, and the output end of the signal amplification and shaping module is connected to the energy detection circuit; After the input control square wave signal is processed by the signal adjustment module, it is sent to the isolation channel to transmit the signal through the single-channel isolation transmission path. The signal output by the isolation channel is shaped and filtered by the signal amplification and shaping module, and then input into the energy detection circuit for energy detection.

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