Data transmission circuit and method, core, chip, electronic device and storage medium

Abstract

A data transmission circuit and method, a core, a multi-core chip, an electronic device, and a storage medium are disclosed. The data transmission circuit includes a receiving unit, a control unit, a lookup table unit, and a selection unit. The receiving unit receives original data packets from Fabric. The control unit determines whether the original data packet needs relaying based on an original control bit. In response to the need for relaying, the control unit activates a first input terminal of the selection unit, which then sends a new data packet to Fabric via the first input terminal. The new data packet includes the original data and a new header obtained by the lookup table unit based on the original index. This data transmission circuit effectively reduces power consumption during data transmission between multiple cores.

Description

Technical Field

[0001] This invention relates to the field of data transmission technology, specifically to a data transmission circuit, a processing core, a multi-core chip, a data transmission method, an electronic device, and a computer-readable storage medium. Background Technology

[0002] With the development of science and technology, human society is rapidly entering the intelligent era. A key characteristic of the intelligent era is that people are acquiring more and more types of data, the volume of data is increasing, and the demand for faster data processing is also rising.

[0003] Chips are the cornerstone of data processing, fundamentally determining our ability to process data. From an application perspective, chips mainly follow two paths: one is the general-purpose chip path, such as the Central Processing Unit (CPU), which offers great flexibility but has relatively low effective computing power when processing algorithms in specific domains; the other is the dedicated chip path, such as the Tensor Processing Unit (TPU), which can exert high effective computing power in certain specific domains, but its processing power is relatively poor or even incapable of handling more general and flexible domains.

[0004] Because the data in the intelligent era is diverse and massive in quantity, chips are required to be highly flexible, capable of handling algorithms from different fields and constantly evolving, and also possess strong processing power, capable of rapidly processing extremely large and rapidly increasing amounts of data.

[0005] In multi-core chip architectures, cores may need to cooperate to complete one or more tasks. During this cooperation, cores often need to transfer data or control information. Therefore, data transfer between cores becomes crucial, even a key factor influencing the performance of multi-core computing. In applications, some cores often need to send their data to multiple other cores.

[0006] like Figure 1 The diagram shown is a data transmission flowchart for broadcast data in existing technology 1. When core C... i (The source core) needs to send data packets to multiple cores (called target cores), for example, core C. m and core C n At that time, the data packet will be broadcast, and the transmission process is as follows:

[0007] 1. C i Send data packets to the data exchange device Fabric;

[0008] 2. Fabric transmits data packets to all other cores connected to it;

[0009] 3. All cores received the data packet;

[0010] 4. All cores check data packets to determine if they were sent to their own core. If so, for example, core C... m and core C n If the data packet is not stored, it is retained and stored in its own memory (Mem); otherwise, for example, kernel C... j If the data packet is not stored in its own memory Mem, it will be discarded.

[0011] In the existing data propagation method, the source core broadcasts data to all cores, meaning the path to all cores is traversed, increasing energy consumption, consuming fabric, and causing data congestion. This is especially true when multiple cores need to send data to each other, turning it into serial processing and significantly reducing fabric utilization. Furthermore, each core receives the data, and cores that don't need this data must process this invalid data, increasing circuit load and power consumption.

[0012] In order to improve the aforementioned problems of the existing technology, the following have emerged: Figure 2 The prior art shown is the second one. Figure 2 This is a data transmission flowchart for storage relay multicast data in existing technology two, when core C... i The data packet needs to be sent to multiple cores, such as core C. m and core C n At that time, the data packet will be sent to core C first. m , core C m The received data is stored in the local storage area Mem, and then processed by the core C. m The data packet is read from the local storage area Mem and relayed to the core C. n The transmission process is as follows:

[0013] 1. Nuclear C i Send data packets to the data exchange device Fabric;

[0014] 2. Fabric transmits data packets to core C. m ;

[0015] 3. Core C m Receive data packets, store them in local storage (Mem), and then check if the data packet needs to be sent to other cores, such as core C. n Then core C m Retrieve data from local storage and reset the destination address to kernel C. n The address will be used to send data packets to Fabric;

[0016] 4. Nuclear C n Once the data packet is received, it is stored, and the same process as step 3 is executed. If it is no longer needed to be sent to other cores, the data transmission ends.

[0017] In the existing data transmission method of Technology 2, after the intermediate relay core receives the data, it needs to write the data to the local storage area Mem first, and then read it from the local storage area Mem. This occupies the local storage area, affects the program's access to the local storage area, reduces the utilization of the local storage area, and has high power consumption and long latency. At the same time, each core requires the participation of a dedicated control unit circuit to repackage the data and send it again, which is a complicated process. Summary of the Invention

[0018] The present invention aims to at least solve one of the technical problems existing in the prior art, and provides a data transmission circuit, a processing core, a multi-core structure chip, a data transmission method, an electronic device, and a computer-readable storage medium.

[0019] A first aspect of the present invention provides a data transmission circuit, comprising a receiving unit, a control unit, a lookup table unit, and a selection unit; wherein,

[0020] The input terminal of the receiving unit is used to connect to the output terminal of the data exchange device Fabric, and the output terminal of the receiving unit is connected to the input terminal of the control unit, the input terminal of the lookup table unit, and the first input terminal of the selection unit.

[0021] The control terminal of the control unit is connected to the control terminal of the lookup table unit and the control terminal of the selection unit, respectively.

[0022] The output of the lookup table unit is connected to the first input of the selection unit;

[0023] The receiving unit is configured to receive the original data packet from the Fabric, send the original control bits of the original data packet header to the control unit, and send the original index of the original data packet header to the lookup table unit;

[0024] The control unit is used to determine whether the original data packet needs to be relayed based on the original control bit.

[0025] In response to the need for relaying the original data packet, the control unit is used to enable the first input terminal of the selection unit, and the selection unit is used to send the new data packet to the Fabric via the first input terminal, wherein the new data packet includes: the original data, and a new packet header obtained by the lookup table unit according to the original index.

[0026] In this embodiment, the data transmission circuit stores each data packet in the core memory unit and transmits it in parallel, rather than writing it first and then reading it out. This reduces the power consumption of the data transmission circuit, and the parallel storage and transmission significantly reduces the waiting time for subsequent data receivers. Furthermore, the parameters required for the entire data transmission process are included in the header of the transmitted data packet and are parsed by the local circuitry, thus eliminating the need to occupy the microcontroller unit.

[0027] Optionally, the selection unit is configured to send the new data packet to the Fabric via the first input terminal, including:

[0028] The lookup table unit is used to obtain the new packet header according to the original index and send the new packet header to the selection unit;

[0029] The selection unit is used to send the new data packet to the Fabric via the first input terminal.

[0030] Optionally, it also includes splicing units;

[0031] The input terminals of the splicing unit are connected to the output terminals of the lookup table unit and the receiving unit, respectively. The output terminal of the splicing unit is connected to the first input terminal of the selection unit, and the control terminal of the splicing unit is connected to the control terminal of the control unit. The selection unit is used to send the new data packet to the Fabric via the first input terminal, including:

[0032] The lookup table unit is used to obtain the new packet header according to the original index and send the new packet header to the splicing unit;

[0033] The splicing unit is used to package the new header and the original data into the new data packet and send it to the selection unit;

[0034] The selection unit is used to send the new data packet to the Fabric via the first input terminal.

[0035] Optionally, the selection unit further includes a second input terminal for connecting to the storage unit;

[0036] Since the original data does not require relay, the control unit is also used to control the second input terminal of the selection unit to be valid;

[0037] The selection unit is used to send the local data stored in the storage unit as a second data packet to the Fabric via the second input terminal.

[0038] Optionally, the selection unit includes a selection subunit and a transmission subunit;

[0039] The input terminal of the transmitting subunit is connected to the output terminal of the selecting subunit;

[0040] The output terminal of the transmitting subunit is used to connect to the Fabric;

[0041] The sending subunit is used to send data packets output from the selection subunit to the Fabric.

[0042] Optionally, the transmitting subunit includes a control subunit and a level setting subunit connected to the control subunit, wherein,

[0043] The level setting subunit is used to set the transmission level of the new data packet and the second data packet;

[0044] The control subunit is configured to send the new data packet and the second data packet according to the transmission level.

[0045] The data transmission circuit in this embodiment can effectively ensure that important data is transmitted first by setting the priority of the data sent by the transmitting subunit, thereby effectively ensuring data transmission efficiency.

[0046] Optionally, the selection subunit includes a first selection transistor and a second selection transistor, wherein,

[0047] The control terminal of the first selection transistor is connected to the control terminal of the control unit, the first terminal of the first selection transistor is connected to the output terminal of the splicing unit, and the second terminal of the first selection transistor is connected to the input terminal of the transmitting subunit.

[0048] The control terminal of the second selection transistor is connected to the control terminal of the control unit, the first terminal of the second selection transistor is connected to the output terminal of the memory cell, and the second terminal of the second selection transistor is connected to the input terminal of the transmitting sub-unit; and...

[0049] One of the first selection transistor and the second selection transistor is an N-type transistor, and the other is a P-type transistor.

[0050] Optionally, the transmission level includes a higher transmission level for the new data packet than for the second data packet; or,

[0051] The transmission level includes alternating transmission of the new data packet and the second data packet.

[0052] Optionally, in response to the original data packet not requiring relay, the lookup table unit is turned off and / or the splicing unit is turned off.

[0053] In this embodiment, when the original data packet does not require relaying, the lookup table unit and / or the splicing unit are turned off, which can effectively save the energy consumption of the transmission circuit.

[0054] Optionally, the lookup table unit includes a lookup subunit and a storage subunit connected to the lookup subunit; wherein,

[0055] The storage subunit is used to pre-store the lookup table, which includes multiple items, each item corresponding to a unique original index, and each item includes a new header.

[0056] The lookup table unit is used to obtain the new packet header based on the original index, including:

[0057] The lookup subunit is used to find the item corresponding to the original index from the lookup table as the new header and output the new header.

[0058] Optionally, the control unit includes a judgment subunit and a transmission subunit; wherein,

[0059] The judgment subunit is used to determine whether the original data packet needs to be relayed based on the value of the original control bit. If yes, its output value is set to 1; otherwise, its output value is set to 0.

[0060] The transmission subunit is used to transmit the output value of the judgment subunit to the lookup table unit and the selection unit respectively; or, the transmission subunit is used to transmit the output value of the judgment subunit to the lookup table unit, the selection unit and the splicing unit respectively.

[0061] Optionally, the data transmission circuit further includes a modification unit connected to the receiving unit; wherein,

[0062] The receiving unit is also configured to receive a change request, the change request carrying new control bits and a new index;

[0063] The modification unit is used to modify the header of the original data packet received by the receiving unit according to the modification request.

[0064] Optionally, it also includes:

[0065] The output of the receiving unit is used to connect to the storage unit and send the original data in the original data packet to the storage unit.

[0066] Optionally, the output of the receiving unit is connected to the first input of the selection unit via the splicing unit; the output of the lookup table unit is connected to the first input of the selection unit via the splicing unit.

[0067] A second aspect of the present invention provides a processing core, including a storage unit and a data transmission circuit, wherein the data transmission circuit employs the data transmission circuit described above; wherein,

[0068] The output terminal of the receiving unit is connected to the input terminal of the storage unit, and the second input terminal of the selection unit is connected to the output terminal of the storage unit.

[0069] A third aspect of the present invention provides a multi-core chip, including a plurality of processing cores and a Fabric that interconnects the processing cores, wherein at least one of the processing cores includes the data transmission circuit described above, or at least one processing core is the processing core described above.

[0070] A fourth aspect of the present invention provides a data transmission method, specifically comprising the following steps:

[0071] Receive the original data packet from Fabric, wherein the header of the original data packet carries the original control bits and the original index;

[0072] Determine whether the original data packet needs to be relayed based on the original control bit;

[0073] In response to the need for relaying the original data packet, a new data packet is sent to the Fabric; wherein the new data packet includes: the original data, and a new header obtained according to the original index.

[0074] Optionally, the step of sending a new data packet to the Fabric specifically includes:

[0075] The new packet header is obtained based on the original index;

[0076] The new data packet is sent to the Fabric.

[0077] Optionally, the step of sending a new data packet to the Fabric specifically includes:

[0078] The new packet header is obtained based on the original index;

[0079] The new packet header and the original data are packaged together to form the new data packet;

[0080] The new data packet is sent to the Fabric.

[0081] Optionally, the method further includes:

[0082] Since the original data packet does not require relaying, the local data is sent to the Fabric as a second data packet.

[0083] Optionally, the method further includes:

[0084] Set the transmission levels of the new data packet and the second data packet;

[0085] The new data packet and the second data packet are sent according to the sending level.

[0086] Optionally, the transmission level includes a higher transmission level for the new data packet than for the second data packet; or,

[0087] The transmission level includes alternating transmission of the new data packet and the second data packet.

[0088] Optionally, the method further includes:

[0089] In response to the fact that the original data packet does not require relaying, table lookup and / or splicing are stopped.

[0090] Optionally, the step of obtaining the new packet header based on the original index specifically includes:

[0091] The lookup table is used to find the item corresponding to the original index as the new packet header, and the new packet header is output. The lookup table includes multiple items, each item corresponds to a unique original index, and each item includes the new packet header.

[0092] Optionally, the step of determining whether the original data packet needs to be relayed based on the original control bit specifically includes:

[0093] Based on the value of the original control bit, determine whether the original data packet needs to be relayed. If yes, set the output value to 1; otherwise, set the output value to 0.

[0094] Optionally, the method further includes:

[0095] Receive a change request, which carries new control bits and a new index;

[0096] The header of the received original data packet is modified according to the change request.

[0097] Optionally, the step of responding to the original data packet requiring relaying further includes:

[0098] The original data in the original data packet is sent to the local storage unit.

[0099] A fifth aspect of the present invention provides an electronic device comprising:

[0100] One or more processors;

[0101] A storage unit is used to store one or more programs that, when executed by one or more processors, enable the one or more processors to implement the data transmission method described above.

[0102] A sixth aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, the computer program being executed by a processor to implement the data transmission method described above.

[0103] In the data transmission circuit of this invention, the storage of each data packet in the core memory unit and its relay transmission are performed in parallel, rather than being written in first and then read out. This reduces the power consumption of the data transmission circuit, and the parallel operation of storage and relay significantly reduces the waiting time for subsequent data receivers. Furthermore, the parameters required for the entire data transmission process are contained in the header of the transmitted data packet and are parsed by the local circuitry, thus eliminating the need to occupy the microcontroller unit. Attached Figure Description

[0104] Figure 1 This is a flowchart of the data transmission process for broadcast data in existing technology 1;

[0105] Figure 2 This is a flowchart illustrating the data transmission process for storing relay multicast data in Existing Technology 2.

[0106] Figure 3 This is a schematic diagram of the data transmission circuit in the first embodiment of the present invention;

[0107] Figure 4 This is a flowchart of data relay transmission in the second embodiment of the present invention;

[0108] Figure 5 This is a schematic diagram of the data transmission circuit in the third embodiment of the present invention;

[0109] Figure 6 This is a schematic diagram of the selected sub-unit structure in the data transmission circuit of the fourth embodiment of the present invention;

[0110] Figure 7 This is a schematic diagram of the structure of the transmitting subunit in the data transmission circuit in the fifth embodiment of the present invention;

[0111] Figure 8 This is a schematic diagram of the lookup table unit in the data transmission circuit in the sixth embodiment of the present invention;

[0112] Figure 9 This is a schematic diagram of the control unit in the data transmission circuit of the seventh embodiment of the present invention;

[0113] Figure 10 This is a schematic diagram of the data transmission circuit in the eighth embodiment of the present invention;

[0114] Figure 11 This is a flowchart of the data transmission method in the ninth embodiment of the present invention. Detailed Implementation

[0115] To enable those skilled in the art to better understand the technical solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0116] In multi-core or many-core chips, the cores on the chip are interconnected via Fabric and transmit data. Each core includes a memory unit and a data transmission circuit. This invention provides a data transmission circuit for use in the aforementioned multi-core or many-core chip.

[0117] First optional embodiment of the present invention, for example Figure 3 As shown, a data transmission circuit TR is disclosed. The data transmission circuit TR includes a receiving unit Rx, a control unit Ctrl, a lookup table unit LUT, and a selection unit Sx. The input terminal of the receiving unit Rx is connected to the output terminal of the data exchange device Fabric. The output terminal of the receiving unit Rx is connected to the input terminals of the control unit Ctrl, the lookup table unit LUT, and the first input terminal In1 of the selection unit Sx, respectively. The output terminal of the receiving unit Rx is also connected to the input terminal of the storage unit Memory in the core. The control terminal of the control unit Ctrl is connected to the control terminals of the lookup table unit LUT and the selection unit Sx, respectively. The output terminal of the lookup table unit LUT is connected to the first input terminal In1 of the selection unit Sx.

[0118] Specifically, the receiving unit Rx receives the original data packet from Fabric and sends the original data from the original data packet to the selection unit Sx, sends the original control bit C0 of the original data packet header to the control unit Ctrl, and sends the original index of the original data packet header to the lookup table unit LUT. The control unit Ctrl determines whether the original data packet needs relaying based on the original control bit C0. If so, it issues a relaying control signal; otherwise, it issues a non-relaying control signal. In response to the original data packet needing relaying (i.e., receiving the relaying control signal), the control unit Ctrl activates the first input terminal In1 of the selection unit Sx. Thus, the selection unit Sx sends a new data packet to Fabric via the first input terminal In1. This new data packet includes the original data and a new header obtained by the lookup table unit LUT based on the original index. The new header includes new control bits, a new index, and a destination address.

[0119] Please refer to this as well. Figure 3 and Figure 4 For example, core C i The original data packet needs to be sent to multiple cores, for example, core C. m and core C n , core C m and core C n All of them are set with such Figure 3 The data transmission circuit shown.

[0120] Specifically, core C i With C m The data transmission process between them is as follows:

[0121] Core C i The original data packet will first be sent to Fabric, core C. m The receiving unit Rx receives the original data packet from Fabric, sends the control bits from the original data packet to the control unit Ctrl, and sends the index from the original data packet to the lookup table unit LUT. The control unit Ctrl checks the control bit C0 in the header of the original data packet; if it determines that relay is required, it outputs C1. The lookup table unit LUT searches for the corresponding new header, i.e., the next destination core C, from the lookup table based on the original index of the original data packet header. n The corresponding new packet header includes new control bits (i.e., data transmission to core C). n (Whether relay transfer is needed), new index (i.e., data transfer to kernel C) n The index of the next destination in the relay transfer) and the target address (the target address is the core C) n (address). Then, the selection unit Sx sends a new data packet consisting of the new header and the original data to Fabric via its first input terminal In1, and Fabric then sends the new data packet to core C. n .

[0122] Furthermore, nuclear C n The receiving unit Rx in the core receives a new data packet from Fabric. The control unit Ctrl checks the control bits in the header of the new data packet. If it determines that no relay is needed based on the control bits, it stores the data in the new data packet into core C. n The transmission of the new data packet ends in the Memory storage unit.

[0123] In this embodiment, the data transmission circuit does not require data packets to be stored in the core's memory unit before being read out, thereby reducing the power consumption of the transmission circuit. Furthermore, the storage of each data packet in the core's memory unit and its relay transmission are performed in parallel, rather than being written in first and then read out, which significantly reduces the waiting time for subsequent data receivers. In addition, the parameters of the entire data transmission process are contained in the header of the transmitted data packet and are parsed by the local circuitry, thus eliminating the need to occupy the microcontroller unit.

[0124] It should be noted that each unit structure of the data transmission circuit in this embodiment can be implemented in hardware. For example, the receiving unit Rx can be a receiver, the control unit Ctrl can be a comparator to determine whether relay is needed based on the control bit, and the selection unit Sx can be a selector to determine the corresponding data packet to be output to Fabric based on the control bit. Of course, in addition to this, each unit structure of the transmission circuit in this embodiment can also be implemented in software, as long as the function of each unit can be achieved.

[0125] The data transmission circuit TR provided in the second optional embodiment of the present invention may further include a splicing unit, such as... Figure 5 As shown.

[0126] The input terminals of the Merge unit are connected to the output terminals of the Lookup Table Unit (LUT) and the Receiving Unit (Rx), respectively. The output terminal of the Merge unit is connected to the first input terminal In1 of the Selection Unit (Sx), and the control terminal of the Merge unit is connected to the control terminal of the Control Unit (Ctrl). Specifically, the Merge unit is used to package the new packet header obtained by the Lookup Table Unit (LUT) from the Lookup Table based on the original index with the original data to form a new data packet, and then send this new data packet to the Selection Unit (Sx).

[0127] Due to the addition of the Merge unit, it can be understood that the output of the receiving unit Rx is connected to the first input In1 of the selection unit Sx via the Merge unit. Similarly, the output of the lookup table unit LUT is connected to the first input In1 of the selection unit Sx via the Merge unit.

[0128] It should be noted that there are no restrictions on the specific structure of the Merge unit. For example, the Merge unit can be a simple splicing circuit that splices together the plain data and the new packet header found from the lookup table unit LUT.

[0129] It is understood that the following description based on the second optional embodiment is also applicable to the case where there is no Merge splicing unit in the first optional embodiment. The only difference is that the location for packaging the original data and the new header has changed. In the first optional embodiment, the packaging and splicing is performed in the selection unit Sx, while in the second optional embodiment, it is performed in the Merge splicing unit. Those skilled in the art will understand that other descriptions apply to both optional implementations.

[0130] like Figure 5 As shown, the selection unit Sx also includes a second input terminal In0, which is connected to the output terminal of the storage unit Memory. It reads the core data stored in the core (i.e., the second data packet) from the storage unit Memory and sends this second data packet to the Fabric. The core data may be a pre-packaged data packet. In this case, if the original data packet does not require relaying, the control unit Ctrl is also used to enable the second input terminal In0 of the selection unit Sx, allowing the selection unit Sx to directly send the second data packet to the Fabric.

[0131] Optionally, when the second input terminal In0 of the control selection unit Sx is active, the control unit Ctrl can connect only the second input terminal to the storage unit. However, the selection unit can choose not to output anything, or it can send out signals such as ending relay transmission.

[0132] Furthermore, when the core containing the data transmission circuit is used as the source core (i.e., the data transmission core), the control unit sends a control signal to the control terminal of the selection unit to enable the second input terminal of the selection unit. Then, the data stored in the storage unit is sent to the Fabric via the second input terminal of the selection unit, and then sent to the target core by the Fabric.

[0133] It should be noted that there is no limitation on the specific implementation structure for connecting the first input terminal In1 and the second input terminal In0 of the selection unit Sx with the output terminal of the splicing unit Merge and the output terminal of the storage unit Memory. Those skilled in the art can design a circuit structure that meets this connection method according to actual needs.

[0134] like Figure 3 and Figure 5 As shown, the selection unit Sx includes a selection subunit S and a transmission subunit Tx. The input of the transmission subunit Tx is connected to the output of the selection subunit S, and the output of the transmission subunit Tx is connected to the Fabric. Thus, the data packets output from the selection subunit S can be transmitted to the Fabric using the transmission subunit Tx.

[0135] Specifically, such as Figure 6As shown, the selection subunit S includes a first selection transistor T1 and a second selection transistor T2. The control terminal of the first selection transistor T1 is connected to the control terminal of the control unit Ctrl, its first terminal is connected to the output terminal of the splicing unit Merge, and its second terminal is connected to the input terminal of the transmitting subunit Tx. The control terminal of the second selection transistor T2 is connected to the control terminal of the control unit Ctrl, its first terminal is connected to the output terminal of the storage unit Memory, and its second terminal is connected to the input terminal of the transmitting subunit Tx. Furthermore, one of the first selection transistor T1 and the second selection transistor T2 is an N-type transistor, and the other is a P-type transistor.

[0136] It should be noted that the control terminals of the first selection transistor T1 and the second selection transistor T2 are the gates. The first terminal can be the source, and the second terminal can be the drain, or vice versa. Furthermore, when the first selection transistor T1 is an N-type transistor (its control terminal is turned on when it receives a high-level signal), the second selection transistor is a P-type transistor (its control terminal is turned on when it receives a low-level signal), or the transistor types of the two transistors can be switched.

[0137] like Figure 7 As shown, the transmitting subunit Tx includes a control subunit Tx_1 and a level setting subunit Tx_2 connected to the control subunit Tx_1. The level setting subunit Tx_2 is used to set the transmission level of new data packets and kernel data packets (i.e., the second data packet). The control subunit Tx_1 is used to transmit new data packets and kernel data packets according to the transmission level.

[0138] It should be noted that there are no specific rules regarding the transmission priority. For example, new data packets can be processed first, or the transmission priority can be distributed equally, that is, new data packets and second data packets can be transmitted alternately. The specific transmission priority rules can be determined according to actual needs.

[0139] In this embodiment, the data transmission circuit can effectively ensure that important data is transmitted first by setting the priority of the data transmitted by the transmitting subunit Tx, thereby effectively ensuring data transmission efficiency.

[0140] like Figure 8 As shown, the lookup table unit (LUT) includes a lookup subunit (LUT_1) and a storage subunit (LUT_2) connected to the lookup subunit (LUT_1). The storage subunit (LUT_2) is used to pre-store the lookup table, which includes multiple items, each corresponding to a unique original index. Each item includes a new header. The lookup subunit (LUT_1) is used to retrieve the item corresponding to the original index from the lookup table as the new header.

[0141] Specifically, for example, the storage sub-unit LUT_2 stores multiple items, each of which is a complete packet header, as shown in the table below:

[0142]

[0143] The index is a unique identifier that corresponds to an item in the LUT. The item pointed to by the index is the new header (NewHeader) of the new data packet. It will be combined with the original data in the Merge unit and then sent out.

[0144] The content of the LUT project, specifically the NewHeader, is as follows:

[0145] C0 index Addr_dest

[0146] C0 is a new control bit indicating whether the new data packet needs to be relayed. Index is the index of the LUT, and Addr_dest is the destination address of the new data packet, which may be the destination core address, or a combination of the destination core address and the destination storage address.

[0147] To effectively save energy consumption in the transmission circuit, preferably, when a non-relay relay signal is received, that is, in response to the original data packet not requiring relay, the lookup table unit (LUT) and the merge unit (Merge) are turned off. In other words, the lookup table and fusion / packaging functions are stopped. Turning off the lookup table unit (LUT) and the merge unit (Merge) effectively saves power consumption.

[0148] like Figure 5 and Figure 9 As shown, the control unit Ctrl includes a judgment subunit Ctrl_1 and a transmission subunit Ctrl_2. The judgment subunit Ctrl_1 determines whether the original data packet needs relaying based on the value of the original control bit. If yes, its output value C1 is set to a first value, such as 1; otherwise, its output value C1 is set to a second value different from the first value, such as 0. The transmission subunit Ctrl_2 transmits the output value C1 of the judgment subunit Ctrl_1 to the lookup table unit LUT and the concatenation unit Merge, respectively.

[0149] like Figure 10As shown, the data transmission circuit TR also includes a modification unit Gx, which is connected to the receiving unit Rx. The receiving unit Rx is also used to receive modification requests, which carry new control bits and a new index. The modification unit Gx is used to modify the header of the original data packet received by the receiving unit according to the modification request. For example, it can be modified by the local MCU or host according to different tasks to enable data transmission under different task states.

[0150] A third optional embodiment of the present invention, for example Figure 3 and Figure 5 As shown, a processing core is provided, including a memory unit and a data transmission circuit. The data transmission circuit adopts the data transmission circuit TR described above. The specific structure of the data transmission circuit TR can be referred to the relevant description above, and will not be repeated here. The output terminal of the receiving unit Rx is connected to the input terminal of the memory unit, and the second input terminal In0 of the selection unit Sx is connected to the output terminal of the memory unit.

[0151] The processing core in this embodiment has the data transmission circuit described above. Data packets do not need to be stored in the core's memory unit before being read out, thereby reducing the power consumption of the transmission circuit. Furthermore, the storage of each data packet in the core's memory unit and its relay transmission are performed in parallel, rather than being written in first and then read out, which can greatly reduce the waiting time for subsequent data receivers. In addition, the parameters of the entire data transmission process are contained in the header of the transmitted data packet and are parsed by the local circuit, thus eliminating the need to occupy the microcontroller unit.

[0152] In a fourth optional embodiment of the present invention, a multi-core structure chip is provided, including multiple processing cores and a Fabric that interconnects the processing cores. At least one processing core includes the data transmission circuit described above. The specific structure of the data transmission circuit can be referred to the relevant description above, and will not be repeated here. Alternatively, at least one processing core is the processing core described above.

[0153] The multi-core chip in this embodiment has the data transmission circuit or processing core described above. Data packets do not need to be stored in the core's memory unit before being read out, thereby reducing the power consumption of the transmission circuit. Furthermore, the storage of each data packet in the core's memory unit and its relay transmission are performed in parallel, rather than being written in first and then read out, which greatly reduces the waiting time for subsequent data receivers. In addition, the parameters of the entire data transmission process are contained in the header of the transmitted data packet and are parsed by the local circuit, thus eliminating the need to occupy the microcontroller unit.

[0154] The fifth optional embodiment of the present invention, such as Figure 11As shown, a data transmission method S100 is provided. This data transmission method S100 can adopt the structure of the data transmission circuit described above, and details can be found in the relevant descriptions above, which will not be repeated here. The data transmission method S100 specifically includes the following steps:

[0155] S110: Receive the original data packet from Fabric. The header of the original data packet carries the original control bits and the original index.

[0156] S120. Determine whether the original data packet needs to be relayed based on the original control bit.

[0157] S130. In response to the need for relaying the original data packet, a new data packet is sent to Fabric. The new data packet includes the original data and a new header obtained based on the original index.

[0158] In this embodiment of the data transmission method, data packets do not need to be stored in the core's memory unit before being read out, thereby reducing the power consumption of the transmission circuit. Furthermore, the storage of each data packet in the core's memory unit and its relay transmission are performed in parallel, rather than being written in first and then read out, which greatly reduces the waiting time for subsequent data receivers. In addition, the parameters of the entire data transmission process are contained in the header of the transmitted data packet and are parsed by the local circuitry, thus eliminating the need to occupy the microcontroller unit.

[0159] Specifically, the steps for sending new data packets to Fabric include:

[0160] The new header is retrieved from the preset lookup table based on the original index. The new header and the original data are packaged together to form a new data packet, which is then sent to Fabric.

[0161] Specifically, such as Figure 11 As shown, the data transmission method S100 further includes:

[0162] S140: In response to the fact that the original data packet does not need to be relayed, the local data is sent to Fabric as a second data packet.

[0163] To ensure efficient data transmission, the data transmission method also includes the following steps:

[0164] Set the transmission priority for the new data packet and the second data packet, and send the new data packet and the second data packet according to the transmission priority. For example, the transmission priority may include a higher transmission priority for the new data packet than for the second data packet. Or, the transmission priority may include alternating transmission of the new data packet and the second data packet, etc.

[0165] To reduce power consumption, the data transmission method S100 also includes:

[0166] If the original data packet does not require relaying, stop table lookup and / or stop splicing.

[0167] Optionally, step S120 specifically includes:

[0168] Determine whether the original data packet needs to be relayed based on the value of the original control bit. If yes, set the output value to 1; otherwise, set the output value to 0.

[0169] Optionally, the data transmission method further includes:

[0170] Receive a change request, which carries new control bits and a new index.

[0171] Modify the header of the received original data packet according to the change request.

[0172] A sixth optional embodiment of the present invention provides an electronic device, comprising:

[0173] One or more processors;

[0174] A storage unit is used to store one or more programs, which, when executed by one or more processors, enable the one or more processors to implement the data transfer method described above.

[0175] In this embodiment, the electronic device stores a program in its memory unit. When executed by the processor, this program enables data transmission according to the previously described method. Data packets do not need to be stored in the core memory unit before being read out, thus reducing the power consumption of the transmission circuit. Furthermore, the storage of each data packet in the core memory unit and its relay transmission are performed in parallel, rather than being written in first and then read out, significantly reducing the waiting time for subsequent data receivers. Additionally, the parameters of the entire data transmission process are contained in the header of the transmitted data packet and are parsed by the local circuitry, thus eliminating the need to occupy the microcontroller unit.

[0176] In a seventh optional embodiment of the present invention, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, it can implement the data transmission method described above. For details of the data transmission method, please refer to the relevant description above.

[0177] The computer-readable medium may be included in the apparatus, device, or system of the present invention, or it may exist independently.

[0178] The computer-readable storage medium may be any tangible medium that contains or stores a program, and may be an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device. More specific examples include, but are not limited to, connections having one or more wires, portable computer disks, hard disks, optical fibers, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0179] The computer-readable storage medium may also include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code, specific examples of which include, but are not limited to, electromagnetic signals, optical signals, or any suitable combination thereof.

[0180] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of the present invention, and the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A data transmission circuit, characterized in that, include: The unit comprises a receiving unit, a control unit, a lookup table unit, and a selection unit; wherein, The input terminal of the receiving unit is used to connect to the output terminal of the data exchange device Fabric, and the output terminal of the receiving unit is connected to the input terminal of the control unit, the input terminal of the lookup table unit, and the first input terminal of the selection unit. The control terminal of the control unit is connected to the control terminal of the lookup table unit and the control terminal of the selection unit, respectively. The output of the lookup table unit is connected to the first input of the selection unit; The receiving unit is configured to receive the original data packet from the Fabric, send the original control bits of the original data packet header to the control unit, and send the original index of the original data packet header to the lookup table unit; the output of the receiving unit is also configured to be connected to the storage unit and send the original data in the original data packet to the storage unit. The control unit is used to determine whether the original data packet needs to be relayed based on the original control bit. In response to the need for relaying the original data packet, the control unit is used to enable the first input terminal of the selection unit; the selection unit is used to send a new data packet, including the original data in the original data packet received via the first input terminal and the new packet header obtained by the lookup table unit according to the original index, to the Fabric.

2. The data transmission circuit according to claim 1, characterized in that, The selection unit is used to send a new data packet, including the original data received via the first input terminal and the new header obtained by the lookup table unit according to the original index, to the Fabric, including: The lookup table unit is used to obtain the new packet header according to the original index and send the new packet header to the selection unit; The selection unit is used to send a new data packet, including the original data received via the first input terminal and the new header, to the Fabric.

3. The data transmission circuit according to claim 1 or 2, characterized in that, The selection unit further includes a second input terminal, which is used to connect to the storage unit; Since the original data does not require relay, the control unit is also used to control the second input terminal of the selection unit to be valid; The selection unit is used to send the local data stored in the storage unit, read via the second input terminal, as a second data packet to the Fabric.

4. The data transmission circuit according to claim 3, characterized in that, The selection unit includes a selection subunit and a transmission subunit; The input terminal of the transmitting subunit is connected to the output terminal of the selecting subunit; The output terminal of the transmitting subunit is used to connect to the Fabric; The sending subunit is used to send data packets output from the selection subunit to the Fabric.

5. The data transmission circuit according to claim 4, characterized in that, The transmitting subunit includes a control subunit and a level setting subunit connected to the control subunit, wherein, The level setting subunit is used to set the transmission level of the new data packet and the second data packet; The control subunit is configured to send the new data packet and the second data packet according to the transmission level.

6. The data transmission circuit according to claim 1 or 2, characterized in that, Also includes: In response to the fact that the original data packet does not require relaying, the lookup table unit is turned off.

7. The data transmission circuit according to claim 1 or 2, characterized in that, The lookup table unit includes a lookup subunit and a storage subunit connected to the lookup subunit; wherein, The storage subunit is used to pre-store a lookup table, which includes multiple items, each item corresponding to a unique original index, and each item includes a new packet header; The lookup table unit is used to obtain the new packet header based on the original index, including: The lookup subunit is used to find the item corresponding to the original index from the lookup table as the new header, and output the new header.

8. The data transmission circuit according to claim 1 or 2, characterized in that, The control unit includes a judgment subunit and a transmission subunit; wherein... The judgment subunit is used to determine whether the original data packet needs to be relayed based on the value of the original control bit. If yes, its output value is set to 1; otherwise, its output value is set to 0. The transmission subunit is used to transmit the output value of the judgment subunit to the lookup table unit and the selection unit, respectively.

9. The data transmission circuit according to claim 1 or 2, characterized in that, The data transmission circuit further includes a modification unit, which is connected to the receiving unit; wherein... The receiving unit is also configured to receive a change request, the change request carrying new control bits and a new index; The modification unit is used to modify the header of the original data packet received by the receiving unit according to the modification request.

10. A data transmission circuit, characterized in that, include: The unit comprises a receiving unit, a control unit, a lookup table unit, and a selection unit; wherein, The input terminal of the receiving unit is used to connect to the output terminal of the data exchange device Fabric, and the output terminal of the receiving unit is connected to the input terminal of the control unit, the input terminal of the lookup table unit, and the first input terminal of the selection unit. The control terminal of the control unit is connected to the control terminal of the lookup table unit and the control terminal of the selection unit, respectively. The output of the lookup table unit is connected to the first input of the selection unit; The receiving unit is configured to receive the original data packet from the Fabric, send the original control bits of the original data packet header to the control unit, and send the original index of the original data packet header to the lookup table unit; the output of the receiving unit is also configured to be connected to the storage unit and send the original data in the original data packet to the storage unit. The control unit is used to determine whether the original data packet needs to be relayed based on the original control bit. In response to the need for relaying the original data packet, the control unit is used to enable the first input terminal of the selection unit; the selection unit is used to send a new data packet, including the original data in the original data packet received via the first input terminal and the new packet header obtained by the lookup table unit according to the original index, to the Fabric; It also includes splicing units; The input terminal of the splicing unit is connected to the output terminal of the lookup table unit and the output terminal of the receiving unit, respectively. The output terminal of the splicing unit is connected to the first input terminal of the selection unit. The control terminal of the splicing unit is connected to the control terminal of the control unit. The selection unit is used to send a new data packet, including the original data received via the first input terminal and the new header obtained by the lookup table unit according to the original index, to the Fabric, including: The lookup table unit is used to obtain the new packet header according to the original index and send the new packet header to the splicing unit; The splicing unit is used to package the new header and the original data into the new data packet and send it to the selection unit; The selection unit is used to send the new data packet received via the first input terminal to the Fabric.

11. The data transmission circuit according to claim 10, characterized in that, The selection unit is used to send a new data packet, including the original data received via the first input terminal and the new header obtained by the lookup table unit according to the original index, to the Fabric, including: The lookup table unit is used to obtain the new packet header according to the original index and send the new packet header to the selection unit; The selection unit is used to send a new data packet, including the original data received via the first input terminal and the new header, to the Fabric.

12. The data transmission circuit according to claim 10 or 11, characterized in that, The selection unit further includes a second input terminal, which is used to connect to the storage unit; Since the original data does not require relay, the control unit is also used to control the second input terminal of the selection unit to be valid; The selection unit is used to send the local data stored in the storage unit, read via the second input terminal, as a second data packet to the Fabric.

13. The data transmission circuit according to claim 12, characterized in that, The selection unit includes a selection subunit and a transmission subunit; The input terminal of the transmitting subunit is connected to the output terminal of the selecting subunit; The output terminal of the transmitting subunit is used to connect to the Fabric; The sending subunit is used to send data packets output from the selection subunit to the Fabric.

14. The data transmission circuit according to claim 13, characterized in that, The transmitting subunit includes a control subunit and a level setting subunit connected to the control subunit, wherein, The level setting subunit is used to set the transmission level of the new data packet and the second data packet; The control subunit is configured to send the new data packet and the second data packet according to the transmission level.

15. The data transmission circuit according to claim 10 or 11, characterized in that, Also includes: In response to the original data packet not requiring relay, the lookup table unit is turned off and / or the splicing unit is turned off.

16. The data transmission circuit according to claim 10 or 11, characterized in that, The lookup table unit includes a lookup subunit and a storage subunit connected to the lookup subunit; wherein, The storage subunit is used to pre-store a lookup table, which includes multiple items, each item corresponding to a unique original index, and each item includes a new packet header; The lookup table unit is used to obtain the new packet header based on the original index, including: The lookup subunit is used to find the item corresponding to the original index from the lookup table as the new header, and output the new header.

17. The data transmission circuit according to claim 10 or 11, characterized in that, The control unit includes a judgment subunit and a transmission subunit; wherein... The judgment subunit is used to determine whether the original data packet needs to be relayed based on the value of the original control bit. If yes, its output value is set to 1; otherwise, its output value is set to 0. The transmission subunit is used to transmit the output value of the judgment subunit to the lookup table unit and the selection unit respectively; or, the transmission subunit is used to transmit the output value of the judgment subunit to the lookup table unit, the selection unit and the splicing unit respectively.

18. The data transmission circuit according to claim 10 or 11, characterized in that, The data transmission circuit further includes a modification unit, which is connected to the receiving unit; wherein... The receiving unit is also configured to receive a change request, the change request carrying new control bits and a new index; The modification unit is used to modify the header of the original data packet received by the receiving unit according to the modification request.

19. A processing core, characterized in that, It includes a storage unit and a data transmission circuit, wherein the data transmission circuit adopts the data transmission circuit according to any one of claims 1-18; wherein, The output terminal of the receiving unit is connected to the input terminal of the storage unit, and the second input terminal of the selection unit is connected to the output terminal of the storage unit.

20. A multi-core chip, comprising a plurality of processing cores and a Fabric connecting the processing cores to each other, characterized in that, At least one of the processing cores includes the data transmission circuit of any one of claims 1-18, or at least one processing core is the processing core of claim 19.

21. A data transmission method, characterized in that, The data transmission circuit according to any one of claims 1-18 specifically includes the following steps: Receive the original data packet from Fabric, the header of which carries the original control bits and the original index; Determine whether the original data packet needs to be relayed based on the original control bit; In response to the need for relaying the original data packet, a new data packet is sent to the Fabric; wherein the new data packet includes: the original data, and a new header obtained according to the original index.

22. An electronic device, characterized in that, include: One or more processors; A storage unit is used to store one or more programs that, when executed by one or more processors, enable the one or more processors to implement the data transmission method according to claim 21.

23. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it can implement the data transmission method according to claim 21.

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