Distance measuring sensor, driving method of distance measuring sensor, and distance measuring module

Abstract

The technology of the present application relates to a distance measuring sensor capable of simultaneously achieving cycle error reduction and driving current dispersion, a method of driving the distance measuring sensor, and a distance measuring module. The distance measuring sensor includes a phase shifting circuit that generates phase-shifted driving pulse signals by shifting a driving pulse signal in a time-division manner by a plurality of phases within one frame period, the driving pulse signal being generated in response to a light emission control signal indicating an emission timing of a light emission source; and a pixel that accumulates electric charges based on the phase-shifted driving pulse signals and outputs a detection signal corresponding to the accumulated electric charges, the electric charges being obtained by photoelectrically converting reflected light that is reflected by a predetermined object from light emitted by the reflected light emission source. The present application can be applied to, for example, a distance measuring module that measures a distance to a predetermined object.

Description

Technical Field

[0001] This technology relates to a ranging sensor, a method for driving the ranging sensor, and a ranging module, and more specifically, to a ranging sensor, a method for driving the ranging sensor, and a ranging module capable of simultaneously reducing periodic errors and dispersing driving current. Background Technology

[0002] A Time-of-Flight (ToF) sensor, which measures the distance to an object by measuring the time of flight of light, outputs modulated light from a light source and receives light reflected from the object. In distance measurement, the modulated light output by the light source is processed as a sinusoidal waveform. However, the actual waveform of the light output by the light source is rectangular. Processing a rectangular wave into a sine wave will cause a periodic error in the measurement value (hereinafter referred to as periodic error).

[0003] For example, a technique for reducing periodic errors by generating a pseudo-sine wave through the phase shift of the modulated light output from a light source is disclosed (see, for example, Patent Document 1).

[0004] Meanwhile, the number of pixels in ToF sensors is constantly increasing. When a large number of pixels are driven simultaneously, the concentration of drive current generates strong charging and discharging currents, leading to IR voltage drops and, in some cases, inaccurate pixel driving. To address this issue, there are techniques that reduce peak current and prevent IR voltage drops by distributing pixel driving (see, for example, non-patent documents 1 and 2).

[0005] Citation List

[0006] Patent documents

[0007] Patent Document 1: WO 2009 / 051499 A

[0008] Non-patent literature

[0009] Non-patent literature 1: Cyrus S. Bamji et al., 5.8 1Mpixel 65nm BSI 320MHz DemodulatedTOF Image Sensor with 3.5um Global Shutter Pixels and Analog Binning, Microsoft Corp., 2018 IEEE International Solid-State Circuits ConferenceSESSION 5 / IMAGE SENSORS, February 12th 2018

[0010] Non-patent document 2: Min-Sun Keel et al., A 640×480 Indirect Time-of-Flight CMOSImage Sensor with 4-tap 7-μm Global-Shutter Pixel and Fixed-Pattern PhaseNoise Self-Compensation Scheme, Samsung Electronics Co., Ltd., 2019 Symposium onVLSI Circuits Digest of Technical Papers Summary of the Invention

[0011] However, the techniques disclosed in Non-Patent Documents 1 and 2 do not take into account periodic errors. No method has yet been proposed to simultaneously reduce periodic errors and disperse drive current.

[0012] This technology was developed in view of this situation, with the aim of simultaneously reducing periodic errors and dispersing drive current.

[0013] Solution to the problem

[0014] A ranging sensor according to a first aspect of the present technology includes: a phase-shifting circuit that generates a phase-shifted driving pulse signal by shifting a driving pulse signal by multiple phases in a time-division manner within a frame period, the driving pulse signal being generated in response to a light emission control signal indicating the illumination timing of a light source; and a pixel that accumulates charge based on the phase-shifted driving pulse signal and outputs a detection signal corresponding to the accumulated charge, the charge being obtained by photoelectric conversion of reflected light reflected from a predetermined object by light emitted from a reflective light source.

[0015] A method for driving a ranging sensor including a phase-shifting circuit and pixels, according to a second aspect of the present technology, includes: generating a phase-shifted driving pulse signal by shifting the phase of a driving pulse signal, the driving pulse signal being generated according to a light emission control signal indicating the irradiation timing of a light source, the phase-shifting circuit generating the phase-shifted driving pulse signal; and accumulating charge based on the phase-shifted driving pulse signal and outputting a detection signal corresponding to the accumulated charge, the charge being obtained by photoelectric conversion of reflected light reflected from a predetermined object by a light emitted from a reflective light source, the pixels accumulating charge and outputting the detection signal.

[0016] A ranging module according to a third aspect of the present invention includes: a light source that emits light onto a predetermined object according to an illumination timing sequence of a light emission control signal; and a ranging sensor that receives reflected light from the predetermined object reflecting light emitted by the light source. In the ranging module, the ranging sensor includes: a phase-shifting circuit that generates a phase-shifted driving pulse signal by shifting the phase of a driving pulse signal generated in response to the light emission control signal; and a pixel that accumulates charge based on the phase-shifted driving pulse signal and outputs a detection signal corresponding to the accumulated charge, the charge being obtained by photoelectric conversion of the reflected light.

[0017] In the first to third aspects of this technology, a phase-shifted driving pulse signal is generated by shifting the phase of a driving pulse signal generated in response to a light emission control signal indicating the irradiation timing of a light source. Based on the phase-shifted driving pulse signal, a charge obtained by photoelectric conversion of reflected light from a predetermined object emitted by a light source is accumulated, and a detection signal corresponding to the accumulated charge is output from a pixel.

[0018] The ranging sensor and ranging module can be independent devices, or they can be modules that are incorporated into other devices. Attached Figure Description

[0019] [ Figure 1 [ ] is a block diagram illustrating a schematic example configuration of a ranging module applying this technology.

[0020] [ Figure 2 [] is a block diagram of a specific example configuration of the optical receiving unit.

[0021] [ Figure 3 [] is an illustration of pixel operations.

[0022] [ Figure 4 [ ] is an illustration of the 2-phase method and the 4-phase method.

[0023] [ Figure 5 [ ] is an illustration of the 2-phase method and the 4-phase method.

[0024] [ Figure 6 [ ] is an illustration of the 2-phase method and the 4-phase method.

[0025] [ Figure 7 [ ] is a block diagram of a more specific example configuration of the optical receiving unit.

[0026] [ Figure 8 [ ] is an explanatory diagram of the phase shift process.

[0027] [ Figure 9 [ ] is an illustration of the charge accumulation time in the corresponding phase.

[0028] [ Figure 10 [ ] is an explanatory diagram of phase shift control in the corresponding block.

[0029] [ Figure 11 [This is a schematic example configuration diagram with a phase control segmentation number of 3.]

[0030] [ Figure 12 [ ] is an explanatory diagram of phase shift control in the corresponding block with a phase control segmentation number of 3.

[0031] [ Figure 13 [ ] is an illustration of the method for segmenting blocks in a pixel array.

[0032] [ Figure 14 [ ] is an explanatory diagram of the IQ splicing driver.

[0033] [ Figure 15 [ ] is an explanatory diagram of the IQ splicing driver.

[0034] [ Figure 16 [ ] is an explanatory diagram of the IQ splicing driver.

[0035] [ Figure 17 [ ] is a schematic diagram of an example of IQ splicing drive with a phase control segmentation number of 4.

[0036] [ Figure 18 [ ] is an explanatory diagram of phase shift control in the corresponding block.

[0037] [ Figure 19 [ ] is a schematic diagram of an IQ splicing drive example with a phase control segmentation number of 4.

[0038] [ Figure 20 [This is an illustration of the effect of periodic error caused by conversion to a pseudosine wave.]

[0039] [ Figure 21 [This is an illustration of the effect of periodic error caused by conversion to a pseudosine wave.]

[0040] [ Figure 22 [This is an illustration of the effect of periodic error caused by conversion to a pseudosine wave.]

[0041] [ Figure 23 [This is an illustration of the effect of periodic error caused by conversion to a pseudosine wave.]

[0042] [ Figure 24 [ ] is a schematic diagram of an IQ splicing drive example with a phase control segmentation number of 6.

[0043] [ Figure 25 [ ] is a perspective view of an example chip configuration for a ranging sensor.

[0044] [ Figure 26[This is a block diagram of an example configuration of a smartphone as an electronic device equipped with a ranging module.]

[0045] [ Figure 27 [ ] is a block diagram illustrating a schematic example configuration of a vehicle control system.

[0046] [ Figure 28 [ ] is an illustrative diagram illustrating an example of the installation location of an external information detector and imaging unit. Detailed Implementation

[0047] The following describes how this technology is implemented (hereinafter referred to as embodiments). Note that the descriptions will be presented in the following order.

[0048] 1. Specific example configuration of the ranging module

[0049] 2. Basic pixel-driven indirect ToF method

[0050] 3. The problem of driving all pixels simultaneously

[0051] 4. Specific example configuration of the optical receiving unit

[0052] 5. Example chip configuration of the ranging sensor

[0053] 6. Example configuration of electronic devices

[0054] 7. Example applications in moving structures

[0055] <1. Illustrative Example Configuration of Distance Measurement Module>

[0056] Figure 1 This is a block diagram illustrating a schematic example configuration of a ranging module applying this technology.

[0057] Figure 1 The distance measuring module 11 shown is a distance measuring module that performs distance measurement using an indirect Time-of-Flight (ToF) method, including a light-emitting unit 12 and a distance sensor 13. The distance measuring module 11 illuminates an object with light (illumination light) and receives the light reflected by the object (reflected light). By doing so, the distance measuring module 11 generates and outputs a depth map as information indicating the distance to the object. The distance sensor 13 includes a light-emitting control unit 14, a light-receiving unit 15, and a signal processing unit 16.

[0058] The light-emitting unit 12 includes a planar array of vertical-cavity surface-emitting lasers (VCSELs) that serve as light sources. The light-emitting unit emits light, modulates the light in a timing sequence corresponding to the light-emitting control signal provided by the light-emitting control unit 14, and illuminates an object with the light.

[0059] The light emission control unit 14 controls the light emission unit 12 by providing a light emission control signal of a predetermined frequency (e.g., 200MHz) to the light emission unit 12. The light emission control unit 14 also provides the light emission control signal to the light receiving unit 15 so that the light emission timing of the light emission unit 12 drives the light receiving unit 15 in a timely manner.

[0060] In a pixel array 32 with multiple pixels 31 arranged in a two-dimensional pattern, the light receiving unit 15 receives the reflected light from the object, which will be referred to later. Figure 2 This will be described in detail. Then, the light receiving unit 15 provides pixel data, including a detection signal corresponding to the amount of received reflected light, to the signal processing unit 16 for each pixel 31 in the pixel array 32.

[0061] Based on the pixel data provided by the light receiving unit 15 for each pixel 31 in the pixel array 32, the signal processing unit 16 calculates the depth value indicating the distance from the ranging module 11 to the object, generates a depth map that stores the depth value in the pixel value of each pixel 31, and then outputs the depth map to the outside of the module.

[0062] <2. Basic Pixel Drivers of Indirect ToF Methods>

[0063] Before describing in detail the pixel driving performed by the light receiving unit 15 of this disclosure, the basic pixel driving of the indirect ToF method will be explained.

[0064] Figure 2 This is a block diagram of a specific example configuration of the optical receiving unit 15.

[0065] The light receiving unit 15 includes: a pixel array 32, wherein pixels 31 that generate charges corresponding to the amount of light received and output detection signals corresponding to the charges are arranged in a two-dimensional matrix in the row and column directions; and a drive control circuit 33, which is disposed in the peripheral region of the pixel array 32.

[0066] For example, based on the light emission control signal provided by the light emission control unit 14, the drive control circuit 33 outputs control signals for controlling the drive of the pixel 31 (e.g., the allocation signal DIMIX, the selection signal ADDRESSDECODE, and the reset signal RST, which will be described later).

[0067] Pixel 31 includes a photodiode 51 as a photoelectric conversion part, which generates a charge corresponding to the amount of received light, and a first tap 52A and a second tap 52B for detecting the charge generated by the photodiode 51. In pixel 31, the charge generated in a single photodiode 51 is distributed to either the first tap 52A or the second tap 52B. Of the charge generated by the photodiode 51, the charge distributed to the first tap 52A is output as a detection signal A via signal line 53A, and the charge distributed to the second tap 52B is output as a detection signal B via signal line 53B.

[0068] The first tap 52A includes a transfer transistor 41A, a floating diffusion (FD) portion 42A, a select transistor 43A, and a reset transistor 44A. Similarly, the second tap 52B includes a transfer transistor 41B, an FD portion 42B, a select transistor 43B, and a reset transistor 44B.

[0069] like Figure 3 As shown, the light source 12 outputs modulated (one period = 2T) illumination light that repeatedly turns on and off during the illumination time T, and the reflected light is received by the photodiode 51. The delay time ΔT depends on the distance to the object. Further, the allocation signal DIMIX_A controls the on and off of the transmission transistor 41A, and the allocation signal DIMIX_B controls the on and off of the transmission transistor 41B. The allocation signal DIMIX_A is in phase with the illumination light, and the allocation signal DIMIX_B is out of phase with the allocation signal DIMIX_A.

[0070] Therefore, in Figure 2 In this process, the charge generated by the photodiode 51 receiving the reflected light is transferred to the FD portion 42A when the transfer transistor 41A is turned on according to the allocation signal DIMIX_A, and transferred to the FD portion 42B when the transfer transistor 41B is turned on according to the allocation signal DIMIX_B. As a result, during a predetermined period of periodic emission of irradiation light with an irradiation time of T, the charge transferred via the transfer transistor 41A accumulates sequentially in the FD portion 42A, and the charge transferred via the transfer transistor 41B accumulates sequentially in the FD portion 42B.

[0071] Furthermore, when the selection transistor 43A is turned on according to the selection signal address decoding_A (ADDRESSDECODE_A) after the charge accumulation period ends, the charge accumulated in the FD portion 42A is read out via signal line 53A, and a detection signal A corresponding to the charge amount is output from the light receiving unit 15. Similarly, when the selection transistor 43B is turned on according to the selection signal address decoding_B (ADDRESSDECODE_B), the charge accumulated in the FD portion 42B is read out via signal line 53B, and a detection signal B corresponding to the charge amount is output from the light receiving unit 15. Furthermore, when the reset transistor 44A is turned on according to the reset signal RST_A, the charge accumulated in the FD portion 42A is released; when the reset transistor 44B is turned on according to the reset signal RST_B, the charge accumulated in the FD portion 42B is released.

[0072] As described above, pixel 31 distributes the charge generated by photodiode 51 receiving reflected light to first tap 52A or second tap 52B according to the delay time ΔT, and outputs detection signal A and detection signal B as pixel data.

[0073] The signal processing unit 16 calculates the depth value based on the detection signal A and detection signal B provided as pixel data for each pixel 31. Examples of methods for calculating the depth value include a two-phase method using detection signals with two phases and a four-phase method using detection signals with four phases.

[0074] The two-phase and four-phase methods will now be described.

[0075] like Figure 4 As shown, using the 4-phase method, the optical receiving unit 15 receives reflected light with phase shifts of 0°, 90°, 180°, and 270° relative to the illumination timing of the illuminating light. More specifically, the optical receiving unit 15 receives reflected light by changing the phase in a time-division manner: receiving light with a phase set to 0° relative to the illumination timing of the illuminating light within a frame period, receiving light with a phase set to 90° in the next frame period, receiving light with a phase set to 180° in the next frame period, and receiving light with a phase set to 270° in subsequent frame periods.

[0076] Note that, unless otherwise stated, 0°, 90°, 180°, or 270° phases represent the phase at the first tap 52A of pixel 31. The phase of the second tap 52B is opposite to the phase of the first tap 52A. Therefore, when the first tap 52A is at a phase of 0°, 90°, 180°, or 270°, the second tap 52B is at a phase of 180°, 270°, 0°, or 90°, respectively.

[0077] Figure 5This is a table of exposure times for the first tap 52A of pixel 31 at various phases of 0°, 90°, 180° and 270°, shown in a way that makes the phase difference easy to understand.

[0078] like Figure 5 As shown, in the first tap 52A, the detection signal A obtained by receiving light that is in phase with the illumination light (phase 0°) is called detection signal A0, and the detection signal A obtained by receiving light that is shifted 90 degrees from the illumination light (phase 90°) is called detection signal A0. 90 The detection signal A obtained by receiving light whose phase has shifted by 180 degrees from the illumination light (phase 180°) is called the detection signal A. 180 The detection signal A obtained by receiving light whose phase has shifted by 270 degrees from the illumination light is called the detection signal A. 270 .

[0079] Similarly, although not shown in the figure, in the second tap 52B, the detection signal B obtained by receiving light that is in phase with the illumination light (phase 0°) is called the detection signal B0, and the detection signal B obtained by receiving light that is shifted 90 degrees from the illumination light (phase 90°) is called the detection signal B0. 90 The detection signal B obtained by receiving light whose phase has shifted by 180 degrees from the illumination light (phase 180°) is called the detection signal B. 180 The detection signal B obtained by receiving light whose phase has shifted by 270 degrees from the illumination light is called the detection signal B. 270 .

[0080] Figure 6 This is an illustration of the methods for calculating depth values ​​and reliability using the 2-phase and 4-phase methods.

[0081] The depth value d can be calculated using the indirect ToF method according to equation (1) shown below.

[0082] [Mathematical Formula 1]

[0083]

[0084] In equation (1), c represents the speed of light, ΔT represents the delay time, and f represents the modulation frequency of the light. Furthermore, in equation (1)... The phase shift [rad] of the reflected light is represented by equation (2) shown below.

[0085] [Mathematical Formula 2]

[0086]

[0087] Using the 4-phase method, the detection signal A0-A is obtained by setting the phase to 0°, 90°, 180°, and 270°. 270 and detection signal B0-B 270 I and Q in equation (2) are calculated according to equation (3) shown below. I and Q are signals obtained by converting the phase of the sine wave from the polar coordinate system to the orthogonal coordinate system (IQ plane) under the assumption that the brightness change of the illumination light is a sine wave.

[0088] I = c0 - c 180 =(A0-B0)-(A 180 -B 180 )

[0089] Q = c 90 -c 270 =(A 90 -B 90 )-(A 270 -B 270 )..........(3)

[0090] For example, using the 4-phase method, such as "A0-A" in equation (3) 180 "and "A 90 -A 270 "In this way, the difference between detection signals of opposite phases in the same pixel is calculated. In this way, the characteristic variation between taps in each pixel, that is, the sensitivity difference between taps, can be eliminated."

[0091] Alternatively, using the two-phase method, I and Q in equation (2) can be calculated using detection signals with two phases, 0° and 90°. That is, I and Q in equation (2) according to the two-phase method are represented by equation (4) shown below.

[0092] I = c0 - c 180 =(A0-B0)

[0093] Q = c 90 -c 270 =(A 90 -B 90 )..........(4)

[0094] While the two-phase method cannot eliminate characteristic variations between taps within each pixel, it allows the calculation of the object's depth value 'd' using only two phases of the detection signal. Therefore, ranging can be performed at twice the frame rate of the four-phase method. For example, characteristic variations between taps can be adjusted using correction parameters such as gain and offset.

[0095] The reliability cnf can be calculated using both the 2-phase method and the 4-phase method based on equation (5) shown below.

[0096] [Mathematical Formula 3]

[0097]

[0098] As can be seen from equation (5), the reliability cnf corresponds to the magnitude of the reflected light received by pixel 31, i.e., the brightness information (brightness value).

[0099] Note that in the following text, the unit of pixel data (detection signal) output by each pixel 31 of pixel array 32 in one phase, such as 0°, 90°, 180°, or 270°, will be referred to as a frame (period). Using the 4-phase method, a depth map is generated for four frames including four phases. Using the 2-phase method, a depth map is generated for two frames including two phases.

[0100] <3. The problem of driving all pixels simultaneously>

[0101] When the above basic pixel driving is performed on all pixels 31 in the pixel array 32 at the same time, the following problem will occur.

[0102] (1) IR voltage drop occurs

[0103] The drive control circuit 33 performs control to distribute the charge generated by the photodiode 51 to the first tap 52A or the second tap 52B according to the distribution signals DIMIX_A and DIMIX_B. When the number of pixels in the pixel array 32 is large, if all pixels 31 in the pixel array 32 are driven simultaneously, the drive current becomes concentrated, and the strong charging and discharging current causes an IR voltage drop. As a result, the distribution signals DIMIX_A and DIMIX_B become blunt signals, potentially leading to inaccurate control of charge distribution. For example, if the number of pixels (resolution) in the pixel array 32 is greater than VGA's 640×480, the impact of the IR voltage drop will be significant when all pixels in the pixel array 32 are driven simultaneously.

[0104] (2) EMC / EMI degradation

[0105] Furthermore, when all pixels 31 in the pixel array 32 are driven simultaneously, the peak current becomes larger. As a result, the electromagnetic waves generated by the ranging sensor 13 also increase, while electromagnetic compatibility (EMC) and electromagnetic interference (EMI) degrade.

[0106] Therefore, it is necessary to disperse the driving of all pixels in the pixel array 32 to mitigate peak current.

[0107] (3) Periodic error occurs

[0108] As described above, the depth value d is calculated assuming the brightness variation of the irradiated light is a sine wave. However, in reality, the light emitted by the light-emitting unit 12 is as follows: Figure 3 The rectangular wave shown is an example. Therefore, when the rectangular wave is treated as a sine wave, the depth value d will exhibit a periodic error (hereinafter referred to as periodic error).

[0109] The optical receiving unit 15 of this disclosure drives all pixels in the pixel array 32, dissipates peak current, and performs driving to reduce cycle errors. The driving of the optical receiving unit 15 will be described in detail below.

[0110] <4. Specific Example Configuration of Optical Receiver Unit>

[0111] <An example with a phase control segmentation number of 2>

[0112] Figure 7 This is a block diagram of a more specific example configuration of the optical receiving unit 15.

[0113] As referenced above Figure 2 The light receiving unit 15 includes a pixel array 32 with pixels 31 arranged in a two-dimensional pattern and a driving control circuit 33. Note that in Figure 7 middle, Figure 2 The first tap 52A and the second tap 52B of the pixel 31 shown are simplified as “A” and “B”.

[0114] In pixel array 32, N (N>1) pixel columns are defined as a block BL, and all two-dimensionally arranged pixels 31 are divided into multiple blocks BL. Figure 7 An example is N=3, where three columns of pixels form a block BL.

[0115] Each block BL in pixel array 32 is further divided into two types of units for controlling the phase (phase control unit blocks). When the two phase control unit blocks are block BL_X and block BL_Y respectively, block BL_X and block BL_Y are arranged alternately in the horizontal direction (row direction), as shown below. Figure 7 As shown.

[0116] In addition to the pixel array 32 and the drive control circuit 33, the light receiving unit 15 further includes a pulse generation circuit 71 and a controller (control circuit) 72.

[0117] The drive control circuit 33 includes two phase-shifting circuits 81 and two or more block drive units 82. Note that the pulse generation circuit 71 and / or the controller 72 may be incorporated into the drive control circuit 33.

[0118] exist Figure 7In the two phase-shifting circuits 81, the phase-shifting circuit 81 associated with block BL_X is shown as phase-shifting circuit 81X, while the phase-shifting circuit 81 associated with block BL_Y is shown as phase-shifting circuit 81Y. Similarly, in two or more block driving units 82, the block driving unit 82 associated with block BL_X is shown as block driving unit 82X, while the block driving unit 82 associated with block BL_Y is shown as block driving unit 82Y.

[0119] The pulse generation circuit 71 generates a drive pulse signal based on a light emission control signal of a predetermined frequency (e.g., 200MHz) provided by the light emission control unit 14, and provides the drive pulse signal to the phase shifting circuits 81X and 81Y.

[0120] More specifically, the pulse generation circuit 71 generates a drive pulse signal whose frequency is synchronized with the light emission control signal of the light emission control unit 14. The pulse generation circuit 71 also references... Figure 4 The irradiation timing of the illumination light described herein is used to shift the phase of the frequency synchronization drive pulse signal, and the drive pulse signal is provided to the phase shifting circuits 81X and 81Y. The drive pulse signal output by the pulse generation circuit 71 corresponds to the one described in the reference above. Figure 4 The distribution signals DIMIX_A and DIMIX_B are described.

[0121] The controller 72 controls the phase transition timing of the phase shifting circuits 81X and 81Y. That is, the controller 72 instructs the phase shifting circuits 81X and 81Y to change their phases.

[0122] Phase-shifting circuits 81X and 81Y perform the process of shifting the phase of the drive pulse signal provided by the shift pulse generation circuit 71 when needed, and provide the phase-shifted drive pulse signal (phase-shifted drive pulse signal) to the block drive unit 82. Phase-shifting circuits 81X and 81Y generate drive pulse signals that shift multiple phases in a time-division manner within one frame period, so that the illumination light emitted as a rectangular wave approaches a sine wave (converting to a pseudo-sine wave).

[0123] Specifically, phase-shifting circuits 81X and 81Y perform a process of shifting the phase of the drive pulse signal provided by pulse generation circuit 71 by 0°, 45°, or 90° in a predetermined sequence within one frame period, and then providing the shifted drive pulse signal to block drive unit 82. Note that in the case of a 0° shift, the drive pulse signal provided by pulse generation circuit 71 can be provided to block drive unit 82 as is.

[0124] The controller 72 notifies each phase-shifting circuit 81X and 81Y of the timing for changing the phase to be shifted. The phase-shifting circuits 81X and 81Y change the phase to be shifted according to the timing specified by the controller 72.

[0125] The block driving unit 82X performs control to provide the driving pulse signals provided by the phase shifting circuit 81X, namely the phase shifted distribution signals DIMIX_A and DIMIX_B, to each pixel 31 in the corresponding block BL_X, and distributes the charge generated by the photodiode 51 to the first tap 52A or the second tap 52B.

[0126] The block driving unit 82Y performs control to provide the driving pulse signals provided by the phase shifting circuit 81Y, namely the phase shifted distribution signals DIMIX_A and DIMIX_B, to each pixel 31 in the corresponding block BL_Y, and distributes the charge generated by the photodiode 51 to the first tap 52A or the second tap 52B.

[0127] Figure 8 This is an explanatory diagram of the phase shifting process to be performed by the phase shifting circuits 81X and 81Y.

[0128] Figure 8 The vertical direction in blocks BL_X and BL_Y represents the time axis within a frame period.

[0129] According to the timing instructions from the controller 72, the phase shifting circuit 81X starts from phase 0° and shifts the phase in the order of 45° and 90° at predetermined time intervals, and outputs the result. After the phase is 90°, the phase returns to phase 0°, and the phase shifting process is repeated in the order of 0°, 45° and 90° until the exposure is complete.

[0130] On the other hand, the phase-shifting circuit 81Y, according to the timing instructions of the controller 72, starts from phase 0° and shifts the phase in the order of 45° and 90° at predetermined time intervals, and outputs the result. After phase 45°, the phase returns to phase 90°, and the phase-shifting process is repeated in the order of 90°, 0°, and 45° until the exposure is completed.

[0131] Figure 9 The charge accumulation time (integration time) is shown for each phase at 0°, 45°, and 90°.

[0132] like Figure 9 As shown in Figure A, the controller 72 instructs the phase-shifting circuit 81 to change the phase in such a timing that the ratio of the time period during which the phase-shifting circuit 81 generates a drive pulse signal after a 0° phase shift, the time period during which the phase-shifting circuit 81 generates a drive pulse signal after a 45° phase shift, and the time period during which the phase-shifting circuit 81 generates a drive pulse signal after a 90° phase shift is 1:√2:1. Therefore, the ratio of the charge accumulation time in each phase of 0°, 45°, and 90° is 1:√2:1.

[0133] Since the ratio of charge accumulation time in each phase (0°, 45°, and 90°) is 1:√2:1, the waveform of the modulated wave can be approximated as follows: Figure 9The sine wave shown in B is an example. The amplitude of the sine wave can be adjusted by changing the ratio of charge accumulation time.

[0134] As disclosed in Patent Document 1, in order to make the rectangular waveform light output by the light-emitting unit 12 approximate a sine wave, the emission timing of the light source can be phase-shifted to achieve a pseudo-sine wave. However, it is also possible to... Figure 9 The conversion to a pseudo-sine wave is achieved by phase shifting the optical receiving timing on the optical receiving side.

[0135] Figure 10 The phase shift control in each of blocks BL_X and BL_Y is shown.

[0136] like Figure 10 As shown, the drive control circuit 33 divides all pixels in the pixel array 32 into two phase control unit blocks, namely block BL_X and block BL_Y, and causes blocks BL_X and BL_Y to accumulate charges of different phases. As a result, the current used to drive the pixel 31 is distributed throughout the entire pixel array 32. Therefore, the reduction of IR voltage drop can be prevented, and the degradation of EMC and EMI can also be prevented.

[0137] Furthermore, based on the timing control of controller 72, the phase-shifting circuit 81 executes control to make the ratio of charge accumulation time in each phase (0°, 45°, and 90°) 1:√2:1. This allows the modulated wave of the received light to approximate a sine wave and reduces period error.

[0138] Since the integral results of each pixel arranged in block BL_X and block BL_Y are the same, the pixel data (detection signals A and B) output by each pixel does not require any special correction process, such as a correction process to eliminate offsets in the plane (region) of pixel array 32.

[0139] Therefore, by using the ranging sensor 13, driving can be performed to simultaneously reduce periodic errors and disperse driving current. Furthermore, pixel data (detection signals A and B) similar to those obtained without performing any phase shift can be acquired.

[0140] <An example with a phase control segmentation number of 3>

[0141] exist Figures 7 to 10 In the example shown, all pixels in pixel array 32 are divided into two blocks, BL_X and BL_Y, as phase control unit blocks. However, pixels can also be divided into three or more phase control unit blocks.

[0142] Figure 11 When the phase control unit is divided into three types, and Figure 8A schematic example configuration of the corresponding pixel array 32 and drive control circuit 33.

[0143] exist Figure 11 In the pixel array 32, each of the blocks BL, which are divided into N columns, is divided into three types of blocks: BL_X, BL_Y, and BL_Z.

[0144] In this case, the drive control circuit 33 includes three phase shifting circuits 81 and three or more block drive units 82.

[0145] In the three phase-shifting circuits 81, the phase-shifting circuits 81 associated with blocks BL_X, BL_Y, and BL_Z are shown as phase-shifting circuits 81X, 81Y, and 81Z, respectively. Similarly, in the three or more block driving units 82, the block driving units 82 associated with blocks BL_X, BL_Y, and BL_Z are shown as block driving units 82X, 82Y, and 82Z, respectively.

[0146] The phase-shifting circuit 81X changes the phase of the drive pulse signal provided by the pulse generation circuit 71 according to the timing instructions of the controller 72, and provides the drive pulse signal to the block drive unit 82X. Starting from phase 0°, the phase-shifting circuit 81X shifts the phase in a predetermined time interval of 45° and 90°, and outputs the result. After the phase reaches 90°, the phase returns to phase 0°.

[0147] The phase-shifting circuit 81Y changes the phase of the drive pulse signal provided by the pulse generation circuit 71 according to the timing instructions of the controller 72, and provides the drive pulse signal to the block drive unit 82Y. According to the timing instructions of the controller 72, the phase-shifting circuit 81Y shifts the phase from 90° at predetermined time intervals in the order of 0° and 45°, and outputs the result. After 45°, the phase returns to 90°.

[0148] The phase-shifting circuit 81Z changes the phase of the drive pulse signal provided by the pulse generation circuit 71 according to the timing instructions of the controller 72, and provides the drive pulse signal to the block drive unit 82Z. Starting from phase 45°, the phase-shifting circuit 81Z shifts the phase at predetermined time intervals of 90° and 0° according to the timing instructions of the controller 72, and outputs the result. After phase 0°, the phase returns to phase 45°.

[0149] Figure 12 The phase shift control in each of blocks BL_X, BL_Y, and BL_Z is shown.

[0150] like Figure 12As shown, the drive control circuit 33 divides all pixels in the pixel array 32 into three phase control unit blocks, namely blocks BL_X, BL_Y, and BL_Z, and causes blocks BL_X, BL_Y, and BL_Z to accumulate charge in different phases. As a result, the current used to drive the pixel 31 is distributed throughout the entire pixel array 32. Therefore, the reduction of IR voltage drop can be prevented, and the degradation of EMC and EMI can also be prevented.

[0151] Furthermore, based on the timing control of controller 72, the phase-shifting circuit 81 executes control to make the ratio of charge accumulation time in each phase (0°, 45°, and 90°) 1:√2:1. This allows the modulated wave of the received light to approximate a sine wave and reduces period error.

[0152] Since the integral results of the corresponding pixels arranged in blocks BL_X, BL_Y and BL_Z are the same, the pixel data (detection signals A and B) output by the corresponding pixels do not require any special correction process, such as a correction process to eliminate offsets in the plane (region) of pixel array 32.

[0153] <Blocking Methods in Pixel Arrays>

[0154] In the above example, N (N>1) pixel columns are defined as a block BL, and the pixel array 32 is divided into multiple blocks BL in the row direction. However, the block partitioning method used to divide the pixel array 32 into multiple blocks BL is not limited to this.

[0155] Figure 13 Various examples of block partitioning methods are shown when the pixel array 32 is divided into two phase control unit blocks (block BL_X and block BL_Y).

[0156] Note that in Figure 13 In the diagram, the area marked with "X" represents block BL_X, and the area marked with "Y" represents block BL_Y.

[0157] Figure 13 B illustrates a block partitioning method that divides the pixel array 32 into multiple blocks BL in the row direction, where N pixel columns form one block BL, which is the same as in the example above.

[0158] Figure 13 A illustrates a block partitioning method that divides the pixel array 32 into multiple blocks BL in the row direction (horizontal direction), where one pixel column is one block BL.

[0159] Figure 13C shows a block division method of dividing the pixel array 32 into two blocks BL in the north-south direction, where the vertical direction of the rectangular area of the entire pixel array 32 is defined as the north-south direction, and the horizontal direction is defined as the east-west direction. When the blocks BL_X and BL_Y are divided into two and arranged in the north-south direction, the phase shift circuit 81 and the block driving unit 82 can also be dispersedly arranged according to the blocks BL to be controlled. For example, the phase shift circuit 81X and the block driving unit 82X for controlling the pixels 31 in the block BL_X on the north side ( Figure 13 the upper side in C) of the pixel array 32 can be arranged on the north side of the pixel array 32, and the phase shift circuit 81Y and the block driving unit 82Y for controlling the pixels 31 in the block BL_Y on the south side ( Figure 13 the lower side in C) of the pixel array 32 can be arranged on the south side of the pixel array 32.

[0160] Figure 13 E shows a block division method of dividing the pixel array into blocks BL_X and BL_Y and arranging them alternately in the horizontal and vertical directions in a checkerboard pattern. Each block BL is an area where N pixels are formed in each of the horizontal and vertical directions.

[0161] Figure 13 D shows a block division method of dividing the pixel array into blocks BL_X and BL_Y and arranging them alternately in the horizontal and vertical directions in a checkerboard pattern. Each block BL is an area where one pixel is formed.

[0162] Figure 13 F shows a block division method of dividing the rectangular area of the entire pixel array 32 into two blocks BL in each of the east-west direction and the north-south direction. In this case, the entire pixel array 32 is divided into four (2×2) blocks BL, and the blocks BL_X and BL_Y are arranged in a checkerboard pattern. The phase shift circuit 81 and the block driving unit 82 can be separately arranged at two positions along the north-south direction of the pixel array 32 as in Figure 13 C, or can be separately arranged at four positions along the east-west direction and the north-south direction. Of course, they can also be aggregated at a position in one of the east-west direction and the north-south direction as in Figure 7 .

[0163] <IQ splicing detection>

[0164] The above-mentioned multiple phase shift circuits 81 and multiple block driving units 82 perform phase shifts for conversion to a pseudo-sine wave, and drive the timing dispersedly block by block to produce effects such as generating a dispersedly driven current and reducing the cycle error.

[0165] However, in order to output a depth map, the ranging sensor 13 requires four frames according to the 4-phase method and two frames according to the 2-phase method. An increase in the number of pixels in the ranging sensor 13 may cause a decrease in the frame rate.

[0166] Now for reference Figure 14 This describes the driver that outputs a depth map for a frame using a modified 2-phase method.

[0167] Using the two-phase method, in the first frame, the first tap 52A of each pixel 31 acquires a detection signal with a phase of 0°, and the second tap 52B acquires a detection signal with a phase of 180°, as shown below. Figure 14 As shown on the left. Next, in the second frame, the first tap 52A of each pixel 31 acquires a detection signal with a phase of 90°, and the second tap 52B acquires a detection signal with a phase of 270°. Then, I and Q in equation (4) and the depth value d in equation (1) are calculated using the four detection signals from the first and second frames.

[0168] In the case where the pixel data of each pixel 31 obtained in the first frame is called I-pixel data relative to the in-phase component of the light modulation wave, and the pixel data of each pixel 31 obtained in the second frame is called Q-pixel data relative to the quadrature phase component of the light modulation wave, the 2-phase method is a method of obtaining I-pixel data of all pixels in the first frame and Q-pixel data of all pixels in the second frame.

[0169] On the other hand, such as Figure 14 As shown on the right, pixels 31 used to acquire I-pixel data (hereinafter referred to as I-pixels) and pixels 31 used to acquire Q-pixels (hereinafter referred to as Q-pixels) coexist, thereby acquiring detection signals of all phases 0°, 90°, 180°, and 270° relative to the light modulation wave in a single frame. This allows the calculation of I and Q in equation (4), thus obtaining the depth value d. The drive that allows I-pixels and Q-pixels to coexist in a single frame in this manner is called IQ stitching drive.

[0170] Note that in Figure 14 In the IQ stitching driver shown, the characteristic variations between taps in each pixel cannot be eliminated, as in the example above using the 2-phase method.

[0171] While prioritizing the elimination of characteristic variations between taps present in each pixel, the drive control circuit 33 performs a similar operation in the first frame. Figure 14 The IQ stitching driver is executed in one frame, and in the second frame, the phase of the first tap 52A and the second tap 52B of each pixel 31 is reversed relative to the first frame, as shown in the example. Figure 15As shown. In this case, the difference between detection signals of opposite phases in the same pixel is calculated using pixel data from the first and second frames. In this way, characteristic variations between taps present in each pixel can be eliminated, just as in the 4-phase method described above, and the depth value d can be obtained with fewer frames than in the 4-phase method.

[0172] Note that in IQ stitching driver, I pixels and Q pixels are... Figure 14 and Figure 15 The example shown is arranged based on pixel columns. However, the arrangement of I-pixels and Q-pixels is not limited to this example. For example, as... Figure 16 As shown, I pixels and Q pixels can be arranged alternately in a grid pattern in both the horizontal and vertical directions.

[0173] The aforementioned IQ splicing driver can be used as a countermeasure against the decrease in frame rate caused by the increase in the number of pixels in pixel array 32.

[0174] Moreover, by combining IQ splicing drive, performing phase shifts for conversion to pseudosine through multiple phase shift circuits 81 and multiple block drive units 82, and dispersing the drive timing for each block BL, the effects of reducing frame rate and dispersing drive current and reducing cycle error can be achieved simultaneously.

[0175] <An example of IQ splicing drive with a phase control segmentation number of 4>

[0176] In the IQ stitching driver described below, all pixels in the pixel array 32 are divided into four phase control unit blocks. I pixels and Q pixels are arranged based on pixel columns, such as... Figure 14 As shown.

[0177] Figure 17 This is a schematic example configuration diagram of pixel array 32 and drive control circuit 33 when pixel array 32 is divided into four phase control unit blocks and IQ splicing drive is performed.

[0178] Each of the blocks BL, which are divided into N columns of units in the pixel array 32, is further divided into four types of blocks: BL_XI, BL_YI, BL_XQ, and BL_YQ. Blocks BL_XI and BL_YI are blocks of BL that include pixels 31 to be driven as I pixels, and blocks BL_XQ and BL_YQ are blocks of BL that include pixels 31 to be driven as Q pixels.

[0179] The drive control circuit 33 includes four phase shifting circuits 81 and four or more block drive units 82.

[0180] In the four phase-shifting circuits 81, the phase-shifting circuits 81 associated with blocks BL_XI, BL_YI, BL_XQ, and BL_YQ are shown as phase-shifting circuits 81XI, 81YI, 81XQ, and 81YQ, respectively. Similarly, in the four or more block driving units 82, the block driving units 82 associated with blocks BL_XI, BL_YI, BL_XQ, and BL_YQ are shown as block driving units 82XI, 82YI, 82XQ, and 82YQ, respectively.

[0181] Figure 18 The phase shift control in each of blocks BL_XI, BL_YI, BL_XQ, and BL_YQ is shown.

[0182] The ratio of charge accumulation time in the phases of each pixel 31 at 0°, 45°, and 90° is 1:√2 (≈1.4):1, as in the example above. When the phase of pixel I is 0°, 45°, or 90°, the phase of pixel Q is 90°, 135°, or 180°, respectively, and the phases of pixel I and pixel Q are orthogonal.

[0183] from Figure 18 As can be seen, when the phase shifts used for conversion to pseudosine waves are 0°, 45°, and 90° (90°, 135°, and 180° in Q pixels), and the ratio of charge accumulation time in each phase (0°, 45°, and 90°) is 1:√2 (≈1.4):1, the phases of the two blocks BL are the same during the time period shown by the dashed line. In other words, although the phases of each block BL differ except for the time period shown by the dashed line, the phases cannot be completely dispersed, therefore the phases of each block BL are different throughout the entire frame period.

[0184] Therefore, the drive control circuit 33 executes... Figure 19 The phase shift control shown makes the phase of each phase control unit block completely different throughout the entire frame period.

[0185] Figure 19 A schematic diagram of an example of phase shift control driven by IQ splicing, wherein the pixel array 32 is divided into 4 phase control unit blocks, each with a completely different phase.

[0186] The drive control circuit 33 sets five phase shifts for conversion to pseudo-sine waves in 22.5° increments: 0°, 22.5°, 45°, 67.5°, and 90° (90°, 112.5°, 135°, 157.5°, and 180° in Q pixels), and sets the ratio of charge accumulation time in each phase (0°, 22.5°, 45°, 67.5°, and 90°) to 1:2.6092:3.4071:2.6061:0.9964. Phase shift control is performed under this arrangement.

[0187] When such control is executed, the phase of each phase control unit block can be in a different state at any given time period. For example, during time period 101, as shown by the dashed line, blocks BL_XI, BL_YI, BL_XQ, and BL_YQ are controlled at phases of 0°, 45°, 90°, and 135°, respectively. During time period 102, as shown by the dashed line, these blocks are controlled at phases of 45°, 90°, 135°, and 180°, respectively.

[0188] Figure 20 The period error in the exposure control of rectangular pulses and Figure 19 The diagram shows a comparison of the periodic error in exposure control converted to a pseudosine.

[0189] Figure 20 A is a period error (CE) plot in the exposure control of a rectangular pulse with a duty cycle of 50%, where the proportion of "high" time is 50%.

[0190] Figure 20 B is a period error (CE) plot in the exposure control of a rectangular pulse with a duty cycle of 33%, where the proportion of "high" time is 33%.

[0191] Figure 20 C is Figure 19 The diagram shown is a period error (CE) plot in exposure control converted to a pseudosine.

[0192] exist Figure 20 In each of A, B, and C, the left-hand plot shows the integral waveform when integrating within one frame period, and the right-hand plot shows the period error of the FFT at each frequency (horizontal axis) (vertical axis).

[0193] In exposure control converted to pseudosine, such as Figure 20 As shown in C, at frequencies other than the modulation frequency used as the light source (200 MHz), the period error is almost zero. In the FFT result plot, the integer values ​​on the horizontal axis multiplied by 100 correspond to the frequencies. On the other hand, in Figure 20 In the exposure control of the rectangular pulses shown in A and B, a periodic error occurs at every frequency except for 200MHz, which is the modulation frequency of the light source. In particular, the periodic error increases at every integer multiple of 200MHz.

[0194] As described above, through Figure 19 The exposure control shown is converted to a pseudosine wave, which can completely disperse the driving timing and almost completely eliminate periodic errors.

[0195] Figures 21 to 23 Other example combinations of phase shifts used for conversion to pseudosine are shown.

[0196] Figure 21 Figures A through C show the results of the periodic error analysis without performing any phase shifts for conversion to a pseudosine.

[0197] Figure 21 Figure A shows the results of periodic error analysis in the exposure control of a rectangular pulse with a duty cycle of 50%, where the proportion of high time is 50%. Figure 21 Figure B shows the results of periodic error analysis in the exposure control of a rectangular pulse with a duty cycle of 33%, where the proportion of high time is 33%. Figure 21 C shows the results of the periodic error analysis in the exposure control of a rectangular pulse with a duty cycle of 25%, where the proportion of high time is 25%.

[0198] Figure 22 Figure A shows the results of a periodic error analysis performed in exposure control under the following conditions: using a rectangular pulse with a duty cycle of 25%, the ratio of charge accumulation time in each phase of 0°, 45° and 90° (90°, 135° and 180° in Q pixels) is 1:1:1.

[0199] Figure 22 B shows the results of a periodic error analysis in exposure control performed under the following conditions: using a rectangular pulse with a duty cycle of 25%, the ratio of charge accumulation time in each phase of 0°, 45° and 90° (90°, 135° and 180° in Q pixels) is 1:√2 (≈1.4):1.

[0200] Figure 22 C shows the results of periodic error analysis in exposure control performed under the following conditions: using a rectangular pulse with a duty cycle of 33%, the ratio of charge accumulation time in each phase of 0°, 30° and 60° (90°, 90° and 150° in Q pixels) is 1:√3 (≈1.73):1.

[0201] Figure 23 Figure A shows the results of a periodic error analysis in exposure control performed under the following conditions: using a rectangular pulse with a duty cycle of 25%, the ratio of charge accumulation time in each phase of 0°, 30°, 45°, 60° and 90° (90°, 120°, 135°, 150° and 180° in Q pixels) is 1:1:1:1:1.

[0202] Figure 23 Figure B shows the results of a periodic error analysis in exposure control performed under the following conditions: using a rectangular pulse with a duty cycle of 50%, the ratio of charge accumulation time in each phase of 0°, 30°, 45°, 60° and 90° (90°, 120°, 135°, 150° and 180° in Q pixels) is 1:1:1:1:1.

[0203] Figure 23 C shows the results of periodic error analysis in exposure control performed under the following conditions: using a rectangular pulse with a duty cycle of 33%, the ratio of charge accumulation time in each phase of 0°, 22.5°, 45°, 67.5° and 90° (90°, 112.5°, 135°, 157.5° and 180° in Q pixels) is 1:1:1:1:1.

[0204] The ratio of charge accumulation time in each of the multiple phases can be the same, such as... Figure 23 The values ​​shown in A through C can also be different, such as... Figure 22 As shown in B and C. The number of phase shifts within a frame period can be multiple, but is preferably three or more.

[0205] use Figure 22 A to Figure 23 The various combinations of phase shifts shown in C for converting to a pseudosine wave can achieve a period error of at least less than [value missing] without phase shift. Figure 21 The periodic error in the exposure control of the rectangular pulses shown in A to C.

[0206] exist Figure 22 A to Figure 23 In the phase shift combination shown by C, Figure 23 The phase shift combination shown in C can almost completely eliminate periodic errors.

[0207] Figure 24 This is a schematic diagram of a phase shift control example driven by IQ splicing, in which the pixel array 32 is divided into 6 phase control unit blocks, and the phase of each phase control unit block is completely different.

[0208] exist Figure 24 In the phase shift control shown, the pixel array 32 is divided into six phase control unit blocks: blocks BL_XI, BL_YI, BL_ZI, BL_XQ, BL_YQ, and BL_ZQ. Blocks BL_XI, BL_YI, and BL_ZI are blocks BL that include pixels 31 to be driven as I pixels, and blocks BL_XQ, BL_YQ, and BL_ZQ are blocks BL that include pixels 31 to be driven as Q pixels.

[0209] Furthermore, in Figure 24 The phase shift control shown employs... Figure 23 The phase shift combination shown in C.

[0210] That is, the drive control circuit 33 sets the five phase shifts used for conversion to pseudosine waves to 0°, 22.5°, 45°, 67.5°, and 90° (90°, 112.5°, 135°, 157.5°, and 180° in Q pixels), and sets the ratio of charge accumulation time for each phase of 0°, 22.5°, 45°, 67.5°, and 90° to 1:1:1:1:1. In this arrangement, phase shift control is performed.

[0211] Through such phase shift control, periodic errors can be almost completely eliminated, such as Figure 23 As shown in C.

[0212] As described above, by using the optical receiving unit 15 of this disclosure, multiple phases are switched in a time-division manner within one frame period to convert the modulated light into a pseudo-sine wave (converted to a pseudo-sine wave). This reduces period error.

[0213] The optical receiving unit 15 further divides the pixel array 32 into multiple phase control unit blocks and controls these multiple phase control unit blocks to ensure that the shift amounts used for converting to a pseudo-sine wave are as different as possible. This disperses the drive current and prevents EMC and EMI degradation.

[0214] Since the phase shift is performed so that the integration results at each pixel in the multiple phase control unit blocks become the same, the pixel data output by each pixel 31 does not need to undergo any special correction process, such as a correction process to eliminate offsets in the plane (region) of the pixel array 32.

[0215] <5. Example Chip Configuration of Ranging Sensor>

[0216] Figure 25 This is a perspective view of an example chip configuration for the ranging sensor 13.

[0217] For example, such as Figure 25 As shown in A, the ranging sensor 13 can be formed from a single chip, wherein sensor die 151 and logic die 152 are stacked as multiple dies (substrates).

[0218] A sensor unit 161 (as a circuit for a sensor unit) is formed in the sensor die 151, and a logic unit 162 is formed in the logic die 152.

[0219] For example, in sensor unit 161, pixel array 32 and drive control circuit 33 are formed. For example, in logic unit 162, pulse generation circuit 71, controller 72, AD conversion unit that performs AD conversion on the detection signal, signal processing unit 16, input / output terminals, etc. are formed.

[0220] Furthermore, the ranging sensor 13 can be formed of three layers, in which, in addition to the sensor die 151 and the logic die 152, another logic die is stacked. Of course, it can also be formed by stacking four or more dies (substrates).

[0221] Alternatively, for example, such as Figure 25 As shown in B, the ranging sensor 13 can be formed by a first chip 171, a second chip 172, and a relay substrate (intermediate plate) 173 on which these chips are placed.

[0222] For example, in the first chip 171, a pixel array 32 and a drive control circuit 33 are formed. In the second chip 172, a pulse generation circuit 71, a controller 72, an AD conversion unit that performs AD conversion on the detection signal, a signal processing unit 16, etc. are formed.

[0223] Note that the above Figure 25 The circuit layout of sensor die 151 and logic die 152 in A and Figure 25 The circuit layout of the first chip 171 and the second chip 172 in B is merely an example, and the circuit layout is not limited thereto. For example, the signal processing unit 16 that performs processes such as depth map generation can be located outside the ranging sensor 13 (or in some other chip).

[0224] <6. Example Configuration of Electronic Devices>

[0225] The aforementioned ranging module 11 can be installed in electronic devices such as smartphones, tablets, mobile phones, personal computers, game consoles, television receivers, wearable terminals, digital cameras, or digital camcorders.

[0226] Figure 26 This is a block diagram illustrating an example configuration of a smartphone as an electronic device equipped with a ranging module.

[0227] like Figure 26 As shown, the smartphone 201 includes a ranging module 202, an imaging device 203, a display 204, a speaker 205, a microphone 206, a communication module 207, a sensor unit 208, a touch panel 209, and a control unit 210, all connected via a bus 211. Furthermore, in the control unit 210, the CPU executes programs to perform the functions of an application processing unit 221 and an operating system processing unit 222.

[0228] Figure 1 The ranging module 11 is applied to the ranging module 202. For example, the ranging module 202 is disposed on the front of the smartphone 201 to perform ranging for the user of the smartphone 201, and outputs the depth value of the surface shape of the user's face, hand, fingers, etc. as the measurement result.

[0229] Imaging device 203 is disposed on the front of smartphone 201 and acquires an image of the user by imaging the user, which is the smartphone 201 as an object. Note that although not shown in the accompanying drawings, imaging device 203 may also be disposed on the back of smartphone 201.

[0230] The display 204 displays an operation screen for processing by the application processing unit 221 and the operating system processing unit 222, images captured by the imaging device 203, and the like. For example, when making a voice call with the smartphone 201, the speaker 205 and microphone 206 output the voice from the other end and capture the user's voice.

[0231] The communication module 207 communicates via a communication network. The sensor unit 208 senses speed, acceleration, proximity, etc., and the touch panel 209 acquires touch operations performed by the user on the operation screen displayed on the monitor 204.

[0232] Application processing unit 221 performs processing for providing various services via smartphone 201. For example, application processing unit 221 may perform a process of creating a face using computer graphics that virtually reproduces the user's facial expressions and displaying the face on display 204, based on the depth provided by ranging module 202. Application processing unit 221 may also perform a process of creating three-dimensional shape data of a three-dimensional object, for example, based on the depth provided by ranging module 202.

[0233] The operating system processing unit 222 executes processes to implement the basic functions and operations of the smartphone 201. For example, the operating system processing unit 222 may execute a process of authenticating the user's face based on the depth value provided by the ranging module 202 and unlocking the smartphone 201. Further, for example, the operating system processing unit 222 executes a process of recognizing the user's gestures based on the depth value provided by the ranging module 202, and then executes a process of inputting various operations based on the gestures.

[0234] For example, in the smartphone 201 designed as described above, the use of the ranging module 11 enables the generation of depth maps with high accuracy and high speed. With this arrangement, the smartphone 201 can detect ranging information more accurately.

[0235] <7. Example Applications of Moving Structures>

[0236] The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein can be embodied in devices mounted on any type of mobile structure, such as automobiles, electric vehicles, hybrid vehicles, motorcycles, bicycles, personal mobile devices, aircraft, drones, ships, or robots.

[0237] Figure 27This is a block diagram illustrating a schematic example configuration of a vehicle control system, which is an example of a mobile structure control system to which the technology according to this disclosure can be applied.

[0238] The vehicle control system 12000 includes multiple electronic control units connected via a communication network 12001. Figure 27 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an onboard information detection unit 12040, and a general control unit 12050. Further, a microcomputer 12051, an audio / image output unit 12052, and an onboard network interface (I / F) 12053 are shown as functional components of the general control unit 12050.

[0239] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 controls devices such as drive force generating devices (e.g., internal combustion engines or drive motors) that generate vehicle driving force, drive force transmission mechanisms that transmit driving force to the wheels, steering mechanisms that adjust the vehicle's steering angle, and braking devices that generate vehicle braking force.

[0240] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for keyless entry systems, smart key systems, power windows, or various vehicle lights (such as headlights, reversing lights, brake lights, turn signals, fog lights, etc.). In this case, the body system control unit 12020 can receive radio waves or various switch signals sent by portable devices that replace keys. The body system control unit 12020 receives these radio wave or signal inputs and controls the vehicle's door locking devices, power windows, lights, etc.

[0241] The external information detection unit 12030 detects external information of the vehicle equipped with the vehicle control system 12000. For example, the imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the exterior of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 can perform object detection processes for detecting people, vehicles, obstacles, signs, characters on the road surface, etc., or perform distance detection processes.

[0242] Imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. Imaging unit 12031 can output an electrical signal as an image or as ranging information. Furthermore, the light received by imaging unit 12031 can be visible light or invisible light such as infrared light.

[0243] The vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detector 12041, which detects the driver's state, is connected to the vehicle information detection unit 12040. The driver state detector 12041 includes, for example, a camera that captures an image of the driver. Based on the detection information input from the driver state detector 12041, the vehicle information detection unit 12040 can calculate the driver's fatigue level or concentration level, or determine whether the driver is dozing off.

[0244] Based on external / internal information acquired by the external information detection unit 12030 or the vehicle information detection unit 12040, the microcomputer 12051 can calculate the control target values ​​for the drive force generating device, steering mechanism, or braking device, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control to realize the functions of an advanced driver assistance system (ADAS), including active collision avoidance or impact buffering, following the vehicle based on distance, maintaining vehicle speed, collision warning, lane departure warning, etc.

[0245] In addition, the microcomputer 12051 can also control the drive force generating device, steering mechanism, braking device, etc., based on information about the vehicle's surroundings, information obtained by the external information detection unit 12030 or the vehicle information detection unit 12040 to perform coordinated control for autonomous driving and other autonomous driving without relying on the driver's operation.

[0246] The microcomputer 12051 can also output control commands to the vehicle system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 controls the headlights based on the position of the vehicle in front or oncoming vehicles detected by the external information detection unit 12030, and performs coordinated control, such as switching from high beams to high beams to achieve an anti-glare effect.

[0247] The audio / image output unit 12052 sends audio output signals and / or image output signals to an output device capable of visually or audibly notifying passengers or the outside of the vehicle of information. Figure 27 In the example shown, speaker 12061, display unit 12062, and instrument panel 12063 are shown as output devices. For example, display unit 12062 may include an in-vehicle display and / or a head-up display.

[0248] Figure 28 This is a schematic diagram of an example of the mounting position of the imaging unit 12031.

[0249] exist Figure 28 In the vehicle 12100, imaging units 12101, 12102, 12103, 12104 and 12105 are included as imaging units 12031.

[0250] For example, imaging units 12101, 12102, 12103, 12104, and 12105 are located at the following positions: the front edge of vehicle 12100, side mirrors, rear bumper, rear door, and the upper part of the windshield inside the vehicle. Imaging unit 12101, located at the front edge, and imaging unit 12105, located on the upper part of the windshield inside the vehicle, primarily capture images of the front of vehicle 12100. Imaging units 12102 and 12103, located on the side mirrors, primarily capture images of the sides of vehicle 12100. Imaging unit 12104, located on the rear bumper or rear door, primarily captures images of the rear of vehicle 12100. The front images acquired by imaging units 12101 and 12105 are mainly used to detect vehicles, pedestrians, obstacles, traffic signals, traffic signs, lanes, etc., traveling in front of vehicle 12100.

[0251] Notice, Figure 28 An example of the imaging range of imaging units 12101 to 12104 is shown. Imaging range 12111 indicates the imaging range of imaging unit 12101 located at the front edge, imaging ranges 12112 and 12113 indicate the imaging range of imaging units 12102 and 12103 located on the respective side mirrors, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or rear door. For example, by superimposing the image data captured by imaging units 12101 to 12104, a top view of the vehicle 12100 viewed from above can be obtained.

[0252] At least one of the imaging units 12101 to 12104 may have the function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0253] For example, based on the distance information obtained by the self-imaging units 12101 to 12104, the microcomputer 12051 calculates the distance to each three-dimensional object within the imaging range 12111 to 12114, as well as the temporal change of the distance (relative to the speed of the vehicle 12100). Thus, a three-dimensional object that is the closest to the vehicle 12100 on its travel path and is traveling at a predetermined speed (e.g., 0 km / h or higher) in substantially the same direction as the vehicle 12100 can be extracted as a vehicle traveling in front of the vehicle 12100. Furthermore, the microcomputer 12051 can pre-set the distance to be maintained in front of the vehicle traveling in front of the vehicle 12100, and can perform automatic braking control (including stop-follow control), automatic acceleration control (including start-follow control), etc. In this way, cooperative control can be performed for autonomous driving, etc., so that the vehicle can drive autonomously without relying on driver operation.

[0254] For example, based on the distance information obtained by the self-imaging units 12101 to 12104, the microcomputer 12051 can extract three-dimensional object data for three-dimensional objects in categories such as two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, and utility poles, and use the three-dimensional object data for automatic obstacle avoidance. For example, the microcomputer 12051 classifies obstacles near the vehicle 12100 into obstacles visible to the driver of the vehicle 12100 and obstacles that are difficult for the driver to visually identify. Then, the microcomputer 12051 determines the collision risk, indicating the risk of collision with each obstacle. If the collision risk is equal to or higher than a set value, and there is a possibility of collision, the microcomputer 12051 can output a warning to the driver through the speaker 12061 and the display unit 12062, or can provide driving support to avoid collision by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0255] At least one of the imaging units 12101 to 12104 can be an infrared camera that detects infrared light. For example, the microcomputer 12051 can identify a pedestrian by determining whether a pedestrian is present in the images captured by the imaging units 12101 to 12104. This pedestrian recognition is performed through a process of extracting feature points from the images captured by the imaging units 12101 to 12104, which act as infrared cameras, and a process of pattern matching of a series of feature points indicating the outline of an object to determine whether a pedestrian is present. If the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 to display a rectangular outline, emphasizing the identified pedestrian in an overlapping manner. Furthermore, the sound / image output unit 12052 can also control the display unit 12062 to display icons or similar indicators of pedestrians at desired locations.

[0256] Examples of vehicle control systems that can be applied according to the technology of this disclosure have been described above. The technology of this disclosure can be applied to the external information detection unit 12030 and the vehicle information detection unit 12040 in the aforementioned components. Specifically, the ranging module 11 is used by both the external information detection unit 12030 and the vehicle information detection unit 12040 to perform the process of recognizing driver gestures. Thus, various systems (e.g., audio systems, navigation systems, and air conditioning systems) can be operated based on gestures, and the driver's state can be detected more accurately. Furthermore, the ranging module 11 can be used to identify road surface irregularities and cause the suspension control to reflect this identification.

[0257] Note that this technology can be applied to methods that perform amplitude modulation on light projected onto an object. This method is called the continuous wave method in indirect ToF methods. Furthermore, the structure of the photodiode 51 in the light receiving unit 15 can be applied to a ranging sensor with a structure in which charge is distributed to two charge storage sections, such as a ranging sensor with a current-assisted photonic demodulator (CAPD) structure, or a grid ranging sensor that alternately applies pulses of charge from the photodiode to two gates.

[0258] Furthermore, in the case described in the above embodiments, pixel 31 is a 2-tap structure that distributes the charge generated by photodiode 51 to two taps (first tap 52A and second tap 52B). However, this technique can also be applied to pixel structures with other numbers of taps, such as a 1-tap structure or a 4-tap structure.

[0259] The embodiments of this technology are not limited to the above embodiments, and various modifications can be made to them without departing from the scope of this technology.

[0260] Provided there are no contradictions, the various techniques described in this specification can be implemented independently of each other. Of course, combinations of some of the various techniques can also be implemented. For example, some or all of the techniques described in one embodiment can be combined with some or all of the techniques described in another embodiment. Furthermore, some or all of the aforementioned techniques can be combined with other techniques not described above.

[0261] Furthermore, for example, any configuration described above as a single device (or processing unit) can be divided into multiple devices (or processing units). Conversely, any configuration described above as multiple devices (or processing units) can be combined into a single device (or processing unit). Moreover, it is of course possible to add components other than those described above to the configuration of each device (or processing unit). Further, as long as the overall system configuration and function remain substantially the same, some components of a device (or processing unit) can be incorporated into the configuration of another device (or processing unit).

[0262] Furthermore, in this specification, a system refers to an assembly of multiple components (devices, modules (parts), etc.), and not all components need to be housed in the same enclosure. Therefore, multiple devices housed in different enclosures and interconnected via a network form a system, and a device having multiple modules housed in one enclosure is also a system.

[0263] Note that the beneficial effects described in this specification are merely examples, and the beneficial effects of this technology are not limited thereto, and may also include effects other than those described in this specification.

[0264] Note that this technology can also be implemented in the configurations described below. (1)

[0266] A ranging sensor, comprising:

[0267] A phase-shifting circuit generates a phase-shifted drive pulse signal by shifting a drive pulse signal by multiple phases in a time-division manner within a frame period. The drive pulse signal is generated in response to a light emission control signal indicating the illumination timing of a light source.

[0268] A pixel that accumulates charge based on the phase-shifted drive pulse signal and outputs a detection signal corresponding to the accumulated charge, the charge being obtained by photoelectric conversion of reflected light from a predetermined object reflecting light emitted by the light source. (2)

[0270] According to the ranging sensor described in (1), wherein,

[0271] The phase-shifting circuit shifts the driving pulse signal to a first phase in a first timing sequence within a frame period, and shifts the driving pulse signal to a second phase in a second timing sequence. (3)

[0273] According to the ranging sensor described in (1) or (2), wherein,

[0274] The first time period for generating the phase-shifted drive pulse signal that shifts the first phase is different from the second time period for generating the phase-shifted drive pulse signal that shifts the second phase. (4)

[0276] According to any one of (1) to (3), the ranging sensor, wherein,

[0277] The phase-shifting circuit generates a phase-shifted drive pulse signal that shifts three or more phases in a time-division manner within one frame period. (5)

[0279] The ranging sensor according to any one of (1) to (4) further includes:

[0280] A pixel array in which the pixels are arranged in a two-dimensional matrix.

[0281] The pixels include:

[0282] A photoelectric conversion unit that performs photoelectric conversion on reflected light;

[0283] The first charge storage unit that accumulates charge based on the phase-shifted driving pulse signal; and

[0284] A second charge storage unit is based on the signal accumulation charge obtained by reversing the phase of the driving pulse signal after phase shift. (6)

[0286] The ranging sensor according to (5) includes:

[0287] At least two phase-shifting circuits, including a first phase-shifting circuit and a second phase-shifting circuit,

[0288] The first phase-shifting circuit generates the phase-shifted drive pulse signal to provide to the pixels in the first region of the pixel array.

[0289] The second phase-shifting circuit generates the phase-shifted drive pulse signal to provide to pixels in a second region that is different from the first region of the pixel array. (7)

[0291] According to the ranging sensor described in (6), wherein,

[0292] The phase shifted by the first phase shifting circuit and the phase shifted by the second phase shifting circuit are different from each other at least for a portion of the frame period. (8)

[0294] According to the ranging sensor described in (6), wherein,

[0295] The phase shifted by the first phase shifting circuit and the phase shifted by the second phase shifting circuit are different from each other throughout a whole frame period. (9)

[0297] The ranging sensor according to any one of (6) to (8), wherein,

[0298] Each of the first region and the second region includes at least one column of pixels. (10)

[0300] The ranging sensor according to any one of (6) to (9), wherein,

[0301] Each of the first region and the second region includes multiple columns of pixels. (11)

[0303] According to the ranging sensor described in (6), wherein,

[0304] The first region and the second region are arranged to divide the pixel array along the vertical direction. (12)

[0306] According to the ranging sensor described in (6), wherein,

[0307] The first region and the second region are arranged in a grid pattern. (13)

[0309] The ranging sensor according to any one of (6) to (12), wherein,

[0310] The phase shifted by the first phase shifting circuit is orthogonal to the phase shifted by the second phase shifting circuit. (14)

[0312] The ranging sensor according to any one of (1) to (13) further includes:

[0313] A pulse generation circuit generates a driving pulse signal based on the light emission control signal and provides the driving pulse signal to the phase shifting circuit. (15)

[0315] The ranging sensor according to any one of (1) to (14) further includes:

[0316] A control circuit that controls the phase-shifting circuit to change the timing of the phase of the phase-shifted drive pulse signal. (16)

[0318] The ranging sensor according to any one of (1) to (15) further includes:

[0319] A light-emitting control unit generates the light-emitting control signal and provides the light-emitting control signal to the light source. (17)

[0321] According to any one of (1) to (16), the ranging sensor,

[0322] It is formed from a single chip, in which multiple dies are stacked. (18)

[0324] A method for driving a ranging sensor, the ranging sensor including a phase-shifting circuit and pixels, the method comprising:

[0325] A phase-shifted drive pulse signal is generated by shifting the phase of a drive pulse signal, the drive pulse signal being generated according to a light emission control signal indicating the irradiation timing of a light source; the phase-shifting circuit generates the phase-shifted drive pulse signal; and

[0326] The pixel accumulates charge based on the phase-shifted driving pulse signal and outputs a detection signal corresponding to the accumulated charge. The charge is obtained by photoelectric conversion of reflected light reflected by a predetermined object that reflects light emitted by the light source. The pixel accumulates the charge and outputs the detection signal. (19)

[0328] A ranging module, comprising:

[0329] A light source that emits light onto a predetermined object according to the irradiation timing of a light emission control signal; and

[0330] A ranging sensor that receives reflected light from a predetermined object that reflects light emitted by the light source.

[0331] The ranging sensor includes:

[0332] A phase-shifting circuit generates a phase-shifted driving pulse signal by shifting the phase of a driving pulse signal generated in response to the light-emitting control signal; and

[0333] A pixel accumulates charge based on the phase-shifted driving pulse signal and outputs a detection signal corresponding to the accumulated charge, wherein the charge is obtained by photoelectric conversion of the reflected light.

[0334] Reference number list

[0335] 11 Distance Measurement Module

[0336] 12 light-emitting units

[0337] 13 Distance sensor

[0338] 14 Lighting Control Unit

[0339] 15 Optical receiving units

[0340] 16 Signal Processing Units

[0341] 31 pixels

[0342] 32-pixel array

[0343] 33 Drive control circuit

[0344] 52A First Tap

[0345] 52B Second Tap

[0346] 71 Pulse Generation Circuit

[0347] 72 Controller

[0348] 81 Phase Shifting Circuit

[0349] 82 drive units

[0350] BL block

[0351] 201 Smartphones

[0352] 202 Distance measuring module.

Claims

1. A ranging sensor, comprising: A phase-shifting circuit generates a phase-shifted driving pulse signal by shifting the driving pulse signal by multiple phases in a time-division manner within a frame period. The driving pulse signal is generated in response to a light emission control signal that indicates the irradiation timing of the light source. and A pixel accumulates charge on the plurality of phases based on the phase-shifted driving pulse signal and outputs a detection signal corresponding to the accumulated charge, wherein the charge is obtained by photoelectric conversion of reflected light from a predetermined object reflecting light emitted by the light source; wherein, The ranging sensor also includes: A pixel array in which the pixels are arranged in a two-dimensional matrix. The pixels include: A photoelectric conversion unit that performs photoelectric conversion on the reflected light; A first charge storage unit that accumulates the charge based on the phase-shifted drive pulse signal; and A second charge storage unit that accumulates the charge based on a signal obtained by reversing the phase of the drive pulse signal after the phase shift.

2. The ranging sensor according to claim 1, wherein, The phase-shifting circuit shifts the driving pulse signal to a first phase in a first timing sequence within a frame period, and shifts the driving pulse signal to a second phase in a second timing sequence.

3. The ranging sensor according to claim 2, wherein, The first time period for generating the phase-shifted drive pulse signal that shifts the first phase is different from the second time period for generating the phase-shifted drive pulse signal that shifts the second phase.

4. The ranging sensor according to claim 1, wherein, The phase-shifting circuit generates a phase-shifted drive pulse signal that is shifted by at least three phases in a time-division manner within one frame period.

5. The ranging sensor according to claim 1, comprising: At least two phase-shifting circuits, including a first phase-shifting circuit and a second phase-shifting circuit, The first phase-shifting circuit generates the phase-shifted drive pulse signal to provide to the pixels in the first region of the pixel array. The second phase-shifting circuit generates the phase-shifted drive pulse signal to provide to the pixels in a second region that is different from the first region of the pixel array.

6. The ranging sensor according to claim 5, wherein, The phase shifted by the first phase shifting circuit and the phase shifted by the second phase shifting circuit are different from each other at least for a portion of the frame period.

7. The ranging sensor according to claim 5, wherein, The phase shifted by the first phase shifting circuit and the phase shifted by the second phase shifting circuit are different from each other throughout a whole frame period.

8. The ranging sensor according to claim 5, wherein, Each of the first region and the second region includes at least one column of pixels.

9. The ranging sensor according to claim 5, wherein, Each of the first region and the second region includes multiple columns of pixels.

10. The ranging sensor according to claim 5, wherein, The first region and the second region are arranged to divide the pixel array along the vertical direction.

11. The ranging sensor according to claim 5, wherein, The first region and the second region are arranged in a grid pattern.

12. The ranging sensor according to claim 5, wherein, The phase shifted by the first phase shifting circuit is orthogonal to the phase shifted by the second phase shifting circuit.

13. The ranging sensor according to claim 1, further comprising: A pulse generation circuit generates a driving pulse signal based on the light emission control signal and provides the driving pulse signal to the phase shifting circuit.

14. The ranging sensor according to claim 1, further comprising: A control circuit that controls the phase-shifting circuit to change the timing of the phase of the phase-shifted drive pulse signal.

15. The ranging sensor according to claim 1, further comprising: A light-emitting control unit generates the light-emitting control signal and provides the light-emitting control signal to the light source.

16. The ranging sensor according to claim 1, It is formed from a single chip, in which multiple dies are stacked.

17. A method for driving a ranging sensor, said ranging sensor being a ranging sensor according to any one of claims 1 to 16, the method comprising: A phase-shifted driving pulse signal is generated by shifting the phase of a driving pulse signal. The driving pulse signal is generated in response to a light emission control signal that indicates the irradiation timing of the light source. The phase-shifting circuit generates the phase-shifted driving pulse signal. as well as The phase charge is accumulated based on the phase-shifted driving pulse signal and a detection signal corresponding to the accumulated charge is output. The charge is obtained by photoelectric conversion of reflected light reflected by a predetermined object that reflects light emitted by the light source. The pixel accumulates the charge and outputs the detection signal. in, The charge is accumulated in the first charge storage section of the pixel based on the phase-shifted driving pulse signal; and The charge is accumulated in the second charge storage section of the pixel based on a signal obtained by reversing the phase relative to the phase-shifted drive pulse signal.

18. A ranging module, comprising: A light source that emits light onto a predetermined object according to the irradiation timing of a light emission control signal; and A ranging sensor, which is a ranging sensor according to any one of claims 1 to 16, receives reflected light reflected by the predetermined object that reflects the light emitted by the light source.

Images