Method and device for verifying register, electronic device, and storage medium

Abstract

This application relates to the field of register verification technology and discloses a method for verifying a register, including: obtaining register parameters and access rights corresponding to the register; generating a verification stimulus based on the register parameters and access rights; and verifying the register according to the verification stimulus to obtain a verification result. This method enables automatic register verification, eliminating the need for manual verification and improving register verification efficiency. This application also discloses a device, electronic device, and storage medium for register verification.

Description

Technical Field

[0001] The present application relates to the technical field of register verification, for example, to a method and device, electronic device, and storage medium for verifying a register. Background Art

[0002] As integrated circuits (ICs) scale up, each module in an IC requires a large number of registers to implement its corresponding functions. Before using an IC, each module's registers must be verified individually. In the prior art, register verification is typically performed manually by comparing module design documents to calculate which register bits can be written and read. This manual verification is inefficient when the number of registers is large. Summary of the Invention

[0003] In order to provide a basic understanding of some aspects of the disclosed embodiments, the following is a brief summary. The summary is not an extensive review, nor is it intended to identify key / critical elements or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

[0004] Embodiments of the present disclosure provide a method and apparatus, an electronic device, and a storage medium for verifying a register, so as to improve the efficiency of register verification.

[0005] In some embodiments, a method for verifying a register includes: obtaining register parameters and access rights corresponding to the register; generating a verification stimulus based on the register parameters and the access rights; and verifying the register according to the verification stimulus to obtain a verification result.

[0006] In some embodiments, a device for verifying a register includes: an acquisition module configured to obtain register parameters and access rights corresponding to the register; a generation module configured to generate a verification stimulus based on the register parameters and the access rights; and a verification module configured to verify the register according to the verification stimulus to obtain a verification result.

[0007] In some embodiments, an electronic device includes a processor and a memory storing program instructions, and the processor is configured to execute the above-mentioned method for verifying a register when running the program instructions.

[0008] In some embodiments, a storage medium stores program instructions, and when the program instructions are executed, the method for verifying a register as described above is executed.

[0009] The method and apparatus, electronic device, and storage medium for register verification provided by the embodiments of the present disclosure can achieve the following technical effects: obtaining register parameters and access rights corresponding to a register; generating a verification stimulus based on the register parameters and access rights; and verifying the register according to the verification stimulus to obtain a verification result. This allows for automatic register verification, eliminating the need for manual verification and improving register verification efficiency.

[0010] The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] One or more embodiments are exemplarily described by corresponding drawings. These exemplary descriptions and drawings do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements. The drawings do not constitute a scale limitation. In addition,

[0012] Figure 1 is a schematic diagram of a method for verifying a register provided by an embodiment of the present disclosure;

[0013] Figure 2 is a schematic diagram of another method for verifying a register provided by an embodiment of the present disclosure;

[0014] Figure 3 is a schematic diagram of another method for verifying a register provided by an embodiment of the present disclosure;

[0015] Figure 4 is a schematic diagram of a summary table provided by an embodiment of the present disclosure;

[0016] Figure 5 is a schematic diagram of a device for verifying a register provided by an embodiment of the present disclosure;

[0017] Figure 6 It is a schematic diagram of an electronic device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0018] In order to be able to understand the features and technical content of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The accompanying drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the sake of convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

[0019] In the description and claims of the embodiments of the present disclosure, as well as in the accompanying drawings, the terms "first," "second," and the like are used to distinguish similar items and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate to describe the embodiments of the present disclosure herein. In addition, the terms "including," "having," and any variations thereof are intended to cover non-exclusive inclusions.

[0020] Unless otherwise stated, the term "plurality" means two or more.

[0021] In the embodiment of the present disclosure, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B means: A or B.

[0022] The term "and / or" describes an association between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or A and B.

[0023] Combine Figure 1 As shown, an embodiment of the present disclosure provides a method for verifying a register, including:

[0024] Step S101, obtaining register parameters and access rights corresponding to the register;

[0025] Step S102, generating a verification stimulus according to register parameters and access rights;

[0026] Step S103: Verify the register according to the verification stimulus to obtain a verification result.

[0027] The register verification method provided by the embodiments of the present disclosure obtains register parameters and access rights corresponding to the register; generates a verification stimulus based on the register parameters and access rights; and verifies the register according to the verification stimulus to obtain a verification result. This allows for automatic register verification, eliminating the need for manual verification and improving register verification efficiency.

[0028] Optionally, register parameters and access permissions corresponding to the registers are obtained from the module design document.

[0029] Optionally, the register parameters include the offset address of the register, the register name, the register reset value, the bit field of the register, the name of the bit field of the register, and the read and write attributes of the bit field of the register.

[0030] In some embodiments, an integrated circuit includes several modules, each of which includes several registers. A module design document is typically prepared for the designed integrated circuit. Module design documents typically follow a fixed design document template, so all module design documents follow a unified, standardized format. Typically, a module design document includes a register list and a detailed register description list. Table 1 is an example register list. As shown in Table 1, the register named Reg1 has an offset address of 0x00, a description of status, a "read" access permission of "U," a "write" access permission of "E," a reset value of 0x00000001, and a reset domain / reset signal of app_rst_n. The register named Reg3 has an offset address of 0x08, a description of record, a "read" access permission of "U," a "write" access permission of "SE," a reset value of 0x000000ff, and a reset domain / reset signal of app_rst_n. Register Reg9 has an offset of 0x2c and a description of trim. It has a read access permission of U, a write access permission of -, a reset value of 0x00000009, and a reset domain / reset signal of sys_rst_n. U indicates that the register is readable; E indicates that the register is not writable under the E condition; and SE indicates that the register is not writable under the SE condition. Optionally, E and SE represent different access control options, referred to as E protection and SE protection, respectively. "-" indicates that the register has no access control.

[0031]

[0032] Table 1

[0033] Table 2 shows an example of a detailed description of a register named Reg1. As shown in Table 2, the bit field of Reg1 with a value of 12 corresponds to the bit field name MSK1.1, has a read / write attribute of R, and a function description of Control2. The bit field of Reg1 with a value of 8 corresponds to the bit field name MSK1.6, has a read / write attribute of R, and a function description of Control6. R indicates that the bit field's read / write attribute is readable; Control2 indicates the function corresponding to bit field 12; and Control6 indicates the function corresponding to bit field 8.

[0034] bit field Bit field name Read and write properties Functional Description 31:13 MSK1.1 R Control1 12 MSK1.2 R Control2 11 MSK1.3 R Control3 10 MSK1.4 R Control4 9 MSK1.5 R Control5 8 MSK1.6 R Control6 7 MSK1.7 R Control7 6:4 MSK1.8 R Control8 3:0 MSK1.9 R Control9

[0035] Table 2

[0036] Table 3 shows an example of a detailed description of a register named Reg2. As shown in Table 3, bit field 10 of Reg2 corresponds to the bit field name MSK2.4, the read / write attribute is RW, and the function description is Control13. RW indicates that the read / write attribute of the bit field is both readable and writable, and Control13 indicates the function corresponding to bit field 10.

[0037] bit field Bit field name Read and write properties Functional Description 31:13 MSK2.1 R Control10 12 MSK2.2 RW Control11 11 MSK2.3 RW Control12 10 MSK2.4 RW Control13 9 MSK2.5 RW Control14 8 MSK2.6 RW Control15 7 MSK2.7 RW Control16 6:4 MSK2.8 RW Control17 3:0 MSK2.9 RW Control18

[0038] Table 3

[0039] Optionally, the register is verified according to the verification stimulus to obtain a verification result, including: when the access right corresponding to the register is closed, performing reset value verification on the register to obtain a reset verification result; performing read and write verification on the register to obtain a read and write verification result; when the access right corresponding to the register is enabled, performing access right verification on the register to obtain an access right verification result. Since the chip is composed of an integrated circuit, and the integrated circuit is composed of a number of registers, different chips may have different access control rights. Under different access control rights, the access rights of the register will be different. Therefore, when the access control right of the chip is enabled, that is, when the access right corresponding to the register is enabled, it is necessary to verify whether the access right of the register is effective, that is, whether the register access right specified by the access control right of the chip is consistent with the access right of the tested register. In this way, the function of the register is verified when the access right corresponding to the register is closed or enabled, so that the register can be fully verified.

[0040] Optionally, performing reset value verification on a register to obtain a reset verification result includes: performing a first read operation on the register, the first read operation being used to obtain a first character of the register; comparing the first character with a preset reset value to obtain a first comparison result; and determining a reset verification result of the register based on the first comparison result. Thus, by comparing the first character with the preset reset value and determining the reset verification result of the register based on the first comparison result, it is possible to determine whether the reset value of the register is consistent with the reset value designed in the module design document, thereby automatically determining whether the register meets design requirements and improving the efficiency of register reset value verification.

[0041] In some embodiments, the preset reset value is a register reset value in the module design document.

[0042] Optionally, determining the reset verification result of the register based on the first comparison result includes: when the first comparison result is that the first character is consistent with the preset reset value, determining the reset verification result of the register to be the first verification result; when the first comparison result is that the first character is inconsistent with the preset reset value, determining the reset verification result of the register to be the second verification result; the first verification result is used to characterize that the reset value of the register is normal; the second verification result is used to characterize that the reset value of the register is abnormal.

[0043] Optionally, performing read / write verification on a register to obtain a read / write verification result includes: performing a first write operation on the register, the first write operation being used to write a first set character into the register; performing a second read operation on the register, the second read operation being used to obtain a second character from the register; comparing the second character with the first expected character to obtain a second comparison result; the first expected character being calculated by the register based on the read / write attributes of the register's bit field based on the first set character; and determining the read / write verification result of the register based on the second comparison result. In this way, by comparing the second character with the first expected character and determining the read / write verification result of the register based on the second comparison result, it is possible to automatically determine whether the read / write function of the register is normal, thereby improving the efficiency of verifying the read / write function of the register.

[0044] Optionally, the read-write verification result of the register is determined based on the second comparison result, including: when the second comparison result is that the second character is consistent with the first expected character, determining the read-write verification result to be a third verification result; when the second comparison result is that the second character is inconsistent with the first expected character, determining the read-write verification result to be a fourth verification result; the third verification result is used to indicate that the read-write function of the register is normal; the fourth verification result is used to indicate that the read-write function of the register is abnormal. Because, when the read-write function of the register is normal, after the first set character is written into the register, the register will calculate the first expected character based on the read-write properties of the register's bit field. Therefore, when a read operation is performed on the register, if the second character read out is consistent with the first expected character, the read-write function of the register is normal. In this way, by comparing the second character with the first expected character, it can be determined whether the read-write function of the register is normal.

[0045] Optionally, the first setting character is different from the preset reset value.

[0046] Optionally, access permission verification is performed on the register to obtain an access permission verification result, including: performing a second write operation on the register, the second write operation is used to write a second set character into the register; performing a third read operation on the register, the third read operation is used to obtain a third character from the register; comparing the third character, the second expected character and a preset reset value to obtain a third comparison result; the second expected character is obtained by calculating the second set character by the register based on the read and write properties of the register's bit field; and determining the access permission verification result of the register based on the third comparison result.

[0047] Optionally, the third character, the second expected character and the preset reset value are compared to obtain a third comparison result, including: when the third character is consistent with the second expected character, the third comparison result is that the register is readable and writable; when the third character is consistent with the preset reset value, the third comparison result is that the register is readable and not writable.

[0048] Optionally, determining the access permission verification result of the register according to the third comparison result includes: comparing the third comparison result with the access permission corresponding to the register to obtain a fourth comparison result; and determining the access permission verification result of the register according to the fourth comparison result.

[0049] Optionally, the access permission verification result of the register is determined based on the fourth comparison result, including: when the fourth comparison result is that the access permission corresponding to the register is consistent with the third comparison result, determining the access permission verification result of the register to be the fifth verification result; when the fourth comparison result is that the access permission corresponding to the register is inconsistent with the third comparison result, determining the access permission verification result of the register to be the sixth verification result; the fifth verification result is used to characterize that the access permission of the register is correct; and the sixth verification result is used to characterize that the access permission of the register is incorrect.

[0050] Optionally, the second set character is different from the preset reset value.

[0051] In some embodiments, a chip contains multiple instantiated modules, each with the same register distribution. The number of instantiated modules is accumulated and determined as the number of module instantiations. Each instantiated module has a different base address, and the registers of each instantiated module are verified sequentially based on the base address.

[0052] Optionally, after verifying the register according to the register parameters and access rights and obtaining the verification result, the method further includes: displaying the verification result to the user.

[0053] Combine Figure 2 As shown, the embodiment of the present disclosure provides another method for verifying a register, including:

[0054] Step S201, obtaining register parameters and access rights corresponding to the register;

[0055] Step S202: Generate verification incentives based on register parameters and access rights;

[0056] Step S203: Verify the register according to the verification stimulus to obtain a verification result;

[0057] Step S204: Display the verification result to the user.

[0058] The register verification method provided by the embodiments of the present disclosure obtains register parameters and access rights corresponding to the register; generates a verification stimulus based on the register parameters and access rights; verifies the register according to the verification stimulus to obtain a verification result; and displays the verification result to the user. This allows the register to be automatically verified and the verification result to be displayed to the user, allowing the user to intuitively obtain the verification result, making it easier for the user to debug the register based on the verification result, thereby improving the efficiency of register verification and debugging.

[0059] Optionally, presenting the verification result to the user includes: pushing the verification result to a preset client.

[0060] Optionally, displaying the verification result to the user includes: sending the verification result to a preset display screen, and triggering the display screen to display the verification result.

[0061] Optionally, generating a verification incentive according to register parameters and access rights includes: generating a summary table according to the register parameters and access rights; and generating a verification incentive according to the summary table.

[0062] Combine Figure 3 As shown, the embodiment of the present disclosure provides another method for verifying a register, including:

[0063] Step S301, obtaining register parameters and access rights corresponding to the register;

[0064] Step S302, generating a summary table based on register parameters and access rights;

[0065] Step S303, generating a verification incentive according to the summary table;

[0066] Step S304: Verify the register according to the verification stimulus to obtain a verification result.

[0067] The register verification method provided by the embodiments of the present disclosure obtains register parameters and access rights corresponding to the register; generates a summary table based on the register parameters and access rights; generates a verification stimulus based on the summary table; and verifies the register according to the verification stimulus to obtain a verification result. This allows for automatic register verification, eliminating the need for manual verification stimulus programming and improving register verification efficiency.

[0068] In some embodiments, a summary table is generated based on register parameters and access permissions in the following manner:

[0069] Step S11: Read the module design document, save all table contents in the module design document into a table array, and then execute step S12.

[0070] Step S12: Traverse all table contents. If unique characteristic text is read, that is, if the register list is traversed, use the variable "reglst_tab_cnt" to save the index of the register list in the table array, which is used to separate the register list from the register detailed description list. The unique characteristic text is the register parameter in the register list, and optionally consists of the register name and offset address. Then execute step S3.

[0071] Step S13: Create an Excel spreadsheet, and then execute step S14.

[0072] Step S14: According to the value of the variable "reglst_tab_cnt", locate the position corresponding to the register list in the table array, traverse each row of the register list, write each register name, offset address, "write" access permission and reset value into array row0, and convert the array row into an array of n rows and 4 columns through the array object in the numpy library, where n is the number of registers; the numpy library is a Python extension library, and Python is a computer programming language, and then execute step S15.

[0073] Step S15: Add 1 to the value of the variable "reglst_tab_cnt", locate the register detailed description list of the first register, traverse each row of the register detailed description list, write the register's bit field, bit field name and read-write attributes into the array row1, and use the array object in the numpy library to convert the array row into an array of m rows and 4 columns, where m is the number of rows in the table after removing each table header, and then execute step S16.

[0074] Step S16: Write each row of the row0 list and the corresponding rows and columns generated by the text of the row1 list into a preset position in the Excel spreadsheet, and then execute step S17.

[0075] Step S17: Clear row1, traverse the row0 list to the next row, and determine whether the offset addresses, register names, bit widths, access rights, reset values, bit fields, bit field names, and read-write attributes corresponding to all registers are written into the Excel table; if the offset addresses, register names, bit widths, access rights, reset values, bit fields, bit field names, and read-write attributes corresponding to all registers are written into the Excel table, execute step S18; if the offset addresses, register names, bit widths, access rights, reset values, bit fields, bit field names, and read-write attributes corresponding to all registers are not written into the Excel table, return to execute step S15.

[0076] Step S18: Close the Excel spreadsheet.

[0077] In some embodiments, Figure 4 A schematic diagram of the summary table is shown in Figure 2. Figure 4As shown, cell A1 is ipnumbers, ipnumbers is the instantiation number of the module, cell A2 is baseaddr, baseaddr is the base address corresponding to the module; offset is the offset address of the register; name is the register name; e_se_protect is the "write" access right of the register; Reset is the reset value of the register; bit is the bit field of the register; field is the name of the bit field; Access is the read-write attribute of the bit field; in some embodiments, the registers corresponding to the module with a base address of 0xF0000400 include Reg1, Reg2, Reg3 and Reg4; among them, the register named Reg1 corresponds to an offset address of 0x00, a bit width of 32, a "write" access right of E, and a register reset value of 0x00000001; the bit fields corresponding to Reg1 include [31:13],

[12] ,

[11] ,

[10] , [9], [8], [7], [6:4], [3:0]; the bit field corresponding to the bit field [31:13] is called MSK1.1, and the read / write attribute is readable; the bit field corresponding to the bit field

[12] is called MSK1.2, and the read / write attribute is readable; the bit field corresponding to the bit field

[11] is called MSK1.3, and the read / write attribute is readable; the bit field corresponding to the bit field

[10] is called MSK1.4, and the read / write attribute is readable. The write attribute is readable; the bit field corresponding to bit field [9] is called MSK1.5, and the read and write attribute is readable; the bit field corresponding to bit field [8] is called MSK1.6, and the read and write attribute is readable; the bit field corresponding to bit field [7] is called MSK1.7, and the read and write attribute is readable; the bit field corresponding to bit field [6:4] is called MSK1.8, and the read and write attribute is readable; the bit field corresponding to bit field [3:0] is called MSK1.9, and the read and write attribute is readable.

[0078] In some embodiments, the demo case is a custom function composed of base class functions, which is used to perform preset operations. The preset operations are: closing the access rights corresponding to all registers; performing reset value verification on the register to obtain a reset verification result; performing read and write verification on the register to obtain a read and write verification result; writing back the register reset value to each register; enabling the access rights corresponding to all registers; determining whether the register has access rights, and if the register has access rights, performing access rights verification on the register to obtain an access rights verification result.

[0079] In some embodiments, the verification incentive is generated from the summary table in the following manner:

[0080] Step S21: Read the Excel table, write the contents of the table into the flist list in rows according to the order from top to bottom of the Excel table, traverse the flist list, and when traversing to "baseaddr", write the row after "baseaddr" into a BaseAd list, and then execute step S22.

[0081] Step S22: traverse the flist list, and when traversing to "offset", write the content of the row where "offset" is located into a reglst list, and then execute step S23.

[0082] Step S23: Fill the contents of the reglst list into the module baseaddr array of the demo case; extract the offset address, reset value, read-write attributes and "write" access rights of each register and store them in the array IP_Reg of the structure type of the demo case; save the read-write attributes of each bit field of each register into 32-bit hexadecimal data of a demo case, thereby generating a verification stimulus regtest case; the verification stimulus regtest case is used to perform preset operations on the registers in the reglst list.

[0083] Combine Figure 5 As shown, an embodiment of the present disclosure provides an apparatus for verifying a register, comprising: an acquisition module 501, a generation module 502, and a verification module 503; the acquisition module 501 is configured to obtain register parameters and access rights corresponding to the register; the generation module 502 is configured to generate a verification stimulus according to the register parameters and access rights; the verification module 503 is configured to verify the register according to the verification stimulus and obtain a verification result.

[0084] The apparatus for register verification provided by the embodiments of the present disclosure uses an acquisition module to obtain register parameters and access rights corresponding to a register; a generation module to generate a verification stimulus based on the register parameters and access rights; and a verification module to verify the register according to the verification stimulus and obtain a verification result. This allows for automatic register verification, eliminating the need for manual verification and improving register verification efficiency.

[0085] Optionally, the apparatus for verifying a register further includes: a display module configured to display the verification result to a user.

[0086] Combine Figure 6As shown, an embodiment of the present disclosure provides an electronic device, including a processor 600 and a memory 601 storing program instructions. Optionally, the electronic device may further include a communication interface 602 and a bus 603. The processor 600, the communication interface 602, and the memory 601 may communicate with each other via the bus 603. The communication interface 602 may be used for information transmission. The processor 600 may call the program instructions in the memory 601 to execute the method for verifying a register according to the above embodiment.

[0087] In addition, the program instructions in the memory 601 can be implemented in the form of software functional units and can be stored in a readable storage medium when sold or used as an independent product.

[0088] The memory 601, as a readable storage medium, can be used to store software programs and executable programs, such as program instructions / modules corresponding to the methods in the embodiments of the present disclosure. The processor 600 executes the program instructions / modules stored in the memory 601 to perform functional applications and data processing, thereby implementing the method for verifying registers in the above-mentioned embodiments.

[0089] The memory 601 may include a program storage area and a data storage area. The program storage area may store an operating system and at least one application required for a function; the data storage area may store data generated based on the use of the terminal device. Furthermore, the memory 601 may include a high-speed random access memory and a non-volatile memory.

[0090] Optionally, the electronic device includes a computer or a server.

[0091] The electronic device provided by the embodiments of the present disclosure obtains register parameters and access rights corresponding to a register; generates a verification stimulus based on the register parameters and access rights; and verifies the register according to the verification stimulus to obtain a verification result. This allows for automatic register verification, eliminating the need for manual verification and improving register verification efficiency.

[0092] An embodiment of the present disclosure provides a storage medium storing executable instructions, wherein the executable instructions are configured to execute the above-mentioned method for verifying a register.

[0093] An embodiment of the present disclosure provides a computer program product, which includes a computer program stored on a computer-readable storage medium. The computer program includes program instructions, which, when executed by a computer, cause the computer to execute the above-mentioned method for verifying a register.

[0094] The aforementioned readable storage medium may be a transient readable storage medium or a non-transitory readable storage medium.

[0095] The technical solution of the embodiments of the present disclosure may be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiments of the present disclosure. The aforementioned storage medium may be a non-transitory storage medium, including: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program code, or a transient storage medium.

[0096] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent only possible variations. Unless explicitly required, individual components and functions are optional, and the order of operations may vary. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. Moreover, the words used in this application are only used to describe the embodiments and are not used to limit the claims. As used in the description of the embodiments and claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to also include plural forms. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of one or more associated listings. In addition, when used in this application, the term "comprise" and its variations "comprises" and / or comprising refer to the presence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups of these. In the absence of further restrictions, an element defined by the sentence "comprising a..." does not exclude the presence of other identical elements in the process, method or device that includes the element. In this article, each embodiment may focus on the differences from other embodiments, and the same and similar parts between the various embodiments can be referenced to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can be found in the description of the method part.

[0097] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software may depend on the specific application and design constraints of the technical solution. The technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the embodiments of the present disclosure. The technicians will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0098] In the embodiments disclosed herein, the disclosed methods and products (including but not limited to devices, equipment, etc.) can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units can be merely a logical functional division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, and can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected to implement this embodiment according to actual needs. In addition, the functional units in the embodiments of the present disclosure may be integrated into a processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0099] The flowcharts and block diagrams in the accompanying drawings show the possible implementation architectures, functions and operations of the systems, methods and computer program products according to the embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, program segment or part of the code, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical functions. In some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, or they can sometimes be executed in the opposite order, which can depend on the functions involved. In the descriptions corresponding to the flowcharts and block diagrams in the accompanying drawings, the operations or steps corresponding to different boxes can also occur in an order different from that disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps can actually be executed substantially in parallel, or they can sometimes be executed in the opposite order, which can depend on the functions involved. Each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified function or action, or may be implemented by a combination of dedicated hardware and computer instructions.

Claims

1. A method for verifying a register, characterized in that: include: Get the register parameters and access permissions corresponding to the register; generating a verification stimulus according to the register parameter and the access permission; Verify the register according to the verification stimulus to obtain a verification result; The step of verifying the register according to the verification stimulus to obtain a verification result includes: when the access permission corresponding to the register is enabled, performing access permission verification on the register to obtain an access permission verification result; Among them, performing access permission verification on the register to obtain an access permission verification result includes: performing a second write operation on the register, the second write operation is used to write a second set character into the register; performing a third read operation on the register, the third read operation is used to obtain a third character of the register; when the third character is consistent with the second expected character, the third comparison result is that the register is readable and writable; when the third character is consistent with the preset reset value, the third comparison result is that the register is readable and not writable; the second expected character is obtained by calculating the second set character by the register according to the read and write attributes of the register's bit field; and determining the access permission verification result of the register based on the third comparison result.

2. The method according to claim 1, characterized in that Generating a verification stimulus according to the register parameter and the access permission includes: generating a summary table according to the register parameters and the access rights; A verification incentive is generated according to the summary table.

3. The method according to claim 1, characterized in that Verifying the register according to the verification stimulus to obtain a verification result further includes: When the access permission corresponding to the register is closed, a reset value verification is performed on the register to obtain a reset verification result; and a read-write verification is performed on the register to obtain a read-write verification result.

4. The method according to claim 3, characterized in that Performing reset value verification on the register to obtain a reset verification result includes: Performing a first read operation on the register, where the first read operation is used to obtain a first character of the register; Comparing the first character with a preset reset value to obtain a first comparison result; A reset verification result of the register is determined according to the first comparison result.

5. The method according to claim 3, characterized in that Performing read and write verification on the register to obtain a read and write verification result includes: Performing a first write operation on the register, wherein the first write operation is used to write a first setting character into the register; Performing a second read operation on the register, where the second read operation is used to obtain a second character of the register; Comparing the second character with the first expected character to obtain a second comparison result; the first expected character is obtained by calculating the first set character by the register according to the read-write attribute of the register bit field; A read / write verification result of the register is determined according to the second comparison result.

6. The method according to claim 5, characterized in that Determining a read / write verification result of the register according to the second comparison result includes: When the second comparison result is that the second character is consistent with the first expected character, the read-write verification result is determined to be the third verification result; when the second comparison result is that the second character is inconsistent with the first expected character, the read-write verification result is determined to be the fourth verification result; the third verification result is used to characterize that the read and write functions of the register are normal; the fourth verification result is used to characterize that the read and write functions of the register are abnormal.

7. The method according to claim 1, characterized in that Verifying the register according to the register parameter and the access permission, and after obtaining the verification result, further comprising: The verification result is displayed to the user.

8. A device for verifying a register, characterized in that: include: An acquisition module, configured to obtain register parameters and access permissions corresponding to the register; A generating module configured to generate a verification stimulus according to the register parameter and the access permission; A verification module is configured to, when the access permission corresponding to the register is enabled, perform access permission verification on the register to obtain an access permission verification result; The verification module is configured to perform access permission verification on the register to obtain an access permission verification result by performing a second write operation on the register, wherein the second write operation is used to write a second set character into the register; A third read operation is performed on the register, and the third read operation is used to obtain a third character of the register; when the third character is consistent with the second expected character, the third comparison result is that the register is readable and writable; when the third character is consistent with the preset reset value, the third comparison result is that the register is readable and not writable; the second expected character is obtained by the register calculating the second set character according to the read and write attributes of the register's bit field; and the access permission verification result of the register is determined based on the third comparison result.

9. An electronic device comprising a processor and a memory storing program instructions, characterized in that: The processor is configured to execute the method for verifying a register according to any one of claims 1 to 7 when running the program instructions.

10. A storage medium storing program instructions, characterized in that: When the program instructions are executed, the method for verifying a register according to any one of claims 1 to 7 is executed.

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