A clock sampling configuration method
By using different edges or levels to sample the decision signal in the sampling configuration method, and determining the operation state of the configuration object according to the logical state, the problem of discontinuous operation of the configuration operation object in the prior art is solved, and high-efficiency process control is achieved.
Patent Information
- Application Number
- CN202111556823.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-18
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2041-12-18
AI Technical Summary
The existing sampling configuration methods are difficult to achieve continuity of the operation of the configuration operation object in process control, resulting in low efficiency.
Different edges or levels are used to sample the decision signal, and then the operation status of the configuration object is determined based on the logical state of the selected decision signal, ensuring that different decision signals have the characteristics of the same value and configuration direction.
Through this method, the continuity of the operation of the configuration operation object is maximized and the process control effect is achieved with high efficiency.
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Figure CN114371354B_ABST
Abstract
Description
Technical Field
[0001] The present invention is applicable to any electrical device and system. Background Art
[0002] The sampling configuration technology is a very common technical method in electrical devices or systems, which can effectively solve the process control problem. Most of the existing sampling configuration methods sample all decision signals simultaneously based on the edge or level of the sampling clock, and then perform the state configuration operation of the configuration object according to the combination of the decision signals. This invention patent proposes a method of sampling using different edges or levels, and then determines the configuration operation according to the value of the sampled decision signal. This sampling configuration mechanism can maximize the continuity of the actions of the configuration operation object and achieve a high-efficiency process control effect. Summary of the Invention
[0003] The present invention discloses a clock sampling configuration method. This sampling configuration method samples the decision signal using different edges or levels, and then determines the operation state of the configuration object according to the logical state of the sampled decision signal. Different decision signals have the characteristic of the same configuration direction for the same value.
[0004] This sampling configuration method includes decision signals, a sampling clock, and a configuration object and its operation state. The operation state of the configuration object includes a configuration direction and a configuration step size. This sampling configuration method mainly includes the following steps:
[0005] Step 1: Sample the first decision signal at the first sampling point;
[0006] Step 2: After sampling is completed, perform a configuration operation on the configuration object according to the result of the sampled decision signal;
[0007] Step 3: After the configuration operation is completed, sample the next decision signal at the next sampling point, and complete the configuration operation on the configuration object according to the result of the sampled decision signal
[0008] Step 4: Repeat Step 3 until all criterion signals are sampled and the corresponding configuration operations are completed
[0009] Step 5: Continue to sample the first decision signal at the next sampling point;
[0010] Step 6: Repeat the operations in Steps 2 to 5 until the configuration achieves the goal.
[0011] In this sampling configuration method, the same logical state of the decision signal corresponds to the same configuration direction of the configuration object, and the sampling clock can sample the decision signal using an edge or a level.
[0012] In this sampling configuration method, the sampling clock samples the decision signal using different edges or levels, including adjacent clock edges or levels.
[0013] In this sampling configuration method, there are no special requirements for the frequency and duty cycle of the sampling clock, and it can be any frequency and duty cycle.
[0014] In this sampling configuration method, the same logical state of the decision signal corresponds to the same configuration direction, and the configuration objects include electrical measurements such as voltage, current, frequency, period, and power.
[0015] In this sampling configuration method, the configuration operation refers to operating on the configuration object, and its operation state includes the configuration direction and the configuration step size. The configuration direction refers to two opposite operation directions, including increase and decrease, raise and lower; the configuration step size refers to the amount of adjustment in the configuration direction, such as increasing / decreasing by 1 step, increasing / decreasing by 2 steps... increasing / decreasing by N steps.
[0016] In this sampling configuration method, the configuration direction is only related to the logical state of the sampled decision signal and has nothing to do with other attributes of the decision signal. That is, for any decision signal, as long as the sampled logical state is the same as that of other decision signals, the corresponding configuration direction is also the same.
[0017] In this sampling configuration method, the source of the decision signal can be any electrical device, including analog circuits and digital logic circuits.
[0018] In this sampling configuration method, there is no clear quantitative relationship between the number of decision signals and the number of configuration step sizes, whether in a single configuration direction or in all configuration directions.
[0019] In this sampling configuration method, the configuration step sizes in different configuration directions corresponding to different logical states of the decision signal do not have to be correlated. That is, when the logical states of the same decision signal are "1" and "0" respectively, the configuration step sizes can be the same or different.
[0020] In this sampling configuration method, the operation clock of the configuration object can be the same as the sampling clock or different from the sampling clock, and the frequency and duty cycle of the configuration clock can be any frequency and duty cycle.
[0021] Combined with the specific embodiments and drawings of the present invention, the method of the present invention can be better and more comprehensively understood. The method and idea of the present invention can be effectively used to deal with other problems, not limited to electrical devices and systems. Description of the Drawings
[0022] Figure 1 It is a schematic diagram for explaining the relationship between the "number of decision signals" and the "number of configuration step sizes"
[0023] Figure 2Description of operations on configuration objects
[0024] Figure 3 It is a specific sampling configuration example based on the present invention Detailed implementation manners
[0025] The present invention discloses a clock sampling configuration method. This sampling configuration method uses different edges or levels to sample decision signals, and then determines the operation state of the configuration object according to the logical states of the sampled decision signals. Different decision signals have the characteristic of the same value and the same configuration direction
[0026] Figure 1 The figure shows a schematic diagram for explaining the relationship between the "number of decision signals" X and the "number of configuration steps" Y / Z. When the principle configuration direction is fixed, the number of configuration steps in different configuration directions does not have to be the same: that is, when the decision signal DS is "1", the number of configuration steps is Y; when DS is "0", the number of configuration steps can be equal to Y or other positive integers Z that are not equal to Y; in addition, it is also allowed that one or more decision signals correspond to the same configuration step. For example, when the decision signal DS[1] = "1", it can correspond to the configuration step CS[1]; when the decision signals DS[1] = "1" and DS[2] = "1", they can also correspond to the configuration step CS[1]…, and so on. In short, there is no clear quantitative relationship between the "number of decision signals" X and the "number of configuration steps" Y / Z, whether in a single configuration direction or all configuration directions
[0027] Figure 2 The figure shows the description of the operation state of the configuration object. In principle, there is no symmetry requirement for the configuration step, that is, when different values are sampled for the same decision signal, the increasing step and the decreasing step of the corresponding configuration operation do not have to be the same. For example: when the decision signal DS[1] is sampled as "1", the configuration step CS[1] increases by 1 gear; then when the decision signal DS[1] is sampled as "0", the configuration step CS[1] can be decreased by 1 gear, or can be decreased by 2 gears…; and so on: that is, there is no strong correlation between the two
[0028] The core of the present invention is to sample decision signals using different sampling clock edges or levels, and the decision signals have the characteristic of the same value and the same configuration direction Figure 3 In the embodiment, only one configuration step is taken in each of the configuration direction 1 and the configuration direction 2, that is, a total of two configuration operations CS[1] and CS[1] * . The specific implementation process is described as follows
[0029] The first rising edge Edge1 samples the decision signal DS[1]. Since the sampled value is "1", the CS[1] configuration operation is performed. The second rising edge Edge2 samples the decision signal DS[2]. Since the sampled value is "1", the CS[1] configuration operation is still performed.
[0030] The third rising edge Edge3 samples the decision signal DS[1]. Since the sampled value is "0", the CS[1] * configuration operation is performed. The fourth rising edge Edge4 samples the decision signal DS[2]. Since the sampled value is "1", the CS[1] configuration operation is performed.
[0031] The fifth rising edge Edge5 samples the decision signal DS[1]. Since the sampled value is "0", the CS[1] * configuration operation is performed. The sixth rising edge Edge6 samples the decision signal DS[2]. Since the sampled value is "0", the CS[1] * configuration operation is still performed.
[0032] The seventh rising edge Edge7 samples the decision signal DS[1]. Since the sampled value is "0", the CS[1] * configuration operation is performed.
[0033] ……
[0034] And so on until the sampling configuration target is achieved.
[0035] From the above description of the implementation, it is not difficult to find that the sampling of the decision signal can be an edge or a level, and can be adjacent edges or adjacent levels. In short, as long as the decision signal is sampled time-divisionally using the sampling clock, a comparable sampling configuration effect can be achieved. In addition, as long as different decision signals have the same value, their configuration directions for the configuration object are also the same. For example, when the decision signals DS[1] and DS[2] have the value "1", the CS[1] operation is performed, and when the value is "0", the CS[1] * operation is performed.
[0036] The above describes the basic principle, main features and advantages of the present invention through embodiments. Those skilled in the art should understand that the present invention is not limited by the above embodiments. What is described in the above embodiments and the specification is only to illustrate the principle of the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements all fall within the scope of the present invention claimed. The scope of protection claimed by the present invention is defined by the claims and their equivalents described.
Claims
1. A clock sampling configuration method, characterized in that, the sampling configuration method includes a decision signal, a sampling clock, and a configuration object and its operating state, and the sampling configuration method includes the following steps: Step 1: Sample the first decision signal at the first sampling point; Step 2: After sampling is completed, perform a configuration operation on the configuration object according to the result of the sampled decision signal; wherein, the configuration operation refers to operating on the configuration object, and its operating state includes a configuration direction and a configuration step size; the configuration direction refers to two opposite operating directions, including increasing and decreasing, raising and lowering; the configuration step size refers to the amount of adjustment in the configuration direction; the configuration direction is only related to the logical state of the sampled decision signal and has nothing to do with other attributes of the decision signal. No matter which decision signal it is, as long as the sampled logical state is the same as the logical state of other decision signals, its corresponding configuration direction is also the same; Step 3: After the configuration operation is completed, sample the next decision signal at the next sampling point, and complete the configuration operation on the configuration object according to the result of the sampled decision signal; Step 4: Repeat Step 3 until all decision signals are sampled and the corresponding configuration operations are completed; Step 5: Continue to sample the first decision signal at the next sampling point; Step 6: Repeat the operations in Steps 2 to 5 until the configuration target is achieved.
2. A clock sampling configuration method according to claim 1, characterized in that, the sampling clock samples the decision signal using different edges or levels, including adjacent clock edges or adjacent clock levels.
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