Display device
By setting a light blocking layer and a transmission window in the transmission area of the display device, and covering the buffer layer with the light blocking layer, the problems of display deterioration caused by low transmittance and moisture infiltration of the existing display device are solved, and the effect of improving transmittance and preventing display deterioration is achieved.
Patent Information
- Application Number
- CN202210124406.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2015-09-25
- Filing Date
- 2016-09-23
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2036-09-23
AI Technical Summary
The existing display equipment has a low transmittance of light in the transmitted area and the display quality of the display equipment will deteriorate when external moisture or contaminated materials penetrate.
A display device including a display area and a transmission area is designed. A light blocking layer and a transmission window are provided in the transmission area. The transmission window is formed in the insulating layer and overlaps with the light blocking layer. The buffer layer is covered by the light blocking layer to prevent damage.
The transmittance of the display device is improved and defects caused by the infiltration of external moisture or contaminated materials are prevented, maintaining high-quality display of the display device.
Smart Images

Figure CN114447091B_ABST
Abstract
Description
[0001] This application is a divisional application of the invention with the application date of September 23, 2016, application number 201610849240.8, and title "Display Device".
[0002] Cross-reference to related applications
[0003] This application claims the priority and benefits of Korean Patent Application No. 10-2015-0136923, filed on September 25, 2015, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical field
[0004] Exemplary embodiments relate to a display device, and more particularly, to a display device including a display area and a transmissive area. Background art
[0005] Display devices may include liquid crystal displays (LCDs), plasma display panels (PDPs), organic light emitting diode (OLED) devices, etc. Among these display devices, since OLED devices are different from liquid crystal displays, they have self-luminous characteristics and do not require a separate light source, so the thickness and weight of OLED devices can be reduced. In addition, organic light emitting diode devices have high-grade characteristics such as low power consumption, high brightness, and high response speed.
[0006] A display device may include a display area for displaying an image and a transmissive area for transmitting external light. Many efforts have been made to improve the light transmittance in the transmissive area. In addition, when external moisture or contaminating materials penetrate into the display device, the display quality of the display device may deteriorate.
[0007] The above information disclosed in this background art section is only for enhancing the understanding of the background of the inventive concept, and thus may include information that does not constitute the prior art already known to those of ordinary skill in the art in this country. Summary of the invention
[0008] Exemplary embodiments provide a display device including a display area and a transmissive area, having an improved transmittance and having reduced defects due to intrusion of external moisture.
[0009] Other aspects will be set forth in the following detailed description, will be apparent in part from the present disclosure, or may be learned by practice of the inventive concept.
[0010] According to an exemplary embodiment, a display device includes: a substrate including a first region configured to display an image and a second region adjacent to the first region, the second region being configured to transmit external light; a first electrode and a second electrode disposed in the first region and overlapping each other; an emission layer disposed between the first electrode and the second electrode in the first region; a first semiconductor layer disposed in the first region; and a second semiconductor layer disposed in the second region.
[0011] According to an exemplary embodiment, a display device includes: a substrate including a first region configured to display an image and a second region adjacent to the first region, the second region being configured to transmit external light; a first electrode and a second electrode disposed in the first region and overlapping each other; an emission layer disposed between the first electrode and the second electrode in the first region; a semiconductor layer disposed in the first region; and an insulating layer disposed on the semiconductor layer, wherein: the insulating layer includes a hole disposed in the second region; the hole includes a first hole portion and a second hole portion adjacent to the first hole portion, the first hole portion being adjacent to the substrate; and the width of the first hole portion is greater than the width of the second hole portion.
[0012] According to an exemplary embodiment, a display device includes: a substrate including a first region configured to display an image and a second region adjacent to the first region; a buffer layer disposed on the substrate; a semiconductor layer disposed on the buffer layer; a first electrode and a second electrode disposed in the first region and overlapping each other; and an emission layer disposed between the first electrode and the second electrode in the first region, wherein the semiconductor layer is directly disposed on the buffer layer.
[0013] According to an exemplary embodiment, the transmittance of a display device including a display region and a transmissive region can be increased, and defects due to external moisture can be prevented.
[0014] The foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] The accompanying drawings, which are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the inventive concept and together with the description serve to explain the principles of the inventive concept.
[0016] Figure 1 is a layout diagram of a display device according to an exemplary embodiment.
[0017] Figure 2 is a cross-sectional view of a display device according to an exemplary embodiment.
[0018] Figure 3It is an equivalent circuit diagram of a pixel of a display device according to an exemplary embodiment.
[0019] Figure 4 It is a layout diagram showing a pixel region of a display device according to an exemplary embodiment.
[0020] Figure 5 It is taken along line V-V Figure 4 of a cross-sectional view of the display device.
[0021] Figure 6 It is taken along line VI-VI Figure 4 of a cross-sectional view of the display device.
[0022] Figure 7 It is a layout diagram of a display device according to an exemplary embodiment.
[0023] Figure 8 It is a layout diagram showing a pixel region of a display device according to an exemplary embodiment.
[0024] Figure 9 It is taken along line IX-IX Figure 8 of a cross-sectional view of the display device.
[0025] Figure 10A , Figure 10B and Figure 10C It is a chart showing the results of experimental examples. Detailed Description
[0026] In the following description, for the purpose of explanation, in order to provide a thorough understanding of various exemplary embodiments, many specific details are set forth. However, it is obvious that various exemplary embodiments can be implemented without these specific details or with one or more equivalent arrangements. In other cases, well-known structures and devices are shown in block diagram form to avoid unnecessarily obscuring various exemplary embodiments.
[0027] In the drawings, for clarity and illustrative purposes, the dimensions and relative dimensions of layers, films, panels, regions, etc. may be exaggerated. Additionally, the same reference numerals refer to the same elements.
[0028] When an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it can be directly on the other element or layer, directly connected to or coupled to the other element or layer, or there can be intervening elements or intervening layers. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or intervening layers. For purposes of disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted to mean only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ. Like reference numerals refer to like elements. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0029] Although the terms first, second, etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, and / or section from another element, component, region, layer, and / or section. Thus, a first element, component, region, layer, and / or section discussed below could be termed a second element, component, region, layer, and / or section without departing from the teachings of the present disclosure.
[0030] For descriptive purposes, spatial relative terms such as "beneath," "below," "lower," "above," "upper," etc. are used herein to describe the relationship of one element or feature to another (some) element or feature as shown in the figures. In addition to the orientation depicted in the figures, the spatial relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the figures is turned over, an element described as "beneath" or "below" other elements or features will be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. In addition, the device may be otherwise oriented (e.g., rotated 90 degrees or in other directions), and as such, the spatial relative descriptors used herein may be interpreted accordingly.
[0031] The terms used herein are for the purpose of describing particular embodiments and are not intended to be limiting. As used herein, the singular forms "a" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. In addition, when used in the specification, the terms "comprises" and / or "comprising" indicate the presence of the stated features, integers, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0032] In this document, various exemplary embodiments are described with reference to cross-sectional views that are schematic illustrations of idealized exemplary embodiments and / or intermediate structures. As such, variations in the illustrated shapes can be expected as a result of, for example, manufacturing techniques and / or tolerances. Accordingly, the exemplary embodiments disclosed herein should not be construed as limited to the particular illustrated shapes of regions, but rather include, for example, shape deviations resulting from manufacturing. For example, an implantation region shown as rectangular will typically have rounded or curved features and / or a gradient of implantation concentration at its edges, rather than a binary change from the implantation region to the non-implantation region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface where the implantation occurs. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to depict the actual shape of the regions of the device and are not intended to be limiting.
[0033] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this disclosure pertains. For example, terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant field and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
[0034] Reference will be made to Figure 1 and Figure 2 to describe a display device according to an exemplary embodiment. Figure 1 is a layout diagram of a display device according to an exemplary embodiment. Figure 2 is a cross-sectional view of a display device according to an exemplary embodiment.
[0035] Reference Figure 1 , the display device according to the present exemplary embodiment includes a display region PA for displaying an image and a transmissive region TA for transmitting light.
[0036] The display region PA includes pixels PX1, PX2, and PX3. The pixels PX1, PX2, and PX3 can display different colors from each other, and the pixels PX1, PX2, and PX3 can form a point. The pixels PX1, PX2, and PX3 can include a first pixel PX1 that displays a first color, a second pixel PX2 that displays a second color, and a third pixel PX3 that displays a third color. Although not shown, the display device according to an exemplary embodiment may further include other pixels as well as the first pixel PX1, the second pixel PX2, and the third pixel PX3.
[0037] The transmissive region TA is a region for transmitting light. The light-blocking layer BL and the transmissive window TW are formed in the transmissive region TA. The ratio of the area of the transmissive region TA to the total area of the display region PA and the transmissive region TA may be about 20% to about 70%.
[0038] According to this exemplary embodiment, the light-blocking layer BL and the transmissive window TW of the transmissive region TA correspond to the pixels PX1, PX2, and PX3. However, it should be noted that the light-blocking layer BL and the transmissive window TW of the transmissive region TA may be independently formed on each pixel region.
[0039] Reference Figure 2 , the transmissive region TA includes a buffer layer 120 disposed on the substrate 110, a light-blocking layer BL disposed on the buffer layer 120, and a transmissive window TW overlapping with the light-blocking layer BL. External light can pass through the transmissive window TW. Therefore, this display device can be considered a transparent display device.
[0040] The substrate 110 may be flexible and may include an organic material, an inorganic material, glass, or a metal such as stainless steel. The substrate 110 may be flexible and may be stretchable, foldable, bendable, or rollable. Since the substrate 110 is flexible, stretchable, foldable, bendable, or rollable, this display device may be flexible, stretchable, foldable, bendable, or rollable.
[0041] The transmissive window TW is an opening formed in an insulating layer such as a second insulating layer 140, an interlayer insulating layer 160, a planarization layer 180, and a pixel defining layer 350 disposed in the display region PA and the transmissive region TA. The insulating layers 140, 160, 180, and 350 will be described in more detail below. The edge of the transmissive window TW closest to the substrate 110 overlaps with the light-blocking layer BL. In a top view seen from a direction perpendicular to the surface of the substrate 110, the edge of the light-blocking layer BL protrudes from the edge of the transmissive window TW adjacent to the substrate 110. Therefore, a part of the buffer layer 120 overlapping with the transmissive window TW is covered by the light-blocking layer BL. That is, the buffer layer 120 is not exposed by the transmissive window TW. The light-blocking layer BL may include an oxide semiconductor.
[0042] The display region PA includes a substrate 110, a buffer layer 120 disposed on the substrate 110, and a semiconductor layer 135 disposed on the buffer layer 120. The semiconductor layer 135 includes a channel region 1355, a source region 1356, and a drain region 1357. The display region PA further includes a first insulating layer 130 disposed on the semiconductor layer 135, a first control electrode 1251 disposed on the first insulating layer 130, a second insulating layer 140 disposed on the first control electrode 1251, a second control electrode 1252 disposed on the second insulating layer 140, and an interlayer insulating layer 160 disposed on the second control electrode 1252. The display region PA further includes a source electrode 71 and a drain electrode 72 that are respectively connected to the source region 1356 and the drain region 1357 through a first contact hole 61 and a second contact hole 62 formed in the second insulating layer 140 and the interlayer insulating layer 160, a planarization layer 180 disposed on the drain electrode 72, a pixel electrode 710 connected to the drain electrode 72 through a third contact hole 81 formed in the planarization layer 180, a pixel defining layer 350 formed on the pixel electrode 710, an organic emission layer 720 disposed at an opening formed in the pixel defining layer 350, and a common electrode 730 disposed on the organic emission layer 720.
[0043] Reference will be made to Figures 3 to 6 describe a display device according to an exemplary embodiment as Figure 1 and Figure 2 shown. Figure 3 is an equivalent circuit diagram of a pixel of a display device according to an exemplary embodiment. Figure 4 is a layout diagram showing a pixel region of a display device according to an exemplary embodiment. Figure 5 is a cross-sectional view of the display device taken along line V-V of Figure 4 . Figure 6 is a cross-sectional view of the display device taken along line VI-VI of Figure 4 .
[0044] Reference will be made to Figure 3 describe the connection relationship of signal lines of a pixel PX of a display device according to the present exemplary embodiment.
[0045] Reference Figure 3 , a display device according to the present exemplary embodiment includes signal lines 121, 171, and 172 and pixels PX connected to the signal lines. The pixel PX may be Figure 1 any one of a first pixel PX1, a second pixel PX2, and a third pixel PX3.
[0046] The signal lines include a gate line 121 for transmitting a scan signal, a data line 171 for transmitting a data signal, a driving voltage line 172 for transmitting a driving voltage, and the like. The gate line 121 extends substantially in the row direction and is substantially parallel to each other. The data line 171 extends substantially in the column direction and is substantially parallel to each other. The driving voltage line 172 is shown to extend substantially in the column direction, however, the driving voltage line 172 may extend in the row direction or the column direction, or have a mesh shape including a portion extending in a first direction and a portion extending in a second direction.
[0047] A single sub-pixel includes a thin film transistor including a switching transistor T1 and a driving transistor T2, a storage capacitor Cst, and an organic light emitting element LD. Although not shown in the figure, one pixel PX may further include a second thin film transistor and a second capacitor to compensate for the current supplied to the organic light emitting element LD.
[0048] The switching transistor T1 includes a control terminal N1, an input terminal N2, and an output terminal N3. The control terminal N1 is connected to the gate line 121, the input terminal N2 is connected to the data line 171, and the output terminal N3 is connected to the driving transistor T2. The switching transistor T1 transmits the data signal transmitted via the data line 171 to the driving transistor T2 in response to the scan signal transmitted via the gate line 121.
[0049] The driving transistor T2 includes a control terminal N3, an input terminal N4, and an output terminal N5. The control terminal N3 is connected to the switching transistor T1, the input terminal N4 is connected to the driving voltage line 172, and the output terminal N5 is connected to the organic light emitting element LD. The driving transistor T2 outputs an output current Id, and the magnitude of the output current Id changes according to the voltage applied between the control terminal N3 and the output terminal N5.
[0050] The capacitor Cst is connected to the control terminal N3 of the driving transistor T2. The capacitor Cst is charged with the data signal applied to the control terminal N3 of the driving transistor T2 and retains the data signal even after the switching transistor T1 is turned off. For example, as an organic light emitting diode (OLED), the organic light emitting element LD has an anode connected to the output terminal N5 of the driving transistor T2 and a cathode connected to a common voltage ELVSS. The organic light emitting element LD displays an image by emitting light of different intensities according to the output current Id of the driving transistor T2.
[0051] The organic light emitting element LD may include an organic material representing one or more of the primary colors, and the primary colors include three colors that may be red, green, and blue. In this way, the organic light emitting diode display can display a desired image by the spatial sum of these colors.
[0052] The switching transistor T1 and the driving transistor T2 are n-channel field effect transistors (FETs), but at least one of them may be a p-channel FET. However, it should be noted that the connection relationships among the transistors T1 and T2, the capacitor Cst, and the organic light emitting element LD may be changed.
[0053] Hereinafter, reference will be made to Figures 4 to 6 describe the transmissive region TA and the display region PA of the organic light emitting diode display according to the present exemplary embodiment.
[0054] First, the transmissive region TA will be described.
[0055] The transmissive region TA includes a buffer layer 120 disposed on the substrate 110, a light blocking layer BL disposed on the buffer layer 120, and a transmissive window TW overlapping with the light blocking layer BL.
[0056] The light blocking layer BL includes an oxide semiconductor. The oxide semiconductor may include oxides based on titanium (Ti), hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta), germanium (Ge), zinc (Zn), gallium (Ga), tin (Sn), or indium (In), and indium gallium zinc oxide (In-Ga-Zn-O), indium zinc oxide (In-Zn-O), zinc tin oxide (Zn-Sn-O), indium gallium oxide (In-Ga-O), indium tin oxide (In-Sn-O), indium zirconium oxide (In-Zr-O), indium zirconium zinc oxide (In-Zr-Zn-O), indium zirconium tin oxide (In-Zr-Sn-O), indium zirconium gallium oxide (In-Zr-Ga-O), indium aluminum oxide (In-Al-O), indium zinc aluminum oxide (In-Zn-Al-O), indium tin aluminum oxide (In-Sn-Al-O), indium aluminum gallium oxide (In-Al-Ga-O), indium tantalum oxide (In-Ta-O), indium tantalum zinc oxide (In-Ta-Zn-O), indium tantalum tin oxide (In-Ta-Sn-O), indium tantalum gallium oxide (In-Ta-Ga-O), indium germanium oxide (In-Ge-O), indium germanium zinc oxide (In-Ge-Zn-O), indium germanium tin oxide (In-Ge-Sn-O), indium germanium gallium oxide (In-Ge-Ga-O), titanium indium zinc oxide (Ti-In-Zn-O), and hafnium indium zinc oxide (Hf-In-Zn-O) as their composite oxides.
[0057] The transmissive window TW is an opening formed in an insulating layer such as the second insulating layer 140, the interlayer insulating layer 160, the planarization layer 180, and the pixel defining layer 350 provided in the display region PA and the transmissive region TA. The transmissive window TW is formed to penetrate through the second insulating layer 140, the interlayer insulating layer 160, the planarization layer 180, and the pixel defining layer 350. The insulating layer in which the transmissive window TW is formed will be described in detail later.
[0058] External light incident on the transmissive window TW passes through the transmissive window TW. Thus, the organic light emitting diode display according to this embodiment can be recognized as a transparent display device.
[0059] The edge of the transmissive window TW overlaps with the light blocking layer BL. In a top view seen from a direction perpendicular to the surface of the substrate 110, a first edge EG1 of the light blocking layer BL protrudes from a second edge EG2 of the transmissive window TW adjacent to the substrate 110. In this way, the buffer layer 120 overlapping with the transmissive window TW is covered by the light blocking layer BL. That is, the buffer layer 120 is not exposed through the transmissive window TW.
[0060] Since the transmissive window TW according to this exemplary embodiment is formed in the insulating layer provided in the transmissive area TA, external light incident on the transmissive window TW can pass through the transmissive window TW instead of passing through the insulating layer, thereby improving the light transmittance of the transmissive area TA. In addition, when forming the transmissive window TW (which is formed in the insulating layer provided in the transmissive area TA), the buffer layer 120 may be etched and damaged, which may cause the penetration of unnecessary components such as impurities or moisture, and this may deteriorate the quality of the display device.
[0061] In the display device according to this exemplary embodiment, the transmissive window TW is formed to overlap with the light blocking layer BL such that a second width W2 between second edges EG2 of the transmissive window TW is smaller than a first width W1 between first edges EG1 of the light blocking layer BL. In this way, the buffer layer 120 overlapping with the transmissive window TW overlaps with the light blocking layer BL. Therefore, when forming the transmissive window TW in the insulating layer provided in the transmissive area TA, since the buffer layer 120 is covered by the light blocking layer BL, the buffer layer 120 can be prevented from being damaged. In this way, the transmittance of the display device can be improved while preventing damage to the buffer layer 120, which can prevent the quality of the display device from deteriorating due to damage to the buffer layer 120.
[0062] Next, the display area PA will be described.
[0063] The buffer layer 120 is provided on the substrate 110. The buffer layer 120 may be formed of a single layer including silicon nitride (SiNx) or a double layer structure including silicon nitride (SiNx) and silicon oxide (SiOx). The buffer layer 120 can planarize the surface of the substrate 110 and prevent the penetration of impurities or moisture.
[0064] The switch semiconductor layer 135a and the driving semiconductor layer 135b spaced apart from each other are formed on the buffer layer 120. The semiconductor layers 135a and 135b may include the same material as the light blocking layer BL provided in the transmissive area TA.
[0065] The semiconductor layers 135a and 135b include a channel region without doped impurities and source and drain regions doped with impurities located on respective sides of the channel region. The impurities can vary depending on the type of transistor and can include n-type impurities or p-type impurities.
[0066] The switching semiconductor layer 135a includes a first channel region 1355a and a first source region 1356a and a first drain region 1357a formed on respective sides of the first channel region 1355a. The driving semiconductor layer 135b includes a second channel region 1355b and a second source region 1356b and a second drain region 1357b formed on respective sides of the second channel region 1355b. The first channel region 1355a of the switching semiconductor layer 135a and the second channel region 1355b of the driving semiconductor layer 135b are not doped with impurities. The source regions 1356a, 1356b and the drain regions 1357a, 1357b of the switching semiconductor layer 135a and the driving semiconductor layer 135b can include impurity semiconductors doped with conductive impurities.
[0067] The first insulating layer 130 is disposed to overlap with the first channel region 1355a of the switching semiconductor layer 135a and the second channel region 1355b of the driving semiconductor layer 135b. The first insulating layer 130 can include silicon nitride or silicon oxide.
[0068] The first switching control electrode 125a1 and the underlying first insulating layer 130 and the first channel region 1355a of the switching semiconductor layer 135a are self-aligned. The first driving control electrode 125b1 and the underlying first insulating layer 130 and the second channel region 1355b of the driving semiconductor layer 135b are self-aligned.
[0069] The first switching control electrode 125a1 is disposed on the first insulating layer 130 that overlaps with the first channel region 1355a of the switching semiconductor layer 135a. The first driving control electrode 125b1 is disposed on the first insulating layer 130 that overlaps with the second channel region 1355b of the driving semiconductor layer 135b. A first capacitor electrode 128a including the same material as the first switching control electrode 125a1 and the first driving control electrode 125b1 is disposed on the first insulating layer 130. The first switching control electrode 125a1, the first driving control electrode 125b1, and the first capacitor electrode 128a can be floating or connected to a signal line to receive a predetermined voltage.
[0070] The second insulating layer 140 is formed on the switching semiconductor layer 135a, the driving semiconductor layer 135b, the first switching control electrode 125a1, the first driving control electrode 125b1, and the first capacitor electrode 128a. The second insulating layer 140 can include silicon nitride or silicon oxide.
[0071] The gate line 121, the second switch control electrode 125a2, the second driving control electrode 125b2, and the second capacitor electrode 128b are disposed on the second insulating layer 140. The first switch control electrode 125a1 and the second switch control electrode 125a2 form the switch control electrode 125a, and the first driving control electrode 125b1 and the second driving control electrode 125b2 form the driving control electrode 125b.
[0072] The gate line 121 extends in a horizontal direction and transmits a scan signal to the switching transistor T1. In this case, the gate line 121 protrudes toward the switching semiconductor layer 135a to be connected to the second switch control electrode 125a2. The second driving control electrode 125b2 is connected to the second capacitor electrode 128b, whereby the second capacitor electrode 128b protrudes toward the driving semiconductor layer 135b.
[0073] The interlayer insulating layer 160 is formed on the gate line 121, the second switch control electrode 125a2, the second driving control electrode 125b2, and the second capacitor electrode 128b. Like the first insulating layer 130 or the second insulating layer 140, the interlayer insulating layer 160 may include silicon nitride or silicon oxide.
[0074] The interlayer insulating layer 160 and the second insulating layer 140 have a first source contact hole 61a and a first drain contact hole 62a that respectively expose the first source region 1356a and the first drain region 1357a, a second source contact hole 61b and a second drain contact hole 62b that respectively expose the second source region 1356b and the second drain region 1357b, and a storage contact hole 63 that exposes a part of the second capacitor electrode 128b.
[0075] The data line 171 including the switch source electrode 176a, the driving voltage line 172 including the driving source electrode 176b, the switch drain electrode 177a connected to the second capacitor electrode 128b, and the driving drain electrode 177b are formed on the interlayer insulating layer 160. The data line 171 transmits a data signal and extends in a direction intersecting the gate line 121. The driving voltage line 172 transmits a driving voltage. The driving voltage line 172 and the data line 171 extend in the same direction and are spaced apart from each other.
[0076] The switch source electrode 176a protrudes from the data line 171 toward the switching semiconductor layer 135a, and the driving source electrode 176b protrudes from the driving voltage line 172 toward the driving semiconductor layer 135b. The switch source electrode 176a is connected to the first source region 1356a through the first source contact hole 61a, and the driving source electrode 176b is connected to the second source region 1356b through the second source contact hole 61b. The switch drain electrode 177a faces the switch source electrode 176a, and the driving drain electrode 177b faces the driving source electrode 176b.
[0077] The switch drain electrode 177a is connected to the first drain region 1357a through the first drain contact hole 62a, and the driving drain electrode 177b is connected to the second drain region 1357b through the second drain contact hole 62b. The switch drain electrode 177a extends to be electrically connected to the second capacitor electrode 128b and the second driving control electrode 125b2 through a storage contact hole 63 formed in the interlayer insulating layer 160. The first capacitor electrode 128a and the second capacitor electrode 128b overlap each other, thereby forming a storage capacitor Cst using the second insulating layer 140 as a dielectric material.
[0078] The switch semiconductor layer 135a, the switch control electrode 125a, the switch source electrode 176a, and the switch drain electrode 177a form a switch thin film transistor T1. The driving semiconductor layer 135b, the driving control electrode 125b, the driving source electrode 176b, and the driving drain electrode 177b form a driving thin film transistor T2. The switch thin film transistor T1 and the driving thin film transistor T2 correspond to the switch element. The switch thin film transistor T1 and the driving thin film transistor T2 are formed in the display area PA.
[0079] A planarization layer 180 is formed on the switch source electrode 176a, the driving source electrode 176b, the switch drain electrode 177a, and the driving drain electrode 177b. The planarization layer 180 is used to remove and planarize steps to improve the emission efficiency of the organic light-emitting element to be formed thereon. The planarization layer 180 may include a polyacrylic acid-based resin, an epoxy resin, a phenolic resin, a polyamide-based resin, a polyimide-based resin, an unsaturated polyester-based resin, a polyphenyl-based resin, a polyphenylene sulfide-based resin, a silicone-based resin, or a silica-based inorganic material.
[0080] A pixel electrode 710 is provided on the planarization layer 180. The pixel electrode 710 may include a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In 2 O 3 ) or a reflective metal such as lithium (Li), calcium (Ca), lithium fluoride / calcium (LiF / Ca), lithium fluoride / aluminum (LiF / Al), aluminum (Al), silver (Ag), magnesium (Mg), or gold (Au). The pixel electrode 710 is electrically connected to the driving drain electrode 177b of the driving thin film transistor T2 through a contact hole 181 formed in the planarization layer 180, thereby serving as the anode of the organic light-emitting element 70.
[0081] A pixel defining layer 350 is formed on the planarization layer 180 and on the edges of the pixel electrode 710. The pixel defining layer 350 has an opening exposing the pixel electrode 710. The pixel defining layer 350 may include a polyacrylic acid-based resin, a polyimide-based resin, a silicone-based resin, or a silica-based inorganic material.
[0082] The organic emission layer 720 is formed in the opening of the pixel definition layer 350. The organic emission layer 720 is formed of a multi-layer including an emission layer and one or more of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL).
[0083] When the organic emission layer 720 includes all the layers, the hole injection layer is disposed on the pixel electrode 710 serving as an anode, and the hole transport layer, the emission layer, the electron transport layer, and the electron injection layer may be sequentially disposed (or stacked) thereon.
[0084] The organic emission layer 720 may include a red organic emission layer that emits red light, a green organic emission layer that emits green light, and a blue organic emission layer that emits blue light. The red organic emission layer, the green organic emission layer, and the blue organic emission layer are respectively formed in red pixels, green pixels, and blue pixels, thereby realizing a color image.
[0085] In addition, the organic emission layer 720 can realize a color image by stacking the red organic emission layer, the green organic emission layer, and the blue organic emission layer in red pixels, green pixels, and blue pixels, and forming a red filter, a green filter, and a blue filter for each pixel.
[0086] As another example, a white organic emission layer that emits white light is formed in all of the red pixels, green pixels, and blue pixels, and a red filter, a green filter, and a blue filter are formed for each pixel, thereby realizing a color image. In the case of realizing a color image by using the white organic emission layer and the filters, a deposition mask for depositing the red organic emission layer, the green organic emission layer, and the blue organic emission layer on each pixel (i.e., red pixels, green pixels, and blue pixels) may not be used.
[0087] The white organic emission layer may include one organic emission layer and have a structure that emits white light by stacking the organic emission layers. For example, the white organic emission layer may have a structure that emits white light by combining at least one yellow organic emission layer and at least one blue organic emission layer, at least one cyan organic emission layer and at least one red organic emission layer, or at least one magenta organic emission layer and at least one green organic light-emitting layer, etc.
[0088] The common electrode 730 is formed on the pixel definition layer 350 and the organic emission layer 720. The common electrode 730 may include, such as ITO, IZO, ZnO, or In 2 O 3a transparent conductive material or a reflective metal such as lithium (Li), calcium (Ca), lithium fluoride / calcium (LiF / Ca), lithium fluoride / aluminum (LiF / Al), aluminum (Al), silver (Ag), magnesium (Mg), or gold (Au). The common electrode 730 may be a cathode of the organic light-emitting element 70. As described above, the pixel electrode 710, the organic emission layer 720, and the common electrode 730 form the organic light-emitting element 70.
[0089] In the display device according to the present exemplary embodiment, the common electrode 730 is disposed in the display area PA and not disposed in the transmissive area TA. As described above, if the common electrode 730 is formed only in the display area PA, light reflection by the common electrode 730 is prevented, thereby improving the transmittance of the transparent display device.
[0090] An outer coating (not shown) for protecting the organic light-emitting element 70 may be formed on the common electrode 730. The outer coating may be disposed in the display area PA and the transmissive area TA.
[0091] As described above, in the display device according to the present exemplary embodiment, the transmissive window TW is formed to overlap with the light-blocking layer BL, and the width between the edges of the transmissive window TW is formed to be smaller than the width between the edges of the light-blocking layer BL. Accordingly, the buffer layer 120 overlapping with the transmissive window TW overlaps with the light-blocking layer BL. When the transmissive window TW (which is formed in the insulating layer disposed in the transmissive area TA) is formed, the buffer layer 120 is covered by the light-blocking layer BL, thereby preventing the buffer layer 120 from being damaged. Accordingly, the transmittance of the display device can be improved while damage to the buffer layer 120 can be prevented, thereby preventing deterioration of the quality of the display device due to damage to the buffer layer 120.
[0092] Hereinafter, reference will be made to Figures 7 to 9 describe a display device according to an exemplary embodiment. Figure 7 is a layout diagram of a display device according to an exemplary embodiment. Figure 8 is a layout diagram showing a pixel area of a display device according to an exemplary embodiment. Figure 9 is taken along line IX-IX Figure 8 a cross-sectional view of the display device.
[0093] Reference Figure 7 Accordingly, the structure and constituent elements of the display device according to the present exemplary embodiment may be substantially similar to those of the display device shown in reference Figure 1 Therefore, a repeated description thereof will be omitted.
[0094] A display device according to the present exemplary embodiment includes a display area PA for displaying an image and a transmissive area TA for transmitting light. The display area PA includes pixels PX1, PX2, and PX3. The pixels PX1, PX2, and PX3 may display different colors from each other, and the pixels PX1, PX2, and PX3 may form a point. The pixels PX1, PX2, and PX3 may include a first pixel PX1 that displays a first color, a second pixel PX2 that displays a second color, and a third pixel PX3 that displays a third color.
[0095] The transmissive area TA is an area for transmitting light, and a transmissive window TW is formed in the transmissive area TA. The transmissive window TW includes a first transmissive hole TH1 and a second transmissive hole TH2. The first transmissive hole TH1 is a transmissive hole close to the substrate 110, and the second transmissive hole TH2 is a transmissive hole connected to the first transmissive hole TH1.
[0096] As referred to Figure 7 as shown, the edges of the first transmissive hole TH1 and the second transmissive hole TH2 are the edges measured in the adjacent portion of the first transmissive hole TH1 and the second transmissive hole TH2. In the adjacent portion of the first transmissive hole TH1 and the second transmissive hole TH2, the edge of the first transmissive hole TH1 protrudes further than the edge of the second transmissive hole TH2. The ratio of the area of the transmissive area TA to the total area of the display area PA and the transmissive area TA may be in the range of about 20% to about 70%.
[0097] In the display device according to the present exemplary embodiment, one transmissive window TW of the transmissive area TA is formed in the pixels PX1, PX2, and PX3. However, it should be noted that the transmissive window TW of the transmissive area TA may be separately formed in each pixel area.
[0098] Hereinafter, reference will be made to Figure 8 and Figure 9 for a detailed description Figure 7 of an example of the display device.
[0099] First, the transmissive area TA will be described.
[0100] The transmissive area TA includes a buffer layer 120 provided on the substrate 110 and the transmissive window TW overlapping the buffer layer 120. The substrate 110 may be flexible and may include an organic material, an inorganic material, glass, or a metal such as stainless steel. The substrate 110 may be flexible, but is not limited thereto, and it may be stretchable, foldable, bendable, or rollable. Since the substrate 110 is flexible, stretchable, foldable, bendable, or rollable, the display device may be flexible, stretchable, foldable, bendable, or rollable.
[0101] The transmissive window TW is an opening formed in an insulating layer such as the second insulating layer 140, the interlayer insulating layer 160, the planarization layer 180, and the pixel defining layer 350 disposed in the display area PA and the transmissive area TA. The transmissive window TW is formed to pass through the second insulating layer 140, the interlayer insulating layer 160, the planarization layer 180, and the pixel defining layer 350.
[0102] The transmissive window TW includes a first transmissive hole TH1 adjacent to the substrate 110 and a second transmissive hole TH2 connected to the first transmissive hole TH1. A third width W3 of a third edge EG3 of the first transmissive hole TH1 is greater than a fourth width W4 of a fourth edge EG4 which is an edge of the second transmissive hole TH2 adjacent to the first transmissive hole TH1. That is, the third edge EG3 of the first transmissive hole TH1 protrudes further than the fourth edge EG4 of the second transmissive hole TH2 adjacent to the first transmissive hole TH1. As the distance from the substrate 110 increases, the width of the fourth edge EG4 of the second transmissive hole TH2 may be widened. In this way, the transmissive window TW has an inverted conical structure in a portion adjacent to the substrate 110 in a direction away from the substrate 110, and then has a positive conical structure in a portion further away from the substrate 110.
[0103] The display device according to the exemplary embodiment may include the transmissive window TW formed in the insulating layer disposed in the transmissive area TA, which can improve the transmittance of external light. When the transmissive window TW is formed in the insulating layer disposed in the transmissive area TA, the buffer layer 120 may be etched, which may damage the buffer layer 120. Thus, unnecessary components such as impurities or moisture penetrate, which may deteriorate the quality of the display device.
[0104] According to the exemplary embodiment, when forming the transmissive window TW, after forming a semiconductor layer (not shown) on an area overlapping with the transmissive window TW, the insulating layer is etched to form the transmissive window TW. The semiconductor layer is formed wider than the area where the transmissive window TW will be formed. After the transmissive window TW is formed in the insulating layer, the semiconductor layer disposed in the area overlapping with the transmissive window TW is removed.
[0105] In this way, when the transmissive window TW is formed in the insulating layer disposed in the transmissive area TA, since the buffer layer 120 is covered by the semiconductor layer, the buffer layer 120 can be prevented from being damaged. After the transmissive window TW is formed, the semiconductor layer covering the buffer layer 120 is removed, which can improve the transmittance of the transmissive area TA of the display device.
[0106] In addition, before forming the transmissive window TW, the semiconductor layer is formed wider than the region where the transmissive window TW will be formed on the buffer layer 120. The insulating layer is deposited on the semiconductor layer, the transmissive window TW is formed in the insulating layer, and then the semiconductor layer is removed. In this way, the first transmissive hole TH1 is formed at the portion where the removed semiconductor layer has been formed.
[0107] In this way, since the area of the semiconductor layer formed before forming the transmissive window TW is larger than the area of the transmissive window TW, the third edge EG3 of the first transmissive hole TH1 formed in the region where the semiconductor layer has been formed protrudes further than the fourth edge EG4 of the adjacent second transmissive hole TH2. Therefore, the transmissive window TW has an inverted conical structure in the portion adjacent to the substrate 110 in a direction away from the substrate 110, and then has a positive conical structure in a portion farther from the substrate 110.
[0108] In this way, the transmittance of the display device can be increased by removing the semiconductor layer formed in the transmissive region TA. In addition, since damage to the buffer layer 120 is prevented when forming the transmissive window TW, deterioration in the quality of the display device due to damage to the buffer layer 120 can be prevented.
[0109] As Figures 7 to 9 shown, the structure and constituent elements of the display area PA of the display device according to the present exemplary embodiment can be substantially similar to the structure and constituent elements of the display area PA of the display device shown in the reference Figures 1 to 6 shown. Therefore, its repeated description will be omitted to avoid obscuring the exemplary embodiments described herein.
[0110] As described above, in the display device according to the present exemplary embodiment, the semiconductor layer is provided on the buffer layer 120, and the insulating layer is provided on the buffer layer 120. The transmissive window TW is formed in the insulating layer, and then the semiconductor layer is removed. In this way, damage to the buffer layer 120 can be prevented while increasing the light transmittance of the display device, thereby preventing deterioration in the quality of the display device due to damage to the buffer layer 120.
[0111] Next, an experimental example according to an exemplary embodiment will be described with reference to Figures 10A to 10C the following. Figures 10A to 10C is a graph showing the results of the experimental example.
[0112] In this experimental example, the first case includes that the transmissive window TW is not formed in the transmissive region TA. The second case is similar to the display device shown in the reference Figures 1 to 6 shown, including the transmissive window TW and the semiconductor layer overlapping the transmissive window TW. The third case is similar to the reference Figures 7 to 9The illustrated display device is similar, including forming a semiconductor layer on the buffer layer 120 before forming the transmissive window TW and removing the semiconductor layer after forming the transmissive window TW.
[0113] Measure the reflectance and transmittance of light according to the wavelength of light incident on the display device, and the results are shown in Figures 10A to 10C in. Figure 10A The results of the first case are shown, Figure 10B The results of the second case are shown, Figure 10C The results of the third case are shown. In Figures 10A to 10C in, the reflectance of light according to the wavelength of light incident on the display device is represented by R, and the transmittance is represented by T. Refer to Figures 10A to 10C , the second case and the third case have a small external light reflectance and a high transmittance compared to the first case.
[0114] According to the exemplary embodiment, damage to the buffer layer 120 can be prevented, thereby preventing quality degradation of the display device due to damage to the buffer layer 120, and at the same time improving the transmittance of the display device.
[0115] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such exemplary embodiments, but rather to the broader scope of the presented claims and various obvious modifications and equivalent arrangements.
Claims
1. A display device, comprising a first region for displaying an image and a second region for transmitting external light, the display device comprising: a substrate disposed in the first region and the second region; a buffer layer disposed on the substrate; a first electrode and a second electrode disposed in the first region and overlapping each other; an emission layer disposed between the first electrode and the second electrode in the first region; a semiconductor layer disposed in the first region; and an insulating layer disposed on the semiconductor layer and having a hole disposed in the second region and exposing a part of the buffer layer, wherein: the hole includes a first hole portion directly on the buffer layer and a second hole portion disposed on the first hole portion and overlapping the first hole portion; and the width of the first hole portion is greater than the width of the second hole portion.
2. The display device according to claim 1, wherein the buffer layer is disposed in the first region and the second region.
3. The display device according to claim 2, wherein the semiconductor layer is directly disposed on the buffer layer.
4. The display device according to claim 3, wherein the semiconductor layer includes an oxide semiconductor.
5. The display device according to claim 4, wherein the insulating layer includes a first insulating layer directly disposed on the buffer layer and contacting the semiconductor layer, a second insulating layer disposed between the semiconductor layer and the first electrode, and a third insulating layer disposed on the first electrode, and wherein the second hole portion is located in the first insulating layer, the second insulating layer, and the third insulating layer.
6. The display device according to claim 5, wherein the second electrode does not extend into the hole.
7. The display device according to claim 1, wherein the substrate is flexible.
8. The display device according to claim 1, wherein the semiconductor layer is directly disposed on the buffer layer.
9. The display device according to claim 1, wherein the semiconductor layer includes an oxide semiconductor.
10. The display device according to claim 1, wherein the insulating layer includes a second insulating layer disposed between the semiconductor layer and the first electrode and a third insulating layer disposed on the first electrode, and the second hole portion is located in the second insulating layer and the third insulating layer.
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