Method of operating a storage device and method of operating a storage system using the same

Abstract

In a method of operating a storage device including a first storage device and a second storage device connected to each other via a host device, a data migration request for a first namespace included in the first storage device is received. A second namespace is generated in the second storage device. The second namespace corresponds to the first namespace. A pointer table for performing a data migration operation corresponding to the data migration request is set. First data and second data are migrated to the second namespace based on the pointer table. The first data is stored in the first namespace. The second data is stored in a first buffer memory included in the first storage device and corresponds to the first namespace. Based on the data migration operation being performed, the second data is directly sent from the first buffer memory to the second namespace.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0139100, filed on October 26, 2020, with the Korean Intellectual Property Office (KIPO), the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The example embodiments generally relate to semiconductor integrated circuits, and more specifically, to methods of operating storage devices and methods of operating storage systems using methods of operating storage devices. Background Technology

[0004] Certain types of data storage devices comprise one or more semiconductor memory devices. Examples of such data storage devices include solid-state drives (SSDs). Compared to hard disk drives (HDDs), these types of data storage devices can offer a variety of design and / or performance advantages. Examples of potential advantages include the absence of moving mechanical parts, higher data access speeds, stability, durability, and / or lower power consumption. In recent years, various systems (e.g., laptops, automobiles, aircraft, drones, etc.) have adopted SSDs for data storage.

[0005] Recently, some data storage devices, including semiconductor storage devices, have supported namespace functionality. For example, to support the operation of host devices, a data storage device implemented using a single physical device can be divided into multiple logical devices (e.g., namespaces). The host device can then manage data based on these namespaces. Summary of the Invention

[0006] At least one example embodiment of this disclosure provides a method for operating a storage device that supports namespace functionality and is capable of efficiently performing data migration operations.

[0007] At least one example embodiment of this disclosure provides a method for operating a storage system using a method for operating a storage device.

[0008] According to an example embodiment, in a method of operating a storage device, the storage device includes a first storage device and a second storage device interconnected via a host device. A data migration request for a first namespace included in the first storage device is received. A second namespace is generated in the second storage device. The second namespace corresponds to the first namespace. A pointer table is set for performing data migration operations corresponding to the data migration request. First data and second data are migrated to the second namespace based on the pointer table. The first data is stored in the first namespace. The second data is stored in a first buffer memory included in the first storage device and corresponds to the first namespace. Based on the execution of the data migration operation, the second data is sent directly from the first buffer memory to the second namespace.

[0009] According to an example embodiment, in a method of operating a storage system including a host device, a first storage device, and a second storage device, the first and second storage devices are interconnected via the host device. When the host device accesses a first namespace included in the first storage device, a data migration operation is performed on the first namespace. After the data migration operation is completed, the host device accesses a second namespace included in the second storage device. Based on the performed data migration operation, a data migration request for the first namespace is generated. A second namespace is created in the second storage device. The second namespace corresponds to the first namespace. A pointer table is set for performing the data migration operation. Based on the pointer table, first data and second data are migrated to the second namespace. The first data is stored in the first namespace. The second data is stored in a first buffer memory included in the first storage device and corresponds to the first namespace. Based on the data migration operation being performed, the second data is sent directly from the first buffer memory to the second namespace.

[0010] According to an example embodiment, in a method of operating a storage device, the storage device includes a first storage device and a second storage device interconnected via a host device. When an application or virtual machine executed by the host device accesses a first namespace included in the first storage device, a data migration request for the first namespace is received from the host device. A second namespace is generated in the second storage device based on the data migration request. The second namespace corresponds to the first namespace and has a capacity greater than or equal to the capacity of the first namespace. A pointer table for performing data migration operations is set based on the data migration request. First data and second data are migrated to the second namespace based on the pointer table. The first data is stored in the first namespace. The second data is stored in a first buffer memory included in the first storage device and corresponds to the first namespace. When setting the pointer table, a first pointer, a second pointer, and a third pointer are set in the first namespace. The first pointer, the second pointer, and the third pointer indicate the locations of the first data and the second data stored consecutively in the first namespace. A first target pointer, a second target pointer, and a third target pointer are set in the second namespace. The first target pointer, the second target pointer, and the third target pointer indicate the locations of the first data and the second data stored consecutively in the second namespace. Based on the data migration operation, the first data is copied to the second namespace, making the first data correspond to the first target pointer and the second target pointer. Similarly, the second data is copied to the second namespace, making the second data correspond to the second target pointer and the third target pointer. Because of the data migration operation, the second data is not flushed from the first buffer to the first namespace, but is sent directly from the first buffer to the second namespace without passing through the first namespace. Attached Figure Description

[0011] The illustrative, non-limiting exemplary embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0012] Figure 1 This is a flowchart illustrating a method of operating a storage device according to an example embodiment.

[0013] Figure 2 This is a block diagram illustrating a storage device and a storage system including the storage device according to an example embodiment.

[0014] Figure 3 This is a block diagram illustrating an example of a storage controller included in a storage device according to an example embodiment.

[0015] Figure 4 This is a block diagram illustrating an example of a non-volatile memory included in a storage device according to an example embodiment.

[0016] Figure 5A , Figure 5B, Figure 6A and Figure 6B This is a diagram illustrating operations for creating, setting up, and managing namespaces in a storage device, based on an example embodiment.

[0017] Figure 7A , Figure 7B and Figure 7C It is used to describe Figure 1 The diagram shows an example of receiving a data migration request and an example of generating a second namespace.

[0018] Figure 8 It is shown Figure 1 The flowchart shows an example of setting up a pointer table.

[0019] Figure 9A and Figure 9B It is used to describe settings Figure 8 A diagram illustrating the operations of the pointer table.

[0020] Figure 10 It is shown Figure 1 The flowchart shows an example of migrating the first and second data to the second namespace.

[0021] Figure 11A and Figure 11B It is used to describe Figure 10 A diagram illustrating the operation of migrating the first and second data to the second namespace.

[0022] Figure 12A and Figure 12B It is used to describe Figure 10 A diagram illustrating an example of migrating the first and second data to the second namespace.

[0023] Figure 13 This is a flowchart illustrating a method of operating a storage device according to an example embodiment.

[0024] Figure 14 This is a flowchart illustrating a method for operating a storage system according to an example embodiment.

[0025] Figure 15 This is a block diagram illustrating a data center including a storage system according to an example embodiment. Detailed Implementation

[0026] Various exemplary embodiments will be described more fully with reference to the accompanying drawings, which illustrate embodiments. However, this disclosure may be implemented in many different forms and should not be construed as limited to the embodiments set forth herein. Throughout this application, the same reference numerals refer to the same elements.

[0027] Figure 1 This is a flowchart illustrating a method of operating a storage device according to an example embodiment.

[0028] Reference Figure 1 The method of operating a storage device according to an example embodiment can be performed by a first storage device and a second storage device connected to each other via a host device. Each of the first and second storage devices may include a storage controller, a plurality of non-volatile memories, and a buffer memory (or cache memory). (See also...) Figure 2 Describe the detailed configuration of the storage device and the storage system that includes the storage device.

[0029] In the method of operating a storage device according to an example embodiment, a data migration request for a first namespace included in the first storage device is received (S100). For example, the data migration request can be provided from a host device to the first storage device and a second storage device. For example, when accessing the first storage device (e.g., when the host device accesses the first storage device), the data migration request can be provided in real time and / or online (or during runtime).

[0030] A namespace can represent a logical partition and / or storage space. Typically, a storage device with relatively high storage capacity can be divided into multiple namespaces, and all of these namespaces can be physically included within the same storage device. Each namespace can be used as a separate and / or independent storage space. For example, the first storage device may also include at least one namespace in addition to the first namespace.

[0031] Based on the data migration request, a second namespace corresponding to the first namespace is generated or created in the second storage device (S200). In other words, the data migration request can be a request for a data migration operation in which the first namespace included in the first storage device is moved or copied to the second namespace included in the second storage device. The first namespace can be referred to as the original namespace or source namespace, and the second namespace can be referred to as the target namespace or destination namespace.

[0032] (S300) Sets up a pointer table for performing data migration operations corresponding to the data migration request. For example, the pointer table may include pointers corresponding to a first namespace (e.g., a source pointer or origin pointer) and target pointers (or destination pointers) corresponding to a second namespace. (See reference...) Figure 8 Describe the operation of S300 in detail.

[0033] The first and second data are migrated to the second namespace based on the pointer table (S400). The first data is stored in the first namespace. The second data is stored in the first buffer memory included in the first storage device, and corresponds to the first namespace. (Refer to...) Figure 10Describe the operation of S400 in detail.

[0034] In some example embodiments, the first data and the second data can be migrated to the second namespace at the same time (or simultaneously). In other words, the first data and the second data can be migrated to the second namespace based on a data migration request received in S100 without any additional requests.

[0035] In some example embodiments, the first data may be cold data already stored in the first namespace, and the second data may be hot data to be flushed from the first buffer to the first namespace. Hereinafter, hot and cold data are not distinguished based on the frequency of data access and / or the number of data updates. Instead, hot and cold data may be distinguished based on the location where the data is stored. For example, data provided from a host device and corresponding to the first namespace may be stored in the first namespace via the first buffer. Among the data to be stored in the first namespace, data that has been flushed from the first buffer to the first namespace may be defined as cold data, and data that has not yet been flushed to the first namespace and remains in the first buffer may be defined as hot data.

[0036] In some example embodiments, when performing a data migration operation, the second data can be sent directly from the first buffer or transferred to the second namespace. For example, when performing a data migration operation, the second data may not be flushed from the first buffer to the first namespace, and may be sent directly from the first buffer to the second namespace without passing through the first namespace.

[0037] In some example embodiments, as described above, the first storage device and the second storage device may not be directly connected to each other, but may be connected to each other via a host device. Therefore, the operation of sending second data directly from the first buffer memory to the second namespace can be interpreted as: the second data being sent from the first buffer memory to the second namespace via the host device without passing through the host memory included in the host device, rather than the second data being sent directly from the first buffer memory to the second namespace without passing through any other components.

[0038] In some example embodiments, the first and second storage devices may operate based on the Fast Non-Volatile Memory (NVMe) protocol. NVMe can be a register-level interface that facilitates communication between storage devices such as solid-state drives (SSDs) and host software. NVMe can be based on existing Fast Peripheral Component Interconnect (PCIe) buses and can be an interface designed or optimized for SSDs. NVMe drives can be accessed using namespaces.

[0039] In the method for operating a storage device according to the example embodiment, when performing a data migration operation to move a first namespace included in a first storage device to a second namespace included in a second storage device, first data stored in the first namespace and second data stored in a first buffer memory included in the first storage device can be migrated to the second namespace in one step. Furthermore, the second data can be sent directly from the first buffer memory to the second namespace without passing through the host memory included in the host device. Therefore, online and / or real-time namespace data migration processes can be efficiently implemented while maintaining data integrity, and data processing time and space can be saved.

[0040] Figure 2 This is a block diagram illustrating a storage device and a storage system including the storage device according to an example embodiment.

[0041] Reference Figure 2 The storage system 10 includes a host device 100, a first storage device 200, and a second storage device 300.

[0042] Host device 100 controls the overall operation of storage system 10. For example, host device 100 may include host processor 110 and host memory 120. Host processor 110 can control the operation of host device 100. For example, host processor 110 may execute an operating system (OS). Host memory 120 may store instructions and / or data executed and / or processed by host processor 110. For example, the operating system executed by host processor 110 may include a file system for file management and device drivers for controlling peripheral devices including storage devices 200 and 300 at the operating system level.

[0043] In some example embodiments, such as referring to Figure 6A and Figure 6B The host device 100 can execute multiple applications and / or multiple virtual machines that are different from each other and are driven or run on an operating system.

[0044] Host device 100 accesses each of the first storage device 200 and the second storage device 300. The first storage device 200 may include a first storage controller 210, a plurality of first non-volatile memories 220a, 220b and 220c and a first buffer memory 230. The second storage device 300 may include a second storage controller 310, a plurality of second non-volatile memories 320a, 320b and 320c and a second buffer memory 330.

[0045] The first storage controller 210 can control the operation of the first storage device 200 and / or the operation of multiple first non-volatile memories 220a, 220b and 220c based on commands, addresses and data received from the host device 100.

[0046] Multiple first non-volatile memories 220a, 220b, and 220c can store multiple types of data. For example, the multiple first non-volatile memories 220a, 220b, and 220c can store metadata, various user data, etc.

[0047] In some example embodiments, each of the plurality of first non-volatile memories 220a, 220b, and 220c may include NAND flash memory. In other example embodiments, each of the plurality of first non-volatile memories 220a, 220b, and 220c may include one of the following: electrically erasable programmable read-only memory (EEPROM), phase-change random access memory (PRAM), resistive random access memory (RRAM), nanofloating gate memory (NFGM), polymer random access memory (PoRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), etc.

[0048] In some example embodiments, multiple namespaces may be provided on multiple first non-volatile memories 220a, 220b, and 220c. For example, as referenced... Figure 5A and Figure 5B As described above, a namespace may be set on at least a portion of the plurality of first non-volatile memories 220a, 220b and 220c.

[0049] The first buffer memory 230 may store instructions and / or data executed and / or processed by the first memory controller 210, and may temporarily store data stored in, or data to be stored in, the multiple first non-volatile memories 220a, 220b, and 220c. For example, the first buffer memory 230 may include at least one of various volatile memories, such as dynamic random access memory (DRAM), static random access memory (SRAM), etc.

[0050] The second storage controller 310 can control the operation of the second storage device 300 and / or the operation of multiple second non-volatile memories 320a, 320b, and 320c. The multiple second non-volatile memories 320a, 320b, and 320c can store multiple data items. The second buffer memory 330 can store instructions and / or data executed and / or processed by the second storage controller 310, and can temporarily store data stored in the multiple second non-volatile memories 320a, 320b, and 320c, or data to be stored in the multiple second non-volatile memories 320a, 320b, and 320c. The second storage controller 310, the multiple second non-volatile memories 320a, 320b, and 320c, and the second buffer memory 330 can be substantially the same as the first storage controller 210, the multiple first non-volatile memories 220a, 220b, and 220c, and the first buffer memory 230, respectively.

[0051] The first storage device 200 and the second storage device 300 can execute reference Figure 1 The method described is as follows. For example, the first storage device 200 and the second storage device 300 can receive data migration requests from the host device 100. A second namespace corresponding to a first namespace in the first storage device 200 can be generated in the second storage device 300. A pointer table for performing data migration operations can be set, and data in the first namespace and the first buffer memory 230 can be migrated to the second namespace in one step based on the pointer table. In other words, online and / or real-time namespace data migration processes can be performed. Additionally, the first storage device 200 and the second storage device 300 can perform operations that refer to... Figure 13 The described method of operating a storage device, and which host device 100, first storage device 200, and second storage device 300 can execute, will be referred to Figure 14 Describes the methods for operating the storage system.

[0052] In some example embodiments, each of the first storage device 200 and the second storage device 300 may be a solid-state drive (SSD). In other example embodiments, each of the first storage device 200 and the second storage device 300 may be a universal flash memory (UFS), a multimedia card (MMC), or an embedded multimedia card (eMMC). In other example embodiments, each of the first storage device 200 and the second storage device 300 may be one of a secure digital card (SD), a micro SD card, a memory stick, a chip card, a universal serial bus (USB) card, a smart card, a compact flash memory (CF) card, etc.

[0053] In some example embodiments, each of the first storage device 200 and the second storage device 300 can be connected to the host device 100 via a block-accessible interface, which may include, for example, UFS, eMMC, Serial Advanced Technology Link (SATA) bus, High Speed ​​Non-Volatile Memory (NVMe) bus, Serial Attached SCSI (SAS) bus, etc. Each of the storage devices 200 and 300 can provide a block-accessible interface to the host device 100 using a block-accessible address space corresponding to the access size of the plurality of non-volatile memories 220a, 220b, 220c, 320a, 320b, and 320c, allowing access to data stored in the plurality of non-volatile memories 220a, 220b, 220c, 320a, 320b, and 320c in blocks.

[0054] In some example embodiments, storage system 10 can be any computing system, such as a personal computer (PC), server computer, data center, workstation, digital television, set-top box, navigation system, etc. In other example embodiments, storage system 10 can be any mobile system, such as a mobile phone, smartphone, tablet computer, laptop computer, personal digital assistant (PDA), portable multimedia player (PMP), digital camera, portable game console, music player, camcorder, video player, navigation device, wearable device, Internet of Things (IoT) device, Internet of Everything (IoE) device, e-book reader, virtual reality (VR) device, augmented reality (AR) device, robotic device, drone, etc.

[0055] Figure 3 This is a block diagram illustrating an example of a storage controller included in a storage device according to an example embodiment.

[0056] Reference Figure 3 The storage controller 400 includes at least one processor 410, memory 420, namespace manager 430, host interface (I / F) 440, error correction code (ECC) block 450, and memory interface 460. For example, the storage controller 400 may be... Figure 2 The first storage controller 210 or the second storage controller 310 in the middle.

[0057] Processor 410 can respond to a host device (e.g., via host interface 440) Figure 2 The host device 100 receives commands to control the operation of the storage controller 400. In some example embodiments, the processor 410 can control the operation of the storage controller 400 by employing commands for operating the storage device (e.g., ...). Figure 2 The firmware of the first storage device 200 in the system is used to control the various components.

[0058] Memory 420 can store instructions and data executed and processed by processor 410. For example, memory 420 can be implemented using volatile memory with relatively small capacity and high speed (e.g., static random access memory (SRAM), cache memory, etc.).

[0059] Namespace manager 430 can include non-volatile memory (e.g., in storage devices) in the storage device. Figure 2 Namespaces are generated, set up, and managed on the first non-volatile memories 220a, 220b, and 220c in the system. In some example embodiments, at least a portion of the namespace manager 430 may be implemented as hardware. For example, at least a portion of the namespace manager 430 may be included in a computer-based electronic system. In other example embodiments, at least a portion of the namespace manager 430 may be implemented as instruction code or program routines (e.g., software programs). For example, the instruction code or program routines may be executed by the computer-based electronic system and may be stored in any storage device located inside or outside the computer-based electronic system.

[0060] The ECC block 450 used for error correction can be encoded and modulated using Bose-Chaudhuri-Hocquenghem (BCH) codes, low-density parity-check (LDPC) codes, turbo codes, Reed-Solomon codes, convolutional codes, recursive systematic codes (RSC), trellis-coded modulation (TCM), block-coded modulation (BCM), etc., or can be used to perform ECC encoding and ECC decoding using the above codes or other error-correcting codes.

[0061] Host interface 440 provides a physical connection between the host device and the storage device. Host interface 440 provides an interface corresponding to the host's bus format for communication between the host device and the storage device. In some example embodiments, the host device's bus format may be a Small Computer System Interface (SCSI) or a Serial Attached SCSI (SAS) interface. In other example embodiments, the host device's bus format may be USB, Fast Peripheral Component Interconnect (PCIe), Advanced Technology Attachment (ATA), Parallel ATA (PATA), Serial ATA (SATA), or High Speed ​​Non-Volatile Memory (NVM) (NVMe), etc.

[0062] Memory interface 460 can exchange data with non-volatile memory. Memory interface 460 can transfer data to or receive data read from non-volatile memory. In some example embodiments, memory interface 460 can be connected to non-volatile memory via a single channel. In other example embodiments, memory interface 460 can be connected to non-volatile memory via two or more channels.

[0063] Figure 4 This is a block diagram illustrating an example of a non-volatile memory included in a storage device according to an example embodiment.

[0064] Reference Figure 4 The non-volatile memory 500 includes a memory cell array 510, an address decoder 520, a page buffer circuit 530, a data input / output (I / O) circuit 540, a voltage generator 550, and a control circuit 560. For example, the non-volatile memory 500 could be... Figure 2 One of the first non-volatile memories 220a, 220b and 220c in the first non-volatile memories 220a, 220b and 220c, and one of the second non-volatile memories 320a, 320b and 320c.

[0065] The memory cell array 510 is connected to the address decoder 520 via multiple serial select lines (SSL), multiple word lines (WL), and multiple ground select lines (GSL). The memory cell array 510 is also connected to the page buffer circuit 530 via multiple bit lines (BL). The memory cell array 510 may include multiple memory cells (e.g., multiple non-volatile memory cells) connected to the multiple word lines (WL) and multiple bit lines (BL). The memory cell array 510 may be divided into multiple memory blocks BLK1, BLK2, ..., BLKz, each memory block comprising memory cells. Furthermore, each of the multiple memory blocks BLK1, BLK2, ..., BLKz may be divided into multiple pages.

[0066] In some example embodiments, multiple memory cells can be arranged in a two-dimensional (2D) array structure or a three-dimensional (3D) vertical array structure. A three-dimensional vertical array structure may include vertically oriented strings of cells such that at least one memory cell is situated above another. At least one memory cell may include a charge trapping layer. Suitable configurations for memory cell arrays comprising 3D vertical array structures are described herein by reference in their entirety in the following patent documents: U.S. Patent Nos. 7,679,133; 8,553,466; 8,654,587; 8,559,235 and U.S. Patent Application Publication No. 2011 / 0233648.

[0067] The control circuit 560 is controlled from the outside (e.g., Figure 2The host device 100 and / or the first storage controller 210 receive commands CMD and address ADDR, and control the erase, program, and read operations of the non-volatile memory 500 based on the commands CMD and address ADDR. Erasing operations may include executing a series of erase cycles, and programming operations may include executing a series of programming cycles. Each programming cycle may include a programming operation and a programming verification operation. Each erase cycle may include an erase operation and an erase verification operation. Read operations may include normal read operations and data recovery read operations.

[0068] For example, control circuit 560 can generate control signal CON for controlling voltage generator 550, and can generate control signal PBC for controlling page buffer circuit 530 based on command CMD, and can generate row address R_ADDR and column address C_ADDR based on address ADDR. Control circuit 560 can provide row address R_ADDR to address decoder 520, and can provide column address C_ADDR to data I / O circuit 540.

[0069] Address decoder 520 can be connected to memory cell array 510 via multiple serial select lines (SSL), multiple word lines (WL), and multiple ground select lines (GSL).

[0070] For example, in a data erase / write / read operation, the address decoder 520 can determine at least one word line among multiple word lines WL as the selected word line based on the row address R_ADDR, and can determine the remaining word lines or unselected word lines among multiple word lines WL other than the selected word line as unselected word lines.

[0071] Furthermore, during data erase / write / read operations, the address decoder 520 can determine at least one of the multiple string select lines SSL as the selected string select line based on the row address R_ADDR, and can determine the remaining string select lines or unselected string select lines other than the selected string select line in the multiple string select lines SSL.

[0072] Furthermore, during data erase / write / read operations, the address decoder 520 can determine at least one of the multiple ground selection lines GSL as the selected ground selection line based on the row address R_ADDR, and can determine the remaining ground selection lines or unselected ground selection lines other than the selected ground selection line in the multiple ground selection lines GSL as unselected ground selection lines.

[0073] Voltage generator 550 can generate the voltage VS required for the operation of non-volatile memory 500 based on power supply PWR and control signal CON. Voltage VS can be applied to multiple serial select lines SSL, multiple word lines WL, and multiple ground select lines GSL via address decoder 520. Additionally, voltage generator 550 can generate the erase voltage VERS required for data erase operations based on power supply PWR and control signal CON. Eraser voltage VERS can be applied directly to memory cell array 510 or via bit line BL.

[0074] For example, during an erase operation, voltage generator 550 can apply an erase voltage VERS to the common source line and / or bit line BL of the memory block (e.g., a selected memory block), and can apply an erase enable voltage (e.g., a ground voltage) to all or some word lines of the memory block via address decoder 520. Furthermore, during an erase verification operation, voltage generator 550 can simultaneously apply erase verification voltages to all word lines of the memory block, or sequentially apply erase verification voltages to the word lines one by one.

[0075] For example, during programming operations, voltage generator 550 can apply a programming voltage to selected word lines via address decoder 520, and can apply a programming pass voltage to unselected word lines. Furthermore, during programming verification operations, voltage generator 550 can apply a programming verification voltage to selected word lines via address decoder 520, and can apply a verification pass voltage to unselected word lines.

[0076] Furthermore, during normal read operations, voltage generator 550 can apply a read voltage to the selected word line via address decoder 520, and can also apply a read pass voltage to the unselected word line. During data recovery read operations, voltage generator 550 can apply a read voltage to the word line adjacent to the selected word line via address decoder 520, and can also apply a recovery read voltage to the selected word line.

[0077] Page buffer circuitry 530 can be connected to memory cell array 510 via multiple bit lines BL. Page buffer circuitry 530 may include multiple page buffers. In some example embodiments, each page buffer may be connected to one bit line. In other example embodiments, each page buffer may be connected to two or more bit lines.

[0078] Page buffer circuit 530 can store data DAT to be programmed into memory cell array 510, or can read data DAT sensed from memory cell array 510. In other words, page buffer circuit 530 can operate as a write driver or sense amplifier depending on the operating mode of non-volatile memory 500.

[0079] The data I / O circuit 540 can be connected to the page buffer circuit 530 via the data line DL. The data I / O circuit 540 can provide data DAT from outside the non-volatile memory 500 to the memory cell array 510 via the page buffer circuit 530 based on the column address C_ADDR, or it can provide data DAT from the memory cell array 510 to outside the non-volatile memory 500.

[0080] Figure 5A , Figure 5B , Figure 6A and Figure 6B This is a diagram used to describe the operations of generating, setting up and managing namespaces in a storage device according to an example embodiment.

[0081] Reference Figure 5A This illustrates an example of creating and setting multiple namespaces NS11, NS21, ..., NSK1 on multiple non-volatile memories NVM1, NVM2, ..., NVMK, where K is a natural number greater than or equal to 2. For example, multiple non-volatile memories NVM1, NVM2, ..., NVMK can be included in a single storage device, and therefore multiple namespaces NS11, NS21, ..., NSK1 can also be included in a single storage device.

[0082] exist Figure 5A In the example, a namespace can be created and set on a non-volatile memory. For example, the namespace NS11 can be created and set on the entire area of ​​non-volatile memory NVM1, the namespace NS21 can be created and set on the entire area of ​​non-volatile memory NVM2, and the namespace NSK1 can be created and set on the entire area of ​​non-volatile memory NVMK.

[0083] In some example embodiments, multiple namespaces NS11, NS21, ..., NSK1 may have the same capacity or different capacities. Although Figure 5A The example shows that the number of namespaces NS11, NS21, ..., NSK1 is equal to the number of non-volatile memories NVM1, NVM2, ..., NVMK. However, the example embodiment is not limited to this, and the number of namespaces and the number of non-volatile memories can be changed according to the example embodiment.

[0084] Reference Figure 5B This illustrates another example of creating and setting multiple namespaces NS12, NS22, ..., NSK2 on multiple non-volatile memories NVM1, NVM2, ..., NVMK. (The text will omit information based on...) Figure 5A Repeated description.

[0085] exist Figure 5BIn the example, a namespace can be created and set on all the multiple non-volatile memories NVM1, NVM2, ..., NVMK. For example, namespace NS12 can be created and set on some regions of all the multiple non-volatile memories NVM1, NVM2, ..., NVMK, namespace NS22 can be created and set on some other regions of all the multiple non-volatile memories NVM1, NVM2, ..., NVMK, and namespace NSK2 can be created and set on some other regions of all the multiple non-volatile memories NVM1, NVM2, ..., NVMK.

[0086] Although not in Figure 5A and Figure 5B As shown, however, the operations for generating and setting namespaces can be modified according to example embodiments. For example, a namespace can be generated and set over an entire region or a portion of some non-volatile memory (e.g., non-volatile memories NVM1 and NVM2).

[0087] Reference Figure 6A This illustrates an example of allocating or assigning multiple namespaces NS1, NS2, ..., NSK. For example, multiple namespaces NS1, NS2, ..., NSK can be included in a single storage device.

[0088] exist Figure 6A In the example, based on the host device (e.g., Figure 2 The types and characteristics of multiple applications APP1, APP2, ..., APPK executed or running on the host device 100. Each of the multiple applications APP1, APP2, ..., APPK can be assigned to a corresponding namespace among multiple namespaces NS1, NS2, ..., NSK. For example, namespace NS1 can be assigned to application APP1, namespace NS2 can be assigned to application APP2, and namespace NSK can be assigned to application APPK.

[0089] In some example embodiments, each of the multiple applications APP1, APP2, ..., APPK can be referred to as an application and can be an application software program that executes on an operating system. For example, each of the multiple applications APP1, APP2, ..., APPK can be programmed to help generate, copy, and delete files. For example, each of the multiple applications APP1, APP2, ..., APPK can provide various services, such as video applications, game applications, web browser applications, etc. Each of the multiple applications APP1, APP2, ..., APPK can generate tasks, jobs, and / or requests for using or accessing the corresponding namespaces in the multiple namespaces NS1, NS2, ..., NSK (e.g., for performing data write / read / erase operations on the corresponding namespaces in the multiple namespaces NS1, NS2, ..., NSK). In other words, in Figure 6A In the example, the entity or party that accesses each namespace and performs data migration operations based on the method according to the example embodiment can be one of multiple applications APP1, APP2, ..., APPK.

[0090] In some example implementations, an application can only access one namespace. In other example implementations, two or more applications can access two or more namespaces simultaneously.

[0091] Reference Figure 6B This shows another example of assigning or distributing multiple namespaces NS1, NS2, ..., NSK. (The context will be omitted.) Figure 6A Repeated description.

[0092] For example, based on the type and characteristics of multiple virtual machines VM1, VM2, ..., VM executed or running on the host device, each of the multiple virtual machines VM1, VM2, ..., VM can be assigned to a corresponding namespace among multiple namespaces NS1, NS2, ..., NSK. For example, namespace NS1 can be assigned to virtual machine VM1, namespace NS2 can be assigned to virtual machine VM2, and namespace NSK can be assigned to virtual machine VMK.

[0093] In some example embodiments, the host device may support virtualization functionality. For example, each of the multiple virtual machines VM1, VM2, ..., VM can be a virtualized core or processor generated by virtualization operations and can independently drive an operating system (OS) or application. For example, VMware, Single-Root I / O Virtualization (SR-IOV), etc., can be used to perform virtualization functionality and virtualization operations. For example, the OS driven by the virtual machines can be referred to as, for example, a guest OS. Each of the multiple virtual machines VM1, VM2, ..., VM can generate tasks, jobs, and / or requests for using or accessing the corresponding namespaces in the multiple namespaces NS1, NS2, ..., NSK (e.g., for performing data write / read / erase operations on the corresponding namespaces in the multiple namespaces NS1, NS2, ..., NSK). In other words, in Figure 6B In the example, the entity or party that accesses each namespace and performs data migration operations based on the method according to the example embodiment can be one of multiple virtual machines VM1, VM2, ..., VM.

[0094] The following description will use an example where the data migration operation is performed by an application to illustrate the example embodiments. However, the example embodiments are not limited thereto, and the data migration operation may be performed by a virtual machine.

[0095] Figure 7A , Figure 7B and Figure 7C It is used to describe Figure 1 The diagram shows an example of receiving a data migration request and an example of generating a second namespace.

[0096] Reference Figure 1 and Figure 7A Namespace manager (e.g., Figure 3 The namespace manager 430 in the first storage device SD1 can generate and set the first namespace NS1-1. For example, multiple first non-volatile memories (e.g., ...) included in the first storage device SD1 can be used. Figure 2 A first namespace NS1-1 is provided on at least a portion of the plurality of first non-volatile memories 220a, 220b and 220c. The first storage device SD1 may also include a first buffer memory BUF1.

[0097] The namespace manager can be configured by the host device (e.g., Figure 2The application APP1 executed by the host device 100 is assigned to the first namespace NS1-1, and the application APP1 can access the first namespace NS1-1. For example, the application APP1 can perform a data write operation to store multiple data D1, D2, D3, D4 and D5 into the first namespace NS1-1.

[0098] In some example embodiments, although in Figure 7A Not shown, but the host device may also include a file system, a block layer, and a device driver. The file system manages files used by the host device. For example, the file system can manage filenames, extensions, file attributes, file sizes, cluster information, etc., of files accessed by requests from the host device or by applications executed by the host device. The block layer, which may be called the block input / output layer, can perform data read / write operations on a block-by-block basis. The device driver can control the first storage device SD1 at the operating system level. For example, the device driver can be a software module that controls the kernel of the first storage device SD1. When a data write operation is to be performed, application APP1 can generate a file storage request, the file system can generate a write request corresponding to the file storage request, the block layer can generate an input / output request corresponding to the write request, and the device driver can send a command, address, and multiple data items D1, D2, D3, D4, and D5 to be written to the first storage device SD1 based on the input / output request.

[0099] Data sent by application APP1 to the first storage device SD1 can be sequentially stored in the first namespace NS1-1 via the first buffer memory BUF1. For example, when multiple data D1, D2, D3, D4, and D5 are sent sequentially from data D1 to data D5, data D1 can be temporarily stored in the first buffer memory BUF1, and then stored in the first namespace NS1-1. Subsequently, data D2 can be temporarily stored in the first buffer memory BUF1, and then stored in the first namespace NS1-1. Subsequently, data D3 can be temporarily stored in the first buffer memory BUF1, and then stored in the first namespace NS1-1. Subsequently, data D4 can be temporarily stored in the first buffer memory BUF1, and then stored in the first namespace NS1-1. Data D5 can be temporarily stored in the first buffer memory BUF1, and can remain in the first buffer memory BUF1 in the state before being stored in or flushed to the first namespace NS1-1.

[0100] exist Figure 7AIn the example, according to the example embodiment, data D1, D2, D3, and D4 from the plurality of data D1, D2, D3, D4, and D5 that have been stored, copied, or committed to the first namespace NS1-1 can represent cold data. According to the example embodiment, data D5 from the plurality of data D1, D2, D3, D4, and D5 that is currently stored in the first buffer memory BUF1 and is to be flushed to the first namespace NS1-1 can represent hot data.

[0101] Reference Figure 1 and Figure 7B In S100, application APP1, executed by the host device, can generate a data migration request DMREQ. When application APP1 accesses the first storage device SD1 and the first namespace NS1-1 (e.g., in real-time, online, and / or during I / O execution), it can send the data migration request DMREQ to the first storage device SD1 and the second storage device SD2. The first storage device SD1 and the second storage device SD2 can receive the data migration request DMREQ.

[0102] In some example implementations, a Data Migration Request (DMREQ) can be generated when predetermined conditions (or circumstances) are met. For example, a DMREQ can be generated when it is necessary to back up confidential data such as passwords or important documents, when it is necessary to back up a development OS such as source code, and / or when device failure is predictable.

[0103] Reference Figure 1 and Figure 7C In step S200, the namespace manager can generate and set a second namespace NS1-2 corresponding to the first namespace NS1-1 in the second storage device SD2. For example, this can be achieved by including multiple second non-volatile memories (e.g., ...) in the second storage device SD2. Figure 2 A second namespace NS1-2 is provided on at least a portion of the plurality of second non-volatile memories 320a, 320b and 320c. The second storage device SD2 may also include a second buffer memory BUF2.

[0104] In some example embodiments, the capacity of the second namespace NS1-2 may be greater than or equal to the capacity of the first namespace NS1-1. The second namespace NS1-2 may be a storage space used to replace the first namespace NS1-1; therefore, the capacity of the second namespace NS1-2 may be the same as or greater than the capacity of the first namespace NS1-1.

[0105] In some example embodiments, the first storage device SD1 and the second storage device SD2 may be physically different or distinct from each other.

[0106] Although not in Figure 7A , Figure 7B and Figure 7C As shown, each of the first storage device SD1 and the second storage device SD2 may further include at least one namespace assigned to at least one application other than application APP1.

[0107] Figure 8 It is shown Figure 1 The flowchart shows an example of setting up a pointer table. Figure 9A and Figure 9B It is used to describe settings Figure 8 A diagram illustrating the operations of the pointer table.

[0108] Reference Figure 1 , Figure 8 , Figure 9A and Figure 9B In step S300, a first pointer and a second pointer can be set in the first namespace (S310), and a first target pointer and a second target pointer can be set in the second namespace (S320). The first pointer can indicate the start position of the first data in the first namespace, the second pointer can indicate the end (or final) position of the first data in the first namespace, the first target pointer can correspond to the first pointer, and the second target pointer can correspond to the second pointer. Additionally, a third pointer can be set in the first namespace (S330), and a third target pointer can be set in the second namespace (S340). When the second data is flushed to the first namespace and the start position of the second data in the first namespace is set to correspond to the second pointer, the third pointer can indicate the end position of the second data in the first namespace, and the third target pointer can correspond to the third pointer.

[0109] For example, such as Figure 9AAs shown, pointers P1 and P2, indicating the start and end positions of data D1, D2, D3, and D4 respectively, can be set in the first namespace NS1-1. Data D1, D2, D3, and D4 can be data already stored in the first namespace NS1-1, which serves as the original namespace. Pointer P3, indicating the end position of data D5, can also be set in the first namespace NS1-1. Data D5 can currently be temporarily stored in the first buffer memory BUF1, and when data D5 is flushed to the position corresponding to pointer P2 in the first namespace NS1-1 (as the start position), pointer P3 can indicate the end position of data D5. Subsequently, target pointers TP1, TP2, and TP3 can be set in the second namespace NS1-2, which serves as the target namespace. Target pointers TP1, TP2, and TP3 in the second namespace NS1-2 can correspond to pointers P1, P2, and P3 in the first namespace NS1-1, respectively. For example, the size and range of the storage space indicated by pointers P1, P2 and P3 in the first namespace NS1-1 can be substantially the same as the size and range of the storage space indicated by target pointers TP1, TP2 and TP3 in the second namespace NS1-2.

[0110] In some example embodiments, each of pointers P1, P2, and P3, and target pointers TP1, TP2, and TP3, can correspond to a logical address. For example, as Figure 9B As shown, pointers P1 and P2 can respectively indicate the first logical block address (LBA) LBA1-1 and the last LBA LBA2-1 of the location where data D1, D2, D3, and D4 are stored in the first namespace NS1-1. Similarly, pointers P2 and P3 can respectively indicate the first LBA LBA2-1 and the last LBA LBA3-1 of the location where data D5 will be stored in the first namespace NS1-1. Likewise, target pointers TP1, TP2, and TP3 can respectively indicate the LBAs LBA1-2, LBA2-2, and LBA3-2 of the location where data D1, D2, D3, D4, and D5 are stored in the second namespace NS1-2. The same number of LBAs as those corresponding to pointers P1, P2, and P3 can be allocated to the second namespace NS1-2 and the target pointers TP1, TP2, and TP3. For example, Figure 9B The pointer table can be stored in buffer memories BUF1 and BUF2.

[0111] Figure 10 It is shown Figure 1 The flowchart shows an example of migrating the first and second data to the second namespace. Figure 11A and Figure 11B It is used to describe Figure 10 A diagram illustrating the operation of migrating the first and second data to the second namespace.

[0112] Reference Figure 1 , Figure 10 and Figure 11A In S400, the first data can be copied to the first location in the second namespace (S410), and the second data can be copied to the second location in the second namespace (S420). The first location can correspond to the first target pointer and the second target pointer, and the second location can correspond to the second target pointer and the third target pointer.

[0113] For example, such as Figure 11A As shown, data D1, D2, D3, and D4 can be copied to the locations in the second namespace NS1-2 corresponding to the target pointers TP1 and TP2, and data D5 can be copied to the locations in the second namespace NS1-2 corresponding to the target pointers TP2 and TP3. Data D5 can be sent directly from the first buffer memory BUF1 to the second namespace NS1-2 without being flushed to the first namespace NS1-1.

[0114] Despite Figure 11A Not shown in the diagram, but data D1, D2, D3, D4, and D5 can be sent from the first storage device SD1 to the second storage device SD2 via the host device, as will be discussed later. Figure 12A and Figure 12B As stated above.

[0115] In some example embodiments, as described above, data migration operations can be performed in real time (or online) when the first storage device SD1 is accessed.

[0116] In some example embodiments, the data migration operation can be a hidden background operation for the host device. For example, the data migration operation can be performed in the background even when the first storage device SD1 is overloaded by an application other than application APP1. Therefore, the storage system can have improved or enhanced performance.

[0117] Reference Figure 11B After the data migration operation is completed, application APP1, executed by the host device, can access the second namespace NS1-2 included in the second storage device SD2. For example, application APP1 can perform a data write operation to store data D6 after multiple data D1, D2, D3, D4, and D5 into the second namespace NS1-2. For example, data D1, D2, D3, D4, D5, and data D6 can be consecutive or continuous data. For example, data D6 can be temporarily stored in the second buffer memory BUF2, and then stored in the second namespace NS1-2. Figure 11BThe diagram shows the state of data D6 temporarily stored in the second buffer memory BUF2 and before it is flushed to the second namespace NS1-2.

[0118] In some example embodiments, after the data migration operation is completed, application APP1 may no longer access the first namespace NS1-1. For example, multiple data points D1, D2, D3, D4, and D5 corresponding to the first namespace NS1-1 in the first storage device SD1 may be deleted and / or erased. For example, the first namespace NS1-1 may be assigned to another application, or the settings of the first namespace NS1-1 may be released.

[0119] In other words, after the data migration operation is complete, the data D1, D2, D3, D4, and D5 between the target pointers TP1 and TP3 can be all the data of application APP1. Furthermore, application APP1 and the first namespace NS1-1 can be separated, and the entire I / O of application APP1 can be redirected to the second namespace NS1-2. Therefore, namespace migration can be performed entirely or completely during I / O while maintaining data integrity.

[0120] Figure 12A and Figure 12B It is used to describe Figure 10 A diagram illustrating an example of migrating the first and second data to the second namespace.

[0121] Reference Figure 12A When performing a data migration operation, data D1, D2, D3 and D4 in the first namespace NS1-1 and data D5 in the first buffer memory BUF1 can be sent from the first storage device SD1 to the second storage device SD1 substantially simultaneously or concurrently.

[0122] For example, a first storage device SD1 may include a first pin 252 and a second pin 254. The first pin 252 may be connected to at least one first non-volatile memory formed or included in a first namespace NS1-1. The second pin 254 may be connected to a first buffer memory BUF1. Data D1, D2, D3, and D4 may be transmitted via the first pin 252, data D5 may be transmitted via the second pin 254, and data D1, D2, D3, D4, and D5 may be transmitted substantially simultaneously. For example, the pins may be contact pins or contact pads, but the example embodiment is not limited thereto.

[0123] Similarly, the second storage device SD2 may include a third pin 352 and a fourth pin 354. The third pin 352 may receive data D1, D2, D3, and D4, and the fourth pin 354 may receive data D5. In some example embodiments, data D1, D2, D3, D4, and D5 may be stored in the second namespace NS1-2 via the second buffer memory BUF2.

[0124] In some example embodiments, the path between the first pin 252 and the third pin 352 may be formed or included in one channel, and the path between the second pin 254 and the fourth pin 354 may be formed or included in another channel. Figure 12A In the example, data D1, D2, D3, and D4 in the first namespace NS1-1 and data D5 in the first buffer memory BUF1 can be sent substantially simultaneously using two different channels.

[0125] In some example embodiments, data D1, D2, D3, D4, and D5 can be sent directly to the second namespace NS1-2 via only the host processor HPRC included in the host device HD, without passing through the host memory HMEM included in the host device HD. For example, when using the controller memory buffer (CMB), data transmission operations can be performed without passing through the host memory HMEM.

[0126] Reference Figure 12B When performing a data migration operation, data D1, D2, D3 and D4 in the first namespace NS1-1 and data D5 in the first buffer memory BUF1 can be sequentially sent from the first storage device SD1 to the second storage device SD2.

[0127] For example, the first storage device SD1 may include a first pin 256. The first pin 256 may be connected to at least one first non-volatile memory and a first buffer memory BUF1 formed or included in a first namespace NS1-1. Data D1, D2, D3, D4, and D5 may be transmitted sequentially via the first pin 256. For example, data D1, D2, D3, and D4 may be transmitted first, followed by data D5.

[0128] Similarly, the second storage device SD2 may include a second pin 356. A third pin 352 may sequentially receive data D1, D2, D3, D4, and D5.

[0129] In some example embodiments, the path between the first pin 256 and the second pin 356 can form a channel. Figure 12BIn the example, a channel can be used to sequentially send data D1, D2, D3, and D4 in the first namespace NS1-1 and data D5 in the first buffer memory BUF1. For example, flags and / or identifiers can be used to distinguish data D1, D2, D3, and D4 from data D5.

[0130] In some example embodiments, data D1, D2, D3, D4, and D5 can be sent directly to the second namespace NS1-2 via only the host processor HPRC included in the host device HD, without passing through the host memory HMEM included in the host device HD.

[0131] Figure 13 This is a flowchart illustrating a method of operating a storage device according to an example embodiment. (The phrase "based on..." is omitted.) Figure 1 Repeated description.

[0132] refer to Figure 13 In the method of operating the storage device according to the example embodiment, the second storage device may be electrically connected to the host device (S500). For example, during the initial operation time, the second storage device may not be connected to the host device, but when a data migration operation is to be performed, the second storage device may be inserted into the host device.

[0133] After executing S500, operations S100, S200, S300, and S400 can be executed sequentially. In other words, after the second storage device is connected to the host device, the following operations can be performed: receiving a data migration request, generating a second namespace, setting a pointer table, and migrating the first and second data to the second namespace. For example, an asynchronous event notification (AEN) can be sent to the host device (e.g., to a specific application and / or virtual machine) to initiate the data migration operation, and these operations S100, S200, S300, and S400 can be executed. Operations S100, S200, S300, and S400 can be respectively associated with… Figure 1 The operations S100, S200, S300 and S400 are basically the same.

[0134] Figure 14 This is a flowchart illustrating a method for operating a storage system according to an example embodiment.

[0135] Reference Figure 14 The method for operating the storage system according to an example embodiment is performed through a storage system including a host device, a first storage device, and a second storage device. The first storage device and the second storage device are connected to each other via the host device. For example, see [reference needed]. Figure 2 To implement the storage system.

[0136] In the method of operating a storage system according to an example embodiment, when a host device accesses a first namespace included in a first storage device, a data migration operation is performed on the first namespace (S1100). Operation S1100 may be based on reference to... Figures 1 to 13 The described example embodiment describes a method for operating a storage device.

[0137] After the data migration operation is completed, the host device accesses the second namespace included in the second storage device (S1200). For example, refer to... Figure 11B The execution of S1200 is described above.

[0138] As will be understood by those skilled in the art, the inventive concept can provide systems, methods, computer program products, and / or one or more computer-readable media storing computer-readable program code. The computer-readable program code can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be any tangible medium that can contain or store a program used by or in conjunction with an instruction execution system, apparatus, or device. For example, the computer-readable medium can be a non-transitory computer-readable medium.

[0139] Figure 15 This is a block diagram illustrating a data center including a storage system according to an example embodiment.

[0140] Reference Figure 15 Data center 3000 can be a facility that collects various types of data and provides various services, and can be referred to as a data storage center. Data center 3000 can be a system for operating search engines and databases, and can be a computing system used by companies such as banks or government agencies. Data center 3000 can include application servers 3100 to 3100n and storage servers 3200 to 3200m. The number of application servers 3100 to 3100n and the number of storage servers 3200 to 3200m can be determined differently according to exemplary embodiments, and the number of application servers 3100 to 3100n and the number of storage servers 3200 to 3200m can be different from each other.

[0141] Application server 3100 may include at least one processor 3110 and at least one memory 3120, and storage server 3200 may include at least one processor 3210 and at least one memory 3220. The operation of storage server 3200 will be described as an example. Processor 3210 may control the overall operation of storage server 3200 and may access memory 3220 to execute instructions and / or data loaded in memory 3220. Memory 3220 may include at least one of the following: dual data rate (DDR) synchronous dynamic random access memory (SDRAM), high bandwidth memory (HBM), hybrid memory cube (HMC), dual in-line memory module (DIMM), Optane-DIMM, non-volatile DIMM (NVDIMM), etc. Depending on the example embodiment, the number of processors 3210 and the number of memories 3220 included in storage server 3200 may be selected differently. In some example embodiments, processors 3210 and memories 3220 may provide processor-memory pairs. In some example embodiments, the number of processors 3210 and the number of memories 3220 may differ from each other. Processor 3210 may include a single-core processor or a multi-core processor. The above description of storage server 3200 can be similarly applied to application server 3100. Application server 3100 may include at least one storage device 3150, and storage server 3200 may include at least one storage device 3250. In some example embodiments, application server 3100 may not include storage device 3150. The number of storage devices 3250 included in storage server 3200 may be selected in various ways depending on the example embodiments.

[0142] Application servers 3100 to 3100n and storage servers 3200 to 3200m can communicate with each other via network 3300. Network 3300 can be implemented using Fibre Channel (FC) or Ethernet. FC can be a medium for relatively high-speed data transmission, and optical switches providing high performance and / or high availability can be used. Depending on the access scheme of network 3300, storage servers 3200 to 3200m can be provided as file storage, block storage, or object storage.

[0143] In some example embodiments, network 3300 may be a storage-only network or a network dedicated to storage, such as a storage area network (SAN). For example, the SAN may be an FC-SAN implemented using an FC network and according to the FC protocol (FCP). For example, the SAN may be an IP-SAN implemented using a Transmission Control Protocol / Internet Protocol (TCP / IP) network and according to the iSCSI (SCSI over TCP / IP or Internet SCSI) protocol. In other example embodiments, network 3300 may be a general-purpose network such as a TCP / IP network or a common network. For example, network 3300 may be implemented according to at least one of the protocols such as FC over Ethernet (FCoE), Network Attached Storage (NAS), and Fast Non-Volatile Memory on Fabrics (NVMe) (NVMe-oF).

[0144] In the following description, example embodiments will be based on application server 3100 and storage server 3200. The description of application server 3100 can be applied to another application server 3100n, and the description of storage server 3200 can be applied to another storage server 3200m.

[0145] Application server 3100 can store data requested by users or clients to one of storage servers 3200 to 3200m via network 3300. Additionally, application server 3100 can retrieve data requested by users or clients from one of storage servers 3200 to 3200m via network 3300. For example, application server 3100 can be implemented as a web server or a database management system (DBMS).

[0146] Application server 3100 can access memory 3120n or storage device 3150n included in another application server 3100n via network 3300, and / or can access memory 3220 to 3220m or storage device 3250 to 3250m included in storage servers 3200 to 3200m via network 3300. Therefore, application server 3100 can perform various operations on data stored in application servers 3100 to 3100n and / or storage servers 3200 to 3200m. For example, application server 3100 can execute commands for moving or copying data between application servers 3100 to 3100n and / or storage servers 3200 to 3200m. Data can be transferred from storage devices 3250 to 3250m of storage servers 3200 to 3200m directly or via storage devices 3220 to 3220m of storage servers 3200 to 3200m to storage devices 3120 to 3120n of application servers 3100 to 3100n. For example, data transmitted over network 3300 may be encrypted for security or privacy purposes.

[0147] In storage server 3200, interface 3254 can provide physical connection between processor 3210 and controller 3251 and / or physical connection between network interface card (NIC) 3240 and controller 3251. For example, interface 3254 can be implemented based on a direct-attached storage (DAS) scheme where storage device 3250 is directly connected to a dedicated cable. For example, interface 3254 can be implemented based on at least one of the following interface schemes: Advanced Technology Attachment (ATA), Serial ATA (SATA), External SATA (e-SATA), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Peripheral Component Interconnect (PCI), High-Speed ​​PCI (PCIe), NVMe, IEEE 1394, Universal Serial Bus (USB), Secure Digital (SD) card interface, Multimedia Card (MMC) interface, Embedded MMC (eMMC) interface, Universal Flash Memory (UFS) interface, Embedded UFS (eUFS) interface, Compact Flash Memory (CF) card interface, etc.

[0148] Storage server 3200 may also include switch 3230 and NIC 3240. Switch 3230 may selectively connect processor 3210 and storage device 3250 under the control of processor 3210, or selectively connect NIC 3240 and storage device 3250. Similarly, application server 3100 may also include switch 3130 and NIC 3140.

[0149] In some example embodiments, NIC 3240 may include a network interface card, network adapter, etc. NIC 3240 can connect to network 3300 via a wired interface, wireless interface, Bluetooth interface, optical interface, etc. NIC 3240 may also include internal memory, digital signal processor (DSP), host bus interface, etc., and can connect to processor 3210 and / or switch 3230 via the host bus interface. The host bus interface can be implemented as one of the above examples of interface 3254. In some example embodiments, NIC 3240 may be integrated with at least one of processor 3210, switch 3230, and storage device 3250.

[0150] In storage servers 3200 to 3200m and / or application servers 3100 to 3100n, the processor can send commands to storage devices 3150 to 3150n and 3250 to 3250m or memories 3120 to 3120n and 3220 to 3220m to program or read data. For example, the data can be data corrected by an error-correcting code (ECC) engine. For example, the data can be processed via Data Bus Inversion (DBI) or Data Masking (DM) and can include Cyclic Redundancy Check (CRC) information. For example, the data can be encrypted for security or privacy.

[0151] Storage devices 3150 to 3150n and 3250 to 3250m can send control signals and command / address signals to NAND flash memory devices 3252 to 3252m in response to read commands received from the processor. When reading data from NAND flash memory devices 3252 to 3252m, the read enable (RE) signal can be input as a data output control signal and can be used to output data to the DQ bus. The RE signal can be used to generate a data strobe signal (DQS). Command and address signals can be latched in the page buffer based on the rising or falling edge of the write enable (WE) signal.

[0152] Controller 3251 can control the overall operation of storage device 3250. In some example embodiments, controller 3251 may include static random access memory (SRAM). Controller 3251 can write data to NAND flash memory device 3252 in response to a write command, or read data from NAND flash memory device 3252 in response to a read command. For example, write and / or read commands may be provided from processor 3210 in storage server 3200, processor 3210m in another storage server 3200m, or processors 3110 to 3110n in application servers 3100 to 3100n. DRAM 3253 may temporarily store (e.g., may buffer) data to be written to or read from NAND flash memory device 3252. In addition, DRAM 3253 may store metadata. Metadata may be data generated by controller 3251 for managing user data or NAND flash memory device 3252.

[0153] Storage devices 3150 to 3150n and 3250 to 3250m can be based on references Figures 1 to 14 The storage devices and methods described in the example embodiments are implemented. For example, storage devices 3150 to 3150n and 3250 to 3250m can perform methods according to the example embodiments (e.g., data migration methods).

[0154] This invention concept can be applied to a wide range of electronic devices and systems, including storage devices and storage systems. For example, it can be applied to systems such as personal computers (PCs), server computers, data centers, workstations, mobile phones, smartphones, tablet computers, laptop computers, personal digital assistants (PDAs), portable multimedia players (PMPs), digital cameras, portable game consoles, music players, camcorders, video players, navigation devices, wearable devices, Internet of Things (IoT) devices, Internet of Everything (IoE) devices, e-book readers, virtual reality (VR) devices, augmented reality (AR) devices, robotic devices, drones, etc.

[0155] In the method for operating a storage device and the method for operating a storage system according to the example embodiments, first data stored in a first namespace and second data stored in a first buffer memory can be migrated to a second namespace at once (sequentially or simultaneously) during a data migration operation. Alternatively, the second data can be sent directly from the first buffer memory to the second namespace without passing through the first namespace and / or the host memory included in the host device. Therefore, online and / or real-time namespace data migration processes can be efficiently implemented while maintaining data integrity, and data processing time and space can be saved.

[0156] According to exemplary embodiments, at least one of the components, elements, modules, or units described herein can be implemented as various numbers of hardware, software, and / or firmware structures performing the various functions described above. For example, at least one of these components, elements, or units can use a direct circuit structure, such as a memory, processor, logic circuit, lookup table, etc., which can perform the various functions under the control of one or more microprocessors or other control devices. Furthermore, at least one of these components, elements, or units can be embodied in a portion of a module, program, or code containing one or more executable instructions for performing a specified logical function, and executed by one or more microprocessors or other control devices. Additionally, at least one of these components, elements, or units can also include, or be implemented by, a processor such as a central processing unit (CPU), microprocessor, etc., performing the various functions. Two or more of these components, elements, or units can be combined into a single component, element, or unit that performs all the operations or functions of the combined two or more components, elements, or units. Furthermore, at least a portion of the function of at least one of these components, elements, or units can be performed by another of these components, elements, or units. Furthermore, although a bus is not shown in the block diagram, communication between components, elements, or units can be performed via a bus. The functional aspects of the above example embodiments can be implemented as algorithms executed on one or more processors. Moreover, the components, elements, or units represented by blocks or processing operations can employ any number of related techniques for electronic configuration, signal processing and / or control, data processing, etc.

[0157] The foregoing is a description of exemplary embodiments and should not be construed as limiting the exemplary embodiments. Although some exemplary embodiments have been described, those skilled in the art will readily understand that many modifications can be made to the exemplary embodiments without substantially departing from the novel teachings and advantages of the exemplary embodiments. Therefore, all such modifications are intended to be included within the scope of the exemplary embodiments as defined in the claims. Accordingly, it should be understood that the foregoing is a description of various exemplary embodiments and should not be construed as limiting oneself to the specific exemplary embodiments disclosed, and modifications to the disclosed exemplary embodiments and other exemplary embodiments are intended to be included within the scope of the appended claims.

Claims

1. A method of operating a storage device, the storage device comprising a first storage device and a second storage device interconnected via a host device, the method comprising: Receive a data migration request for the first namespace included in the first storage device; Based on receiving the data migration request in the second storage device, a second namespace is generated in the second storage device, the second namespace corresponding to the first namespace; Set up a pointer table for performing the data migration operation corresponding to the data migration request; as well as Based on the pointer table, the first data and the second data are migrated to the second namespace. The first data is stored in the first namespace, and the second data is stored in a first buffer memory included in the first storage device and has not yet been flushed from the first buffer memory to the first namespace. Specifically, based on the data migration operation being performed, the second data is sent directly from the first buffer memory to the second namespace simultaneously or sequentially with the first data being migrated to the second namespace without passing through the first namespace.

2. The method according to claim 1, wherein: The first data is cold data that has already been stored in the first namespace, and The second data is the hot data to be flushed from the first buffer to the first namespace.

3. The method according to claim 2, wherein, Based on the data migration operation being performed, the second data is not flushed from the first buffer to the first namespace, but is sent directly from the first buffer to the second namespace without passing through the first namespace.

4. The method according to claim 1, wherein, When migrating the first data and the second data, the first data and the second data are sent directly to the second namespace without passing through the host memory included in the host device.

5. The method according to claim 1, wherein, The capacity of the second namespace is greater than or equal to the capacity of the first namespace.

6. The method according to claim 5, wherein, The first storage device includes a plurality of first non-volatile memories, and the first namespace is disposed on at least a portion of the plurality of first non-volatile memories. The second storage device includes a plurality of second non-volatile memories, and the second namespace is disposed on at least a portion of the plurality of second non-volatile memories.

7. The method according to claim 1, wherein, Setting the pointer table includes: In the first namespace, a first pointer and a second pointer are set, the first pointer indicating the start position of the first data in the first namespace, and the second pointer indicating the end position of the first data in the first namespace; In the second namespace, a first target pointer and a second target pointer are set, where the first target pointer corresponds to the first pointer and the second target pointer corresponds to the second pointer; A third pointer is set in the first namespace, and for the second data to be flushed into the first namespace and whose start position in the first namespace is set to correspond to the second pointer, the third pointer indicates the end position of the second data in the first namespace; and A third target pointer is set in the second namespace, the third target pointer corresponding to the third pointer.

8. The method according to claim 7, wherein, Each of the first pointer, the second pointer, the third pointer, the first target pointer, the second target pointer, and the third target pointer corresponds to a logical address.

9. The method according to claim 7, wherein, Migrating the first data and the second data to the second namespace includes: Copy the first data to a first location in the second namespace, the first location corresponding to the first target pointer and the second target pointer; and The second data is copied to a second location in the second namespace, the second location corresponding to the second target pointer and the third target pointer.

10. The method according to claim 1, further comprising: Connect the second storage device to the host device. The data migration request is received after the second storage device is connected to the host device.

11. The method according to claim 1, wherein, During the migration of the first data and the second data, the first data and the second data are simultaneously sent from the first storage device to the second storage device.

12. The method according to claim 11, wherein, The first storage device includes a first pin and a second pin. The first pin is connected to at least one first non-volatile memory included in the first namespace, and the second pin is connected to the first buffer memory. The first data is transmitted via the first pin, and the second data is transmitted via the second pin.

13. The method according to claim 1, wherein, During the migration of the first data and the second data, the first data and the second data are sequentially sent from the first storage device to the second storage device.

14. The method according to claim 13, wherein, The first storage device includes a first pin. The first pin is connected to at least one first non-volatile memory included in the first namespace, and is also connected to the first buffer memory. The first data and the second data are transmitted sequentially via the first pin.

15. The method according to claim 1, wherein, The data migration operation is performed in real time when the first storage device is accessed.

16. The method according to claim 1, wherein, The data migration operation is a hidden background operation for the host device.

17. A method of operating a storage system, the storage system comprising a host device, a first storage device, and a second storage device, the first storage device and the second storage device being interconnected via the host device, the method comprising: When the host device accesses the first namespace included in the first storage device, a data migration operation is performed on the first namespace. as well as After the data migration operation is completed, the host device accesses the second namespace included in the second storage device. The data migration operation includes: Generate a data migration request for the first namespace; Based on receiving the data migration request in the second storage device, a second namespace is generated in the second storage device, and the second namespace corresponds to the first namespace; Set up a pointer table for performing the data migration operation; and Based on the pointer table, the first data and the second data are migrated to the second namespace. The first data is stored in the first namespace, and the second data is stored in a first buffer memory included in the first storage device and has not yet been flushed from the first buffer memory to the first namespace. Specifically, based on the data migration operation being performed, the second data is sent directly from the first buffer memory to the second namespace simultaneously or sequentially with the first data being migrated to the second namespace without passing through the first namespace.

18. The method according to claim 17, wherein, The first namespace and the second namespace are accessed by a first application among a plurality of applications executed by the host device.

19. The method of claim 17, wherein, The first namespace and the second namespace are accessed by a first virtual machine among a plurality of virtual machines executed by the host device.

20. A method of operating a storage device, the storage device comprising a first storage device and a second storage device interconnected via a host device, the method comprising: When an application or virtual machine executed by the host device accesses a first namespace included in the first storage device, a data migration request for the first namespace is received from the host device. Based on the data migration request received in the second storage device, a second namespace is generated in the second storage device based on the data migration request. The second namespace corresponds to the first namespace and has a capacity greater than or equal to the capacity of the first namespace. Based on the data migration request, a pointer table is set up to perform the data migration operation; as well as Based on the pointer table, the first data and the second data are migrated to the second namespace. The first data is stored in the first namespace, and the second data is stored in a first buffer memory included in the first storage device and has not yet been flushed from the first buffer memory to the first namespace. Setting the pointer table includes: In the first namespace, a first pointer, a second pointer, and a third pointer are set, wherein the first pointer, the second pointer, and the third pointer indicate the positions of the first data and the second data stored consecutively in the first namespace; and In the second namespace, a first target pointer, a second target pointer, and a third target pointer are set, whereby the first target pointer, the second target pointer, and the third target pointer indicate the locations of the first data and the second data stored consecutively in the second namespace. Specifically, based on the data migration operation being performed, the first data is copied to the second namespace, such that the first data corresponds to the first target pointer and the second target pointer; and the second data is copied to the second namespace, such that the second data corresponds to the second target pointer and the third target pointer. Wherein, based on the data migration operation being performed, the second data is not flushed from the first buffer to the first namespace, but is sent directly from the first buffer to the second namespace simultaneously or sequentially with the first data being migrated to the second namespace without passing through the first namespace.

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