Inspection system and method for detecting defects

Abstract

An inspection system is disclosed. The system includes a controller communicably coupled with an inspection subsystem configured to receive illumination from a sample and generate image data. The controller includes one or more processors configured to execute program instructions to cause the one or more processors to: receive the image data, wherein the image data comprises at least one image; downsample the at least one image using bicubic interpolation or bilinear interpolation; transform the at least one image from a spatial domain to a frequency domain using a Fourier transform; filter frequencies above a threshold frequency from the at least one image; transform the at least one image from the frequency domain to the spatial domain using an inverse Fourier transform; and detect one or more flat pattern defects in the at least one image.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional Application No. 62 / 909,582, entitled “FREQUENCY DOMAIN ENHANCEMENT OF LOW-SNR FLAT RESIDUES / STAINS DEFECT FOR EFFECTIVE DETECTION,” filed on October 2, 2019, for Chaohong Wu and Yong Zhang as inventors, which is incorporated by reference herein in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates generally to detection of defects in semiconductor wafers and photomasks, and in particular to detection of large residue and stain defects on wafer dies. BACKGROUND

[0004] In conventional systems for detecting defects on a specimen (e.g., a semiconductor wafer or a photomask), an illumination source illuminates the specimen and a detector (e.g., a camera) receives illumination reflected or scattered from the specimen. The detector generates image data, and the image data is then transmitted to a computer system. The image data is then used to detect defects on the specimen using inspection algorithms.

[0005] Conventional inspection algorithms find the intensity difference at each pixel level between a target die image and a reference die image. The pixel level difference is compared to a threshold value generated based on the noise statistics between the target die image and the reference die image. Conventional inspection algorithms are sufficient to detect defects with a resolution level, a signal level above the background noise, and a size of the pattern structure.

[0006] However, it is difficult to detect defects such as residues or stains (i.e., flat pattern defects) that are scattered in the noise background and visible at an image level using conventional algorithms. When analyzing flat pattern defects, the pixel level difference is often hidden in the noise floor, which increases the difficulty of detection without introducing a large number of noise nuisance (e.g., noise regions that appear to be defects but are not actually defects). Furthermore, it is difficult to detect defects in wafer images with straight line patterns or wavy line patterns at a low noise nuisance rate, especially using conventional single-die techniques. Therefore, it is desirable to improve the detection of flat pattern defects by removing unwanted noise or noise nuisance. SUMMARY

[0007] According to one or more illustrative embodiments of the disclosure, a review system is disclosed. In one illustrative embodiment, the review system includes a controller communicably coupled with one or more review subsystems configured to receive illumination from a specimen and generate image data. The controller includes one or more processors configured to execute program instructions causing the one or more processors to: receive the image data, wherein the image data comprises at least one image; downsample the at least one image using bicubic interpolation or bilinear interpolation; transform the at least one image from a spatial domain to a frequency domain using a Fourier transform; filter frequencies above a threshold frequency from the at least one image; transform the at least one image from the frequency domain to the spatial domain using an inverse Fourier transform; and detect one or more flat pattern defects in the at least one image.

[0008] According to one or more illustrative embodiments of the disclosure, a review system is disclosed. In one illustrative embodiment, the review system includes a controller communicably coupled with one or more review subsystems configured to receive illumination from a specimen and generate image data. The controller includes one or more processors configured to execute program instructions causing the one or more processors to: receive the image data, wherein the image data comprises at least one image; downsample the at least one image using bicubic interpolation or bilinear interpolation; transform the at least one image from a spatial domain to a frequency domain using a Fourier transform; filter frequencies above a threshold frequency from the at least one image; transform the at least one image from the frequency domain to the spatial domain using an inverse Fourier transform; and detect one or more flat pattern defects in the at least one image.

[0009] According to one or more illustrative embodiments of the disclosure, a review method is disclosed. In one illustrative embodiment, the review method includes: receiving illumination from a specimen and generating image data using a review subsystem; receiving the image data, wherein the image data comprises at least one image; downsample the at least one image using bicubic interpolation or bilinear interpolation; transform the at least one image from a spatial domain to a frequency domain using a Fourier transform; filter frequencies above a threshold frequency from the at least one image; transform the at least one image from the frequency domain to the spatial domain using an inverse Fourier transform; and detect one or more flat pattern defects in the at least one image.

[0010] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the claimed application, as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the present application and together with the general description, serve to explain the principles of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0011] Those of skill in the art will have a better understanding of numerous advantages of the present disclosure by reference to the drawings, in which:

[0012] Figure 1 is a block diagram illustrating an inspection system for collecting images of a sample in accordance with one or more embodiments of the present disclosure.

[0013] Figure 2A illustrates an inspection system including an optical-based inspection subsystem in accordance with one or more embodiments of the present disclosure.

[0014] Figure 2B illustrates an inspection system including an electronic-based inspection subsystem in accordance with one or more embodiments of the present disclosure.

[0015] Figure 3 is a flowchart illustrating a method of detecting a flat pattern defect in accordance with one or more embodiments of the present disclosure.

[0016] Figure 4A illustrates an enhancement of a pixel associated with a defect in accordance with one or more embodiments of the present disclosure.

[0017] Figure 4B is a surface plot illustrating an enhancement of a pixel associated with a defect in accordance with one or more embodiments of the present disclosure.

[0018] Figure 5 illustrates an example of a flat pattern defect in accordance with one or more embodiments of the present disclosure. DETAILED DESCRIPTION

[0019] The present disclosure has been particularly shown and described with respect to certain embodiments thereof and specific features thereof. The embodiments set forth herein are considered to be illustrative and not restrictive. It will be apparent to one of ordinary skill in the art that various changes and modifications can be made in form and details without departing from the spirit and scope of the disclosure. Reference will now be made in detail to the disclosed subject matter, which is illustrated in the accompanying drawings.

[0020] Embodiments of the present disclosure relate to an inspection system and method. The inspection system can be configured to detect one or more defects on a sample (e.g., a semiconductor wafer or a photomask). The system can need to use photons or electrons to illuminate the sample and receive the illumination (e.g., photons or electrons reflected and / or scattered from the sample) at one or more detectors to produce image data.

[0021] Image data can be transmitted to a controller (e.g., an image server). The image data can include a plurality of images (i.e., frames), where each image corresponds to a die on a wafer. One or more inspection algorithms can be used to detect defects in the plurality of images. In some embodiments, the algorithms can detect defects by analyzing one die image at a time (e.g., single-die detection algorithms) without comparing the die image to a reference die image. In other embodiments, a test die image can be compared to a reference die image to produce a difference image. The reference image acts as an ideal or error-free image such that when the test image is subtracted from the reference image, the difference image indicates problematic structures (i.e., defects). After a defect is detected, a corrective action can be performed (e.g., by altering the design or processing of the wafer).

[0022] In particular, embodiments of the present disclosure relate to the detection of relatively large flat residue defects, residue defects, and smudge defects (in other words, flat pattern defects). Flat pattern defects can be formed on a semiconductor wafer during a full flow process (e.g., after a photoresist and development stage), and are visually distinguishable. However, images of flat pattern defects can have low intensity at each pixel level.

[0023] Major characteristics of flat pattern defects can include: (1) defect pixels form irregular shapes with relatively large areas, (2) gray levels of relatively large shaped pixels are close to those of neighboring pixels, (3) the same group of pixels is separated by background pixels, and (4) it is difficult to detect using traditional pixel intensity based inspection algorithms without introducing noise (since single-die detection algorithms cannot pick up the embedded signal from negligible neighboring non-repeating cell structure pixels).

[0024] Embodiments of the present disclosure can enable detection of flat pattern defects at low noise rates in single-die detection mode and die-to-die difference detection mode. An inspection algorithm can first reduce image resolution to smooth or weaken isolated tiny defect pixels and gather scattered residue defects. The inspection algorithm can then utilize a frequency domain low pass filter (LPF) to filter out high frequency repeating pattern noise. The inspection algorithm can enhance pixel level low signal-to-noise ratio (SNR) signals of flat pattern defects to improve the sensitivity of conventional algorithms (e.g., after enhancement).

[0025] Figure 1 An inspection system 100 in accordance with one or more embodiments of the present disclosure is illustrated. In particular, Figure 1 An inspection system 100 for identifying defects on a surface of a specimen (e.g., a semiconductor wafer, a photomask, or a reticle) is illustrated. Additionally, the system 100 can include a controller 104 (which includes one or more processors 106 and a memory medium 108) and a user interface 110.

[0026] The inspection system subsystem 102 may include, but is not limited to, optical-based inspection systems, charged particle-based inspection systems, etc. For example, the inspection subsystem 102 may include a broadband inspection subsystem (e.g., a broadband plasma inspection subsystem) or a narrowband inspection subsystem (e.g., a laser-based inspection system). In another example, the inspection subsystem 102 may include a scanning electron microscope (SEM) inspection subsystem.

[0027] In one embodiment, controller 104 is communicatively coupled to one or more characterization subsystems 102. One or more processors 106 of controller 104 may be configured to generate one or more control signals configured to adjust one or more characteristics of the test subsystem 102. For example, controller 104 may be configured to adjust the height of the stage holding the sample or the wavelength of light.

[0028] In one embodiment, controller 104 is configured to receive one or more images (e.g., image data) of a sample. For example, image data may include multiple images (i.e., frames). Each of the frames may correspond to a bare die on the sample (e.g., if the sample is a wafer). Controller 104 may be configured to determine one or more features of the sample that indicate one or more defects in the sample. In another embodiment, controller 104 may be configured to receive one or more target images of one or more target features of a target sample.

[0029] Figure 2A The diagram illustrates a simplified schematic of a system 100 for characterizing samples according to one or more embodiments of the present disclosure. Specifically, as... Figure 2A The system 100 described herein includes an optical inspection subsystem 102, which enables the system 100 to operate as an optical inspection system.

[0030] The optical inspection subsystem 102a may include any optical-based inspection known in the art. For example, the inspection subsystem 102a may include an optical dark-field inspection tool. The optical inspection subsystem 102a may include, but is not limited to, an illumination source 112, an illumination arm 111, a collection arm 113, and a detector assembly 126.

[0031] In one embodiment, the optical inspection subsystem 102a is configured to inspect and / or measure a sample 120 placed on a stage assembly 122. The illumination source 112 may comprise any illumination source known in the art for generating illumination 101, including, but not limited to, broadband radiation sources. In another embodiment, the optical inspection subsystem 102a may include an illumination arm 111 configured to direct illumination 101 to the sample 120. It should be noted that the illumination source 112 of the optical inspection subsystem 102a can be configured in any orientation known in the art, including, but not limited to, dark-field orientation, bright-field orientation, etc. For example, one or more optical elements 114, 124 may be selectively adjusted to configure the inspection subsystem 102a in dark-field orientation, bright-field orientation, etc.

[0032] Sample 120 may comprise any sample known in the art, including but not limited to wafers, photomasks, photomasks, etc. In one embodiment, sample 120 is positioned on stage assembly 122 to facilitate movement of sample 120. In another embodiment, stage assembly 122 is an actuable stage. For example, stage assembly 122 may include, but is not limited to, one or more translation stages adapted to selectively translate sample 120 along one or more linear directions (e.g., x-direction, y-direction, and / or z-direction). By another example, stage assembly 122 may include, but is not limited to, one or more rotation stages adapted to selectively rotate sample 120 along a rotational direction. By another example, stage assembly 122 may include, but is not limited to, rotation stages and translation stages adapted to selectively translate sample 120 along linear directions and / or rotate sample 120 along a rotational direction. It should be noted herein that system 100 may operate in any scanning mode known in the art.

[0033] The illumination arm 111 may comprise any number and type of optical components known in the art. In one embodiment, the illumination arm 111 includes one or more optical elements 114, a beam splitter 116, and an objective lens 118. In this respect, the illumination arm 111 may be configured to focus illumination 101 from the illumination source 112 onto the surface of the sample 120. The one or more optical elements 114 may comprise any optical elements known in the art, including, but not limited to, one or more mirrors, one or more lenses, one or more polarizers, one or more beam splitters, wave plates, one or more apodizers, etc.

[0034] In another embodiment, the optical inspection subsystem 102a includes a collection arm 113 configured to collect illumination reflected or scattered from the sample 120. In another embodiment, the collection arm 113 may guide and / or focus the reflected and scattered light to one or more sensors in the detector assembly 126 via one or more optical elements 124. The one or more optical elements 124 may include any optical element known in the art, including, but not limited to, one or more mirrors, one or more lenses, one or more polarizers, one or more beam splitters, waveplates, etc. It should be noted that the detector assembly 126 may include any sensors and detector assemblies known in the art for detecting illumination reflected or scattered from the sample 120.

[0035] In another embodiment, the detector assembly 126 of the optical inspection subsystem 102 is configured to collect inspection data of sample 120 based on illumination reflected or scattered from sample 120. In another embodiment, the detector assembly 126 is configured to transmit collected / acquired image and / or inspection data to controller 104.

[0036] Figure 2B The illustration is a simplified schematic diagram of a system 100 for characterizing a sample 120 according to one or more embodiments of the present disclosure. Specifically, as... Figure 2B The system 100 depicted includes an electronics-based subsystem 102b, such that the system 100 operates as an electronics-based inspection system (e.g., a scanning electron microscope (SEM) system).

[0037] In one embodiment, the electronic-based inspection subsystem 102b is configured to perform one or more measurements on the sample 120. In this regard, the electronic-based inspection subsystem 102b may be configured to acquire one or more images of the sample 120. The electronic-based inspection subsystem 102b may include, but is not limited to, an electron beam source 128, one or more electron optical elements 130, one or more electron optical elements 132, and an electronic detector assembly 134 including one or more electronic sensors 136.

[0038] In one embodiment, electron beam source 128 is configured to direct one or more electron beams 129 to sample 120. Electron beam source 128 may form an electron optical column. In another embodiment, electron beam source 128 includes one or more additional and / or alternative electron optical elements 130 configured to focus and / or direct one or more electron beams 129 to a surface of sample 120. In another embodiment, the electron-based testing subsystem 102b includes one or more electron optical elements 132 configured to collect secondary and / or backscattered electrons 131 emitted from the surface of sample 120 in response to one or more electron beams 129. It should be noted herein that one or more electron optical elements 130 and one or more electron optical elements 132 may include any electron optical element configured to guide, focus, and / or collect electrons, including, but not limited to, one or more deflectors, one or more electron optical lenses, one or more condenser lenses (e.g., magnetic condenser lenses), one or more objectives (e.g., magnetic condenser lenses), etc.

[0039] It should be noted that the electro-optical assembly of the electronic-based inspection subsystem 102b is not limited to... Figure 2B The electro-optical elements depicted herein are provided for illustrative purposes only. It should be further noted that system 100 may include any number and type of electro-optical elements required to guide / focus one or more electron beams 129 onto sample 120 and, in response, collect and image emitted secondary and / or backscattered electrons 131 onto electron detector assembly 134.

[0040] For example, system 100 may include one or more electron beam scanning elements (not shown). For instance, one or more electron beam scanning elements may include, but are not limited to, one or more electromagnetic scanning coils or electrostatic deflectors adapted to control the position of one or more electron beams 129 relative to the surface of sample 120. Furthermore, one or more scanning elements may be used to scan one or more electron beams 129 across sample 120 in a selected pattern.

[0041] In another embodiment, the secondary and / or backscattered electrons 131 target one or more sensors 136 of the electron detector assembly 134. The electron detector assembly 134 of the electron-based inspection subsystem 102 may comprise any electron detector assembly known in the art suitable for detecting backscattered and / or secondary electrons 131 emitted from the surface of the sample 120. In one embodiment, the electron detector assembly 134 comprises an array of electron detectors. In this respect, the electron detector assembly 134 may comprise an array of electron detection portions. Furthermore, each electron detection portion of the detector array of the electron detector assembly 134 may be positioned to detect an electronic signal from the sample 120 associated with the incident electron beam 129. The electron detector assembly 134 may comprise any type of electron detector known in the art. For example, the electron detector assembly 134 may comprise a microchannel plate (MCP), PIN, or pn junction detector array, such as, but not limited to, a diode array or an avalanche photodiode (APD). By another example, the electron detector assembly 134 may comprise a high-speed scintillator or photomultiplier tube (PMT) detector.

[0042] Although Figure 2B The electron-based inspection subsystem 102b is illustrated as including an electron detector assembly 134 (including only the secondary electron detector assembly), but this is not to be considered a limitation of this disclosure. In this regard, it should be noted that the electron detector assembly 134 may include, but is not limited to, secondary electron detectors, backscattered electron detectors, and / or primary electron detectors (e.g., in-column electron detectors). In another embodiment, the electron-based inspection subsystem 102 may include multiple electron detector assemblies 134. For example, system 100 may include a secondary electron detector assembly, a backscattered electron detector assembly, and an in-column electron detector assembly.

[0043] In another embodiment, as previously described herein, system 100 includes a user interface 110 communicatively coupled to controller 104. In another embodiment, user interface 110 includes a user input device and a display. The user input device of user interface 110 may be configured to receive one or more input commands from a user, said input commands being configured to input data into system 100 and / or adjust one or more characteristics of system 100. In another embodiment, the display of user interface 110 may be configured to display data of system 100 to a user.

[0044] In another embodiment, one or more processors 106 may be communicatively coupled to memory medium 108, wherein one or more processors 106 are configured to execute program instructions held on memory medium 108. In this respect, one or more processors 106 of controller 104 may execute any of the various process steps described throughout this disclosure. Furthermore, controller 104 may be configured to receive data, including, but not limited to, image data associated with sample 120.

[0045] The controller 104 is communicatively coupled to the inspection subsystem 102a or 102b. The controller 104 can be configured to receive image data 125 from the inspection subsystem 102a or 102b and use the image data 125 to detect one or more defects on the sample 120.

[0046] It should be noted throughout this document that one or more components of system 100 may be communicatively coupled to various other components of system 100 in any manner known in the art. For example, one or more processors 106 may be communicatively coupled to each other and to other components via wired lines (e.g., copper wires, fiber optic cables, etc.) or wireless connections (e.g., RF coupling, IR coupling, WiMax, Bluetooth, 3G, 4G, 4G LTE, 5G, etc.). By another example, controller 104 may be communicatively coupled to one or more components of verification subsystem 102 via any wired or wireless connection known in the art.

[0047] One or more processors 106 of controller 104 may comprise any processor or processing element known in the art. For the purposes of this disclosure, the terms “processor” or “processing element” may be broadly defined to encompass any device having one or more processing or logic elements (e.g., one or more microprocessor devices, one or more application-specific integrated circuit (ASIC) devices, one or more field-programmable gate arrays (FPGAs), or one or more digital signal processors (DSPs)). In this sense, one or more processors 106 may comprise any device configured to execute algorithms and / or instructions (e.g., program instructions stored in memory). In one embodiment, one or more processors 106 may embody a desktop computer, mainframe computer system, workstation, graphics computer, parallel processor, networked computer, as described throughout this disclosure, configured to execute programs, and configured to operate or be coupled to system 100.

[0048] Furthermore, different subsystems of system 100 (e.g., irradiation source 112, electron beam source 128, detector assembly 126, electron detector assembly 134, controller 104, user interface 110, etc.) may include processors or logic elements suitable for performing at least a portion of the steps described throughout this disclosure. Therefore, the above description should not be construed as a limitation of the invention but merely as illustrative. Additionally, the steps described throughout this disclosure may be performed by a single controller 104, or alternatively, by multiple controllers 104. Furthermore, controller 104 may comprise one or more controllers housed in a common housing or multiple housings. In this way, any controller or combination of controllers can be individually packaged as a module suitable for integration into the inspection system 100.

[0049] Memory media 108 may comprise any storage medium known in the art suitable for storing program instructions executable by one or more associated processors 106. For example, memory media 108 may comprise a non-transitory memory medium. By another example, memory media 108 may comprise, but is not limited to, read-only memory (ROM), random access memory (RAM), magnetic or optical storage devices (e.g., magnetic disks), magnetic tape, solid-state drives, etc. It should be further noted that memory media 108 may be housed together with one or more processors 106 in a common controller housing. In one embodiment, memory media 108 may be remotely located relative to the physical location of one or more processors 106 and controller 104. For example, one or more processors 106 of controller 104 may access remote storage (e.g., a server) accessible via a network (e.g., the Internet, an intranet, etc.).

[0050] In one embodiment, user interface 110 is communicatively coupled to controller 104. In one embodiment, user interface 110 may include, but is not limited to, one or more desktop computers, laptop computers, tablet computers, etc. In another embodiment, user interface 110 includes a display for displaying data from system 100 to a user. The display of user interface 110 may include any display known in the art. For example, the display may include, but is not limited to, a liquid crystal display (LCD), an organic light-emitting diode (OLED) based display, or a CRT display. Those skilled in the art will recognize that any display device capable of being integrated with user interface 110 is suitable for the embodiments described in this disclosure. In another embodiment, a user may input selections and / or commands in response to data displayed to the user via user input devices of user interface 110.

[0051] In another embodiment, controller 104 is communicatively coupled to one or more elements of inspection system 100. In this respect, controller 104 can transmit and / or receive data from any component of inspection system 100. Furthermore, controller 104 can direct or otherwise control any component of inspection system 100 by generating one or more drive signals for associated components. For example, controller 104 may be communicatively coupled to detector 126 to receive one or more images from detector 126.

[0052] Figure 3 This is a flowchart illustrating a method 300 for detecting flat pattern defects in an image, according to one or more embodiments of the present disclosure. Method 300 is flexible and can be applied to similar types of defects (e.g., flat pattern defects) using different wafer inspection systems. Method 300 enables the detection of relatively large, low-signal flat residual defects in an image with a noisy background. This noisy background may be present in the original image (e.g., a bare wafer image prior to any processing step) or a differential image (e.g., a patterned wafer image after processing steps).

[0053] like Figure 3 As shown, the method may include several related sequential image processing procedures. In step 301, the image may be downsampled (e.g., by bicubic or bilinear interpolation) to reduce high-frequency noise. Downsampling may include summing large signals from the noisy background and reducing the image size. In step 302, a low-pass filter (LPF) in the frequency domain may filter out high-frequency noise. In step 303, adaptive thresholding may be used to obtain defect candidates and may be combined with noise filtering to identify image blotches.

[0054] Referring to step 302, the LPF in the frequency domain may include several steps. A forward Fourier transform can be applied to transform the initial image from the spatial domain to the signal in the frequency domain. The frequency response can be shifted to a lumped response for sequential filtering. Low-frequency signals can be preserved and high-frequency signals can be eliminated (e.g., high-frequency signals higher than a threshold frequency can be filtered out). The lumped image frequency signal can then be multiplied by the filter core. The central portion of the signal in the frequency domain can be preserved as the cutoff frequency boundary gradually changes. A Butterworth or Gaussian filter function can be used as a boundary transformation function to prevent blurring and ringing artifacts in an ideal LPF. The nth order of the Butterworth function is defined as:

[0055]

[0056] in It is a point in the frequency domain The distance between the center of the frequency rectangle and the center of the frequency rectangle. The cutoff frequency is from the origin. An example of the Butterworth filter function is shown and described in "Digital Image Processing" by Rafael C. Gonzalez and Richard E. Woods (Pearson Prentice Hall, 2008, p. 173), which is incorporated herein by reference in its entirety. Finally, the true portion from the inverse Fourier transform of the modulated frequency response is retrieved as the enhanced image. The shape features of the defect of interest (DOI) can reduce noise in single-die and die-to-die detection modes. In single-die mode, the principal and secondary axes of the fitted ellipse can be calculated, and the ratio of the two features can be used to eliminate line wave noise. In die-to-die mode, color noise attributable to pixel reduction and LPF filtering can be similar to the true DOI. However, common color noise can have regular boundaries, which can be used to distinguish color noise from true defects.

[0057] Figure 4A The illustrations depict the enhancement of defect-associated pixels according to one or more embodiments of the present disclosure. As shown in Figure 402, defective pixels of a flat pattern defect can be embedded in repetitive pattern noise or texture structure noise. As shown in Figure 404, a combination of downsampling using bicubic or bilinear interpolation and frequency-domain low-pass filtering enhances the signal of the defective pixel.

[0058] Figure 4B This is an illustration of enhanced surface maps of pixels associated with defects, according to one or more embodiments of the present disclosure. Surface map 408 shows the initial defect of interest (DOI). Surface map 410 shows that the SNR of the defective pixel is enhanced from 1.32 to 3.27 after combining downsampling and frequency domain LPF.

[0059] Figure 5 The diagram illustrates a flat pattern defect 501 and two types of color noise: (a) horizontal stripes 502a and vertical stripes 502b, and (b) a rectangular shape 503. Shape features (e.g., eccentricity) can be effectively used to remove or reduce noise 502a, 502b, and 503. The precise number of defective pixels can be calculated using defective pixel segmentation, image marking, and counting. Additionally, the corresponding size of the bounding box of the defective region can be calculated.

[0060] Refer again Figure 3In step 303, the signal-enhanced image can be binarized by calculating the average pixel grayscale value (mValue) and the standard deviation pixel grayscale value (sValue) for each pixel. For white pixels of DOI, segmentation can be determined using a threshold of mValue + sValue × sigma, and for dark pixels of DOI, segmentation can be determined using a threshold of mValue - sValue × sigma. Note that the sigma value can be adjusted by the user. Conventional noise collection and defective pixel detection techniques can be used to identify defective pixels. The combined denoising and filtering can improve the detectability of flat pattern defects with relatively weak signals and may introduce some color noise. Based on the selected shape features, color noise caused by the filtering process can be effectively and efficiently reduced and eliminated. In single-die inspection mode, it can be difficult to filter low-frequency wave or line noise patterns. To address this issue, a notch filter (i.e., a band-stop filter) in the frequency domain can be combined with a low-pass filter.

[0061] In step 304, after calculating the candidate defective pixels, morphological reconstruction can be used to fill the holes in the defective regions.

[0062] In step 305, small, isolated defective spots can be removed based on size after candidate spots have been marked. A size threshold can be defined by the user so that spots smaller than a certain size are removed.

[0063] In step 306, shape features such as the region, bounding box, the principal and secondary axis lengths of the fitted ellipse, and eccentricity can be calculated. Eccentricity can be the ratio of the distance between the foci of the ellipse and the principal axis length. The eccentricity of a circle is 0, and the eccentricity of a line segment is 1. To remove linear noise, a value between 0 and 1 can be selected.

[0064] In step 307, noisy spots can be filtered based on shape features. In step 308, flat pattern defects can be isolated and identified by using image component markers to count the number of defective pixels. If one flat pattern defect is marked, the exact number of defective pixels can be accurately counted. If more than one flat pattern defect is marked, a rectangular bounding box method can be used to approximate the number of defective pixels.

[0065] Method 300 enables efficient detection of flattened residue defects, residual defects, and blemish defects in die-to-die difference detection mode or single-die detection mode with high accuracy and low noise rate. The combination of downsampling and LPF filtering amplifies discrete defective pixels across image scattering for sequential detection. In addition to the method of this invention, conventional algorithms can also be employed. Conventional algorithms in the context of laser scanning (LS) systems may include statistical analysis based on the need for preprocessing defective pixels, noise collection, and determination of the differential image.

[0066] Method 300 outperforms conventional pixel-level intensity-based SNR verification algorithms or cell-to-cell single-die techniques in both die-to-die difference detection and single-die detection modes. In the single-die detection mode, alignment effects can be ignored, and color noise arising from alignment is not a critical issue. Shape-feature-based noise filtering can be used in both operating modes. If the detected defective pixels overlap in the initial image, the detected defective pixels can accurately locate the defective pixel signature in the initial image.

[0067] Downsampling can use bicubic or bilinear interpolation to remove unwanted pixels and create a more representative, denser pool of candidate defective regions. Subsequent low-pass filtering in the frequency domain can further enhance the signal for easier detection. For example, the SNR of defective pixels can be increased from 1.32 to 3.27. Downsampling using bicubic or bilinear interpolation is simple, universally applicable, and easy to implement. Furthermore, numerous efficient libraries exist for low-pass filtering in the frequency domain (e.g., implemented in C programming languages), such as the Fastest Fourier Transform (FFTW) library.

[0068] All methods described herein may include storing the results of one or more steps of the method embodiments in memory. The results may include any of the results described herein and may be stored in any manner known in the art. The memory may include any memory described herein or any other suitable storage medium known in the art. After the results have been stored, they may be accessed in memory and used by any of the method or system embodiments described herein, formatted for display to a user, used by another software module, method, or system, etc. Furthermore, the results may be stored “permanently,” “semi-permanently,” “temporarily,” or for a period of time. For example, the memory may be random access memory (RAM), and the results may not necessarily remain in memory indefinitely.

[0069] Please consider further that each of the embodiments of the methods described above may include any other step of any other method described herein. Furthermore, each of the embodiments of the methods described above may be performed by any of the systems described herein.

[0070] Those skilled in the art will recognize that, for the sake of clarity, the component operations, devices, objects, and accompanying discussions described herein are used as examples and various configuration modifications should be considered. Therefore, as used herein, the specific examples and accompanying discussions presented are intended to represent their more general categories. In general, the use of any particular example is intended to represent its category, and the omission of specific components, operations, devices, and objects should not be considered limiting.

[0071] As used herein, directional terms such as “top,” “bottom,” “above,” “below,” “upper,” “upward,” “lower,” “below,” and “downward” are intended to provide relative positions for illustrative purposes and are not intended to specify an absolute reference architecture. Those skilled in the art will appreciate various modifications to the described embodiments, and the general principles defined herein may be applied to other embodiments.

[0072] Regarding the use of any substantially plural and / or singular terms in this document, those skilled in the art can convert them from plural to singular and / or from singular to plural as appropriate in context and / or application. For clarity, various singular / plural arrangements may be stated unambiguously.

[0073] The objects described herein sometimes illustrate different components contained within or connected to other components. It should be understood that such depicted architectures are merely exemplary, and many other architectures can in fact be implemented to achieve the same functionality. Conceptually, any component that achieves the same functionality is arranged to be effectively “associated” to enable the desired functionality. Therefore, any two components combined herein to achieve a particular functionality can be considered “associated” to each other to enable the desired functionality, regardless of the architecture or intermediate components. Similarly, any two such associated components can also be considered “connected” or “coupled” to each other to achieve the desired functionality, and any two components that can be suchly associated can also be considered “coupleable” to each other to achieve the desired functionality. Specific examples of coupleability include, but are not limited to, components that can physically cooperate and / or physically interact, and / or components that can wirelessly interact and / or interact wirelessly, and / or components that can logically interact and / or interact logically.

[0074] Furthermore, it should be understood that the invention is defined by the appended claims. Those skilled in the art will understand that, generally, the terms used herein and especially in the appended claims (e.g., the body of the appended claims) are intended to be “open-ended” terms (e.g., the term “including” should be interpreted as “including but not limited to”, the term “having” should be interpreted as “at least having”, the term “includes” should be interpreted as “includes but is not limited to”, etc.). Those skilled in the art will further understand that if it is intended to state a specific number of the claimed elements, then such an intention is explicitly stated in the claims, and without such a statement, such an intention does not exist. For example, as an aid to understanding, the appended claims may contain the descriptive phrases “at least one” and “one or more” to describe the claimed elements. However, even when the same claim contains the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an” (e.g., “a” and / or “an” should generally be interpreted as meaning “at least one” or “one or more”), the use of such phrases should not be construed as implying that the claim introduced by the indefinite article “a” or “an” limits any particular claim containing such an introductory claim to an invention containing only one such remark; the same applies to the use of definite articles used to introduce claim claims. Furthermore, even when a specific number of introductory claim claims is explicitly stated, those skilled in the art will recognize that such a statement should generally be interpreted as meaning at least the number stated (e.g., an explicit statement of “two remarks” without other modifiers generally means at least two claims, or two or more claims). Furthermore, in examples where conventions such as "at least one of A, B, and C, etc." are used, this construction is generally intended to enable a person skilled in the art to understand the convention in a meaningful sense (e.g., "a system having at least one of A, B, and C" includes, but is not limited to, systems having only A, only B, only C, both A and B, both A and C, both B and C, and / or both A, B, and C, etc.). In examples where conventions such as "at least one of A, B, or C, etc." are used, this construction is generally intended to enable a person skilled in the art to understand the convention in a meaningful sense (e.g., "a system having at least one of A, B, or C" includes, but is not limited to, systems having only A, only B, only C, both A and B, both A and C, both B and C, and / or both A, B, and C, etc.).Those skilled in the art will further understand that any transition word and / or phrase (whether in the specification, claims, or drawings) that substantially represents two or more alternative terms should be understood to encompass the possibility of including one, any, or both of the terms. For example, the phrase "A or B" would be understood to include the possibility of "A" or "B" or "A and B".

[0075] It is believed that the present disclosure and its many accompanying advantages will be understood from the foregoing description, and it will be apparent that various changes can be made in the form, construction, and arrangement of the components without departing from the subject matter of the disclosure or sacrificing all its substantial advantages. The forms described are merely illustrative, and the appended claims are intended to encompass and include such changes. Furthermore, it should be understood that the invention is defined by the appended claims.

Claims

1. An inspection system comprising: A controller communicatively coupled to an inspection subsystem configured to receive illumination from a sample and generate image data, wherein the controller includes one or more processors configured to execute program instructions that cause the one or more processors to: Receive the image data, wherein the image data includes at least one image; The at least one image is downsampled using bicubic interpolation or bilinear interpolation; The at least one image is transformed from the spatial domain to the frequency domain using Fourier transform; Filter frequencies above a threshold frequency from the at least one image; The at least one image is transformed from the frequency domain to the spatial domain using the inverse Fourier transform; The calculation includes the shape features of the region, bounding box, and the principal axis length and secondary axis length or eccentricity of the fitted ellipse; and Detect one or more flat pattern defects in the at least one image.

2. The system of claim 1, wherein the sample comprises at least one of a semiconductor wafer, a photomask, or a photomask.

3. The system of claim 1, wherein the one or more flat pattern defects include: At least one of the following: residue defect, residual defect, or stain defect.

4. The system of claim 1, wherein the one or more processors are further configured to execute program instructions to cause the one or more processors to: After filtering frequencies above a threshold frequency from the at least one image, at least one of a Butterworth filter function or a Gaussian filter function is applied to the at least one image.

5. The system of claim 1, wherein the one or more processors are further configured to execute program instructions that cause the one or more processors to: After transforming the at least one image from the spatial domain to the frequency domain using Fourier transform, the average pixel grayscale value and the standard deviation pixel grayscale value of the at least one image are calculated.

6. The system of claim 5, wherein the one or more processors are further configured to execute program instructions to cause the one or more processors to: Each pixel of the at least one image is binarized using the average pixel grayscale value and the standard deviation pixel grayscale value.

7. The system of claim 1, wherein the one or more processors are further configured to execute program instructions that cause the one or more processors to: After filtering frequencies above a threshold frequency from the at least one image, the at least one image is multiplied by the filter core.

8. An inspection system comprising: Inspection subsystem; and A controller communicatively coupled to the inspection subsystem, wherein the inspection subsystem is configured to receive illumination from a sample and generate image data, wherein the controller includes one or more processors configured to execute program instructions to cause the one or more processors to: Receive the image data, wherein the image data includes at least one image; The at least one image is downsampled using bicubic interpolation or bilinear interpolation; The at least one image is transformed from the spatial domain to the frequency domain using Fourier transform; Filter frequencies above a threshold frequency from the at least one image; The at least one image is transformed from the frequency domain to the spatial domain using the inverse Fourier transform; The calculation includes the shape features of the region, bounding box, and the principal axis length and secondary axis length or eccentricity of the fitted ellipse; and Detect one or more flat pattern defects in the at least one image.

9. The system of claim 8, wherein the sample comprises at least one of a semiconductor wafer, a photomask, or a photomask.

10. The system of claim 8, wherein the one or more flat pattern defects include: At least one of the following: residue defect, residual defect, or stain defect.

11. The system of claim 8, wherein the one or more processors are further configured to execute program instructions that cause the one or more processors to: After filtering frequencies above a threshold frequency from the at least one image, at least one of a Butterworth filter function or a Gaussian filter function is applied to the at least one image.

12. The system of claim 8, wherein the one or more processors are further configured to execute program instructions that cause the one or more processors to: After transforming the at least one image from the spatial domain to the frequency domain using Fourier transform, the average pixel grayscale value and the standard deviation pixel grayscale value of the at least one image are calculated.

13. The system of claim 12, wherein the one or more processors are further configured to execute program instructions that cause the one or more processors to: Each pixel of the at least one image is binarized using the average pixel grayscale value and the standard deviation pixel grayscale value.

14. A testing method, comprising: It receives illumination from the sample and generates image data using the testing subsystem. Receive the image data, wherein the image data includes at least one image; The at least one image is downsampled using bicubic interpolation or bilinear interpolation; The at least one image is transformed from the spatial domain to the frequency domain using Fourier transform; Filter frequencies above a threshold frequency from the at least one image; The at least one image is transformed from the frequency domain to the spatial domain using the inverse Fourier transform; The calculation includes the shape features of the region, bounding box, and the principal axis length and secondary axis length or eccentricity of the fitted ellipse; and Detect one or more flat pattern defects in the at least one image.

15. The method of claim 14, wherein the sample comprises at least one of a semiconductor wafer, a photomask, or a photomask.

16. The method of claim 14, wherein the one or more flat pattern defects comprise: At least one of the following: residue defect, residual defect, or stain defect.

17. The method of claim 14, further comprising applying at least one of a Butterworth filter function or a Gaussian filter function to the at least one image after filtering the at least one image for frequencies above a threshold frequency.

18. The method of claim 14, further comprising, after transforming the at least one image from the spatial domain to the frequency domain using a Fourier transform, calculating the average pixel grayscale value and the standard deviation pixel grayscale value of the at least one image.

19. The method of claim 18, further comprising binarizing each pixel of the at least one image using the average pixel grayscale value and the standard deviation pixel grayscale value.

20. The method of claim 18, further comprising multiplying the at least one image by a filter core after filtering the at least one image for frequencies above a threshold frequency.

Images