USB2.0 protocol five-bit cyclic redundancy check method, device and equipment

Abstract

This application provides a USB 2.0 protocol five-bit cyclic redundancy check (CRC) method, apparatus, and device. At the sending end, CRC-5 calculation is performed on the address and endpoint number in the token packet, and the calculation result is integrated with the PID, address, and endpoint number to form a complete token packet before being sent. At the receiving end, the token packet sent by the sending end is received, and CRC-5 calculation and verification are performed on the second and third bytes of the token packet. This application effectively reduces hardware latency by expanding the data bit width and eliminating redundant terms, enabling the system to operate at higher frequencies.

Description

Technical Field

[0001] The present application relates to the field of USB transmission technology, and more particularly to a method, device and equipment for five-bit cyclic redundancy check of USB2.0 protocol. Background Art

[0002] The USB2.0 standard protocol is the most widely used in the market, supporting a maximum transfer rate of 480Mbps, and mainly has three working modes: high speed (High Speed), full speed (Full Speed) and low speed (Low Speed).

[0003] The commonly used cyclic redundancy check code (CRC) is the most commonly used error checking code in the field of data communication. Its characteristic is that the length of the information field and the check field can be arbitrarily selected. Cyclic redundancy check (CRC) is a data transmission error detection function. It performs polynomial calculation on the data and attaches the result to the end of the data. The receiving device calculates the received data with the same algorithm and compares the result with the received cyclic redundancy check code to determine the correctness and integrity of the data transmission.

[0004] The token packet in the USB2.0 protocol uses CRC-5 to protect the contents of the address (ADDR) and endpoint number (ENDP). The token packet format is as follows: Figure 1 As shown, the content includes: packet header sequence number (PID); address bit (ADDR); endpoint number (ENDP); five-bit cyclic redundancy check value (CRC-5).

[0005] The CRC-5 implementation provided by the existing USB2.0 protocol is based on single-bit operation and bit-by-bit iteration. The disadvantage is that each cycle requires many iterations, which is time-consuming, and the hardware delay of redundant check code generation and result verification is large, which limits the operating frequency and overall performance of the hardware system. Summary of the invention

[0006] In view of the shortcomings of the prior art described above, the purpose of the present application is to provide a USB2.0 protocol five-bit cyclic redundancy check method, device and equipment to solve the problems of large number of iterations, long time consumption, and large hardware delay in redundant check code generation and result verification in the prior art.

[0007] To achieve the above-mentioned purpose and other related purposes, the present application provides a USB2.0 protocol five-bit cyclic redundancy check method, the method comprising: performing CRC-5 calculation on the address and endpoint number in the token packet at the sending end, and integrating the calculation result with the PID, address, and endpoint number to form a complete token packet before sending it out; receiving the token packet sent by the sending end at the receiving end, and performing CRC-5 calculation and verification on the second and third bytes of the token packet.

[0008] In one embodiment of the present application, the CRC-5 calculation method of the sending end for the address and endpoint number in the token packet includes: generating the values ​​of PID, address and endpoint number in the token packet according to the transmission requirements; setting the initial value of the CRC-5 register to 11111, taking crc5(n)[m] to represent the value of the mth bit after the CRC-5 register is iterated n times; m takes a value from 0 to 4; inputting the values ​​of the address and endpoint number bit by bit into the data input bit din and iterating based on the single-step iteration formula, after iterating 11 times, obtaining the expanded result crc5(11)[m]; eliminating redundant items according to a^a^b=b, then bringing in the initial value 11111 of crc5(0) and simplifying according to a^1^1=a to obtain the value of crc5(11); wherein a and b are binary variables; inverting the simplified crc5(11) bit by bit and reversing the order from high to low to obtain the CRC-5 calculation result.

[0009] In one embodiment of the present application, the calculation result is integrated with the PID, address, and endpoint number to form a complete token packet and then sent out, including: according to the calculation result of CRC-5, the most significant bit MSB is placed at the 19th bit of the token packet, the second most significant bit is placed at the 20th bit, and the least significant bit LSB is placed at the 23rd bit; combining the PID, address, and endpoint number, and sending the complete token packet in order from low to high.

[0010] In one embodiment of the present application, the receiving end calculates the CRC-5 of the second and third bytes of the token packet, including: receiving the first byte of the token packet, and if the PID is correct, performing CRC check calculations on the subsequent second and third bytes; setting the initial value of the CRC-5 register to 11111, taking crc5(n)[m] to represent the value of the mth bit after the CRC-5 register is iterated n times; m takes a value from 0 to 4; using the received second and third bytes bit by bit as data input bits din and iterating based on a single-step iteration formula, and after 16 iterations, obtaining the expanded result crc5(16)[m]; eliminating redundant items according to a^a^b=b, and then bringing in the initial value 11111 of crc5(0) and simplifying according to a^1^1=a to obtain the value of crc5(16); wherein a and b are binary variables.

[0011] In one embodiment of the present application, the verification method includes: determining whether the CRC-5 verification calculation result of the second and third bytes of the received token packet is 01100; if not, it means that an error occurred during data transmission, and reporting CRC-5 verification failure.

[0012] In one embodiment of the present application, the single-step iteration formula is: crc5(n+1)[0]=din^crc(n)[4]; crc5(n+1)[1]=crc(n)[0]; crc5(n+1)[2]=din^crc(n)[4]^crc(n)[1]; crc5(n+1)[3]=crc(n)[2]; crc5(n+1)[4]=crc(n)[3].

[0013] In one embodiment of the present application, the data input bit din is counted from the 8th bit to the 18th bit of the token packet.

[0014] In one embodiment of the present application, the data input bit din is counted from the 8th bit of the token packet to the 23rd bit.

[0015] To achieve the above-mentioned purpose and other related purposes, the present application provides a USB2.0 protocol five-bit cyclic redundancy check device, which includes: a sending module, used to perform CRC-5 calculation on the address and endpoint number in the token packet, and integrate the calculation result with the PID, address, and endpoint number to form a complete token packet before sending it out; a receiving module, used to receive the token packet sent by the sending module, and perform CRC-5 calculation and check on the second and third bytes of the token packet.

[0016] To achieve the above-mentioned purpose and other related purposes, the present application provides a USB2.0 device, which includes: a memory, a processor, and a communicator; the memory stores a computing program, the processor executes the computing program to implement the method described above; and the communicator communicates with an external device.

[0017] As described above, a USB2.0 protocol five-bit cyclic redundancy check method, device and equipment of the present application performs CRC-5 calculation on the address and endpoint number in the token packet at the sending end, and integrates the calculation result with the PID, address, and endpoint number to form a complete token packet before sending it out; the token packet sent by the sending end is received at the receiving end, and the CRC-5 calculation and verification are performed on the second and third bytes of the token packet.

[0018] It has the following beneficial effects:

[0019] This application effectively reduces hardware delay by expanding the data bit width and eliminating redundant items, allowing the system to operate at a higher frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram showing a token packet format in an embodiment of the present application is shown.

[0021] Figure 2 Shown is a scenario diagram of a CRC-5 hardware implementation solution provided in the USB2.0 protocol in the prior art in one embodiment of the present application.

[0022] Figure 3 Shown is a flowchart of a five-bit cyclic redundancy check method for the USB2.0 protocol in one embodiment of the present application.

[0023] Figure 4 Shown is a flowchart of a five-bit cyclic redundancy check method for USB2.0 protocol at the sending end in one embodiment of the present application.

[0024] Figure 5 Shown is a flowchart of a five-bit cyclic redundancy check method for USB2.0 protocol at a receiving end in one embodiment of the present application.

[0025] Figure 6 Shown is a module diagram of a USB2.0 protocol five-bit cyclic redundancy check device in one embodiment of the present application.

[0026] Figure 7 Shown is a schematic diagram of the structure of a computer device in one embodiment of the present application. DETAILED DESCRIPTION

[0027] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0028] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application, and thus the drawings only show components related to the present application rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed at will, and the component layout may also be more complicated.

[0029] Figure 2 The following is a schematic diagram of a CRC-5 hardware implementation provided in the USB2.0 protocol in the prior art. The specific steps of the sender are as follows:

[0030] 1) The polynomial value of CRC-5 is 00101;

[0031] 1) The initial value of the CRC-5 register is 11111, recorded as crc5[4:0], and from high to low, it is crc5[4], crc5[3], crc5[2], crc5[1], crc5[0];

[0032] 3) Store the lowest bit value crc5[0] of the current CRC-5 register into the second lowest bit crc5[1];

[0033] 4) XOR the second lowest bit value crc5[1] of the current CRC-5 register with the current data input bit din and the highest bit crc5[4] of the current CRC-5 register, and store the result in crc5[2];

[0034] 5) Store the value of the second bit of the current CRC-5 register crc5[2] into the third bit crc5[3];

[0035] 6) Store the third bit value crc5[3] of the current CRC-5 register into the fourth bit, i.e. the highest bit crc5[4];

[0036] 7) XOR the highest bit crc5[4] of the current CRC-5 register with the current data input bit din, and store the generated result in the lowest bit crc5[0] of the CRC-5 register;

[0037] 8) Repeat steps 3 to 7, starting from the 8th bit of the token packet to the 18th bit, and calculating all inputs bit by bit in turn to obtain the final value of the CRC-5 register; preferably, the data input bit din is calculated from the 8th bit of the token packet to the 18th bit;

[0038] 9) Invert the value of the CRC-5 register bit by bit and reverse the order from high to low to obtain the final CRC-5 calculation result, put the most significant bit (MSB) at the 11th bit of the token packet (token), the second most significant bit at the 20th bit, and the least significant bit (LSB) at the 23rd bit;

[0039] 10) Send the complete 24-bit token packet (token) in order from low to high.

[0040] The specific steps for the receiver are:

[0041] 1) The polynomial value of CRC-5 is 00101;

[0042] 2) The initial value of the CRC-5 register is 11111, recorded as crc5[4:0], and from high to low, it is crc5[4], crc5[3], crc5[2], crc5[1], crc5[0];

[0043] 3) Store the lowest bit value crc5[0] of the current CRC-5 register into the second lowest bit crc5[1];

[0044] 4) XOR the second lowest bit value crc5[1] of the current CRC-5 register with the current data input bit din and the highest bit crc5[4] of the CRC-5 register, and store the result in crc5[2];

[0045] 5) Store the value of the second bit of the current CRC-5 register crc5[2] into the third bit crc5[3];

[0046] 6) Store the third bit value crc5[3] of the current CRC-5 register into the fourth bit, i.e. the highest bit crc5[4];

[0047] 7) XOR the highest bit crc5[4] of the current CRC-5 register with the current data input bit din, and store the generated result in the lowest bit crc5[0] of the CRC-5 register;

[0048] 8) Repeat steps 3 to 7, starting from the 8th bit of the token packet to the 23rd bit, and sequentially calculating all inputs bit by bit to obtain the final value of the CRC-5 register; preferably, the data input bit din is calculated from the 8th bit of the token packet to the 23rd bit;

[0049] 9) The CRC-5 checksum calculation result of the received token packet (token) should be 01100, otherwise the CRC-5 check failure is reported.

[0050] Take crc5(n) to represent the value of the CRC-5 register after n iterations, crc5(n+1) to represent the value of the CRC-5 register after n+1 iterations, crc5(n)[m] to represent the value of the mth bit of the CRC-5 register after n iterations (m ranges from 0 to 4), and the current data input bit din. The corresponding iteration formula is as follows:

[0051] crc5(n+1)[0]=din^crc(n)[4];

[0052] crc5(n+1)[1]=crc(n)[0];

[0053] rc5(n+1)[2]=din^crc(n)[4]^crc(n)[1];

[0054] crc5(n+1)[3]=crc(n)[2];

[0055] crc5(n+1)[4]=crc(n)[3].

[0056] As can be seen from the above, the CRC-5 implementation provided by the existing USB2.0 protocol is based on single-bit operation and bit-by-bit iteration. The disadvantage is that each cycle requires many iterations, which takes a long time. The hardware delay of redundant check code generation and result verification is large, which limits the operating frequency and overall performance of the hardware system.

[0057] To overcome the deficiencies of the prior art, the present invention aims to provide a USB2.0 protocol five-bit cyclic redundancy check method, a CRC-5 hardware implementation scheme based on data bit width expansion, which eliminates redundant items after expansion, shortens the hardware delay of CRC-5 redundant check code generation and result verification, and enables the system to operate at a higher frequency. The method is applied to USB2.0 devices, and the method includes a CRC-5 calculation method for the address and endpoint number in a token packet at the sending end and a CRC-5 calculation method for the second and third bytes of the token packet at the receiving end.

[0058] like Figure 3 FIG. 1 is a flow chart of a five-bit cyclic redundancy check method for USB 2.0 protocol in one embodiment of the present application. As shown in the figure, the method includes:

[0059] Step S1: The sending end performs CRC-5 calculation on the address and endpoint number in the token packet, and integrates the calculation result with the PID, address, and endpoint number to form a complete token packet before sending it out.

[0060] In one embodiment of the present application, the CRC-5 calculation method of the sending end for the address and endpoint number in the token packet includes:

[0061] S11: Generate the values ​​of PID, address and endpoint number in the token packet according to the transmission requirements;

[0062] S12: Let the initial value of the CRC-5 register be 11111, and take crc5(n)[m] to represent the value of the mth bit after the CRC-5 register is iterated n times; m ranges from 0 to 4;

[0063] S13: Input the values ​​of the address and endpoint number bit by bit into the data input bit din and iterate based on the single-step iteration formula. After 11 iterations, the expanded result crc5(11)[m] is obtained;

[0064] S14: Eliminate redundant items according to a^a^b=b, then substitute the initial value 11111 of crc5(0) and simplify according to a^1^1=a to obtain the value of crc5(11); wherein a and b are binary variables.

[0065] S15: Invert the simplified crc5(11) bit by bit and reverse the order from high to low bits to obtain the CRC-5 calculation result.

[0066] In one embodiment of the present application, the calculation result is integrated with the PID, address, and endpoint number to form a complete token packet and then sent out, including:

[0067] S16: According to the calculation result of CRC-5, the highest bit MSB is placed at the 19th bit of the token packet, the second highest bit is placed at the 20th bit, and the lowest bit LSB is placed at the 23rd bit;

[0068] S17: Combine the PID, address and endpoint number and send the complete token packet in order from low to high.

[0069] In simple terms, Figure 4 , as shown, the CRC-5 calculation of the address and endpoint number in the token packet in this application includes the following steps:

[0070] 1) Generate the values ​​of PID, address (ADDR) and endpoint number (ENDP) in the token packet (token) according to the transmission requirements.

[0071] 2) The initial value of the CRC-5 register is 11111, recorded as crc5[4:0], and from high to low, it is crc5[4], crc5[3], crc5[2], crc5[1], crc5[0];

[0072] 3) Take crc5(n) to represent the value of the CRC-5 register after n iterations, crc5(n+1) to represent the value of the CRC-5 register after n+1 iterations, crc5(n)[m] to represent the value of the mth bit of the CRC-5 register after n iterations, where m ranges from 0 to 4, the initial value of the CRC-5 register is crc5(0)[4:0], and the current data input bit is din, based on the single-step iteration formula;

[0073] 4) Input the values ​​of the address (ADDR) and the endpoint number (ENDP) bit by bit to din and iterate. After 11 iterations, expand and obtain the expansion result.

[0074] 5) In the expanded expression, redundant terms are eliminated according to a^a^b=b, where a and b are binary variables;

[0075] 6) After substituting the initial value 11111 of crc5(0), the value of crc5(11) is obtained by simplifying according to a^1^1=a, where a is a binary variable;

[0076] 7) Iterate 11 times and simplify the crc5(11) obtained in step 6) by bit inversion and reverse the order from high to low to obtain the final CRC-5 calculation result;

[0077] 8) Based on the CRC-5 calculation result in step 7), place the highest bit MSB at the 19th bit of the token, the second highest bit at the 20th bit, and the lowest bit LSB at the 23rd bit. Combined with the PID, address (ADDR) and endpoint number (ENDP), send the complete token in order from low to high.

[0078] Specifically, compared with the CRC-5 implementation provided by the existing USB2.0 protocol, the characteristics of the CRC-5 calculation of the address and endpoint number in the token packet in this application are:

[0079] First, the initial value of the CRC-5 register is 11111, recorded as crc5[4:0], and from high to low, it is crc5[4], crc5[3], crc5[2], crc5[1], crc5[0];

[0080] Second, crc5(n) represents the value of the CRC-5 register after n iterations, crc5(n+1) represents the value of the CRC-5 register after n+1 iterations, crc5(n)[m] represents the value of the mth bit after n iterations of the CRC-5 register (m ranges from 0 to 4), the initial value of the CRC-5 register is crc5(0)[4:0], the current data input bit is din, based on the single-step iteration formula:

[0081] crc5(n+1)[0]=din^crc(n)[4];

[0082] crc5(n+1)[1]=crc(n)[0];

[0083] crc5(n+1)[2]=din^crc(n)[4]^crc(n)[1];

[0084] crc5(n+1)[3]=crc(n)[2];

[0085] crc5(n+1)[4]=crc(n)[3];

[0086] After expansion and 11 iterations, the results are as follows:

[0087] crc5(11)[0]=from

[10] ^from[7]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[2]^crc5(0)[2]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4];

[0088] crc5(11)[1]=from[9]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[1]^crc5(0)[3]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0];

[0089] crc5(11)[2]=from

[10] ^from[7]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[2]^crc5(0)[2]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4]^from[8]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4]^from[3]^from[0]^crc5(0)[4]^from[0]^crc5(0)[1];

[0090] crc5(11)[3]=from[9]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[1]^crc5(0)[3]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[7]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[2]^crc5(0)[2];

[0091] crc5(11)[4]=from[8]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[1]^crc5(0)[3];

[0092] Taking crc5(11)[1] as an example, in the expanded expression, din[1] appears twice and crc5(0)[3] appears twice. We can eliminate the redundant terms by a^a^b=b (a, b are binary variables), and then substitute the initial value 11111 of crc5(0) and eliminate the redundant terms by a^1^1=a (a is a binary variable). The expression can be simplified to: crc5(11)[1]=din[3]^din[0]^1^din[4]^din[6]^din[9];

[0093] The final result after 11 iterations can be simplified as follows:

[0094] crc5(11)[0]=din[0]^din[7]^din

[10] ^1^din[1]^din[4]^din[5];

[0095] crc5(11)[1]=din[3]^din[0]^1^din[4]^din[6]^din[9];

[0096] crc5(11)[2]=din[3]^din[0]^din[7]^1^din

[10] ^din[2]^din[8]^din[1]^din[4];

[0097] crc5(11)[3]=din[3]^din[7]^din[0]^din[2]^din[1]^din[6]^din[9];

[0098] crc5(11)[4]=din[0]^1^din[2]^din[1]^din[8]^din[6]^din[5];

[0099] Third, the simplified crc5(11) is inverted bit by bit and the order is reversed from high to low to obtain the final CRC-5 calculation result. The most significant bit (MSB) is placed at the 19th bit of the token, the second most significant bit is placed at the 20th bit, and the least significant bit (LSB) is placed at the 23rd bit; the complete 24-bit token is sent in order from low to high.

[0100] Step S2: Receive the token packet sent by the sending end at the receiving end, and perform CRC-5 calculation and verification on the second and third bytes of the token packet.

[0101] In one embodiment of the present application, the receiving end calculates the CRC-5 of the second and third bytes of the token packet including:

[0102] S21: Receive the first byte of the token packet. If the PID is correct, perform CRC calculation on the second and third bytes.

[0103] S22: Let the initial value of the CRC-5 register be 11111, and take crc5(n)[m] to represent the value of the mth bit after the CRC-5 register is iterated n times; m ranges from 0 to 4;

[0104] S23: using the received second and third bytes bit by bit as data input bit din and iterating based on the single-step iteration formula, and after 16 iterations, obtaining the expanded result crc5(16)[m];

[0105] S24: Eliminate redundant items according to a^a^b=b, then substitute the initial value 11111 of crc5(0) and simplify according to a^1^1=a to obtain the value of crc5(16); wherein a and b are binary variables;

[0106] In one embodiment of the present application, the verification method includes:

[0107] S25: Determine whether the CRC-5 checksum calculation result of the second and third bytes of the received token packet is 01100; if not, it means that an error occurred during data transmission, and reports that the CRC-5 checksum failed.

[0108] In simple terms, Figure 5 As shown, the method for calculating and verifying the CRC-5 of the second and third bytes of the token packet in the present application includes the following steps:

[0109] 1) First receive the first byte of the token packet (token), corresponding to the PID. If the PID is correct, perform the CRC check calculation on the subsequent second and third bytes.

[0110] 2) The initial value of the CRC-5 register is 11111, recorded as crc5[4:0], and from high to low, it is crc5[4], crc5[3], crc5[2], crc5[1], crc5[0];

[0111] 3) Take crc5(n) to represent the value of the CRC-5 register after n iterations, crc5(n+1) to represent the value of the CRC-5 register after n+1 iterations, crc5(n)[m] to represent the value of the mth bit of the CRC-5 register after n iterations, where m ranges from 0 to 4, the initial value of the CRC-5 register is crc5(0)[4:0], and the current data input bit is din, based on the single-step iteration formula:

[0112] 4) The second and third bytes received are used as din bit by bit to calculate and iterate according to step 3. After 16 iterations, the expanded result is obtained;

[0113] 5) In the expanded expression, according to a^a^b=b, where a and b are binary variables, the redundant terms are eliminated;

[0114] 6) After substituting the initial value 11111 of crc5(0), the value of crc5(16) is obtained by simplifying according to a^1^1=a, where a is a binary variable;

[0115] 7) The CRC-5 checksum calculation result of the second and third bytes of the received token packet (token) should be 01100, otherwise the CRC-5 checksum failure is reported.

[0116] Specifically, compared with the CRC-5 implementation provided by the existing USB2.0 protocol, the method of performing CRC-5 calculation and verification on the second and third bytes of the token packet in the present application is characterized in that:

[0117] First, the initial value of the CRC-5 register is 11111, recorded as crc5[4:0], and from high to low, they are crc5[4], crc5[3], crc5[2], crc5[1], crc5[0];

[0118] Second, crc5(n) represents the value of the CRC-5 register after n iterations, crc5(n+1) represents the value of the CRC-5 register after n+1 iterations, crc5(n)[m] represents the value of the mth bit after n iterations of the CRC-5 register (m ranges from 0 to 4), the initial value of the CRC-5 register is crc5(0)[4:0], the current data input bit is din, based on the single-step iteration formula:

[0119] crc5(n+1)[0]=din^crc(n)[4];

[0120] crc5(n+1)[1]=crc(n)[0];

[0121] crc5(n+1)[2]=din^crc(n)[4]^crc(n)[1];

[0122] crc5(n+1)[3]=crc(n)[2];

[0123] crc5(n+1)[4]=crc(n)[3];

[0124] After expansion and 16 iterations, the results are as follows:

[0125] crc5(16)[0]=from

[15] ^from

[12] ^from[9]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[1]^crc5(0)[3]^from[4]^from[1]^crc5(0)[3]^from[7]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[2]^crc5(0)[2]^from

[10] ^from[7]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[2]^crc5(0)[2]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4];

[0126] crc5(16)[1]=from

[14] ^from

[11] ^from[8]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[1]^crc5(0)[3]^from[9]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[1]^crc5(0)[3]^from[4]^from[1]^crc5(0)[3]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0];

[0127] crc5(16)[2]=from

[15] ^from

[12] ^from[9]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[1]^crc5(0)[3]^from[4]^from[1]^crc5(0)[3]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[7]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[2]^crc5(0)[2]^from

[10] ^from[7]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[2]^crc5 (0)[2]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4]^from

[13] ^from

[10] ^from[7]^from[4]^from[1]^crc5(0)[3]^crc5(0)[0]^from[2]^crc5(0)[2]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4]^from[8]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4]^from[3]^from[0]^crc5(0)[4]^from[0]^crc5(0)[1];

[0128] crc5(16)[3]=from

[14] ^from

[11] ^from[8]^from[5]^from[2]^crc5(0)[2]^from[0]^crc5(0)[4]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^from[1]^crc5(0)[3]^from[9]^from[6]^from[3]^from[0]^crc5(0)[4]^crc5(0)[1]^d in[1]^crc5(0)[3]^in[4]^in[1]^crc5(0)[3]^crc5(0)[0]^in

[12] ^in[9]^in[6]^in[3]^in[0]^crc5(0)[4]^crc5(0)[1]^in[1]^crc5(0)[3]^in[4]^in[1]^crc5(0)[3]^crc5(0)[0]^in[7]^in[4]^in[1]^crc5(0)[3]^crc5(0)[0]^in[2]^crc5(0)[2];

[0129] crc5(16)[4] = din

[13] ^ din

[10] ^ din[7] ^ din[4] ^ din[1] ^ crc5(0)[3] ^ crc5(0)[0] ^ din[2] ^ crc5(0)[2] ^ din[5] ^ din[2] ^ crc5(0)[2] ^ din[0] ^ crc5(0)[4] ^ din[8] ^ din[5] ^ din[2] ^ crc5(0)[2] ^ din[0] ^ crc5(0)[4] ^ din[3] ^ din[0] ^ crc5(0)[4] ^ crc5(0)[1] ^ din

[11] ^ din[8] ^ din[5] ^ din[2] ^ crc5(0)[2] ^ din[0] ^ crc5(0)[4] ^ din[3] ^ din[0] ^ crc5(0)[4] ^ crc5(0)[1] ^ din[6] ^ din[3] ^ din[0] ^ crc5(0)[4] ^ crc5(0)[1] ^ din[1] ^ crc5(0)[3].

[0130] According to a ^ a ^ b = b (where a and b are binary variables), redundant terms are eliminated. Then, substituting the initial value 11111 of crc5(0), and according to a ^ 1 ^ 1 = a (where a is a binary variable), redundant terms are eliminated again. The result can be simplified to:

[0131] crc5(16)[0] = din[3] ^ din

[12] ^ din

[10] ^ din

[15] ^ din[2] ^ 1 ^ din[4] ^ din[5] ^ din[9] ^ din[6];

[0132] crc5(16)[1] = din[3] ^ din[2] ^ din

[11] ^ din

[14] ^ din[1] ^ din[8] ^ din[4] ^ din[9] ^ din[5];

[0133] crc5(16)[2] = din[7] ^ din[0] ^ din

[12] ^ din

[15] ^ din[8] ^ din[1] ^ din

[13] ^ din[5] ^ din[6] ^ din[9];

[0134] crc5(16)[3] = din[7] ^ din[0] ^ din

[12] ^ din

[11] ^ din

[14] ^ din[8] ^ din[4] ^ din[6] ^ din[5];

[0135] crc5(16)[4]=din[3]^din[7]^din

[10] ^din

[11] ^din[4]^din

[13] ^din[6]^din[5];

[0136] Third, the CRC-5 checksum calculation result of the received token packet (token) should be 01100, otherwise it will report that the CRC-5 checksum failed.

[0137] In one or more embodiments, the present application records the hardware delay required for a "single-bit data XOR" as T. For the single-bit iterative CRC-5 hardware implementation provided by the USB2.0 protocol, the largest delay in a single iteration is the generation of the third bit of the CRC-5 register, that is, crc5(n)[2]. The highest bit of the data (bit 32) requires two "single-bit XORs", and the corresponding delay is 2*T. On the sender, it takes 11 iterations to generate CRC-5, so the total delay required is 22*T. On the receiving and checking side, it takes 16 iterations to calculate CRC-5, so the total delay required is 32*T.

[0138] For the CRC-5 hardware implementation scheme based on data bit width expansion and redundant item elimination proposed in the present invention, at the sender, according to the calculation formula after expansion and redundant item elimination, the path with the longest delay is:

[0139] crc5(11)[2]=din[3]^din[0]^din[7]^din

[10] ^din[2]^din[8]^din[1]^din[4];

[0140] Eight "single-bit data XORs" are required, so the total delay required to generate CRC-15 is 8*T.

[0141] On the receiving and verifying side, the path with the longest delay is:

[0142] crc5(16)[2]=din[7]^din[0]^din

[12] ^din

[15] ^din[8]^din[1]^din

[13] ^din[5]^din[6]^din[9];

[0143] Nine "single-bit data XORs" are required, so the total delay required to generate CRC-5 is 9*T.

[0144] Table 1 compares the hardware delay required for completing single-cycle data operations by the single-bit iteration provided by the USB2.0 protocol and the CRC-5 hardware implementation based on bit width expansion and redundant item elimination in the technical solution of the present invention.

[0145] Table 1 Comparison of hardware delay required for single-bit iteration and data width expansion

[0146] Sending producer (11 bits) Receiver checksum (16 bits) Single bit iteration 22 32 Expand based on data width 8 9

[0147] Note: The units of all delay data in the table are the hardware delay required for "single-bit data XOR".

[0148] In summary, the present invention is beneficial in that: the present invention effectively reduces hardware delay by expanding the data bit width and eliminating redundant items, so that the system can operate at a higher frequency.

[0149] like Figure 6 FIG. 6 is a block diagram showing a USB2.0 protocol five-bit cyclic redundancy check device in one embodiment of the present application. As shown in the figure, the device 600 includes:

[0150] The sending module 601 is used to perform CRC-5 calculation on the address and endpoint number in the token packet, and integrate the calculation result with the PID, address, and endpoint number to form a complete token packet and then send it out;

[0151] The receiving module 602 is used to receive the token packet sent by the sending module 601, and perform CRC-5 calculation and verification on the second and third bytes of the token packet.

[0152] It is understandable that the USB2.0 protocol five-bit cyclic redundancy check device 600 can achieve the following through the operation of each module: Figure 3 The USB2.0 protocol five-bit cyclic redundancy check method.

[0153] It should be noted that it should be understood that the division of the various modules of the above device is only a division of logical functions. In actual implementation, they can be fully or partially integrated into one physical entity, or they can be physically separated. And these modules can all be implemented in the form of software called by processing elements; they can also be all implemented in the form of hardware; some modules can also be implemented in the form of software called by processing elements, and some modules can be implemented in the form of hardware. For example, the receiving module 602 can be a separately established processing element, or it can be integrated in a chip of the above device. In addition, it can also be stored in the memory of the above device in the form of program code, and called and executed by a processing element of the above device. The function of the above receiving module 602. The implementation of other modules is similar. In addition, all or part of these modules can be integrated together, or they can be implemented independently. The processing element described here can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each module above can be completed by an integrated logic circuit of hardware in the processor element or instructions in the form of software.

[0154] For example, the above modules may be one or more integrated circuits configured to implement the above methods, such as one or more application specific integrated circuits (ASICs), or one or more digital signal processors (DSPs), or one or more field programmable gate arrays (FPGAs). For another example, when a module is implemented in the form of a processing element scheduling program code, the processing element may be a general-purpose processor, such as a central processing unit (CPU) or other processors that can call program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

[0155] like Figure 7 FIG. 1 is a schematic diagram showing the structure of a USB 2.0 device in an embodiment of the present application. As shown in the figure, the USB 2.0 device 700 includes a memory 701, a processor 702, and a communicator 703. The memory 701 stores a computing program, and the processor 702 executes the computing program to implement the following Figure 3 The USB2.0 protocol has a five-bit cyclic redundancy check; the communicator 703 is connected to an external device for communication.

[0156] Preferably, the USB 2.0 device 703 can be a host, a hub, or a slave device.

[0157] The memory 701 may include a random access memory (RAM), and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory.

[0158] The processor 702 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0159] The communicator 703 is used to realize the communication connection between other devices (such as clients, controllers, read-write libraries and read-only libraries). It may include one or more modules of different communication modes. The communication connection may be one or more wired / wireless communication modes and combinations thereof. The communication modes include: any one or more of the Internet, CAN, intranet, wide area network (WAN), local area network (LAN), wireless network, digital subscriber line (DSL) network, frame relay network, asynchronous transfer mode (ATM) network, virtual private network (VPN) and / or any other suitable communication network. For example: any one or more of WIFI, Bluetooth, NFC, GPRS, GSM, and Ethernet.

[0160] In summary, the present application provides a USB2.0 protocol five-bit cyclic redundancy check method, device and equipment, which effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0161] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.

Claims

1. A USB2.0 protocol five-bit cyclic redundancy check method, characterized in that: The method comprises: At the sending end, the address and endpoint number in the token packet are calculated by CRC-5, and the calculation result is integrated with the PID, address, and endpoint number to form a complete token packet before sending it out; among them, the current data input bit din is calculated from the 8th bit of the token packet to the 18th bit; after obtaining the CRC-5 calculation result, the highest bit MSB is placed at the 19th bit of the token packet, the second highest bit is placed at the 20th bit, and the lowest bit LSB is placed at the 23rd bit, and the complete token packet (token) is sent in the order from low to high in combination with the PID, address (ADDR) and endpoint number (ENDP); The receiving end receives the token packet sent by the sending end, and performs CRC-5 calculation and verification on the second and third bytes of the token packet; wherein the current data input bit din is calculated from the 8th bit of the token packet to the 23rd bit; the CRC-5 calculation method of the receiving end for the second and third bytes of the token packet includes: receiving the first byte of the token packet, if the PID is correct, then performing CRC verification calculation on the subsequent second and third bytes; setting the initial value of the CRC-5 register to 11111, taking crc5(n)[m] to represent the value of the mth bit after the CRC-5 register is iterated n times; m takes a value from 0 to 4; The second and third bytes are used bit by bit as data input bits din and iterated based on a single-step iteration formula. After 16 iterations, the expanded result crc5(16)[m] is obtained; redundant items are eliminated according to a^a^b=b, and then the initial value 11111 of crc5(0) is brought in and simplified according to a^1^1=a to obtain the value of crc5(16); wherein a and b are binary variables; the verification method comprises: judging that the CRC-5 verification calculation result of the second and third bytes of the received token packet is 01100; if not, it indicates that the data is erroneous during transmission, and reporting that the CRC-5 verification fails.

2. The USB2.0 protocol five-bit cyclic redundancy check method according to claim 1, characterized in that: The transmitting end calculates the CRC-5 of the address and the endpoint number in the token packet, including: Generate the values ​​of PID, address and endpoint number in the token packet according to the transmission requirements; Let the initial value of the CRC-5 register be 11111, and take crc5(n)[m] to represent the value of the mth bit after the CRC-5 register is iterated n times; m ranges from 0 to 4; Input the address and endpoint number values ​​into the data input bit din bit by bit and iterate based on the single-step iteration formula. After 11 iterations, the expanded result crc5(11)[m] is obtained. Eliminate the redundant terms according to a^a^b=b, then substitute the initial value 11111 of crc5(0) and simplify it according to a^1^1=a to obtain the value of crc5(11); where a and b are binary variables; The simplified crc5(11) is inverted bit by bit and the order is reversed from high to low to obtain the CRC-5 calculation result.

3. The USB2.0 protocol five-bit cyclic redundancy check method according to claim 2 or 1, characterized in that: The single-step iteration formula is: crc5(n+1)[0]=din^crc(n)[4]; crc5(n+1)[1]=crc(n)[0]; crc5(n+1)[2]=din^crc(n)[4]^crc(n)[1]; crc5(n+1)[3]=crc(n)[2]; crc5(n+1)[4]=crc(n)[3].

4. A USB2.0 protocol five-bit cyclic redundancy check device, characterized in that: The device comprises: The sending module is used to perform CRC-5 calculation on the address and endpoint number in the token packet, and integrate the calculation result with the PID, address, and endpoint number to form a complete token packet before sending it out; wherein, the current data input bit din is calculated from the 8th bit of the token packet to the 18th bit; after obtaining the CRC-5 calculation result, the highest bit MSB is placed at the 19th bit of the token packet (token), the second highest bit is placed at the 20th bit, and the lowest bit LSB is placed at the 23rd bit, and the complete token packet (token) is sent in the order from low to high in combination with the PID, address (ADDR) and endpoint number (ENDP); The receiving module is used to receive the token packet sent by the sending module, and perform CRC-5 calculation and verification on the second and third bytes of the token packet; wherein the current data input bit din is calculated from the 8th bit of the token packet to the 23rd bit; the CRC-5 calculation method of the receiving end for the second and third bytes of the token packet includes: receiving the first byte of the token packet, if the PID is correct, then performing CRC verification calculation on the subsequent second and third bytes; setting the initial value of the CRC-5 register to 11111, taking crc5(n)[m] to represent the value of the mth bit after the CRC-5 register is iterated n times; m takes a value from 0 to 4; receiving The second and third bytes are taken bit by bit as data input bits din and iterated based on the single-step iteration formula. After 16 iterations, the expanded result crc5(16)[m] is obtained; the redundant items are eliminated according to a^a^b=b, and then the initial value 11111 of crc5(0) is brought in and simplified according to a^1^1=a to obtain the value of crc5(16); wherein a and b are binary variables; the verification method comprises: judging whether the CRC-5 verification calculation result of the second and third bytes of the received token packet is 01100; if not, it indicates that the data is erroneous during transmission, and reporting that the CRC-5 verification fails.

5. A USB2.0 device, characterized in that: The device comprises: a memory, a processor, and a communicator; the memory stores a computing program, the processor executes the computing program to implement the method according to any one of claims 1 to 3; and the communicator is connected to an external device for communication.

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