Quantum FAST corner detection method based on NEQR expression

Abstract

The present invention discloses a quantum FAST corner point detection method based on NEQR expression, comprising the following steps: S1, preparing NEQR expressions of a central image and an auxiliary image; S2, designing a quantum reversible subtractor and a quantum circuit for obtaining an absolute value, and calculating and obtaining the pixel difference between the central image and the auxiliary image; S3, designing a quantum comparator circuit, so that the pixel difference obtained in step S2 is compared with the threshold required for the image corner point; S4, extracting the comparison result and the position information of the central image through quantum measurement, and preparing it into the NEQR expression of step S1; S5, designing a quantum circuit for corner point detection, and obtaining a corner point image expression based on the NEQR expression prepared in step S4; S6, measuring the quantum circuit of S5, obtaining the grayscale information and position information in the image, and converting it into classical image information. The present invention prepares image information into a quantum circuit through a NEQR quantum preparation method, which can reduce the image processing loss time.

Description

Technical Field

[0001] The present invention relates to the field of quantum computing technology, and in particular to a quantum FAST corner point detection method based on NEQR expression. Background Art

[0002] Based on the development of quantum mechanics, quantum computers that process massive amounts of information based on the principles of quantum mechanics have been born. Due to the existence of quantum superposition, large amounts of data can be stored and processed in parallel, and some data that is very complex on traditional computers can be quickly calculated. Therefore, quantum algorithms are much faster than traditional computers when processing data. In image processing, quantum computing has demonstrated its storage and computing capabilities. It can process the data of a picture or more pictures at the same time when processing a set of data, without having to process them one by one like classical computing. The advantages of quantum computing are also demonstrated in image feature detection, such as quantum image edge detection. Summary of the invention

[0003] The object of the present invention is to provide a quantum FAST corner detection method based on NEQR expression, which can reduce the time loss of image processing.

[0004] The present invention is achieved through the following technical solutions:

[0005] The quantum FAST corner detection method based on NEQR expression includes the following steps:

[0006] S1. Prepare NEQR expressions of the central image and auxiliary images;

[0007] S2, designing a quantum reversible subtractor and a quantum circuit for calculating absolute values, and calculating the pixel difference between the central image and the auxiliary image based on the NEQR expression of step S1;

[0008] S3, designing a quantum comparator circuit to compare the pixel difference obtained in step S2 with the threshold required for the image corner point;

[0009] S4, extracting the comparison result of step S3 and the position information of the central image through quantum measurement, and preparing the comparison result and the position information of the central image into the NEQR expression of step S1;

[0010] S5, designing a quantum circuit for corner point detection, and obtaining a corner point image expression based on the NEQR expression prepared in step S4;

[0011] S6. Measure the quantum circuit of S5 to obtain the grayscale information and position information in the image, and convert it into classical image information.

[0012] The present invention prepares image information into a quantum circuit through the NEQR quantum preparation method, stores a large amount of image information in the quantum circuit through the superposition state property of quantum, and processes this information simultaneously in the circuit, greatly reducing the processing loss time.

[0013] Furthermore, the specific process of step S1 is:

[0014] S11, acquiring image information of a central image and an auxiliary image, wherein the image information includes image pixel value information and image size information;

[0015] S12, setting corresponding qubits according to the acquired central image and auxiliary images, wherein the qubits include qubits corresponding to the grayscale information corresponding to each image, qubits corresponding to the position information shared by the central image and the auxiliary images, qubits used for auxiliary image sorting, and position auxiliary qubits;

[0016] S13, controlling the pixel value information of the central image through the common position information of the central image and the auxiliary image, and controlling the pixel value information of the auxiliary image through the common position and sorting position information, and obtaining a quantum sequence of unique mapping of the position information and the sorting position information to the grayscale information.

[0017] Furthermore, in step S1, the central image is the image to be detected, and the auxiliary image is an image selected from the central image based on the neighborhood representation; the specific process of the neighborhood representation is as follows:

[0018] Select an image as the image to be detected, select an x×x neighborhood where x is an odd number, smoothly move the neighborhood from the starting position of the image to be detected to traverse the image to be detected, store the image information of the center position of all neighborhoods in the center image in sequence, make a circle with the center position of the neighborhood as the center and (x-1) / 2 as the radius, select the pixels that the circle passes through, and take the left 1 of the corner point where the center position intersects the circle in the positive direction of the y-axis as the first pixel, and move the selected 2 pixels in a clockwise direction. a The pixels are stored in 2 a In the auxiliary images, the image information of the same position of the circle after smooth movement is stored in the same auxiliary image. a The images are stored in the final auxiliary image in the same position specified order, and a bits of binary are used to sort the two images in sequence. a image, and in subsequent auxiliary images specifically refers to the final auxiliary image.

[0019] Furthermore, in step S12, the corresponding quantum bits are set according to the acquired central image and auxiliary image. Specific setting method: The grayscale value range of the image to be detected is [0,2 m ], size 2 y ×2y , the grayscale value range of the center image is [0,2 m ], the size is (2 y -x-1)×(2 y -x-1), then the grayscale information corresponding to each image is m quantum bits, so that the central image and the auxiliary image share the same position information, so n (n = log2 2y-x-1 ) qubits, auxiliary image sorting uses a qubits, and 2 position auxiliary qubits require a total of 2m+n+a+2 qubits.

[0020] The present invention significantly reduces the number of quantum bits and garbage output bits by arranging multiple auxiliary image pixel information in parallel, greatly improving the performance of corner point detection, and the time required to achieve corner point detection is basically unaffected by the size and number of images without consuming too many quantum bits.

[0021] Furthermore, the specific process of step S2 is:

[0022] S21, designing an m-bit quantum subtractor circuit to implement the operation of subtracting the central image from the auxiliary image, and obtaining the subtraction result and the last borrow bit for the sign bit;

[0023] S22. Design an absolute value quantum circuit to realize the operation of converting the original code of step S21 into a complement code by using the sign bit, and obtain the pixel information difference between the central image and the auxiliary image.

[0024] Furthermore, the specific process of step S21 is as follows:

[0025] S211, using a controllable non-CNOT gate and a controlled-controlled-non-Toffoli gate to form a one-bit quantum full subtractor:

[0026] First, |a> is subtracted from |b> through a controlled non-CNOT gate, and the result is stored in the quantum bit |a>. Then, the borrow information of the subtraction of the two numbers is stored in the auxiliary bit |C through a controlled-controlled-non-Toffoli gate. i >, and then pass the controllable non-CNOT gate to make |ab> minus the borrow bit |C i-1 >, and finally, the borrow information of the subtraction is stored in the auxiliary bit |C through the control-control-not Toffoli gate. i >, the output is |S i >, forming a one-bit quantum full subtractor;

[0027] S212, using the one-bit quantum full subtractor obtained in step S211, by setting the two quantum bits representing the borrow information as two constant auxiliary bits, and continuously reusing them through a zeroing gate after the one-bit subtraction operation is completed, so as to superimpose m one-bit quantum full subtractors together to form an m-bit quantum full subtractor;

[0028] S213, using the output quantum bits described in step S13 as the input of the quantum full subtractor in step S212, completing the subtraction of the pixels of the auxiliary image from the pixels of the central image, and outputting the quantum bit string |S>=|s n-1 s n-2 ...s0| and the last borrow information|C i >.

[0029] The present invention optimizes the subtractor quantum circuit and adopts a one-bit quantum full subtractor, thereby reducing quantum gates and saving calculation time.

[0030] Furthermore, the specific process of step S22 is as follows:

[0031] S221. First, a one-bit quantum half adder is formed by a controlled-controlled-non Toffoli gate and a controlled non-CNOT gate:

[0032] First, the carry information of the addition of two numbers is stored in the auxiliary bit |C through the control-control-not Toffoli gate. i >, and then add |a> and |b> through a controllable non-CNOT gate, and store the result on the quantum bit |a> to form a one-bit quantum half adder;

[0033] S222, firstly, through the controllable non-CNOT gate, the quantum bit |C i > and control the quantum bit string |S>=|s n- 1s n-2 ...s0| is it inverted, and then use the one-bit quantum half adder of S221 to complete the one-bit addition operation through the zeroing gate to perform the auxiliary bit|C i > and |b> are reused continuously to realize the design of n-bit adder;

[0034] S223, first use the borrow information of S213 through the controllable non-CNOT gate | C i >Control the quantum bit string output by S213 to flip it, and get the quantum bit string |S>=|s n-1 s n-2 ...s0|, and then the adder designed by S222 makes the borrow information of S213|C i > and the quantum bit string of S223 |S>=|s n-1 s n-2...s0| performs addition operation, realizing the conversion of the data after the subtraction of the pixel values ​​of S213 from the original code to the complement code, and storing it on the quantum bit. The quantum bit string |S>=|s n-1 s n- 2...s0|, and obtain the pixel difference between the central image and the auxiliary image.

[0035] Furthermore, the specific process of step S3 is as follows:

[0036] S31. Design threshold circuit: According to the accuracy requirement of the image corner points, the required threshold value is designed into the quantum circuit through a NOT gate;

[0037] S32, design an irreversible comparator circuit to implement the comparison between the pixel difference and the threshold in step S22, taking 0 when the pixel difference is less than the threshold, and taking 1 when the pixel difference is greater than or equal to the threshold.

[0038] Preferably, step S32 is specifically:

[0039] S321, first, the information that |a> and |b> are both 1 is stored in the auxiliary bit auxiliary bit |C through the control-control-not Toffoli gate. i >; secondly, the controllable non-CNOT gate is used to flip the two numbers |a> and |b> from 1 to 0, so that when |a> and |b> are the same, |a> and |b> are set to 0, and the comparison result is stored in the quantum bit, forming a one-bit quantum comparator;

[0040] S321, first use the one-bit quantum comparator in step S321 to compare the quantum bit |C i > is set as a constant auxiliary bit, and after a comparison operation is completed, it is reused continuously through the zero gate to realize the comparison of each bit. Secondly, the two high-order numbers are inverted through the NOT gate, and the information that the two high-order numbers are 0 is stored in the auxiliary bit again through the CONTROL-CONTROL-NOTOFFFOLI gate. Then, the two high-order numbers are inverted through the NOT gate, and finally, the auxiliary bit and the low-order information are stored in the high bit through the CONTROL-CONTROL-NOTOFFFOLI gate. The above operations are continuously operated from low to high, and the output is |S>, completing the design of the quantum comparator with n as n.

[0041] S323, using the quantum bit string described in step S223 and the preset value of step S31 as the input of the quantum comparator in step S321, so that the result U is 0 when the pixel difference is less than the preset value, and 1 when it is greater than or equal to the preset value, so that the pixel difference between the central image and the auxiliary image is compared with the preset value.

[0042] Furthermore, the specific process of step S4 is as follows:

[0043] S41, measuring the qubits storing the comparison information, the position auxiliary qubits, and the position qubits of the center image in step S32 according to the order of the comparison information, the center position information, and the position auxiliary information, and storing the results in an array;

[0044] S42, the result in step S41 is used to make the central image position information the same, and the U of S323 is arranged in order from small to large according to the position auxiliary sequence, and 2 a Length of the string, and arrange it and the center image position information in a string to form a new array M;

[0045] S43, setting the information to be processed in the array M to the corresponding quantum bit; the method of setting the corresponding quantum bit is: 1 bit U and the last n bits of position information in the array require 1 quantum bit |a> and n position quantum bits |b>, and obtain a quantum sequence of unique mapping of comparison information and position information;

[0046] S44, select a threshold x value for determining a corner point, the minimum value of which is equal to 2 a-1 .

[0047] Furthermore, the specific process of step S5 is as follows:

[0048] S51. Design an m-bit quantum counter to achieve 0 to x and then 2 a -1 to 2 a +1-x counts the number of consecutive 1s in the string, and implements the first corner point determination, x is the threshold, 2 a It is used in S42 and is a variable;

[0049] S52, design an m-bit quantum counter to achieve 2 a-1 -1 to 0 and then from 2 a -1 to 2 a -(x-2 a-1 ), 2 a-1 To 2 a -1 and then from 0 to x-(1+2 a-1 ) counts the consecutive 1s in the character string, and implements the second corner point determination, and finally performs an OR operation on the result of the first corner point determination and the result of the second corner point determination;

[0050] S53, after completing a counting operation in step S51, the quantum bit |a> is continuously reused through the zeroing gate, and the 2 in step S42 is a The data is from 0 to x-1, and then 2 a -1 to 2 a +1-x are put into the quantum bit |a> in step S51 in sequence;

[0051] S54, after completing a counting operation in step S52, the quantum bit |a> is continuously reused through the zeroing gate, and the 2 in step S42 is a The data is based on 2 a-1 -1 to 0 and then from 2 a -1 to 2 a -(x-2 a-1 ), 2 a-1 To 2 a -1 and then from 0 to x-(1+2 a-1 ) put the quantum bits |a> in step S52 in sequence;

[0052] S55, using the m-bit quantum counter in step S51 to design a quantum circuit, so that the corner points are unified into one pixel value information, and the position information remains unchanged.

[0053] Preferably, step S51 is specifically:

[0054] S511, first, the carry information of the addition of two numbers is stored in the auxiliary bit |C through the control-control-not Toffoli gate. i >, and then add |a> and |b> through a controllable non-CNOT gate, and store the result on the quantum bit |b>, and the output is |S i >, forming a one-bit quantum half adder;

[0055] S512, using the one-bit quantum half adder in S511, by adding the quantum bit representing the carry information |C i >Set it as a constant auxiliary bit, and reuse it continuously after the one-bit addition operation is completed through the zeroing gate, so as to superimpose n one-bit quantum half adders together to complete the design of n-bit quantum half adder;

[0056] S513, add an auxiliary gate |ass>, and prepare |ass> to 1 state through the negation gate;

[0057] S514, firstly, the information that |ass> and |a> of S45 are both 1 is stored in the auxiliary bit |C1> through the control-control-not Toffoli gate. Then |ass> is used as |a> in the first half adder of S512, and the carry information of the previous round is used as |a> in the half adder. For the first count, only 1-bit half adder operation is required, and each increase of 2 1 times, an additional 1-bit half-adder operation is required;

[0058] S515, select a preset value for determining the threshold x that meets the corner point requirement, and convert the final counting result |b n.....b1> is compared with the threshold value x. If it is greater than or equal to the threshold value, the result is 1. If it is less than the threshold value, the result is 0. The result is stored in the quantum bit |r>. After the judgment is completed, the zero gate |b n .....b1>Set all to zero to facilitate the second round of counting.

[0059] Preferably, step S52 is specifically:

[0060] S521, reset |ass> in S511 to 0 through a zeroing gate, and then make |ass> 1 through a NOT gate;

[0061] S522, firstly, the information that |ass> and |a> of S46 are both 1 is stored in the auxiliary bit |C1> through the control-control-not Toffoli gate. Then |ass> is used as |a> in the first half adder of S512, and the carry information of the previous round is used as |a> in the half adder. For the first count, only 1-bit half adder operation is required, and each increase of 2 1 times, an additional 1-bit half-adder operation is required;

[0062] S523, the final counting result | b n .....b1> is compared with the threshold value x. If it is greater than or equal to the threshold value, the result is 1. If it is less than the threshold value, the result is 0. The result is stored in the quantum bit |m>;

[0063] S524, firstly, both |r> and |m> are flipped through a NOT gate, and then the information that both |r> and |m> are 1 is stored in |a0> through a CTRL-CTRL-NOT Toffoli gate, and the results of the first round and the second round are ANDed to complete the determination of the corner point. When both the results of the two rounds are 0, the result is 0, and when one of the results of the two rounds is 1 or both are 1, the result is 1.

[0064] Preferably, step S53 is specifically:

[0065] S531. First, except for the quantum bit |a0> in S522 and the position bit |b> in S51, the remaining quantum bits are set to zero through the zeroing gate, and then the information of the quantum bit |a0> is copied to the remaining quantum bits through the controllable non-CNOT gate, so that the pixel values ​​of the corner points are unified to |00...00>, and the pixel values ​​of the remaining non-corner points are |11...11>.

[0066] Furthermore, the specific process of step S6 is as follows:

[0067] By measuring each quantum bit in the quantum image expression after corner point detection, the quantum grayscale image will collapse, and finally the position information and grayscale information of each pixel of the image to be detected will be output in the form of probability. The probability information is then visualized to obtain the detected image.

[0068] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0069] 1. The quantum FAST corner detection method of the present invention can realize corner detection without consuming too many quantum bits, and the time duration is basically unaffected by the image size and number, has the advantage of high operating efficiency, and greatly reduces the time complexity.

[0070] 2. The quantum FAST corner point detection method of the present invention adopts a 1-bit quantum full subtractor, which reduces the running time.

[0071] 3. The quantum FAST corner detection method of the present invention adopts a more efficient neighborhood representation method, which greatly reduces the number of quantum bits and junk bits.

[0072] 4. This invention fills the gap in the design of quantum FAST corner detection algorithm. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] The drawings described herein are used to provide a further understanding of the embodiments of the present invention, constitute a part of this application, and do not constitute a limitation of the embodiments of the present invention. In the drawings:

[0074] Figure 1 is an overall flow chart of the method in an embodiment of the present invention;

[0075] Figure 2 A classic schematic diagram of a quantum image to be processed provided by an embodiment of the present invention;

[0076] Figure 3 Schematic diagram of a 7×7 corner point neighborhood in an embodiment of the present invention;

[0077] Figure 4 This is a diagram showing the output result after preparing the quantum circuit for the image of an embodiment of the present invention;

[0078] FIG5(a) is a specific circuit diagram of a 1-bit quantum full subtractor of the present invention, and FIG5(b) is a simplified diagram of a 1-bit quantum full subtractor of the present invention;

[0079] Figure 6 The specific circuit diagram of the three-digit quantum subtractor used in the present invention;

[0080] Figure 7 A specific circuit diagram for obtaining the absolute value of a quantum in an embodiment of the present invention;

[0081] Figure 8 The specific circuit diagram of the two-bit quantum comparator used in the present invention;

[0082] Fig. 9 The central image information and auxiliary image information diagram prepared based on the NEQR expression in an embodiment of the present invention;

[0083] Fig.10 A partial circuit diagram of a quantum counter in an embodiment of the present invention;

[0084] Fig.11 This is the output result diagram of the invention after the quantum FAST corner point detection;

[0085] Fig.12 is the probability histogram of quantum FAST corner detection;

[0086] Fig.13 A classic diagram showing an image with completed corner detection. DETAILED DESCRIPTION

[0087] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments and drawings. The exemplary embodiments of the present invention and their description are only used to explain the present invention and are not intended to limit the present invention.

[0088] Embodiment 1:

[0089] like Figure 1 As shown, the quantum FAST corner detection method based on NEQR expression includes the following steps:

[0090] S1. According to the NEQR representation model, prepare the NEQR expressions of the central image and the auxiliary image:

[0091] S11, obtaining image information of the central image and the auxiliary image, wherein the image information includes image pixel value information and image size information, and a classical schematic diagram of the quantum image to be processed, such as Figure 2 As shown, specifically:

[0092] First, select a circle with a radius of x. The center pixel of the circle is 1, so a center image is needed. The number of pixels that the circle passes through is k, so the number of auxiliary images required is k. The specific preparation process is as follows: Figure 2 As shown in , a 14×14 image is selected as the image to be detected, and the circle is smoothly moved from the first position of the image to traverse the image, as shown in Figure 3 As shown, the image information at the center of the circle is stored as the center image, and the image information covered by the edge of the circle is used as the auxiliary image. In this embodiment, a to-be-detected image f with a size of 14×14 and a grayscale value of [0,255] is selected.(14×14) To prepare a central image f with a size of 8×8 and a grayscale value of [0,255] (8×8) and 16 auxiliary images and Take for example, as shown in formula (1);

[0093]

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[0110]

[0111] S12, setting corresponding qubits according to the acquired central image and auxiliary images, wherein the qubits include qubits corresponding to the grayscale information corresponding to each image, qubits corresponding to the position information shared by the central image and the auxiliary images, qubits used for auxiliary image sorting, and position auxiliary qubits, specifically:

[0112] Use 4-bit binary to sort the 16 images in sequence. The specific sorting method is as follows: and According to the basic information of the central image and the auxiliary image, the corresponding quantum bits are set, and the sorting information is added to the position information and arranged at the back. The grayscale information of the central image and the auxiliary image has a total of 2×m quantum bits, and n quantum bits are used as the position information. The auxiliary bits are 2 quantum bits. For example, the central image f (8×8) and auxiliary images and The size of m is 8, and n is 10, that is, 16 bits of grayscale information are required, 10 bits of position information are required, and 2 quantum bits are required as auxiliary bits;

[0113] S13, controlling the pixel value information of the central image by the common position information of the central image and the auxiliary image, and controlling the pixel value information of the auxiliary image by the common position and sorting position information, and obtaining a quantum sequence of unique mapping of the position information and the sorting position information to the grayscale information, specifically:

[0114] The image information is prepared into the quantum circuit. The initial state of the position quantum bit is known to be |0>, and the initial state of the sorting quantum bit is |0>. The H gate transformation is performed to prepare the position information of the image. For the center f of this embodiment (8×8) and auxiliary images and Performing H-gate transformation on the 10 quantum bits of position information, we obtain a superposition state with 1024 components. The output of these 1024 components is shown in the following formula:

[0115] When the Qiskit quantum simulation system runs a quantum circuit, the output quantum sequence from left to right corresponds to the quantum circuit from top to bottom. According to the information represented by the quantum bits from top to bottom in the quantum circuit, it can be seen that the first eight bits of each of the above 1024 components represent the grayscale information of the central image, and the following eight bits represent the grayscale information of the auxiliary image. The quantum sequences listed later are all presented in this order. That is, only the required position information is obtained through the above H-gate transformation, and the grayscale information is still 0. Fig. 9The last data '0000100000000110111111111100' in the image is taken as an example to illustrate the prepared image. At this time, the output of the corresponding image preparation quantum circuit from top to bottom, the first sixteen bits 0000100000000110 are grayscale information, the seventeenth to twenty-sixth bits 1111111111 are position information, and the last two bits 00 are auxiliary quantum bits. In this embodiment, the unique mapping of all pixel information and position information is realized by reusing the two auxiliary quantum bits to zero. On the quantum circuit, the central image information and auxiliary image information prepared by the NEQR expression are shown in the figure. Fig. 9 shown.

[0116] This embodiment places 16 auxiliary images on the quantum circuit in a 4-bit quantum bit arrangement, which greatly reduces the number of quantum bits and garbage output bits, thereby saving computing resources, reducing time complexity, and improving computing speed.

[0117] S2. Design a quantum reversible subtractor and a quantum circuit for calculating absolute values, and calculate the pixel difference between the central image and the auxiliary image based on the NEQR expression in step S1:

[0118] S21, designing an m-bit quantum subtractor circuit to implement the operation of subtracting the central image from the auxiliary image, and obtaining the subtraction result and the last borrow bit for the sign bit;

[0119] The specific process of step S21 is as follows:

[0120] S211, using a controllable non-CNOT gate and a controlled-controlled-non-Toffoli gate to form a one-bit quantum full subtractor:

[0121] First, |a> is subtracted from |b> through a controlled non-CNOT gate, and the result is stored in the quantum bit |a>. Then, the borrow information of the subtraction of the two numbers is stored in the auxiliary bit |C through a controlled-controlled-non-Toffoli gate. i >, and then pass the controllable non-CNOT gate to make |ab> minus the borrow bit |C i-1 >, and finally, the borrow information of the subtraction is stored in the auxiliary bit |C through the control-control-not Toffoli gate. i >, the output is |S i >, forming a one-bit quantum full subtractor;

[0122] The implementation principle of the quantum subtractor (i.e., quantum full subtractor) is as follows:

[0123] by Figure 6Take a 3-bit quantum subtractor as an example, with a2a1a0 as the minuend and b2b1b0 as the subtrahend. In the first step, the one-bit quantum full subtractor in the previous part is used to subtract the low-bit subtrahend b0 from the low-bit minuend a0, and then subtract the upper borrow c0 from the low-bit minuend a0, and store the difference in a0. The next borrow generated by this bit is stored in c0. By setting the quantum bits |c0> and |c1> representing the borrow as two constant auxiliary bits and repeatedly reusing them through the zero gate after the one-bit subtraction operation is completed, the subtraction of the next two high bits is realized, and |a2a1a0> is used as the output as |S2S1S0>, and |c1> is used as the next borrow, thus completing the 3-bit quantum full subtractor.

[0124] In this embodiment, referring specifically to FIG. 5( a ) and FIG. 5( b ), FIG. 5( a ) shows a specific structural circuit diagram of a one-bit quantum full subtractor, and FIG. 5( b ) is a simplified diagram of a one-bit quantum full subtractor. First, a controllable non-CNOT gate is used to make the subtrahend b0 control the minuend α0. Specifically, when b0=0, α0 remains unchanged; when b0=1, α0 changes from 0 to 1 or from 1 to 0; and then a control-control-non Toffoli gate is used to make the subtrahend b0 and the minuend α0 jointly control the next borrow. Specifically, when b0=0 and α0=0 or b0=0 and α0=1 or b0=1 and α0= 0, C1 remains 0; when b0=1 and α0=1, C1 changes from 0 to 1, and the controllable non-CNOT gate is used again to make the previous borrow C0 control the minuend α0. The specific control situation is: when C0=0, α0 remains unchanged; when C0=1, α0 changes from 0 to 1 or from 1 to 0; the control-control-non Toffoli gate is used again to make the previous borrow C0 and the minuend α0 jointly control the next borrow. The specific control situation is: when C0=0 and α0=0 or C0=0 and α0=1 or C0=1 and α0=0, C1 remains unchanged; when C0=1 and α0=1, C1 changes from 0 to 1. The final truth table is shown in Table 1;

[0125] Table 1 Full subtractor truth table

[0126] <![CDATA[α0]]> <![CDATA[b0]]> <![CDATA[C0]]> <![CDATA[S(α0)]]> <![CDATA[C1]]> 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 1 1 1 1

[0127] S212, using the one-bit quantum full subtractor obtained in step S211, by setting the two quantum bits representing the borrow information as two constant auxiliary bits, and continuously reusing them through a zeroing gate after the one-bit subtraction operation is completed, so as to superimpose n one-bit quantum full subtractors together to form an n-bit quantum full subtractor;

[0128] S213, using the output quantum bits described in step S13 as the input of the quantum full subtractor in step S212, completing the subtraction of the pixels of the auxiliary image from the pixels of the central image, and outputting the quantum bit string |S>=|s n-1 s n-2...s0| and the last borrow information|C i >.

[0129] S22, design an absolute value quantum circuit to realize the operation of converting the original code of step S21 into a complement code using the sign bit, obtain the pixel information difference between the central image and the auxiliary image, take the absolute value of the value obtained by the quantum subtractor, and take the difference between the two numbers. c1 is used as a borrow bit. First, let c1 be 1 when S i Flip from 0 to 1 or from 1 to 0. If c1 is 0, S i Keep unchanged, and then use the adder to make c1 and S i Add them together to get the final difference result, and keep the result in a i As S i .

[0130] Specific route by Figure 7 exhibit;

[0131] The specific process of step S22 is as follows:

[0132] S221. First, a one-bit quantum half adder is formed by a controlled-controlled-non Toffoli gate and a controlled non-CNOT gate:

[0133] First, the carry information of the addition of two numbers is stored in the auxiliary bit |C through the control-control-not Toffoli gate. i >, and then add |a> and |b> through a controllable non-CNOT gate, and store the result on the quantum bit |a> to form a one-bit quantum half adder;

[0134] S222, firstly, through the controllable non-CNOT gate, the quantum bit |C i > and control the quantum bit string |S>=|s n- 1s n-2 ...s0| is it inverted, and then use the one-bit quantum half adder of S221 to complete the one-bit addition operation through the zeroing gate to perform the auxiliary bit|C i > and |b> are reused continuously to realize the design of n-bit adder;

[0135] S223, first use the borrow information of S213 through the controllable non-CNOT gate | C i >Control the quantum bit string output by S213 to flip it, and get the quantum bit string |S>=|s n-1 s n-2 ...s0|, and then the adder designed by S222 makes the borrow information of S213|C i > and the quantum bit string of S223 |S>=|s n-1 s n-2...s0| performs addition operation, realizing the conversion of the data after the subtraction of the pixel values ​​of S213 from the original code to the complement code, and storing it on the quantum bit. The quantum bit string |S>=|s n-1 s n- 2...s0|Get the pixel difference between the central image and the auxiliary image.

[0136] S3, designing a quantum comparator circuit to compare the pixel difference obtained in step S2 with the threshold required for the image corner point;

[0137] Given a composite system consisting of two n-bit quantum states |a>|b>, a quantum comparator is used to realize the quantum bit string |a>=|a n-1 a n-2 ...a0| and comparison string |b>=|b n-1 b n-2 ...b0| operation, the quantum comparator is the unitary evolution as shown below:

[0138] U CMP |a>|b>|0>|0>=|a>|b>|0>|c> (1)

[0139] The implementation of the comparator requires two auxiliary qubits, which do not carry any useful information. The comparison value remains unchanged, and the result of the comparison is retained in c1. When a<b, c1=0; when a≥b, c1=1. In the implementation of the comparator, the increase in the number of qubit strings involved in the comparison will not lead to an increase in the number of auxiliary qubits. Specific circuit routing Figure 8 exhibit.

[0140] The specific process of step S3 is as follows:

[0141] S31. Design threshold circuit: According to the accuracy requirement of the image corner points, the required threshold value is designed into the quantum circuit through a NOT gate;

[0142] S32, design an irreversible comparator circuit to implement the comparison between the pixel difference and the threshold in step S22, taking 0 when the pixel difference is less than the threshold, and taking 1 when the pixel difference is greater than or equal to the threshold.

[0143] Preferably, step S32 is specifically:

[0144] S321, first, the information that |a> and |b> are both 1 is stored in the auxiliary bit auxiliary bit |C through the control-control-not Toffoli gate. i >; secondly, the controllable non-CNOT gate is used to flip the two numbers |a> and |b> from 1 to 0, so that when |a> and |b> are the same, |a> and |b> are set to 0, and the comparison result is stored in the quantum bit, forming a one-bit quantum comparator;

[0145] S321, first use the one-bit quantum comparator in step S321 to compare the quantum bit |C i > is set as a constant auxiliary bit, and after a comparison operation is completed, it is reused continuously through the zero gate to realize the comparison of each bit. Secondly, the two high-order numbers are inverted through the NOT gate, and the information that the two high-order numbers are 0 is stored in the auxiliary bit again through the CONTROL-CONTROL-NOTOFFFOLI gate. Then, the two high-order numbers are inverted through the NOT gate, and finally, the auxiliary bit and the low-order information are stored in the high bit through the CONTROL-CONTROL-NOTOFFFOLI gate. The above operations are continuously operated from low to high, and the output is |S>, completing the design of the quantum comparator with n as n.

[0146] S323, using the quantum bit string described in step S223 and the preset value of step S31 as the input of the quantum comparator in step S321, so that the result U is 0 when the pixel difference is less than the preset value, and 1 when it is greater than or equal to the preset value, so that the pixel difference between the central image and the auxiliary image is compared with the preset value.

[0147] S4, extracting the comparison result of step S3 and the position information of the central image through quantum measurement, and preparing the comparison result and the position information of the central image into the NEQR expression of step S1;

[0148] The specific process of step S4 is as follows:

[0149] S41, measuring the qubits storing the comparison information, the position auxiliary qubits, and the position qubits of the center image in step S32 according to the order of the comparison information, the center position information, and the position auxiliary information, and storing the results in an array;

[0150] S42, the result in step S41 is used to make the central image position information the same, and the U of S323 is arranged in order from small to large according to the position auxiliary sequence, and 2 a Length of the string, and arrange it and the center image position information in a string to form a new array M;

[0151] S43, setting the information to be processed in the array M to the corresponding quantum bit; the method of setting the corresponding quantum bit is: 1 bit U and the last n bits of position information in the array require 1 quantum bit |a> and n position quantum bits |b>, and obtain a quantum sequence of unique mapping of comparison information and position information;

[0152] S44, select a threshold x value for determining a corner point, the minimum value of which is equal to 2 a-1 .

[0153] In the specific implementation case, S4 is specifically:

[0154] The first step is to extract the comparison result and the position information of the center image through quantum measurement. In this embodiment, the 1-bit comparison result and 10-bit position information obtained in S2 are measured through quantum measurement to obtain 1024 data. The output of these 1024 components is shown in the following formula:

[0155]

[0156] First, P is sorted in ascending order according to the last 10 bits of the string in P. Then, data is taken every 16 data intervals, and the first bit of the 16 data, i.e., the comparison result, is taken out in the order of the data and arranged from left to right. Then, the same second to seventh bits of the 16 strings, i.e., the central image position information, are taken out and placed at the back to form a new data. Finally, 64 data are generated, and each data has 22 bits. Data in this embodiment:

[0157]

[0158]

[0159] Extract the data Q 16 times and record the number of extractions. The extraction method is: extract from left to right according to a data, take out 1 bit of comparison information at a time in the first 16 bits, and then take out the last 6 bits of position information, and combine them into a 64 data and a data array M with a total of 7 bits n , M n The subscripts are the extraction order.

[0160] The second step is to transform the array M n Prepare a quantum circuit. The initial state of the known position quantum bit is |0>, and the position information is 8

[0161] The sub-bits are transformed by H gates to obtain a superposition state with 64 components. Taking M1 as an example, the output of these 64 components is shown in the following formula:

[0162]

[0163] When the Qiskit quantum simulation system runs a quantum circuit, the output quantum sequence from left to right corresponds to the quantum circuit from top to bottom. According to the information represented by the quantum bits from top to bottom in the quantum circuit, it can be known that the first bit of each of the above 64 components is the comparison information, and the following 6 bits represent the position information. That is, only the required position information is obtained through the above H-gate transformation, and the comparison information is still 0. At this time, corresponding to the output of the image preparation quantum circuit from top to bottom, the first bit is the comparison information, the following 6 bits are the position information, and the last two bits 00 are auxiliary quantum bits. In this embodiment, the unique mapping of all pixel information and position information is realized on the quantum circuit by reusing the 2-bit auxiliary quantum bits to zero. The output result after the image preparation quantum circuit is shown in the figure. Figure 4 shown.

[0164] S5, designing a quantum circuit for corner point detection, and obtaining a corner point image expression based on the NEQR expression prepared in step S4;

[0165] In the specific case, according to the quantum circuit calculated by quantum corner point, the prepared M1 to M 16 Perform counting calculation to get the corner points:

[0166] The counting method in this embodiment is: Figure 3 It can be seen that with a radius of 3, there are 16 comparison results of 1 or 0 on the edge of the circle. The threshold is set to 10. If 10 to 15 of these 16 are 1 in a row, then this point is judged as a corner point. If only 10 or less are 1 or 16 are 1, then this point is judged as a non-corner point. The specific calculation method is: these 16 will be counted in two rounds, the first round is counted from 1 to 10, and then from 16 to 7, the corresponding M n Count from M1 to M 10 , and then from M 16 to M7; the second round is from 8 to 1, then from 16 to 15, then from 9 to 16, and then from 1 to 2, the corresponding M n Count from M8 to M1, then from M 16 To M 15 , then from M9 to M 16 , and then from M1 to M2. i All counting requires the preparation and mapping of S3.

[0167] The first step is to perform the first round of counting and determine the corner points. First, prepare an auxiliary bit ass1 so that it is 1 at the beginning, so that the auxiliary bit and the counted number a are operated with an AND operation, and the result is retained in the second auxiliary bit ass2, and after one count is completed, ass2 is transferred to ass1, so that once 0 appears, ass2 and ass1 of the subsequent counts remain 0, achieving the effect of not counting. For the first count, since the result is at most 1 binary bit, only a 1-bit adder operation is performed. For the second to third counts, since the result is at most 2 binary bits, only a 2-bit adder operation is performed. The first addition operation is the number a introduced as the addend, and the subsequent addends are the carry of the previous bit. For the fourth to seventh counts, since the result is at most 3 binary bits, only a 3-bit adder operation is performed, the first addend is the introduced number, and the subsequent addends are the carry of the previous bit. For the fourth to sixteenth counts, since the result is at most 4 binary bits, only a 4-bit adder operation is performed, the first addend is the introduced number, and the subsequent addends are the carry of the previous bit. At the sixteenth count, if the numbers in the first 16 times are all 1, the final result should be 10000, but only 4 bits of binary are used, resulting in the last four bits being 0000, but this just makes the result zero and screens out the independent points. After the count is completed, the count result is compared with the threshold 10. If the count result is greater than or equal to 10, the first round result v is 1, and if the count result is less than 10, the first round result v is 0. The specific line is Fig.10 Partial display.

[0168] The second step is to perform the second round of counting and make a corner point determination. First, the auxiliary bit ass1 of the previous step is restored to 1, and the auxiliary bit ass2 is 0, so that the auxiliary bit and the counted number a are ANDed, and the result is retained in the second auxiliary bit ass2, and after one count is completed, ass2 is passed to ass1, so that once 0 appears, ass2 and ass1 of the subsequent counts remain 0, achieving the effect of not counting. For the first count, since the result is at most 1 binary bit, only a 1-bit adder operation is performed. For the second to third counts, since the result is at most 2 binary bits, only a 2-bit adder operation is performed. The first addition operation is to introduce the number a as the addend, and the subsequent addend is the carry of the previous bit. For the fourth to seventh counts, since the result is at most 3 binary bits, only a 3-bit adder operation is performed, the first addend is the introduced number, and the subsequent addend is the carry of the previous bit. For the fourth to sixteenth counts, since the result is at most 4 binary digits, only 4-bit adder operations are performed. The first addend is the introduced number, and the subsequent addends are the carry of the previous digit. At the sixteenth count, if the numbers in the first 16 times are all 1, the final result should be 10000, but only 4 binary digits are used, resulting in the last four digits being 0000, but this just makes the result zero and filters out the independent points. After the count is completed, the count result is compared with the threshold 10. If the count result is greater than or equal to 10, the first round result w is 1. If the count result is less than 10, the first round result w is 0. The specific line route Fig.10 Partial display.

[0169] In the third step, in this embodiment, the first round result v and the second round result w are first inverted and then ANDed to obtain the following results: when v is 0 and w is 0, the final result is 1; when v is 0 and w is 1, v is 1 and w is 0, v is 1 and w is 1, the final result is 0. Except for the position information, the remaining 8 bits are all copied to the state of the final result. The output of these 64 components is represented by Fig.11 shown.

[0170] The fourth step is to measure the quantum image expression to obtain the probability amplitude information of each state in the quantum image. Fig.12 Display, because the original image is too large, Fig.12 The data that can divide binary 100 in the original data is displayed; according to the probability amplitude information of each state in the quantum image, the quantum image after corner point detection is converted into a classical image for display. Fig.13 exhibit.

[0171] S6, measure the quantum circuit of S5, obtain the grayscale information and position information in the image, and convert it into classical image information:

[0172] By measuring each quantum bit in the quantum image expression after corner point detection, the quantum grayscale image will collapse, and finally the position information and grayscale information of each pixel of the image to be detected will be output in the form of probability. The probability information is then visualized to obtain the detected image.

[0173] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. Quantum FAST corner detection method based on NEQR expression, characterized in that: The following steps are involved: S1. Prepare NEQR expressions of the central image and auxiliary images; S2, designing a quantum reversible subtractor and a quantum circuit for calculating absolute values, and calculating the pixel difference between the central image and the auxiliary image based on the NEQR expression of step S1; S3, designing a quantum comparator circuit to compare the pixel difference obtained in step S2 with the threshold required for the image corner point; S4, extracting the comparison result of step S3 and the position information of the central image through quantum measurement, and preparing the comparison result and the position information of the central image into the NEQR expression of step S1; S5, designing a quantum circuit for corner point detection, and obtaining a corner point image expression based on the NEQR expression prepared in step S4; S6, measure the quantum circuit of S5, obtain the grayscale information and position information in the image, and convert it into classical image information; The specific process of step S2 is: S21, designing an m-bit quantum subtractor circuit to implement the operation of subtracting the central image from the auxiliary image, and obtaining the subtraction result and the last borrow bit for the sign bit; S22, designing an absolute value quantum circuit to realize the operation of converting the original code of step S21 into a complement code by using the sign bit, and obtaining the pixel information difference between the central image and the auxiliary image; The specific process of step S21 is as follows: S211, forming a one-bit quantum full subtractor using a controllable non-CNOT gate and a controlled-controlled-non-Toffoli gate; S212, using the one-bit quantum full subtractor obtained in step S211, by setting the two quantum bits representing the borrow information as two constant auxiliary bits, and continuously reusing them through a zeroing gate after the one-bit subtraction operation is completed, so as to superimpose m one-bit quantum full subtractors together to form an m-bit quantum full subtractor; S213, using the output qubit of step S1 as the input of the n-bit quantum full subtractor in step S212, completing the subtraction of the pixels of the auxiliary image from the pixels of the central image, and outputting the qubit string and the last borrow information; The specific process of step S22 is as follows: S221, firstly forming a one-bit quantum half adder by using a controlled-controlled-non Toffoli gate and a controlled non-CNOT gate; S222, using the one-bit quantum half adder obtained in step S221, after completing the one-bit addition operation, the auxiliary bit and the subtracted quantum bit are continuously multiplexed through the zeroing gate to obtain an n-bit adder; S223, using the borrow information obtained in S213 through a controllable non-CNOT gate to control the quantum bit string output in step S213 to flip, and then obtain the quantum bit string after flipping, and then add the borrow information in S213 to the quantum bit string through the n-bit adder designed in step S222 to obtain the pixel difference between the central image and the auxiliary image; The specific process of step S3 is as follows: S31. Design threshold circuit: According to the accuracy requirement of the image corner points, the required threshold value is designed into the quantum circuit through a NOT gate; S32, design an irreversible comparator circuit to implement the comparison between the pixel difference and the threshold in step S2, taking 0 when the pixel difference is less than the threshold, and taking 1 when the pixel difference is greater than or equal to the threshold; The specific process of step S4 is as follows: S41, measuring the qubits storing the comparison information, the position auxiliary qubits, and the position qubits of the center image in step S32 according to the order of the comparison information, the center position information, and the position auxiliary information, and storing the results in an array; S42, the result in step S41 is used to make the central image position information the same, and the pixels with a difference value less than the preset value in S32 are arranged in order from small to large according to the position auxiliary sequence, and 2 a The string of length is arranged in a string with the center image position information to form a new array M; S43, setting the information to be processed in the array M to the corresponding quantum bit position, and obtaining a quantum sequence of unique mapping of the comparison information and the position information; S44, select a threshold for determining a corner point x value; The specific process of step S5 is as follows: S51, design an m-bit quantum counter to achieve 0 to x , then 2 a -1 to 2 a +1- x Count the consecutive 1s in the string and implement the first corner point determination. x is the threshold value; S52, design an m-bit quantum counter to achieve 2 a-1 -1 to 0 and then from 2 a -1 to 2 a -( x- 2 a-1 ), 2 a-1 To 2 a -1 and then from 0 to x- (1+2 a-1 ) counts the consecutive 1s in the character string, and implements the second corner point determination. Finally, the result of the first corner point determination is ORed with the result of the second corner point determination. S53, after completing one counting operation in step S51, the subtraction quantum bits are continuously reused through the zeroing gate, and the 2 in step S42 are a The data is in the range of 0 to x -1, then 2 a -1 to 2 a +1- x Put the subtraction quantum bits in step S51 in sequence; S54, after completing one counting operation in step S52, the subtraction quantum bits are continuously reused through the zeroing gate, and the 2 in step S42 are a The data is based on 2 a-1 -1 to 0 and then from 2 a -1 to 2 a -( x- 2 a-1 ), 2 a-1 To 2 a -1 and then from 0 to x- (1+2 a -1 ) are sequentially placed into the decrement quantum bits in step S52; S55, using step S51 m The quantum circuit of the bit quantum counter is designed to unify the corner points into one pixel value information, and the position information remains unchanged.

2. The quantum FAST corner detection method based on NEQR expression according to claim 1 is characterized in that: The specific process of step S1 is: S11, acquiring image information of a central image and an auxiliary image, wherein the image information includes image pixel value information and image size information; S12, setting corresponding qubits according to the acquired central image and auxiliary images, wherein the qubits include qubits corresponding to the grayscale information corresponding to each image, qubits corresponding to the position information shared by the central image and the auxiliary images, qubits used for auxiliary image sorting, and position auxiliary qubits; S13, controlling the pixel value information of the central image through the common position information of the central image and the auxiliary image, and controlling the pixel value information of the auxiliary image through the common position and sorting position information, and obtaining a quantum sequence of unique mapping of the position information and the sorting position information to the grayscale information.

3. The quantum FAST corner detection method based on NEQR expression according to claim 1 is characterized in that: In step S1, the central image is the image to be detected, and the auxiliary image is an image selected from the central image based on the neighborhood representation; the specific process of the neighborhood representation is as follows: Select an image as the image to be detected, select x For odd numbers x × x The neighborhood is smoothly moved from the starting position of the image to be detected to traverse the image to be detected, and the image information of the center position of all neighborhoods is stored in the central image in sequence. With the center position of the neighborhood as the center of the circle, ( x -1) / 2 as the radius to make a circle, select the pixels that the circle passes through, and take the left 1 of the corner point where the positive direction of the y-axis intersects the circle as the first pixel, and then move the selected 2 pixels in a clockwise direction. a The pixels are stored in 2 a In the auxiliary images, the image information of the same position of the circle after smooth movement is stored in the same auxiliary image. a The images are stored in the final auxiliary image in the same position specified order, and a bits of binary are used to sort the two images in sequence. a images.

4. The quantum FAST corner detection method based on NEQR expression according to claim 1 is characterized in that: The specific process of step S6 is as follows: Each quantum bit in the quantum image expression after corner point detection is measured, and finally the position information and grayscale information of each pixel of the image to be detected are output in the form of probability, and then the probability information is visualized to obtain the detected image.

Images