Image processor and display device having the same

Abstract

An image processor and a display apparatus including the same are provided. The image processor of the display apparatus includes an image residue detector that classifies a category of input image data and outputs inference data including image residue information based on the classified category, a memory that stores previous inference data, a post-processor that calculates accumulated inference data based on the inference data and the previous inference data received from the memory and generates correction inference data based on the accumulated inference data, and an image residue prevention part that outputs image data that has undergone image residue prevention processing based on the correction inference data.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2020-0155996, filed on November 19, 2020, which is incorporated by reference herein in its entirety for all purposes as if fully set forth herein. TECHNICAL FIELD

[0002] Embodiments of the disclosure described herein relate to a display apparatus, and more particularly, to a display apparatus including an image processor. BACKGROUND

[0003] Generally, a display apparatus includes a display panel for displaying an image and a driving circuit for driving the display panel. The display panel includes a plurality of scan lines, a plurality of data lines, and a plurality of pixels. The driving circuit includes a data driving circuit outputting a data driving signal to the data lines, a scan driving circuit outputting a scan signal for driving the scan lines, and a driving controller controlling the data driving circuit and the scan driving circuit.

[0004] The driving circuit of the display apparatus can display an image by outputting a scan signal to a scan line connected with a pixel and providing a data voltage corresponding to a display image to a data line connected with the pixel.

[0005] The driving circuit of the display apparatus can include an image processor converting input image data into a data voltage suitable for the display panel. SUMMARY

[0006] Embodiments of the disclosure provide an image processor and a display apparatus capable of improving display quality.

[0007] Embodiments of the disclosure provide a method of operating a display apparatus capable of improving display quality.

[0008] According to embodiments of the disclosure, an image processor of a display apparatus includes an image residue detector classifying a category of input image data and outputting inference data including image residue information based on the classified category, a memory storing previous inference data, a post-processor calculating final accumulated inference data based on the inference data and the previous inference data received from the memory and generating correction inference data based on the final accumulated inference data, and an image residue prevention part outputting image data that has undergone image residue prevention processing based on the correction inference data.

[0009] According to an embodiment, the image residue detector can classify the pixel image signal of the input image data as a first category when the pixel image signal of the input image data corresponds to a background, as a second category when the pixel image signal of the input image data corresponds to a clock, and as a third category when the pixel image signal of the input image data corresponds to broadcast information.

[0010] According to an embodiment, the post-processor can include a binary converter that converts the inference data received from the image residue detector into binary inference data, a data accumulator that calculates initial accumulated inference data and final accumulated inference data based on the binary inference data and previous inference data, and a corrector that outputs correction inference data based on the final accumulated inference data.

[0011] According to an embodiment, the binary converter can convert a category corresponding to a background in the inference data into a first value, and can convert a category corresponding to an image residue in the inference data into a second value.

[0012] According to an embodiment, when a difference between the binary inference data and the initial accumulated inference data is greater than a reference value, the data accumulator can discard the initial accumulated inference data and can set the binary inference data as the final accumulated inference data.

[0013] According to an embodiment, the data accumulator can store the final accumulated inference data in a memory as previous inference data.

[0014] According to an embodiment, when a difference between the binary inference data and the initial accumulated inference data is less than a reference value, the data accumulator can store the initial accumulated inference data in a memory as previous inference data.

[0015] According to an embodiment, the final accumulated inference data includes at least one value, when a value of the final accumulated inference data is less than a correction reference value, the corrector can correct the value of the final accumulated inference data to a category corresponding to a background, when the value of the final accumulated inference data is greater than or equal to the correction reference value, the corrector can correct the value of the final accumulated inference data to a category corresponding to an image residue, correction inference data is obtained after all of the at least one value of the final accumulated inference data is corrected, and the corrector outputs the correction inference data.

[0016] According to an embodiment, the data accumulator can calculate the initial accumulated inference data based on a sum of the binary inference data and previous inference data.

[0017] According to an embodiment, the initial accumulated inference data can be calculated by the following equation: AID = BID x R + PID x (1-R), where AID can be the initial accumulated inference data, BID can be the binary inference data, PID can be the previous inference data, and "R" can be a mixing rate of the binary inference data and the previous inference data.

[0018] According to an embodiment of the disclosure, a display apparatus includes a display panel including a plurality of pixels connected with a plurality of data lines and a plurality of scan lines, a data driving circuit driving the plurality of data lines, a scan driving circuit driving the plurality of scan lines, and a driving controller receiving a control signal and input image data, controlling the scan driving circuit and providing the image data to the data driving circuit so that an image is displayed on the display panel. The driving controller includes an image residue detector classifying a category of the input image data and outputting inference data including image residue information based on the classified category, a memory storing previous inference data, a post-processor calculating final accumulated inference data based on the inference data and the previous inference data received from the memory and generating correction inference data based on the final accumulated inference data, and an image residue prevention part outputting image data subjected to image residue prevention processing based on the correction inference data.

[0019] According to an embodiment, the image residue detector can classify a pixel image signal of the input image data as a first category when the pixel image signal of the input image data corresponds to a background, as a second category when the pixel image signal of the input image data corresponds to a clock, and as a third category when the pixel image signal of the input image data corresponds to broadcast information.

[0020] According to an embodiment, the post-processor can include a binary converter converting the inference data received from the image residue detector into binary inference data, a data accumulator calculating initial accumulated inference data and final accumulated inference data based on the binary inference data and the previous inference data, and a corrector outputting correction inference data based on the final accumulated inference data.

[0021] According to an embodiment, the binary converter can convert a category corresponding to a background in the inference data into a first value, and can convert a category corresponding to an image residue in the inference data into a second value.

[0022] According to an embodiment, when a difference between the binary inference data and the initial accumulated inference data is greater than a reference value, the data accumulator can discard the initial accumulated inference data and can set the binary inference data as the final accumulated inference data.

[0023] According to an embodiment, the data accumulator can store the final accumulated inference data as previous inference data in a memory.

[0024] According to an embodiment, the data accumulator can calculate the initial accumulated inference data based on a sum of the binary inference data and the previous inference data.

[0025] According to an embodiment of the disclosure, a driving method of a display apparatus includes classifying a category of input image data and outputting inference data including image residue information based on the classified category, calculating final accumulated inference data based on the inference data and previous inference data from a memory, generating correction inference data based on the final accumulated inference data, and outputting image data that has undergone image residue prevention processing to a data line of the display apparatus based on the correction inference data.

[0026] According to an embodiment, the calculating of the final accumulated inference data can include converting the inference data into binary inference data, calculating initial accumulated inference data and the final accumulated inference data based on the binary inference data and the previous inference data.

[0027] According to an embodiment, when a difference between the binary inference data and the initial accumulated inference data is greater than a reference value, the calculating of the accumulated inference data can include discarding the initial accumulated inference data and setting the binary inference data as the final accumulated inference data. BRIEF DESCRIPTION OF DRAWINGS

[0028] The above and other objects and features of the present disclosure will become apparent from a detailed description of embodiments thereof taken in conjunction with the accompanying drawings, in which:

[0029] Figure 1 FIG. 1 is a diagram illustrating a display apparatus according to an embodiment of the present disclosure.

[0030] Figure 2 FIG. 2 is a block diagram illustrating a driving controller according to an embodiment of the present disclosure.

[0031] Figure 3 FIG. 3 is a block diagram illustrating an image processor according to an embodiment of the present disclosure.

[0032] Figure 4 FIG. 4 is a diagram illustrating an image displayed on a display apparatus according to an embodiment of the present disclosure.

[0033] Figure 5 FIG. 5 is a block diagram illustrating a configuration of a post-processor according to an embodiment of the present disclosure.

[0034] Figure 6A is a diagram showing a broadcaster information image that can be generated from the inference data when the image residual prevention section shown in Figure 3 outputs the inference data.

[0035] Figure 6B is a diagram showing a broadcaster information image that can be generated from the inference data when the image residual prevention section shown in Figure 3 outputs the inference data.

[0036] Figure 7A is a diagram showing the inference data corresponding to the region of Figure 6A .

[0037] Figure 7B is a diagram showing the binary inference data corresponding to the region of Figure 6A .

[0038] Figure 7C is a diagram showing the previous inference data corresponding to the region of Figure 6A .

[0039] Figure 7D is a diagram showing the initial cumulative inference data corresponding to the region of Figure 6A .

[0040] Figure 7E is a diagram showing the correction inference data corresponding to the region of Figure 6A .

[0041] Figure 8A is a diagram showing a clock image IM21 included in the input image data input to the image residual detector.

[0042] Figure 8B is a diagram showing a clock image that can be generated from the inference data output from the image residual detector shown in Figure 3 .

[0043] Figure 8C is a diagram showing a clock image that can be generated from the correction inference data output from the post-processor shown in Figure 3 .

[0044] Figure 9A is a diagram showing a clock image included in the input image data input to the image residual detector.

[0045] Figure 9B is a diagram showing a clock image that can be generated from the inference data output from the image residual detector shown in Figure 3 .

[0046] Figure 9C is a diagram showing a clock image that can be generated fromFigure 3 a graph of a clock image generated by the correction inference data output by the post-processor shown in FIG. 12B.

[0047] Figure 10 is a flowchart illustrating an example of an operation method of a display device according to an embodiment of the disclosure. DETAILED DESCRIPTION

[0048] In the present specification, when an element (or a region, a layer, a part, etc.) is referred to as being "connected" or "coupled" to another element, it means that it can be directly connected or coupled to the other element or a third element can be interposed therebetween.

[0049] Like reference numerals refer to like elements throughout the specification. Also, in the drawings, the thickness, proportions, and dimensions of elements can be exaggerated for the sake of efficiency and clarity in the technical features. The professional terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, including "at least one," unless the content clearly indicates otherwise. "At least one" will not be construed to limit "a" or "an." "Or" means "and / or." The phrase "and / or" includes any and all combinations of one or more of the associated listed items. It will be understood that the phrase "comprises a" or "comprises an," when used in this specification, includes the presence of one or more of the stated features, regions, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and / or groups thereof.

[0050] Although the phrases "first," "second," and so on can be used herein to describe various elements, such elements should not be construed as being limited to these phrases. The phrases are only used to distinguish one element from another. For example, a first element can be called a second element, and similarly, a second element can be called a first element without departing from the scope of the disclosure. Unless the context clearly indicates otherwise, a singular expression includes a plural expression.

[0051] It will be understood that the phrases such as "comprise" or "have" indicate the presence of features, numbers, steps, operations, elements, components, or combinations thereof described in the specification, but do not exclude the presence or addition possibility of one or more other features, numbers, steps, operations, elements, components, combinations thereof.

[0052] Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. Also, terms such as terms commonly used in dictionaries should be interpreted as having a meaning consistent with the context in which they are used and should not be interpreted in an ideal or overly formal meaning unless explicitly defined in the present disclosure.

[0053] The expressions "part" and "unit" mean a software part or a hardware part that performs a specific function. The hardware part can include, for example, a field programmable logic gate array ("FPGA") or an application specific integrated circuit ("ASIC"). The software part can refer to executable code and / or data used by the executable code in an addressable storage medium. Accordingly, the software part can be, for example, an object-oriented software part, a class component, and a work component, and can include a process, a function, a property, a procedure, a subroutine, a program code segment, a driver, firmware, microcode, a circuit, data, a database, a data structure, a table, an array, or a variable.

[0054] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0055] Figure 1 A display device according to an embodiment of the present disclosure is illustrated.

[0056] Referring to Figure 1 , the display device DD includes a display panel 100, a driving controller 110, and a data driving circuit 120.

[0057] The display panel 100 includes a plurality of pixels PX, a plurality of data lines DL1 to DLm, and a plurality of scan lines SL1 to SLn. Here, m and n are natural numbers other than zero. Each of the plurality of pixels PX is connected to a corresponding one of the plurality of data lines DL1 to DLm, and is connected to a corresponding one of the plurality of scan lines SL1 to SLn.

[0058] The display panel 100 is a panel that displays an image, and can be a liquid crystal display ("LCD") panel, an electrophoretic display panel, an organic light emitting diode ("OLED") panel, a light emitting diode ("LED") panel, an inorganic electroluminescent ("EL") display panel, a field emission display ("FED") panel, a surface-conduction electron-emitter display ("SED") panel, a plasma display panel ("PDP"), or a cathode ray tube ("CRT") display panel. Hereinafter, as a display device according to an embodiment of the present disclosure, a liquid crystal display will be described as an example, and the display panel 100 will also be described as a liquid crystal display panel. However, the display device DD and the display panel 100 of the present disclosure are not limited thereto, and various types of display devices and display panels can be used.

[0059] The driving controller 110 receives input image data RGB and a control signal CTRL for controlling display of the input image data RGB from the outside. In an embodiment, the control signal CTRL can include at least one synchronization signal and at least one clock signal. The driving controller 110 provides image data DS to the data driving circuit 120. The image data DS is obtained by processing the input image data RGB to satisfy an operating condition of the display panel 100. The driving controller 110 provides a first control signal DCS to the data driving circuit 120 and a second control signal SCS to the scan driving circuit SDC based on the control signal CTRL. The first control signal DCS can include a horizontal synchronization start signal, a clock signal, and a line latch signal, and the second control signal SCS can include a vertical synchronization start signal and an output enable signal.

[0060] The data driving circuit 120 can output grayscale voltages for driving the plurality of data lines DL1 to DLm in response to the first control signal DCS and the image data DS received from the driving controller 110. In an embodiment, the data driving circuit 120 can be directly mounted on a predetermined area of the display panel 100 by being implemented as an integrated circuit ("IC"), or can be mounted on a separate printed circuit board in a chip on film ("COF") method and can be electrically connected to the display panel 100. In another embodiment, the data driving circuit 120 can be formed on the display panel 100 by using the same process as a driving circuit of the pixel PX.

[0061] The scan driving circuit 130 drives the plurality of scan lines SL1 to SLn in response to the second control signal SCS received from the driving controller 110. In an embodiment, the scan driving circuit 130 can be formed on the display panel 100 by using the same process as a driving circuit of the pixel PX, but the present disclosure is not limited thereto. In another embodiment, the scan driving circuit 130 can be directly mounted on a predetermined area of the display panel 100 by being implemented as an integrated circuit (IC), or can be mounted on a separate printed circuit board in a chip on film (COF) method and can be electrically connected to the display panel 100.

[0062] Figure 2 is a block diagram of a driving controller according to an embodiment of the present disclosure.

[0063] As Figure 2 The driving controller 110 includes an image processor 112 and a control signal generator 114 as shown in

[0064] The image processor 112 outputs image data DS suitable for the display panel 100 (refer to FIG. 1) in response to the image signal RGB and the control signal CTRL. The image data DS is obtained by processing the input image data RGB to satisfy an operating condition of the display panel 100. The image processor 112 can include a frame memory for temporarily storing the image data DS. Figure 1image data DS of the image signal RGB. In an embodiment, the image processor 112 can detect a specific image such as a logo of a broadcasting company or a clock included in the image signal RGB, and can output the image data DS to which an image residue (or afterimage) prevention technique is applied so that an image residue due to the specific image is not left on the display panel 100.

[0065] The control signal generator 114 outputs the first control signal DCS and the second control signal SCS in response to the image signal RGB and the control signal CTRL.

[0066] Figure 3 is a block diagram of an image processor according to an embodiment of the disclosure.

[0067] Referring to Figure 3 , the image processor 112 includes an image residue detector 210, a post-processor 220, and an image residue prevention part 230.

[0068] The image residue detector 210 receives the input image data RGB and detects an object that can cause an image residue, i.e., an image residue. The image residue detector 210 outputs information about the image residue as inference data ID. The image residue detector 210 can be implemented by applying a semantic segmentation technique using a deep neural network ("DNN").

[0069] The image residue detector 210 can include a feature quantity extractor 212, a region divider 214, and a memory 216.

[0070] The memory 216 can store a pre-learned parameter.

[0071] The input image data RGB can be an image signal of one frame that can be displayed on the entire display panel 100 (refer to Figure 1 ). The input image data RGB as an image signal of one frame can include a pixel image signal corresponding to each of the pixels PX (refer to Figure 1 ).

[0072] The image residue detector 210 classifies a class (or a classification number) of the pixel image signal corresponding to each of the pixels PX (refer to Figure 1 ) and outputs the inference data ID indicating the class of the pixel image signal.

[0073] Figure 4 An image displayed on a display device is shown as an example.

[0074] Referring to Figure 4, the image IMG is an example of an image displayed on a display device such as a television, a digital signage, and a kiosk. The image IMG can include a first character region CH1 displaying a clock and a second character region CH2 displaying broadcaster information such as a broadcaster logo, broadcaster channel information, and a program name. In Figure 4 , the first character region CH1 is positioned at the upper left of the image IMG, and the second character region CH2 is positioned at the upper right of the image IMG, but the present disclosure is not limited thereto. Also, the number of character regions displayed on the image IMG can be one or more.

[0075] Objects such as a clock, a broadcaster logo, broadcaster channel information, and a program name can be fixed to a specific position of a display device and can be displayed for a long time. For example, the hours on a clock displaying hours and minutes do not change for one hour. Also, a user can continuously watch a specific channel of a specific broadcaster for tens of minutes to hours. In this case, the broadcaster logo, the broadcaster channel information, the program name, etc. do not change for tens of minutes to hours.

[0076] When a pixel PX (refer to Figure 1 ) continuously displays the same image for a long time, the characteristics of the pixel can deteriorate, and such an image can remain as an image residue. For example, when a user continuously watches a specific channel of a specific broadcaster for hours and then changes to another channel, the logo of the previous channel remains as an image residue, and can be recognized in the form of overlapping with the logo of the new channel.

[0077] In an embodiment of the present disclosure, the display device DD can minimize the image residue of an image by precisely detecting an image residue-causing object (i.e., an image residue) displayed on the first character region CH1 and the second character region CH2 and by performing compensation accordingly.

[0078] Referring back to Figure 3 , the feature quantity extractor 212 and the region divider 214 can classify the pixel image signal into a corresponding one of a plurality of categories by using parameters stored in the memory 216. In an embodiment, the feature quantity extractor 212 and the region divider 214 can classify the pixel image signal into a first category "0" when the pixel image signal is inferred as a background, can classify the pixel image signal into a second category "1" when the pixel image signal is inferred as a clock, and can classify the pixel image signal into a third category "2" when the pixel image signal is inferred as broadcaster information.

[0079] In an embodiment, in the pixel image signal corresponding to the first character region CH1 shown in Figure 4 , the background can be classified into the first category "0", and the clock can be classified into the second category "1".

[0080] In an embodiment, in the pixel image signal corresponding to the second character region CH2 shown in Figure 4 In the pixel image signal corresponding to the second character region CH2 shown in

[0081] The image residue detector 210 outputs inference data ID including the classified category information.

[0082] The post-processor 220 outputs correction inference data CID based on the inference data ID received from the image residue detector 210 and the previous inference data PID stored in the memory 225.

[0083] The memory 225 can store the final accumulated inference data AID (to be described later) as the previous inference data PID. Although the memory 216 and the memory 225 are separately shown in Figure 3 In another embodiment, the memory 216 and the memory 225 can be implemented as a single memory.

[0084] The image residue prevention part 230 can receive the correction inference data CID and can output image data DS which has undergone the image residue prevention processing. That is, the image residue prevention part 230 can output the image data DS which is processed to prevent the image residue. In the image residue prevention processing operation of the image residue prevention part 230, a method such as periodically changing the display position of the image residue included in the correction inference data CID or periodically changing the gray scale of the image residue can be used.

[0085] Figure 5 is a block diagram showing a configuration of the post-processor.

[0086] Figure 6A is a diagram showing when Figure 3 is a diagram showing a broadcaster information image which can be generated by the inference data ID when the image residue prevention part 230 shown in

[0087] Figure 6B is a diagram showing when Figure 3 is a diagram showing a broadcaster information image which can be generated by the correction inference data CID when the image residue prevention part 230 shown in

[0088] Figure 7A shows the inference data ID corresponding to the region A1 of Figure 6A

[0089] Figure 7B shows the binary inference data BID corresponding to the region A1 of Figure 6A ​​

[0090] Figure 7C The previous inference data PID corresponding to the region A1 of Figure 6A is shown.

[0091] Figure 7D The initial accumulated inference data AID_i corresponding to the region A1 of Figure 6A is shown.

[0092] Figure 7E is a graph showing the corrected inference data CID corresponding to the region A1 of Figure 6A Referring to

[0093] , the post-processor 220 includes a binary converter 310, a data accumulator 320, and a corrector 330. Figure 5

[0094] The binary converter 310 receives the inference data ID from the image residue detector 210 shown in Figure 3 . As shown in Figure 7A , for example, the inference data ID can indicate a background as a first class "0" and broadcaster information as a third class "2". In the example shown in Figure 7A , each of the numbers represents a class of a pixel image signal of a current frame.

[0095] Referring to Figure 5 and Figure 7B , the binary converter 310 converts the first class "0" corresponding to the background of the inference data ID to a binary number "0" and the third class "2" corresponding to the broadcaster information to a binary number "1". The binary converter 310 can output binary inference data BID.

[0096] Referring to Figure 5 and Figure 7C , the data accumulator 320 reads the previous inference data PID from the memory 225. The previous inference data PID can be inference data accumulated until a previous frame.

[0097] Referring to Figure 5 and Figure 7D , the data accumulator 320 generates the initial accumulated inference data AID_i based on the binary inference data BID received from the binary converter 310 and the previous inference data PID received from the memory 225.

[0098] In an embodiment, the initial accumulated inference data AID_i can be calculated by Equation 1 below.

[0099] [Equation 1]

[0100] AID_i = BID × R + PID × (1 - R) ​

[0101] In Equation 1, "R" is a mixing rate of the binary inference data BID and the previous inference data PID. It can be 0 < R ≤ 1.

[0102] When "R" is greater than 0.5, the reflection rate of the binary inference data BID of the current frame is greater than the reflection rate of the previous inference data PID accumulated until the previous frame in the initial accumulated inference data AID_i.

[0103] When "R" is less than 0.5, the reflection rate of the previous inference data PID accumulated until the previous frame is greater than the reflection rate of the binary inference data BID of the current frame in the initial accumulated inference data AID_i. Here, the reflection rate can indicate how much the corresponding data contributes to the initial accumulated inference data AID_i.

[0104] When the difference between the binary inference data BID and the initial accumulated inference data AID_i is less than or equal to a reference value, the data accumulator 320 can output the initial accumulated inference data AID_i as the final accumulated inference data AID to the corrector 330.

[0105] When the difference between the binary inference data BID and the initial accumulated inference data AID_i is greater than the reference value, the data accumulator 320 can discard the newly calculated initial accumulated inference data AID_i, and set the binary inference data BID as the final accumulated inference data AID.

[0106] In an embodiment, when a user continuously watches a specific channel for tens of minutes to several hours and then switches to another channel, the channel information is changed. In this case, it is appropriate to set the binary inference data BID corresponding to the changed channel information as the new final accumulated inference data AID.

[0107] In Figure 7B and Figure 7D In the example shown in FIGS. 1 to 3, it is assumed that the difference between the binary inference data BID and the initial accumulated inference data AID_i is less than the reference value.

[0108] The data accumulator 320 stores the calculated final accumulated inference data AID as the previous inference data PID in the memory 225. The corrector 330 can receive the final accumulated inference data AID from the data accumulator 320 and can output the corrected inference data CID.

[0109] Figure 7DThe initial accumulated inference data AID_i shown in the middle can mean a probability that the pixel image signal is broadcaster information. Specifically, as the value of the initial accumulated inference data AID_i is closer to "1", the probability that the pixel image signal is broadcaster information is greater. Conversely, as the value of the initial accumulated inference data AID_i is closer to "0", the probability that the pixel image signal is background is greater.

[0110] The corrector 330 can convert the final accumulated inference data AID into the corrected inference data CID based on a preset criterion. In an embodiment, when the value of the final accumulated inference data AID is less than a correction reference value (for example, 0.5), the corrector 330 converts the value of the final accumulated inference data AID into a first category "0" corresponding to background, and when the value of the final accumulated inference data AID is greater than or equal to the correction reference value (for example, 0.5), converts the value of the final accumulated inference data AID into a third category "2" corresponding to broadcaster information. The corrector 330 outputs the corrected inference data CID including the converted category information.

[0111] Referring back to Figure 3 , the image residue prevention part 230 can receive the corrected inference data CID and can output the image data DS which has undergone the image residue prevention process. That is, the image residue prevention part 230 can output the image data DS which has been processed to prevent image residue.

[0112] As shown in Figure 3 , Figure 6A and Figure 7A , the image residue detector 210 can detect the image residue causing image residue, but can include a noise component.

[0113] As shown in Figure 3 , Figure 6B and Figure 7E , the post-processor 220 can not only use the inference data ID of the current frame, but also use the previous inference data PID accumulated until the previous frame to calculate the final accumulated inference data AID. In addition, the post-processor 220 can generate the corrected inference data CID by correcting the final accumulated inference data AID.

[0114] In this way, since the image processor 112 can accurately detect the image residue (for example, the clock and the broadcaster information causing image residue) included in the input image data RGB, the image residue prevention performance of the image residue prevention part 230 can be improved.

[0115] Figure 8A A clock image IM21 included in the input image data RGB input to the image residue detector 210 is shown as an example.

[0116] Figure 8B is a graph showing a clock image IM22 generated from inference data ID output from the image residue detector 210. Figure 3

[0117] Figure 8C is a graph showing a clock image IM23 generated from corrected inference data CID output from the post-processor 220. Figure 3

[0118] Referring to Figures 8A to 8C , it will be appreciated that the clock image IM23 generated from the corrected inference data CID output from the post-processor 220 is more similar to the clock image IM21 included in the input image data RGB than the clock image IM22 generated from the inference data ID output from the image residue detector 210.

[0119] Figure 9A A clock image IM31 included in input image data RGB input to the image residue detector 210 is shown.

[0120] Figure 9B is a graph showing a clock image IM32 generated from inference data ID output from the image residue detector 210. Figure 3

[0121] Figure 9C is a graph showing a clock image IM33 generated from corrected inference data CID output from the post-processor 220. Figure 3

[0122] Referring to Figures 9A to 9C , it will be appreciated that the clock image IM33 generated from the corrected inference data CID output from the post-processor 220 is more similar to the clock image IM31 included in the input image data RGB than the clock image IM32 generated from the inference data ID output from the image residue detector 210.

[0123] Figure 10 is a flowchart showing an example of an operation method of a display device according to an embodiment of the disclosure.

[0124] For the convenience of description, the operation method of the display device will be described with reference to the image processor shown in Figure 3 and Figure 5 , but the disclosure is not limited thereto.

[0125] Referring to Figure 3 , Figure 5 and Figure 10 ​​​​The image residue detector 210 classifies the category of the input image data RGB and outputs inference data ID (operation S100).

[0126] The post-processor 220 receives the inference data ID from the image residue detector 210. The binary converter 310 in the post-processor 220 converts the inference data ID into binary inference data BID (operation S110).

[0127] As shown in Figure 7A , for example, the inference data ID provided from the image residue detector 210 can represent a background as a first category "0" and can represent broadcaster information as a third category "2". In Figure 7A , each of the numbers represents a category of a pixel image signal of a current frame.

[0128] In an embodiment, as shown in Figure 7B , the binary converter 310 converts the first category "0" corresponding to the background of the inference data ID into a first value (e.g., binary number "0") and converts the third category "2" corresponding to the broadcaster information (or image residue) into a second value (e.g., binary number "1"). The binary converter 310 can output the binary inference data BID.

[0129] The data accumulator 320 generates initial accumulated inference data AID_i based on the binary inference data BID received from the binary converter 310 and the previous inference data PID received from the memory 225 (operation S120).

[0130] As Equation 1 described above, a mixing rate of the binary inference data BID and the previous inference data PID can be differently changed.

[0131] The data accumulator 320 compares a difference between the binary inference data BID and the initial accumulated inference data AID_i with a reference value (operation S130).

[0132] When the difference between the binary inference data BID and the initial accumulated inference data AID_i is greater than the reference value, the data accumulator 320 can discard the initial accumulated inference data AID_i calculated in operation S120 and can set the binary inference data BID as new final accumulated inference data AID (operation S140). When the difference between the binary inference data BID and the initial accumulated inference data AID_i is equal to or less than the reference value, the data accumulator 320 can set the initial accumulated inference data AID_i as the new final accumulated inference data AID.

[0133] The data accumulator 320 stores the final accumulated inference data AID as the previous inference data PID in the memory 225 (operation S150).

[0134] Hereinafter, the final accumulated inference data AID is referred to as accumulated inference data AID. In addition, the data accumulator 320 can output the accumulated inference data AID to the corrector 330.

[0135] The corrector 330 can convert the accumulated inference data AID into correction inference data CID based on a preset criterion (operation S160). In an embodiment, for example, when a value of the accumulated inference data AID is less than a correction reference value (for example, 0.5), the corrector 330 converts the value of the accumulated inference data AID into a first category "0" corresponding to a background, and when the value of the accumulated inference data AID is greater than or equal to the correction reference value (for example, 0.5), converts the value of the accumulated inference data AID into a third category "2" corresponding to broadcaster information. The corrector 330 outputs the correction inference data CID including the converted category information.

[0136] The image residual prevention part 230 performs image residual prevention processing based on the correction inference data CID (operation S170), and outputs the image data DS subjected to the image residual prevention processing to the data lines DL1 to DLm (refer to FIG. 1). Figure 1 )。

[0137] According to an embodiment of the disclosure, the image processor having such a configuration can obtain inference data about an image displayed for a long time, such as a broadcaster logo or a clock, using a deep neural network. Since the image processor performs post-processing with respect to the inference data, the detection performance of the image displayed for a long time, such as a broadcaster logo or a clock, can be improved. Accordingly, the image residual problem of the display device can be minimized.

[0138] Although the disclosure has been described with reference to the embodiments of the disclosure, it will be apparent to those having ordinary skill in the art that various changes and modifications can be made thereto without departing from the spirit and scope of the disclosure as set forth in the appended claims.

Claims

1. An image processor comprising: an image residue detector that classifies a category of input image data of a current frame and outputs inference data including image residue information based on the classified category; a memory that stores previous inference data accumulated up to a previous frame; a post-processor that calculates final accumulated inference data based on the inference data of the current frame and the previous inference data accumulated up to the previous frame and received from the memory, and generates correction inference data based on the final accumulated inference data; and an image residue prevention section that outputs image data subjected to image residue prevention processing based on the correction inference data, wherein the memory stores the final accumulated inference data as the previous inference data of a next frame. The image residue detector classifies a pixel image signal of the input image data as a first category when the pixel image signal of the input image data corresponds to a background, as a second category when the pixel image signal of the input image data corresponds to a clock, and as a third category when the pixel image signal of the input image data corresponds to broadcast information.

2. The image processor of claim 1, wherein, The post-processor includes:

3. The image processor of claim 1, wherein, a binary converter that converts the inference data received from the image residue detector into binary inference data; a data accumulator that calculates initial accumulated inference data and the final accumulated inference data based on the binary inference data and the previous inference data; and a corrector that outputs the correction inference data based on the final accumulated inference data. The binary converter converts a category corresponding to a background in the inference data into a first value, and converts a category corresponding to an image residue in the inference data into a second value.

4. The image processor of claim 3, wherein, When a difference between the binary inference data and the initial accumulated inference data is greater than a reference value, the data accumulator discards the initial accumulated inference data and sets the binary inference data as the final accumulated inference data.

5. The image processor of claim 3, wherein, The data accumulator stores the final accumulated inference data in the memory as the previous inference data.

6. The image processor of claim 5, wherein, When a difference between the binary inference data and the initial accumulated inference data is less than a reference value, the data accumulator stores the initial accumulated inference data in the memory as the previous inference data.

7. The image processor of claim 3, wherein, The final accumulated inference data includes at least one value, 8. The image processor of claim 3, wherein, wherein, when the value of the final accumulated inference data is less than a correction reference value, the corrector corrects the value of the final accumulated inference data to a category corresponding to a background, wherein, when the value of the final accumulated inference data is greater than or equal to the correction reference value, the corrector corrects the value of the final accumulated inference data to a category corresponding to an image residue, and ​ wherein the correction inference data is obtained after all of the at least one value of the final accumulated inference data is corrected, and the corrector outputs the correction inference data.

9. The image processor of claim 3, wherein, The data accumulator calculates the initial accumulated inference data based on a sum of the binary inference data and the previous inference data.

10. A display device comprising: a display panel including a plurality of pixels connected to a plurality of data lines and a plurality of scan lines; a data drive circuit that drives the plurality of data lines; a scan drive circuit that drives the plurality of scan lines; and a drive controller that receives a control signal and input image data of a current frame, controls the scan drive circuit, and supplies image data to the data drive circuit so that an image is displayed on the display panel, wherein the drive controller includes: an image residue detector that classifies a category of the input image data and outputs inference data including image residue information based on the classified category; a memory that stores previous inference data accumulated up to a previous frame; a post-processor that calculates final accumulated inference data based on the inference data of the current frame and the previous inference data accumulated up to the previous frame and received from the memory, and generates correction inference data based on the final accumulated inference data; and an image residue prevention section that outputs the image data subjected to image residue prevention processing based on the correction inference data, wherein the memory stores the final accumulated inference data as the previous inference data of a next frame. ​

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