Address text recall method and device

Abstract

The address text recall method and device provided in the embodiment of the present application perform style transfer training on an existing first address vector representation model using address text having a second style, so as to obtain a second address vector representation model that can be used to process addresses having a second style. On the other hand, the text recall processing of the present embodiment is implemented based on an orthogonal space. In this way, it can be ensured that the second style address vector library output by the second address vector representation model and the vector of the address text to be processed are in the same orthogonal space, thereby avoiding spatial offset of the vector and improving the recall effect of the scheme.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computer technology, and more particularly to a method and device for recalling an address text. Background Art

[0002] With the rapid development of the big data era, text recall processing of addresses is widely used in various products.

[0003] In the prior art, the text recall processing of the address is implemented based on the address vector representation model. By using the address vector representation model, the address text input by the user can be vectorized to obtain the corresponding address recall text.

[0004] However, due to the limitations of the text style of the address text used in the training of the address vector representation model, when the address vector representation model is applied to the text recall processing of addresses with a specific style, it is easy for the generated address recall text to not correspond to the style of the address with the specific style, resulting in poor recall effect and other problems. Summary of the invention

[0005] The embodiments of the present application provide a method and device for recalling address text. By performing style transfer training on an existing address vector representation model and using the stylized address vector representation model to perform text recall processing based on orthogonal space, the accuracy of the model's vector representation of address text is effectively improved, thereby improving the recall effect of the address text.

[0006] In a first aspect, an embodiment of the present application provides a method for recalling an address text, comprising:

[0007] Obtaining a first address vector representation model, where the first address vector representation model is obtained by training with address texts in a first style address library;

[0008] Using each address text in the second style address library, perform self-supervised style transfer training on the first address vector representation model to obtain a second address vector representation model;

[0009] Performing vector conversion processing on each address text in the second style address library using the second address vector representation model to obtain a second style address vector library, wherein the second style address vector library includes address vectors corresponding to each address text in the second style address library;

[0010] The second address vector representation model and the second style address vector library are used to perform text recall processing based on orthogonal space on the address text to be processed with the second style to obtain the recalled text.

[0011] It can be seen that, on the one hand, this embodiment uses the address text with the second style to perform style transfer training on the existing first address vector representation model, so as to obtain a second address vector representation model that can be used to process the address with the second style; on the other hand, the text summoning processing of this embodiment is implemented based on the orthogonal space. In this way, it can be ensured that the second style address vector library output by the second address vector representation model and the vector of the address text to be processed are in the same orthogonal space, avoiding the spatial offset of the vector and improving the recall effect of the scheme.

[0012] Optionally, the first address vector representation model is trained based on self-supervision style transfer using the address text in the second style address library to obtain the second address vector representation model, including: using the first address vector representation model to perform vector processing on each address text in the second style address library to obtain an address vector pair corresponding to each address text in the second style address library; based on a contrastive learning loss function, the first address vector representation model is trained based on self-contrastive learning using the address vector pairs corresponding to each address text in the second style address library to obtain the second address vector representation model.

[0013] It can be seen that this embodiment performs self-contrastive learning training on the first address vector representation model by utilizing the contrastive learning loss function and the address vector pairs corresponding to each address text in the second style address library, thereby migrating the address vector representation model from the first style to the second style, and the migrated second address vector representation model is capable of processing address texts having the second style.

[0014] Optionally, based on the contrastive learning loss function, the address vector pairs corresponding to each address text in the second style address library are used to perform self-contrastive learning training on the first address vector representation model to obtain a second address vector representation model, including: taking any address text in the second style address library as the target address text; taking the address vector pairs corresponding to the target address text as positive samples in the self-contrastive learning training, and taking the address vector pairs of address texts other than the target address text in the second style address library as negative samples in the self-contrastive learning training; calculating the loss of the contrastive learning loss function based on the positive samples and the negative samples, and performing backpropagation processing on the first address vector representation model based on the loss to obtain an intermediate model; taking the next address text in the second style address library as the new target address text, and performing self-contrastive learning training on the intermediate model based on the contrastive learning loss function, until the loss of the contrastive learning loss function of the intermediate model meets the preset conditions, and the current intermediate model is the second address vector representation model.

[0015] It can be seen that this embodiment provides a specific implementation method for training the second address vector representation model. By utilizing the above-mentioned cyclic training method based on positive samples and negative samples, it can effectively improve the diversity of samples, ensure the quality of the trained model, and avoid the loss of model effect due to the style difference between the second style and the first style.

[0016] Optionally, a second address vector representation model and a second style address vector library are used to perform orthogonal space-based text recall processing on the address text to be processed with the second style to obtain the recalled text, including: performing orthogonal mapping processing on each address vector in the second style address vector library to obtain a second style address orthogonal vector space corresponding to the second style address vector library; performing vector processing on the address text to be processed with the second style using the second address vector representation model to obtain an address vector to be processed corresponding to the address text to be processed; performing orthogonal mapping processing on the address vector to be processed to obtain an orthogonal vector to be processed; and determining the processing result of the text recall processing based on the second style address orthogonal vector space and the address orthogonal vector to be processed.

[0017] It can be seen that by first performing orthogonal mapping processing on each address vector in the second style address vector library to obtain the second style address orthogonal vector space, and then performing orthogonal mapping processing on the address vector to be processed to obtain the address orthogonal vector to be processed, text recall processing including vector similarity calculation is performed in the orthogonal space. The vector of the recalled text obtained in this way is highly similar to the second style address orthogonal vector, and its recall effect is better, which is conducive to improving the recall rate.

[0018] Optionally, the orthogonal mapping process includes: determining a conversion matrix of the orthogonal mapping according to the first address vector representation model and the address text in the first style address library; and performing the orthogonal mapping process using the conversion matrix.

[0019] Optionally, a transformation matrix of the orthogonal mapping is determined based on the first address vector representation model and the address text in the first style address library, including: using the first address vector representation model to perform vector conversion processing on the address text in the first style address library to obtain the first style address vector library; wherein the first style address vector library includes address vectors corresponding to each address text in the first style address library; determining the mean and covariance matrix of each address vector in the first style address vector library; performing orthogonal decomposition based on singular value decomposition on the covariance matrix to obtain a decomposition result of the orthogonal decomposition; and determining the transformation matrix of the orthogonal mapping based on the mean and the decomposition result of the orthogonal decomposition.

[0020] It can be seen that the present embodiment provides a specific method for implementing orthogonal mapping processing, wherein, since the first address vector representation model is in a highly orthogonal state, the first address vector representation model and the first address library can be used to create a transformation matrix mapped to the orthogonal space, so that the transformation matrix can be used to perform orthogonal mapping processing on each vector including the address vectors in the second address vector library and the address vector to be processed, thereby improving the subsequent recall rate based on the vector.

[0021] In a second aspect, an embodiment of the present application provides a device for recalling an address text, including:

[0022] A training module is used to obtain a first address vector representation model, where the first address vector representation model is obtained by training with address texts in a first style address library; using each address text in a second style address library, the first address vector representation model is trained based on self-supervision style transfer to obtain a second address vector representation model;

[0023] a processing module, configured to perform vector conversion processing on each address text in the second style address library by using the second address vector representation model to obtain a second style address vector library, wherein the second style address vector library includes address vectors corresponding to each address text in the second style address library;

[0024] The recall text module is used to perform text recall processing based on orthogonal space on the address text to be processed with the second style by using the second address vector representation model and the second style address vector library to obtain the recall text.

[0025] In a third aspect, an embodiment of the present application provides an electronic device, including: a memory, a processor;

[0026] at least one processor; and

[0027] Memory;

[0028] Memory stores computer-executable instructions;

[0029] At least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor performs the method according to the first aspect.

[0030] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When a processor executes the computer-executable instructions, the method of the first aspect is implemented.

[0031] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which implements the method of the first aspect when executed by a processor.

[0032] An embodiment of the present application provides a method and device for recalling an address text, wherein the present application performs style transfer training on an existing first address vector representation model using address text having a second style, so as to obtain a second address vector representation model that can be used to process addresses having a second style; on the other hand, the text recall processing of the present application is implemented based on an orthogonal space, so that it can be ensured that the second style address vector library output by the second address vector representation model and the vector of the address text to be processed are in the same orthogonal space, thereby avoiding spatial offset of the vector and improving the recall effect of the scheme. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0034] Figure 1 A flowchart of address text recall is shown;

[0035] Figure 2 A schematic diagram of a network architecture on which this application is based;

[0036] Figure 3 A flowchart of a method for recalling an address text provided in an embodiment of the present application;

[0037] Figure 4 A schematic diagram of the structure of an address vector representation model provided in an embodiment of the present application;

[0038] Figure 5 A schematic diagram of training a second address vector representation model provided in an embodiment of the present application;

[0039] Figure 6 A data flow diagram of a recall process of an address text provided in this application;

[0040] Figure 7 A schematic diagram of a practical scenario of address text recall processing provided by this application;

[0041] Figure 8 A structural block diagram of an address text recall device provided in an embodiment of the present application;

[0042] Fig. 9 A schematic diagram of the hardware structure of an electronic device provided in this application.

[0043] The above drawings show clear embodiments of the present disclosure, which will be described in more detail below. These drawings and text descriptions are not intended to limit the scope of the present disclosure in any way, but to illustrate the concepts of the present disclosure to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0044] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0045] In the technical solution of this application, the collection, storage, use, processing, transmission, provision and disclosure of user information involved are in compliance with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0046] With the rapid development of the big data era, text recall processing of addresses is widely used in various products.

[0047] In the prior art, the text recall processing of the address is implemented based on the address vector representation model. By using the address vector representation model, the address text input by the user can be vectorized to obtain the corresponding address recall text.

[0048] Figure 1 A flowchart of address text recall is shown in FIG. Figure 1 As shown, the server can use an address library including a large number of address texts to create and train an address vector representation model. When a user inputs an address text to be processed, the server can call the trained address vector representation model to operate on the address text. The server will query the address library according to the address vector obtained by the operation to obtain address text related to the address text and output it.

[0049] However, the existing address vector representation model is obtained by training based on a fixed address library and click data of clicking on the fixed address library. Generally speaking, the text style of each address text in the fixed address library is unified.

[0050] This will result in a significant loss in the effect of vector recall when the existing address vector representation model is used in scenarios with address libraries of other styles (such as custom address libraries) due to the difference in text style between the custom address library and the fixed address library.

[0051] Faced with the above problems, relative to Figure 1In the scheme shown, the present application performs style transfer training on the existing first address vector representation model by utilizing an address text library (custom address library) with a second style, so as to obtain a second address vector representation model that can be used to process addresses with a second style; on the other hand, the text summoning processing of the present application is implemented based on an orthogonal space. In this way, it can be ensured that the second style address vector library output by the second address vector representation model and the vector of the address text to be processed are in the same orthogonal space, thereby avoiding spatial offset of the vector and improving the recall effect of the scheme.

[0052] refer to Figure 2 , Figure 2 is a schematic diagram of a network architecture on which this application is based. Figure 2 The network architecture shown may specifically include a server and a terminal.

[0053] Among them, the server can specifically be a server cluster set up in the cloud, which will store relevant model data such as the first style address library, the second style address library, the first address vector representation model, the second address vector representation model, etc. Through the preset operation logic in server 1, server 1 can realize model training, vector recall and other operation functions.

[0054] The terminal may specifically be a hardware device with network communication function, computing function and information display function, including but not limited to smart phones, tablet computers, desktop computers, Internet of Things devices, etc.

[0055] Through communication interaction with the server, the terminal can upload the second style address library with a custom style to the server, so that the server can use the first style address library to train the first address vector representation model; then use the second style address library to perform self-supervisory training on the first address vector representation model to obtain the second address vector representation model. After the server obtains the address text to be processed uploaded by the terminal, it will use the second address vector representation model to perform vector recall processing based on the orthogonal space to obtain the recalled address.

[0056] The following describes in detail the method and device for recalling address text provided by the present application through specific embodiments. The following embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0057] It should be noted that the execution subject of the address text recall method provided in this embodiment is the aforementioned server. Figure 3 A flowchart of a method for recalling an address text provided in an embodiment of the present application is shown below. Figure 3 As shown, the method for recalling the address text may include the following steps:

[0058] Step 301: Obtain a first address vector representation model, where the first address vector representation model is obtained by training with address texts in a first style address library.

[0059] Specifically, the first address vector representation model refers to a model that can vectorize address text, and the first address vector representation model is obtained by training with address text having a first style. In the implementation mode of the present application, the first address vector representation model can be obtained by training with the first style address library by the server, or by training with the first style address library by other servers.

[0060] In order to achieve vector recall, the address vector representation model needs to vectorize the address text entered by the user and the address text in the address library. The address vector representation model needs to learn the semantics related to the address and make the vectorized similarity score of similar addresses close to 1, and make the vectorized similarity score of dissimilar addresses close to 0, that is, the similarity between the two address vectors obtained after vectorizing two similar addresses is close to 1, and the similarity between the two address vectors obtained after vectorizing two dissimilar addresses is close to 0.

[0061] On this basis, Figure 4 A schematic diagram of the structure of an address vector representation model provided in an embodiment of the present application, such as Figure 4 As shown, the address vectorization representation model in this application is mainly composed of a Transformer encoder, a Pooling layer, and a vector mapping layer. After the address text is input into the address vectorization representation model, it will pass through the Transformer encoder, the Pooling layer, and the vector mapping layer in sequence to output the corresponding vector representation, i.e., the address vector.

[0062] For the first address vectorization representation model mentioned above, it adopts the following Figure 4 The structure shown is trained using the first style address library mentioned above.

[0063] Step 302: Use each address text in the second style address library to perform self-supervised style transfer training on the first address vector representation model to obtain a second address vector representation model.

[0064] Specifically, the first address vectorization representation model obtained by the above steps has a good recall rate when recognizing address texts such as the first style, but the recall effect on address texts in the user-defined second style address library is poor. To address this problem, in this application, the first address vector representation model is trained in a self-supervised style transfer based on the second style address library to obtain a second address vector representation model that can recognize address texts with the second style.

[0065] It can be known that the address text in the second style address library is deployed by the terminal on the server, and the address text in the second style address library should have a different text style from the address text in the first style address library.

[0066] In an optional embodiment, the self-supervised style transfer training mentioned above may include: using the first address vector representation model to perform vector processing on each address text in the second style address library to obtain an address vector pair corresponding to each address text in the second style address library; based on the contrastive learning loss function, using the address vector pair corresponding to each address text in the second style address library, performing self-contrastive learning training on the first address vector representation model to obtain a second address vector representation model.

[0067] By utilizing the contrastive learning loss function and the address vector pairs corresponding to each address text in the second style address library, the first address vector representation model is trained through self-contrastive learning, thereby migrating the address vector representation model from the first style to the second style, and the migrated second address vector representation model is capable of processing address texts having the second style.

[0068] Figure 5 The schematic diagram of training the second address vector representation model provided in the embodiment of the present application is as follows. Figure 5 , an example is given to illustrate the training method used in this application:

[0069] As mentioned above, the learning purpose of the address vector representation model is to make the vectorized similarity scores of similar addresses close to 1, and to make the vectorized similarity scores of dissimilar addresses close to 0. Based on this purpose, multiple rounds of training can be performed for each address text to ensure the model training effect, and the self-supervision method of positive and negative samples can be used during training to achieve this.

[0070] like Figure 5 As shown, the second style address library includes a plurality of address texts having a second style. Exemplarily, the second style address library includes: address text w1, address text w2, and address text w3.

[0071] During training, each address text in the second style address library is passed through the first address vector representation model twice to obtain two address vectors corresponding to each address text. For example, address text w1 is passed through the first address vector representation model to obtain address vectors Uw1 and Vw1, address text w2 is passed through the first address vector representation model to obtain address vectors Uw2 and Vw2, and address text w3 is passed through the first address vector representation model to obtain address vectors Uw3 and Vw3. The address vectors corresponding to the same address text constitute an address vector pair, such as the address vector pair of address text w1 is (Uw1, Vw1).

[0072] Among them, the address text w1 is used as the target address text used in this round of training, then the address vector pair (Uw1, Vw1) of the address text w1 will be used as the positive sample used in this training, and the address vector pairs (Uw2, Vw2) and (Uw3, Vw3) of other address texts will be used as negative samples used in this round of training.

[0073] After obtaining the positive and negative samples of this round of training, the server will calculate the contrastive learning loss function. In this application, the contrastive learning loss function can be expressed as:

[0074] loss(u,v)=cosine-sim(u,v) / sum_{v'! =v}(cosine-sim(u,v'))

[0075] Among them, (u, v) is used to represent the address vector obtained by performing vector representation twice on the target address text; v' is used to represent the address vector obtained by performing vector representation on other address texts other than the target address text.

[0076] Based on the contrastive learning loss function, we can get Figure 5 The calculation formula of the contrastive learning loss function in this round in the example is:

[0077] loss(Uw1,Vw1)

[0078] =cosine-sim(Uw1,Vw1) / sum((cosine-sim(Uw1,Uw2))

[0079] +(cosine-sim(Uw1,Vw2))+(cosine-sim(Uw1,Uw3))

[0080] +(cosine-sim(Uw1,Vw3))

[0081] Determine whether the loss value meets the preset condition, that is, the loss value is close to 1.

[0082] If this condition is not met, the first address vector representation model will be back-propagated according to the loss value to obtain an intermediate model after parameter adjustment.

[0083] Subsequently, an address text is selected again from the current address text as the target address text, and the intermediate model is subjected to a new round of training and loss value determination using the positive and negative samples of the target address text.

[0084] The above process is repeated until the model convergence loss value meets the preset conditions. At this time, the training of the first address vector representation model is completed, and the obtained intermediate model will be stored in the server as the second address vector representation model for recall processing.

[0085] That is to say, during training, any address text in the second style address library is used as the target address text, and then the address vector pair corresponding to the target address text is used as the positive sample in the self-contrastive learning training, and the address vector pair of the address text other than the target address text in the second style address library is used as the negative sample in the self-contrastive learning training. Subsequently, the server calculates the loss of the contrastive learning loss function based on the positive samples and the negative samples, and performs back propagation processing on the first address vector representation model according to the loss to obtain an intermediate model. The next address text in the second style address library is used as the new target address text, and the intermediate model is trained for self-contrastive learning based on the contrastive learning loss function until the loss of the contrastive learning loss function of the intermediate model meets the preset conditions, and the current intermediate model is the second address vector representation model.

[0086] This embodiment provides a specific implementation method for training the second address vector representation model. By utilizing the above-mentioned cyclic training method based on positive samples and negative samples, it is possible to effectively improve the diversity of samples, ensure the quality of the trained model, and avoid the loss of model effect due to the style difference between the second style and the first style.

[0087] Step 303: perform vector conversion processing on each address text in the second style address library using the second address vector representation model to obtain a second style address vector library, wherein the second style address vector library includes address vectors corresponding to each address text in the second style address library.

[0088] Step 304: Use the second address vector representation model and the second style address vector library to perform text recall processing based on the orthogonal space on the address text to be processed with the second style to obtain the recalled text.

[0089] Since the second address vector representation model is obtained by performing style transfer using the first address vector representation model, it is limited by the number of training texts in the second style address library. When the second address vector representation model processes the address text to be processed with the second style, it is easy for vectors to be cheap. Based on this, this application will adopt a vector recall method based on orthogonal space to realize the recall processing of the address text to be processed with the second style.

[0090] As described in step 303, after obtaining the second address vector representation model, the server first uses the second address vector representation model to perform vector conversion processing on each address text in the second style address library (ie, the user-defined address library) to obtain the second style address vector library.

[0091] Then, as described in step 304, the second address vector representation model and the second style address vector library are used to perform text recall processing based on the orthogonal space on the address text to be processed with the second style, so as to obtain the recalled text. Specifically, in the implementation mode of the present application, the server will perform orthogonal mapping processing on each address vector in the second style address vector library to obtain the second style address orthogonal vector space corresponding to the second style address vector library; perform vector processing on the address text to be processed with the second style using the second address vector representation model to obtain the address vector to be processed corresponding to the address text to be processed; perform orthogonal mapping processing on the address vector to be processed to obtain the address orthogonal vector to be processed; and determine the processing result of the text recall processing according to the second style address orthogonal vector space and the address orthogonal vector to be processed.

[0092] Figure 6 A data flow diagram of the recall processing of an address text provided for this application.

[0093] refer to Figure 6 The server performs vector processing on the address text w1, address text w2, and address text w3 in the second style address library to obtain the corresponding address vector x1, address vector x2, and address vector x3.

[0094] Subsequently, the server may perform orthogonal mapping on each address vector in the second style address vector library to obtain a second style address orthogonal vector space corresponding to the second style address vector library. Figure 6 As shown, the vector matrix X composed of address vector x1, address vector x2, and address vector x3 is orthogonally mapped so that each address vector is mapped to an orthogonal space, and a second style address orthogonal vector space X' composed of address orthogonal vector x'1, address orthogonal vector x'2, and address orthogonal vector x'3 is obtained. The address orthogonal vector space X' is a vector space with an orthogonal property.

[0095] When the user inputs a text query of an address to be processed with a second style through the terminal, the server will perform a processing flow similar to the above process on the query: input the query into the second address vector representation model to obtain the address vector q to be processed; perform orthogonal mapping on the address vector q to be processed so that the address q to be processed is mapped to the orthogonal space to obtain the address orthogonal vector Q to be processed.

[0096] At this time, since the address text to be processed is already in the orthogonal space, and the address texts in the second style address library are also in the orthogonal space, the server can perform similarity calculations on orthogonal vectors in the orthogonal space, and based on the similarity calculation results, push one or more address texts in the second style address library that are highly similar to the address text to be processed as recall texts to the terminal, thereby completing the text recall of the address text to be processed.

[0097] By first performing orthogonal mapping processing on each address vector in the second style address vector library to obtain the second style address orthogonal vector space, and then performing orthogonal mapping processing on the address vector to be processed to obtain the address orthogonal vector to be processed, text recall processing including vector similarity calculation is performed in the orthogonal space. The vector of the recalled text obtained in this way is highly similar to the second style address orthogonal vector, and its recall effect is better, which is conducive to improving the recall rate.

[0098] In order to improve the processing efficiency of orthogonal mapping in this application, in an optional implementation manner, this application will also determine the transformation matrix of the orthogonal mapping based on the first address vector representation model and the address text in the first style address library; and use the transformation matrix to perform orthogonal mapping processing.

[0099] For the first address vector representation model, since there are a large number of address texts in the first style address library, the vector representation effect of the first address vector representation model in the orthogonal space is better. Therefore, this embodiment will use the vector representation of the first address vector representation model in the orthogonal space to perform orthogonal mapping on each address vector in the second address vector library and the address vector to be processed.

[0100] Specifically, first, the first address vector representation model can be used to perform vector conversion processing on the address text in the first style address library E to obtain the first style address vector library E'; wherein the first style address vector library E' includes the address vector y' corresponding to each address text y in the first style address library.

[0101] Subsequently, the mean value mu and the covariance matrix V of each address vector y' in the first style address vector library are determined, and then the covariance matrix V is orthogonally decomposed based on singular value decomposition SVD to obtain decomposition results U and P of the orthogonal decomposition.

[0102] Finally, the transformation matrix W of the orthogonal mapping is determined according to the mean mu and the decomposition results U and P of the orthogonal decomposition.

[0103] Taking the orthogonal mapping of the address vector q to be processed as an example, when the above conversion matrix is ​​used for orthogonal mapping processing, the address orthogonal vector Q to be processed can be obtained as Q = (q-mu)W; wherein W = (Usqrt(P^(-1))). Of course, the orthogonal processing of each address vector in the second style address vector library is similar, which will not be described in detail here.

[0104] In the above embodiment, since the first address vector representation model is in a highly orthogonal state, the first address vector representation model and the first address library can be used to create a transformation matrix mapped to the orthogonal space, so that the transformation matrix can be used to perform orthogonal mapping processing on each vector including the address vectors in the second address vector library and the address vector to be processed, thereby improving the subsequent recall rate based on the vector.

[0105] The recall of address text provided in the embodiment of the present application is achieved by performing style transfer training on an existing first address vector representation model using address text having a second style, so as to obtain a second address vector representation model that can be used to process addresses having a second style. On the other hand, the text recall processing of the present embodiment is implemented based on an orthogonal space. In this way, it can be ensured that the second style address vector library output by the second address vector representation model and the vector of the address text to be processed are in the same orthogonal space, thereby avoiding spatial offset of the vector and improving the recall effect of the scheme.

[0106] Figure 7 A schematic diagram of a practical scenario of address text recall processing provided by this application, such as Figure 7 This scenario includes a target server (i.e., a server for executing the method of this application), other servers (e.g., servers of other operators), a deployment terminal (a terminal used by this party to deploy address text), and a use terminal (a user terminal).

[0107] In this scenario, other servers can use their existing first style address library to train and obtain the first address vector representation model. After the training is completed, other servers can deploy the first address vector representation model on the target server according to the usage requirements of the target server.

[0108] Synchronously or asynchronously, the deployment terminal can deploy the custom second-style address library it creates on the target server.

[0109] Subsequently, the target server may utilize the aforementioned method to train a second address vector representation model and perform corresponding recall processing upon receiving the address text to be processed sent by the user terminal.

[0110] Finally, the target server returns the recall address obtained by the recall processing to the user terminal.

[0111] Corresponding to the address text recall method provided in the above embodiment, Figure 8 This is a structural block diagram of the address text recall device provided in the embodiment of the present application. For the convenience of explanation, only the part related to the embodiment of the present application is shown. Figure 8 The address text recall is set on the server, and the address text recall device includes:

[0112] The training module 810 is used to obtain a first address vector representation model, where the first address vector representation model is obtained by training with address texts in a first style address library; and to perform self-supervised style transfer training on the first address vector representation model using each address text in a second style address library to obtain a second address vector representation model;

[0113] The processing module 820 is used to perform vector conversion processing on each address text in the second style address library by using the second address vector representation model to obtain a second style address vector library, wherein the second style address vector library includes address vectors corresponding to each address text in the second style address library;

[0114] The recall text module 830 is used to perform text recall processing based on an orthogonal space on the address text to be processed with the second style by using the second address vector representation model and the second style address vector library to obtain a recall text.

[0115] Optionally, the training module 810 is specifically used for:

[0116] The first address vector representation model is used to perform vector processing on each address text in the second style address library to obtain an address vector pair corresponding to each address text in the second style address library; based on the contrastive learning loss function, the first address vector representation model is trained by self-contrastive learning using the address vector pair corresponding to each address text in the second style address library to obtain a second address vector representation model.

[0117] Optionally, the training module 810 is specifically used for:

[0118] Any address text in the second style address library is used as the target address text; the address vector pair corresponding to the target address text is used as the positive sample in the self-contrastive learning training, and the address vector pair of the address text other than the target address text in the second style address library is used as the negative sample in the self-contrastive learning training; according to the positive samples and the negative samples, the loss of the contrastive learning loss function is calculated, and the first address vector representation model is back-propagated according to the loss to obtain an intermediate model; the next address text in the second style address library is used as the new target address text, and the intermediate model is self-contrastive learning trained based on the contrastive learning loss function until the loss of the contrastive learning loss function of the intermediate model meets the preset conditions, and the current intermediate model is the second address vector representation model.

[0119] Optionally, the recall text module 830 is specifically used to:

[0120] Perform orthogonal mapping on each address vector in the second style address vector library to obtain a second style address orthogonal vector space corresponding to the second style address vector library; use the second address vector representation model to perform vector processing on the address text to be processed with the second style to obtain the address vector to be processed corresponding to the address text to be processed; perform orthogonal mapping on the address vector to be processed to obtain the address orthogonal vector to be processed; determine the processing result of the text recall processing based on the second style address orthogonal vector space and the address orthogonal vector to be processed.

[0121] Optionally, the recall text module 830 is specifically used to:

[0122] According to the first address vector representation model and the address text in the first style address library, a conversion matrix of orthogonal mapping is determined; and orthogonal mapping processing is performed using the conversion matrix.

[0123] Optionally, the recall text module 830 is specifically used to:

[0124] The first address vector representation model is used to perform vector conversion processing on the address text in the first style address library to obtain the first style address vector library; wherein the first style address vector library includes the address vectors corresponding to the respective address texts in the first style address library; the mean and covariance matrix of each address vector in the first style address vector library are determined; the covariance matrix is ​​subjected to orthogonal decomposition based on singular value decomposition to obtain a decomposition result of the orthogonal decomposition; and a transformation matrix of the orthogonal mapping is determined according to the decomposition result of the mean and the orthogonal decomposition.

[0125] Fig. 9 A schematic diagram of the hardware structure of an electronic device provided in this application, such as Fig. 9As shown, the embodiment of the present application provides an electronic device, the memory of the electronic device can be used to store at least one program instruction, and the processor is used to execute at least one program instruction to implement the technical solution of the above method embodiment. Its implementation principle and technical effect are similar to those of the above method related embodiments, and will not be repeated here.

[0126] The embodiment of the present application provides a chip. The chip includes a processor, and the processor is used to call a computer program in a memory to execute the technical solution in the above embodiment. Its implementation principle and technical effect are similar to those of the above related embodiments, and will not be repeated here.

[0127] The embodiment of the present application provides a computer program product, when the computer program product is run on an electronic device, the electronic device executes the technical solution in the above embodiment. Its implementation principle and technical effect are similar to those of the above related embodiments, and will not be repeated here.

[0128] The embodiment of the present application provides a computer-readable storage medium on which program instructions are stored. When the program instructions are executed by an electronic device, the electronic device executes the technical solution of the above embodiment. Its implementation principle and technical effect are similar to those of the above related embodiments, and will not be repeated here.

[0129] The above specific implementation methods further illustrate the purpose, technical solutions and beneficial effects of the present application in detail. It should be understood that the above are only specific implementation methods of the present application and are not used to limit the protection scope of the present application. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the present application should be included in the protection scope of the present application.

Claims

1. A method for recalling an address text, characterized in that: include: Acquire a first address vector representation model, where the first address vector representation model is obtained by training with address texts in a first style address library; Using each address text in the second style address library, perform self-supervised style transfer training on the first address vector representation model to obtain a second address vector representation model; Performing vector conversion processing on each address text in the second style address library using a second address vector representation model to obtain a second style address vector library, wherein the second style address vector library includes address vectors corresponding to each address text in the second style address library; The second address vector representation model and the second style address vector library are used to perform text recall processing based on orthogonal space on the address text to be processed with the second style to obtain recalled text; wherein, the text recall processing based on orthogonal space refers to: performing text recall processing in orthogonal space according to the second style address orthogonal vector space corresponding to the second style address vector library and the address orthogonal vector to be processed corresponding to the address text to be processed.

2. The method for recalling address text according to claim 1, characterized in that: The method of using the address text in the second style address library to perform self-supervised style transfer training on the first address vector representation model to obtain a second address vector representation model includes: Performing vector processing on each address text in the second style address library using the first address vector representation model to obtain an address vector pair corresponding to each address text in the second style address library; Based on the contrastive learning loss function, the first address vector representation model is trained by self-contrastive learning using the address vector pairs corresponding to each address text in the second style address library to obtain a second address vector representation model.

3. The method for recalling address text according to claim 2, characterized in that: The method of performing self-contrastive learning training on the first address vector representation model based on the contrastive learning loss function and using the address vector pair corresponding to each address text in the second style address library to obtain the second address vector representation model includes: Use any address text in the second style address library as the target address text; Using the address vector pair corresponding to the target address text as a positive sample in the self-contrastive learning training, and using the address vector pair of the address text other than the target address text in the second style address library as a negative sample in the self-contrastive learning training; Calculating the loss of the contrastive learning loss function according to the positive sample and the negative sample, and performing back-propagation processing on the first address vector representation model according to the loss to obtain an intermediate model; The next address text in the second style address library is used as the new target address text, and the intermediate model is trained for self-contrastive learning based on the contrastive learning loss function until the loss of the contrastive learning loss function of the intermediate model meets the preset conditions, and the current intermediate model is the second address vector representation model.

4. The method for recalling address text according to claim 1, characterized in that: The step of using the second address vector representation model and the second style address vector library to perform text recall processing based on an orthogonal space on the address text to be processed having the second style to obtain the recalled text includes: Performing orthogonal mapping processing on each address vector in the second style address vector library to obtain a second style address orthogonal vector space corresponding to the second style address vector library; Performing vector processing on the address text to be processed in the second style by using the second address vector representation model to obtain an address vector to be processed corresponding to the address text to be processed; Performing orthogonal mapping processing on the address vector to be processed to obtain an orthogonal address vector to be processed; A processing result of the text recall processing is determined according to the second style address orthogonal vector space and the address orthogonal vector to be processed.

5. The method for recalling address text according to claim 4, characterized in that: The orthogonal mapping process comprises: Determine a conversion matrix of an orthogonal mapping according to the first address vector representation model and the address text in the first style address library; The orthogonal mapping process is performed using the transformation matrix.

6. The method for recalling address text according to claim 5, characterized in that: The step of determining a conversion matrix of an orthogonal mapping according to the first address vector representation model and the address text in the first style address library comprises: Performing vector conversion processing on the address text in the first style address library using the first address vector representation model to obtain a first style address vector library; wherein the first style address vector library includes address vectors corresponding to each address text in the first style address library; Determining the mean and covariance matrix of each address vector in the first style address vector library; Performing orthogonal decomposition based on singular value decomposition on the covariance matrix to obtain a decomposition result of the orthogonal decomposition; A transformation matrix of the orthogonal mapping is determined according to the mean value and a decomposition result of the orthogonal decomposition.

7. A device for recalling an address text, characterized in that: include: A training module, used to obtain a first address vector representation model, wherein the first address vector representation model is obtained by training with address texts in a first style address library; Using each address text in the second style address library, perform self-supervised style transfer training on the first address vector representation model to obtain a second address vector representation model; a processing module, configured to perform vector conversion processing on each address text in the second style address library by using a second address vector representation model to obtain a second style address vector library, wherein the second style address vector library includes address vectors corresponding to each address text in the second style address library; A recall text module is used to use the second address vector representation model and the second style address vector library to perform text recall processing based on orthogonal space on the address text to be processed with the second style, so as to obtain recalled text; wherein, the text recall processing based on orthogonal space refers to: performing text recall processing in the orthogonal space according to the second style address orthogonal vector space corresponding to the second style address vector library and the address to be processed orthogonal vector corresponding to the address text to be processed.

8. An electronic device, wherein: include: at least one processor; as well as Memory; The memory stores computer-executable instructions; The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor performs the method according to claims 1-7.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and when the processor executes the computer-executable instructions, the method as claimed in claims 1-7 is implemented.

10. A computer program product comprising computer instructions, characterized in that: When the computer instructions are executed by a processor, the method according to claims 1-7 is implemented.

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