Non-volatile memory and programming method thereof, and computer system

Abstract

The present invention provides a non-volatile memory, a programming method thereof, and a computer system. The programming method of the non-volatile memory includes: a programming step of applying a programming pulse to a memory cell of a target programming page; a programming verification step of performing programming verification on the memory cell after the programming pulse is applied to determine whether the memory cell has been programmed; and a data scanning step of scanning the target programming page column by column to determine whether the programming operation of the target programming page is successful. The programming step, the programming verification step, and the data scanning step are repeated until the programming operation of the target programming page is successful. In the programming method, the memory cells of the target programming page are divided into multiple data blocks by column. In the data scanning step, each data block is scanned in sequence to determine whether the data block is successfully programmed. If it is determined that the data block is successfully programmed, the next data block is scanned. If it is determined that the data block programming fails, the data scanning is stopped.

Description

Technical Field

[0001] The present invention relates to semiconductor memory technology, and more particularly to a non-volatile memory and a programming method thereof, and a computer system. Background Art

[0002] Semiconductor memory devices can generally be classified as volatile memory and non-volatile (NV) memory. Volatile memory (such as DRAM, SRAM, etc.) loses stored data in the absence of applied power. In contrast, non-volatile memory (such as EEPROM, EAROM, PROM, EPROM, NAND devices, etc.) can retain stored data in the absence of applied power. With the development of portable electronic products (such as personal computers, smartphones, digital cameras, multimedia playback devices, etc.), the demand for non-volatile memory is increasing, and the requirements for its performance are also getting higher and higher.

[0003] Nonvolatile memory has three basic operations: read, program, and erase. Read and program operations are more frequent than erase operations. Therefore, read and program time are crucial in nonvolatile memory. Read operation time is almost constant, so reducing program time is more important than reducing read time.

[0004] Generally, the Incremental Step Pulse Program (ISPP) method can be used as a programming method. Figure 1 As shown, an initial programming pulse is applied to the selected page, and programming verification is used to determine whether the memory cell has been programmed. If the programming is determined to be unqualified, a programming pulse with a voltage one level higher than the initial programming pulse is applied, so that the voltage of the programming pulse is increased sequentially until it is determined that all memory cells in the page have been programmed successfully in the column-by-column readout (also called data scanning) step. Summary of the Invention

[0005] Technical problem to be solved by the invention

[0006] However, in the current data scanning method, all memory cells are scanned each time, which results in a long total scanning time and a problem of a longer programming time for the non-volatile memory.

[0007] The present invention is made to solve the above-mentioned problem, and its object is to provide a non-volatile memory programming method, a non-volatile memory, and a computer system that can reduce the data scan time in the programming time of the non-volatile memory.

[0008] Technical solutions to technical problems

[0009] The present invention provides a programming method for a non-volatile memory, which includes: a programming step of applying a programming pulse to a storage cell of a target programming page; a programming verification step of performing programming verification on the storage cell after the programming pulse is applied to determine whether the storage cell has been programmed; and a data scanning step of scanning the target programming page column by column to determine whether the programming operation of the target programming page is successful, and repeating the programming step, the programming verification step and the data scanning step until the programming operation of the target programming page is successful. In this programming method, the storage cell of the target programming page is divided into multiple data blocks by column. In the data scanning step, each data block is scanned in turn to determine whether the data block is programmed successfully. When it is determined that the data block is programmed successfully, the next data block is scanned. When it is determined that the data block programming fails, the data scanning is stopped.

[0010] Preferably, in the data scanning step, when it is determined that the data block programming is successful, a pass mark is set for the data block; when it is determined that the data block programming is unsuccessful, a fail mark is set for the data block; in the next data scanning step, the data block with the pass mark is skipped, and data scanning is started from the data block with the fail mark.

[0011] Preferably, the pass flag and the fail flag of each data block are stored as pass / fail information in a flag memory, and the flag memory is updated after each data scanning step.

[0012] Preferably, in the mark memory, the pass / fail information of all data blocks is initially set as a fail mark.

[0013] Preferably, when it is determined in the programming verification step that the memory cell has been programmed, the memory cell is marked as successfully programmed and no programming pulse is applied thereto; and when it is determined that the memory cell has not been programmed, a programming pulse of a higher voltage is applied to the memory cell in the next programming step.

[0014] Preferably, a tolerance is predefined for the target programming page. In the data scanning step, the number of storage cells in the target programming page that have failed programming is accumulated. When the accumulated value is less than the tolerance, it is determined that the programming operation on the target programming page is successful.

[0015] Preferably, a tolerance is predefined for each data block. In the data scanning step, the number of storage cells in each data block that have failed programming is accumulated. When the accumulated value is less than the tolerance, it is determined that the data block has been successfully programmed.

[0016] Preferably, the non-volatile memory is a NAND device.

[0017] The present invention also provides a non-volatile memory storing computer instructions. When the computer instructions are executed by a processing unit, the processing unit performs programming operations on the non-volatile memory using the above-mentioned programming method.

[0018] The present invention also provides a computer system comprising: a computer storage medium storing computer instructions; a non-volatile memory; and a processing unit, wherein when executing the computer instructions, the processing unit performs programming operations on the non-volatile memory using the above-mentioned programming method.

[0019] Effects of the Invention

[0020] According to the programming method of the non-volatile memory of the present invention, by dividing the storage unit into multiple data blocks by column, in the data scanning step, when it is determined that the programming of the data block fails, the data scanning is stopped, thereby reducing the data scanning time in the programming time of the non-volatile memory.

[0021] In addition, according to the programming method of the non-volatile memory of the present invention, by setting a pass mark and a fail mark for the data block, in the next data scanning step, the data block with the pass mark is skipped and the data scanning is started from the data block with the fail mark, thereby significantly reducing the data scanning time in the programming time of the non-volatile memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A diagram illustrating a programming process of an ISPP method in a nonvolatile memory.

[0023] Figure 2 FIG. 1 is a flowchart illustrating programming a nonvolatile memory using the ISPP method.

[0024] Figure 3 This is a flowchart showing a data scanning step in the nonvolatile memory programming method according to the first embodiment of the present invention.

[0025] Figure 4 This is a diagram showing an example of comparison between a conventional data scanning method and the data scanning method according to the first embodiment of the present invention.

[0026] Figure 5 This is a diagram showing how the data scanning method according to the first embodiment of the present invention depends on the position of the failed column.

[0027] Figure 6 This is a flowchart showing a data scanning step in a nonvolatile memory programming method according to the second embodiment of the present invention.

[0028] Figure 7 This is a diagram showing the scan time of four ISPP programs in a conventional data scan method.

[0029] Figure 8 This is a diagram showing the scan time of four ISPP programs in the data scan method according to the first embodiment of the present invention.

[0030] Figure 9 This is a diagram showing the scan time of four ISPP programs in the data scan method according to the second embodiment of the present invention.

[0031] Figure 10 This is a block diagram showing a nonvolatile memory according to one embodiment of the present invention.

[0032] Figure 11 This is a block diagram illustrating a computer system according to one embodiment of the present invention. DETAILED DESCRIPTION

[0033] Embodiments of the present invention (which are briefly summarized above and discussed in more detail below) may be understood by reference to the illustrative embodiments depicted in the drawings. However, the drawings illustrate only typical embodiments of the invention and are therefore not to be considered limiting of the scope of the present principles, as the principles may admit to other equally effective embodiments.

[0034] To facilitate understanding, the same reference numerals are used in the various drawings to indicate common elements. The drawings are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be advantageously incorporated into other embodiments without further description.

[0035] A nonvolatile memory may include a memory cell array. From an operational perspective or a physical (or structural) perspective, the memory cells included in the memory cell array may be configured as a hierarchical memory cell set or a memory cell group. For example, memory cells connected to the same word line and to be read and written (or programmed) at the same time may be configured as a page. In the following description, for ease of explanation, the memory cells configured as a page will be referred to as a "page."

[0036] Figure 2 The flowchart of programming a non-volatile memory using the ISPP method is shown. The non-volatile memory may be a NAND device or the like.

[0037] In the programming step S1 , a programming pulse is applied to memory cells of a target programming page.

[0038] In the program verification step S2 , program verification is performed on the memory cell after the program pulse is applied to determine whether the memory cell has been programmed.

[0039] In the data scanning step S3 , the target programming page is scanned column by column to determine whether the programming operation on the target programming page is successful.

[0040] The programming step S1 , the program verification step S2 , and the data scanning step S3 are repeated until the programming operation on the target programming page is successful.

[0041] In addition, when it is determined in the programming verification step S2 that the memory cell has been programmed, the memory cell can be marked as programmed successfully and no programming pulse is applied to it. When it is determined that the memory cell has not been programmed, a programming pulse with a higher voltage is applied to the memory cell in the next programming step.

[0042] In addition, a tolerance may be predefined for the target programming page. In the data scanning step S3, the number of memory cells in the target programming page that have failed programming is accumulated. When the accumulated value is less than the tolerance, it is determined that the programming operation on the target programming page is successful.

[0043] <Implementation Method 1>

[0044] The nonvolatile memory programming method according to Embodiment 1 of the present invention utilizes an early failure detection scheme. The memory cells of the target programming page are divided into multiple data blocks by column. If a data block has accumulated errors exceeding the tolerance, data scanning is stopped because programming of that page is incomplete. This means that a higher voltage is required to complete programming of that page. This reduces data scanning time, and thus programming time.

[0045] Below, using Figure 3 A method for programming a nonvolatile memory according to the first embodiment of the present invention will be described. Figure 3 A flow chart showing the data scanning step in the programming method.

[0046] In step S31 , memory cells of a target programming page are divided into a plurality of data blocks by column.

[0047] In step S32, the data block is scanned to determine whether the data block has been successfully programmed. A tolerance may be predefined for each data block. During the data scanning step, the number of memory cells in each data block that have failed programming is accumulated. When the accumulated value is less than the tolerance, the data block is determined to have been successfully programmed.

[0048] If it is determined in step S32 that the data block programming is successful, the next data block is scanned (step S33). If it is determined in step S32 that the data block programming fails, the data scanning is stopped (step S34).

[0049] Figure 4This is a diagram showing an example of comparison between a conventional data scanning method and the data scanning method according to the first embodiment of the present invention. Figure 4 In the example, the memory cells of the target programming page are divided into data block 0, data block 1, data block 2, ..., data block n by column. Assume that the data block where programming fails is data block 2.

[0050] Figure 4 The upper half of FIG is a diagram of a conventional data scanning method. Since there is no fail-stop function, the data scanning time from data block 0 to data block n is equal to the scanning time T of a single data block × the number of data blocks.

[0051] Figure 4 The lower half of FIG is a diagram of the data scanning method of Embodiment 1 of the present invention. Since the early failure detection scheme is adopted, the data scanning stops after scanning data block 2, and the data scanning time is reduced.

[0052] According to this embodiment, by dividing the memory cells into multiple data blocks by column, in the data scanning step, when it is determined that the programming of a data block has failed, the data scanning is stopped, thereby reducing the data scanning time in the programming time of the nonvolatile memory.

[0053] <Implementation Method 2>

[0054] Embodiment 1 above describes a programming method using a data scan method with an early failure detection scheme. In this early failure detection scheme, the scan time depends on the location of the failing column, exhibiting failure location dependency. If the failing column is located at a low column address, the scan time is shorter. On the other hand, if the failing column is located at a high column address, the scan time is almost the same as without the early failure detection scheme. Figure 5 2 shows the case where the data scanning method of embodiment 1 depends on the position of the failed column. When the data block with programming failure is the data block of the highest column, the scanning time is equal to the case without the early failure detection scheme.

[0055] In this regard, the nonvolatile memory programming method according to Embodiment 2 of the present invention sets a pass mark on each data block, indicating successful programming. In the next data scanning step, the data blocks marked as passed do not need to be scanned again. Therefore, scanning begins again from the failed data blocks, reducing scanning time. This solution has the advantage that the location of the failure does not affect the total scanning time.

[0056] Below, using Figure 6 , a programming method of a nonvolatile memory according to a second embodiment of the present invention is described. Figure 6 A flow chart showing the data scanning step in the programming method.

[0057] In step S310 , memory cells of a target programming page are divided into a plurality of data blocks by column.

[0058] In step S320, the data block is scanned to determine whether the data block has been successfully programmed. A tolerance may be predefined for each data block. During the data scanning step, the number of memory cells in each data block that have failed programming is accumulated. When the accumulated value is less than the tolerance, the data block is determined to have been successfully programmed.

[0059] If the data block is successfully programmed in step S320, a pass flag is set for the data block and the next data block is scanned (step S330). If the data block is unprogrammed in step S320, a fail flag is set for the data block and data scanning is stopped (step S340).

[0060] In addition, the pass and fail flags of each data block can be stored as pass / fail information in a flag memory, and the flag memory can be updated after each data scanning step. In the flag memory, the pass / fail information of all data blocks can be set to fail flags at the beginning.

[0061] Below, using Figures 7 to 9 The scanning times of the conventional data scanning method, the data scanning method of the first embodiment, and the data scanning method of the second embodiment are compared. Figures 7 to 9 1 and 2 show the total scan time of four ISPP procedures under the conventional data scanning method, the data scanning method of embodiment 1, and the data scanning method of embodiment 2, respectively.

[0062] In this example, the memory cells of the target programming page are divided into data blocks 0, 1, 2, 3, and 4 by column. In the first ISPP procedure (1st ISPP), it is assumed that data block 0 initially fails to program. In the second ISPP procedure (2nd ISPP), it is assumed that data block 3 initially fails to program. In the third ISPP procedure (3rd ISPP), it is assumed that data block 4 fails to program. In the fourth ISPP procedure (4th ISPP), it is assumed that data block 4 also succeeds in programming.

[0063] Figure 7 Since there is no failure stop function and no pass failure information mark memory is set, each ISPP program scans from data block 0 to data block 4. The total scan time = the scan time T of a single data block × the number of data blocks × the number of ISPP times.

[0064] Figure 8In the example, thanks to the fail-stop function, with the help of early stopping, in the first ISPP program, the scan stops after data block 0. In the second ISPP program, the scan proceeds from data block 0 to data block 3. In the third and fourth ISPP programs, the scan proceeds from data block 0 to data block 4. This shows that the scan time is reduced, but it still has the dependency on the failure position.

[0065] Figure 9 In this process, a pass / failure flag memory is further provided. Successfully programmed data blocks are marked as pass, while failed data blocks are marked as fail. In the next ISPP process, scanning begins at the data blocks marked as failed. Thus, in the first ISPP process, the scan stops after scanning data block 0. In the second ISPP process, the scan continues from data block 0 to data block 3. In the third ISPP process, the scan continues from data block 3 to data block 4. Finally, in the fourth ISPP process, the scan continues to data block 4. As a result, the total scan time can be significantly reduced, and the dependence on the failure location is also reduced.

[0066] According to this embodiment, by setting a pass mark and a fail mark for the data block, in the next data scanning step, the data block with the pass mark is skipped and data scanning is started from the data block with the fail mark, thereby significantly reducing the data scanning time in the programming time of the non-volatile memory.

[0067] Each operation and combination of operations of the non-volatile memory programming method described in Embodiment 1 and / or Embodiment 2 of the present invention can be implemented by a special-purpose hardware-based system that performs specific functions or actions, or a combination of special-purpose hardware and computer instructions.

[0068] All or part of the operations involved in Embodiment 1 and / or Embodiment 2 of the present invention may optionally be automatically performed by a program. In one example, the present invention may be implemented as a program product stored on a computer-readable storage medium for use with a computer system. The program(s) of the program product include the functions of the embodiments (including the methods described herein). Illustrative computer-readable storage media include, but are not limited to: (i) non-writable storage media (e.g., a read-only memory device within a computer, such as a CD-ROM disk, flash memory, ROM chip, or any type of solid-state non-volatile semiconductor memory that can be read by a CD-ROM drive), on which information is permanently stored; and (ii) writable storage media (e.g., disk storage or hard drive or any type of solid-state random access semiconductor memory), on which changeable information is stored. When computer-readable instructions that indicate the functions of the methods described herein are implemented, such computer-readable storage media are embodiments of the present invention.

[0069] <Implementation Method 3>

[0070] Below, refer to Figure 10 The nonvolatile memory according to this embodiment will be described. Figure 10 This is a block diagram showing the nonvolatile memory according to this embodiment.

[0071] The non-volatile memory 1001 involved in this embodiment can be a non-volatile memory such as EEPROM, EAROM, PROM, EPROM, NAND device, etc. The memory includes a storage area 1002 and a processing unit 1003. The storage area 1002 is used to store various memory parameters. The processing unit 1003 can control the storage area 1002 automatically or when receiving a signal from an external computing device (for example, a computer or a communication terminal, etc.). The processing unit 1003 can be, for example, a semiconductor chip in the non-volatile memory. The processing unit 1003 can execute the programming method for the non-volatile memory as described in the above-mentioned embodiment 1 and / or embodiment 2, thereby performing a programming operation on the storage area 1002 of the non-volatile memory.

[0072] <Implementation Method 4>

[0073] Below, refer to Figure 11 A computer system according to this embodiment will be described. Figure 11 This is a block diagram showing a computer system according to this embodiment.

[0074] Computer system 1101 may include memory 1102 and processing unit 1103. Memory 1102 may be a non-volatile memory, such as an EEPROM, EAROM, PROM, EPROM, or NAND device. Processing unit 1103 may control memory 1102 automatically or upon receiving a signal from the outside (e.g., via wireless transmission) or internally (e.g., from other circuits or components within computer system 1101). For example, processing unit 1103 may include an ASIC (Application Specific Integrated Circuit), an IC (Integrated Circuit), a DSP (Digital Signal Processor), an FPGA (Field Programmable Gate Array), various logic circuits, and various signal processing circuits. Processing unit 1103 may execute the programming method for a non-volatile memory as described in Embodiment 1 and / or Embodiment 2 above, thereby performing a programming operation on memory 1102.

[0075] The tag memory associated with the programming operation of the memory 1102 may be provided in other storage devices in the computer system 1101 and / or in an external storage device. The other storage devices in the computer system 1101 may be computer-readable and writable storage media (e.g., disk storage or hard drive or any type of solid-state random access semiconductor memory) on which changeable information is stored. The external storage device may be a storage device that is the same as or similar to the memory 1102 or other storage devices in the computer system 1101, or may be a cloud, remote storage device, remote server, etc. that communicates with the processing unit 1103. The other storage devices and / or external storage devices transmit computer instructions to the processing unit 1103 or receive update signals from the processing unit 1103 via wireless communication or wired communication.

[0076] The present invention has been described in detail, but the above embodiments are merely examples of all embodiments and the present invention is not limited thereto. The present invention can freely combine the various embodiments within the scope of the invention, or modify or omit any constituent elements of the various embodiments.

Claims

1. A method for programming a non-volatile memory, comprising: a programming step of applying a programming pulse to memory cells of a target programming page; Performing program verification on the memory cell after the programming pulse is applied to determine whether the memory cell has been programmed; and Scanning the target programming page column by column to determine whether the programming operation on the target programming page is successful. Repeat the programming step, the program verification step, and the data scanning step until the programming operation on the target programming page is successful. The programming method is characterized by: Dividing the memory cells of the target programming page into a plurality of data blocks by column, In the data scanning step, each data block is scanned in sequence to determine whether the data block is programmed successfully. When it is determined that the data block is programmed successfully, the next data block is scanned. When it is determined that the data block is programmed unsuccessfully, the data scanning is stopped.

2. The method for programming a non-volatile memory according to claim 1, wherein: In the data scanning step, when it is determined that the data block is programmed successfully, a pass mark is set for the data block; when it is determined that the data block is programmed unsuccessfully, a fail mark is set for the data block. In the next data scanning step, the data blocks with pass marks are skipped, and data scanning is started from the data blocks with fail marks.

3. The method for programming a non-volatile memory according to claim 2, wherein: The pass mark and fail mark of each data block are stored in the mark memory as pass / fail information. After each data scanning step, the tag memory is updated.

4. The method for programming a non-volatile memory according to claim 3, wherein: In the tag memory, the pass / fail information of all data blocks is initially set as a fail tag.

5. The method for programming a non-volatile memory according to claim 1 or 2, wherein: When it is determined in the programming verification step that the memory cell has been programmed, the memory cell is marked as programmed successfully and no programming pulse is applied thereto. When it is determined that the memory cell has not been programmed, a programming pulse of a higher voltage is applied to the memory cell in the next programming step.

6. The method for programming a non-volatile memory according to claim 1 or 2, wherein: A tolerance is predefined for the target programming page, In the data scanning step, the number of memory cells in the target programming page that have failed programming is accumulated, and when the accumulated value is less than a tolerance, it is determined that the programming operation on the target programming page is successful.

7. The programming method of a non-volatile memory according to claim 1 or 2, wherein: Tolerances are predefined for each data block. In the data scanning step, the number of memory cells in each data block that have failed programming is accumulated. When the accumulated value is less than a tolerance, it is determined that the data block is successfully programmed.

8. The method for programming a non-volatile memory according to claim 1 or 2, wherein: The non-volatile memory is a NAND device.

9. A non-volatile memory, characterized in that: Computer instructions are stored therein, and when the computer instructions are executed by a processing unit, the processing unit performs a programming operation on the non-volatile memory using the programming method according to any one of claims 1 to 8.

10. A computer system, characterized in that: include: Computer storage media storing computer instructions; Non-volatile memory; as well as A processing unit, wherein when executing the computer instruction, the processing unit performs a programming operation on the non-volatile memory using the programming method according to any one of claims 1 to 8.

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