A scalable topography neural electrode array and method of making the same
By designing a neural electrode array with a scaled topology, the problem of difficulty in acquiring signals from multiple neurons in existing electrode arrays was solved, enabling the acquisition and stimulation of multi-scale neuronal signals and improving the accuracy and reliability of neural network research.
Patent Information
- Application Number
- CN202210183550.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-02-28
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2042-02-28
AI Technical Summary
Existing neural electrode array designs are mostly uniformly distributed, making it difficult to accurately acquire the electrical activity of neurons at specific locations, and also unable to simultaneously acquire the coordinated signals of dozens, hundreds, or even tens of thousands of neurons.
A neural electrode array with a scaled topology is used to form a ring, star or fused structure by combining electrode points of different sizes. The electrode array is prepared by combining chemical vapor deposition and masking technology to realize the acquisition and stimulation of multi-scale neuronal signals.
It enables precise acquisition and stimulation of electrical activity of neurons in different ranges, and can simultaneously acquire the coordinated signals of dozens to tens of thousands of neurons, improving the accuracy and reliability of neural network research.
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Figure CN114587367B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of neuroscience, medical mechanical technology and biomedical engineering, in particular, to a neural electrode array with a scaling topology and a preparation method thereof. BACKGROUND
[0002] Neural interface technology is an important means to obtain signals, by approaching neurons with tiny electrodes to obtain the signals of individual neurons. However, when the brain is actually working, a specific action or idea needs the coordinated action of tens, hundreds, thousands or even tens of thousands of neurons, so obtaining the signals of individual neurons is far from enough. In addition, these neurons are located at different positions, so it is impossible to accurately obtain the electrical activity of neurons at specific positions through a simple array.
[0003] At present, most of the literatures on electrode design are to form an electrode array by multiple identical electrodes, which often only collects and analyzes the average value of the electrical signals of single neurons or multiple neurons, and the obtained electrical activity of neurons is limited to regular areas such as rectangles and circles. Weiyang Yang et al. published an article A fully transparent, flexible PEDOT:PSS-ITO-Ag-ITO based microelectrode array for ECoG recording in Lab on a Chip 21(9) 1096-1108 in 2021, which discloses a flexible transparent electrode array for the cerebral cortex and a preparation method thereof. The main feature of this electrode array is full transparency, but the sizes of different electrode points are consistent, and the electrode array is distributed with uniform horizontal and vertical spacing.
[0004] Joonsoo Jeong et al. published an article Microfabrication process for long-term reliable neural electrode arrays using liquid crystal polymer (LCP) in Microelectronic Engineering (216) 111096 in 2019, which discloses a flexible electrode array based on liquid crystal polymer and a preparation method thereof. The main feature of this electrode array is high reliability, and through specific design, it can realize a working life of more than 10 years. However, the electrode array is also distributed with uniform horizontal and vertical spacing.
[0005] In summary, although the structure design of the electrode array has been studied, the literatures mostly focus on the study of the electrode array composed of multiple independent same electrode points, ignoring the topological arrangement of electrode arrays with different sizes. SUMMARY
[0006] In view of the defects in the prior art, the purpose of the present application is to provide a neural electrode array with a scaling topological structure and a preparation method thereof. The topological structure is composed of electrode points with different sizes to form different geometric shapes, such as ring structure, star structure, tree structure, etc. The topological structure is not limited to one structure, and can be a combination of two or more topological structures.
[0007] To achieve the above-mentioned purpose, the present application provides a neural electrode array with a scaling topological structure and a preparation method thereof.
[0008] The present application provides a neural electrode array with a scaling topological structure, which arranges electrode points with different sizes according to a specific structure to form a neural electrode array with a scaling topological structure, which is a ring structure, a star structure, or a combination of the two.
[0009] The neural electrode array in the present application has the following structure:
[0010] (1) The diameter of all electrode points in the scaling topological structure ranges from 5 microns to 100 microns;
[0011] (2) A circular electrode point with a diameter ranging from 0.04 mm to 0.1 mm is placed at the center of the scaling topological structure;
[0012] (3) Taking the scaling topological structure as a base point and the base point as the center, the outer periphery of the neural tissue region measured by the neural electrode array with a scaling topological structure is divided into six regions. Six electrode points with a diameter of 0.03-0.05 mm are placed on a circle with a diameter of 0.08-2 mm and a center at the base point;
[0013] (4) Six circular electrode points with a diameter of 0.015-0.025 mm are placed between the electrode points in (3), and the distance from the center of each electrode point to the center of the region is 0.09-4 mm;
[0014] (5) Six electrode points with a diameter of 12.4 microns are placed on the line connecting the electrode points in (3) and the center of the region, and the distance from the center of each electrode point to the center of the region is 0.1-5 mm.
[0015] In the present application, the neural electrode array is used for measuring a certain region of the cerebral cortex or deep brain, and the equivalent area of the region ranges from 0.1 mm2 to 25 mm2.
[0016] A preparation method of a neural electrode array of a scaling topological structure, comprising the following steps:
[0017] (1) a layer of Parylene-C is deposited on a silicon wafer by chemical vapor deposition, with a thickness of 2-5 microns;
[0018] (2) a photoresist is spun and patterned by using a mask plate; an electrode conductive layer is sputtered or evaporated, and the photoresist is removed by using a Lift-off process, and the metal layer constitutes the conductive structure of the electrode; wherein the mask plate is prepared according to the topological parameters and design size of the topological electrode array to be prepared;
[0019] (3) a second layer of Parylene-C is deposited by chemical vapor deposition again, with a thickness of 2-5 microns, then a photoresist is spun and patterned, and Parylene-C is etched by using a reactive ion etching method, so as to expose the electrode points and etch the contour of the electrode, thereby constituting the cover layer of the topological electrode array;
[0020] (4) the device is released from the silicon wafer, and a flexible neural electrode array of a scaling topological structure is obtained.
[0021] Compared with the prior art, the present application has the following beneficial effects:
[0022] Different sizes of electrode points can obtain neural electrical activities of neurons in different ranges, and the neural activities of neurons of corresponding topological structures can be obtained by forming a topological array of electrode points of different sizes, which can be directly used for research on neural networks. The electrode points of different sizes can be arranged and combined through a topological structure, so that signals of neurons generated by the synergistic action of tens, hundreds, thousands or even tens of thousands of neurons can be obtained at the same time.
[0023] Meanwhile, electrode points of the same size can electrically stimulate neurons in different ranges, and the neurons of corresponding topological structures can be electrically stimulated by forming a topological array of electrode points of different sizes, which can also be directly used for intervention and research on neural networks. The neural electrode array of the scaling topological structure can study the interconnection and synergistic work of different dimensions and multiple neurons according to the topological structure. It provides a new tool for extracting neural signals or stimulating neurons, and the precision of the electrode is improved in the direction from inside to outside of the topological structure, and the transmission process of the neural signal is studied. Meanwhile, the impedance of the electrode is also increased in sequence, and an electrode array with an impedance gradient is obtained. BRIEF DESCRIPTION OF DRAWINGS
[0024] Other features, objects and advantages of the present application will become more apparent from the following detailed description of non-limiting embodiments, made with reference to the accompanying drawings:
[0025] Figure 1A schematic diagram of an electrode array with a star topology for an embodiment of the present application. DETAILED DESCRIPTION
[0026] The present application will be described in detail below with specific embodiments. The following examples will help those skilled in the art to further understand the present application, but do not limit the present application in any form. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present application. These are within the scope of the present application.
[0027] Example 1
[0028] The present embodiment provides a design method of a neural electrode array with a scaling topology, by which electrode points of different sizes are arranged according to a specific structure to form a neural electrode array with a scaling topology, which is a ring structure, a star structure or a combination of the two, and the diameter of the electrode points ranges from 5 microns to 100 microns. The specific process is as follows:
[0029] (1) The neural tissue area measured by the neural electrode array with a scaling topology is a circular area with a diameter of 0.3 mm;
[0030] (2) A circular electrode point with a diameter of 0.1 mm is placed at the center of the topology to obtain the electrical activity of the nuclear group level, as shown in Figure 1 ;
[0031] (3) Taking the center of the topology to be constructed as a base point, and taking the base point as the center of a circle, the outer periphery of the circle is divided into six regions. Further, six electrode points with a diameter of 0.05 mm are placed on a circle with a diameter of 0.08 mm and with the base point as the center to obtain the electrical activity of dozens of neurons, as shown in Figure 1 ;
[0032] (4) Six circular electrode points with a diameter of 0.025 mm are placed between the electrode points in (3) to obtain the electrical activity of several neurons, and the distance from the center of each electrode point to the center of the region is 0.11 mm, as shown in Figure 1 ;
[0033] (5) Six electrode points with a diameter of 12.4 microns are placed on the line connecting the electrode points in (3) and the center of the region circle to obtain the electrical activity of a single neuron, and the distance from the center of each electrode point to the center of the region circle is 0.1225 mm;
[0034] (6) A mask plate is manufactured using the size parameters of the above topology. A layer of Parylene-C with a thickness of 3 microns is deposited on a silicon wafer by chemical vapor deposition;
[0035] (7) Spin off the photoresist and pattern it using a mask, then sputter or evaporate the electrode conductive layer, remove the photoresist using a lift-off process, and the metal layer forms the conductive structure of the electrode.
[0036] (8) A second layer of Parylene-C with a thickness of 3 micrometers was deposited again using chemical vapor deposition. Then, positive photoresist was applied and patterned. Parylene-C was then etched using reactive ion etching to expose the electrode points and etch the outline of the electrodes to form a capping layer for the topological electrode array.
[0037] (9) Release the device from the silicon wafer to obtain a neural electrode array with a flexible scaling topology.
[0038] Example 2
[0039] This embodiment provides a design method for a scaled topology neural electrode array. It arranges electrode points of different sizes according to a specific structure to form a scaled topology electrode array, which can be a ring structure, a star structure, or a combination of both. The diameter of the electrode points ranges from 5 micrometers to 100 micrometers. The specific process is as follows:
[0040] (1) The neural tissue region measured by the scaling topology neural electrode array is a circular region with a diameter of 2 mm;
[0041] (2) A circular electrode point with a diameter of 0.1 mm is placed at the center of this topology to obtain electrical activity at the level of neural nuclei, such as Figure 1 As shown;
[0042] (3) Taking the center of the topology to be constructed as a base point, and using this base point as the center of a circle, the outer perimeter of the circle is divided into six regions. Furthermore, six electrode points with a diameter of 0.04 mm are placed on a circle with a diameter of 0.5 mm centered at this base point to obtain electrical activity at the level of dozens of neurons, such as... Figure 1 As shown;
[0043] (4) Place six circular electrode points with a diameter of 0.02 mm between the electrode point intervals in (3) to obtain several neuron-level electrical activities. The distance from the center of each electrode point to the center of the region is 0.6 mm. Figure 1 As shown;
[0044] (5) Place six electrode points with a diameter of 12.4 micrometers on the line connecting the electrode point in (3) and the center of the region to obtain electrical activity at the level of a single neuron. The distance between the center of each electrode point and the center of the region is 1 millimeter.
[0045] (6) Fabricate a mask using the dimensional parameters of the above topology. Deposit a layer of Parylene-C with a thickness of 1 micrometer on the silicon wafer using chemical vapor deposition;
[0046] (7) spin the photoresist and pattern it with a mask, sputter or evaporate the electrode conductive layer, remove the photoresist using the Lift-off process, the metal layer constitutes the conductive structure of the electrode.
[0047] (8) again use chemical vapor deposition to deposit a second layer of Parylene-C, thickness 1 micron. Then spin the photoresist and pattern it, use reactive ion etching of Parylene-C to expose the electrode points, etch the profile of the electrode, and constitute the cover layer of the topological electrode array.
[0048] (9) release the device from the silicon wafer, obtain the flexible scaling topological structure of the neural electrode array.
[0049] In summary, the present application designs an electrode array containing four sizes of electrode points, which constitutes a star-shaped scaling topological structure.
[0050] The specific embodiments of the present application are described above. It should be understood that the present application is not limited to the specific embodiments described above, and various modifications or changes can be made by those skilled in the art within the scope of the claims, which does not affect the essential content of the present application.
Claims
1. A neural electrode array of a scaled topology, characterized by: It arranges electrode points of different sizes according to a specific structure to form a zoom topological structure electrode array, which is a combination of ring structure and star structure; it is used for measuring a certain area of the cerebral cortex or deep brain, and the equivalent area of the area ranges from 0.1 square millimeter to 25 square millimeters; wherein: (1) the diameter of all electrode points in the zoom topological structure ranges from 5 microns to 100 microns; (2) a circular electrode point is placed at the center of the zoom topological structure, and the diameter ranges from 0.04 millimeter to 0.1 millimeter; (3) taking the zoom topological structure as a base point, the periphery of the neural tissue area measured by the zoom topological structure neural electrode array is divided into six areas with the base point as the center, and six electrode points with a diameter of 0.03-0.05 millimeter are placed on a circle with the base point as the center and a diameter of 0.08-2 millimeter; (4) six circular electrode points with a diameter of 0.015-0.025 millimeter are placed between the electrode point intervals of (3), and the distance from the center of each electrode point to the center of the area is 0.09-4 millimeter; (5) six electrode points with a diameter of 12.4 microns are placed on the line connecting the electrode points of (3) and the center of the area, and the distance from the center of each electrode point to the center of the area is 0.1-5 millimeter.
2. A method of fabricating a neural electrode array according to claim 1, wherein, The method comprises the following steps: (1) a layer of Parylene-C with a thickness of 2-5 microns is deposited on a silicon wafer by chemical vapor deposition; (2) the photoresist is spun and patterned using a mask plate; The electrode conductive layer is sputtered or evaporated, the photoresist is removed by Lift-off process, and the metal layer constitutes the conductive structure of the electrode; wherein the mask plate is prepared according to the topological parameters and design size of the topological electrode array to be prepared; (3) a second layer of Parylene-C with a thickness of 2-5 microns is deposited by chemical vapor deposition, then the photoresist is spun and patterned, Parylene-C is etched by reactive ion etching, the electrode points are exposed, the profile of the electrode is etched, and the cover layer of the topological electrode array is formed; (4) the device is released from the silicon wafer to obtain a flexible zoom topological structure neural electrode array.
Citation Information
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