Individual DC and AC current shunts in optical receivers

Abstract

The present invention relates to various DC and AC current shunts in an optical receiver. A circuit may include an amplifier circuit configured to: receive a current signal at an amplifier input node; convert the current signal into a voltage signal; and output the voltage signal at an amplifier output node. The circuit may also include an overload circuit configured to receive a replicated DC input voltage and a replicated DC output voltage. The overload circuit may also be configured to detect that the current signal exceeds a threshold level based on the replicated DC input voltage and the replicated DC output voltage. In addition, the overload circuit may be configured to direct the DC current of the current signal through a DC shunt path and direct the AC current of the current signal through an AC shunt path in response to and based on detecting that the current signal exceeds a threshold level. The AC shunt path may be different from the DC shunt path.

Description

[0001] This patent application is a divisional application of a patent application with an international application date of October 4, 2017, a national application number of 201780074581.5, and an invention name of “Individual DC and AC current shunts in an optical receiver”. Technical Field

[0002] The embodiments discussed in this disclosure are related to respective DC and AC current splitting in an optical receiver. Background Art

[0003] Fiber optic receivers used in higher order modulation schemes (e.g., pulse amplitude modulation) may require linear processing of the received signal through various stages prior to detection. In many systems, the gain used for low input signal operation in the presence of noise (e.g., to achieve a target sensitivity) may result in unacceptable signal distortion at high input signal strengths.

[0004] The subject matter claimed herein is not limited to implementations that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is merely provided to illustrate one example technology area in which some implementations described herein may be practiced. Summary of the invention

[0005] According to one aspect of the embodiment, a circuit may include an amplifier circuit, the amplifier circuit being configured to: receive a current signal at an amplifier input node; convert the current signal into a voltage signal; and output the voltage signal at an amplifier output node. The circuit may also include an overload circuit, the overload circuit being coupled to the amplifier input node and being configured to receive a replica DC input voltage at a first overload node. The replica DC input voltage may correspond to the DC input voltage at the amplifier input node. The overload circuit may also be configured to receive a replica DC output voltage at a second overload node. The replica DC output voltage may correspond to the DC output voltage at the amplifier output node. The overload circuit may also be configured to detect that a DC component of the current signal exceeds a first threshold level based on the replica DC input voltage and the replica DC output voltage. In addition, the overload circuit may be configured to direct the DC current of the current signal through a DC shunt path in response to and based on detecting that the DC component of the current signal exceeds a first threshold level. In addition, the overload circuit may be configured to direct the AC current of the current signal through an AC shunt path in response to and based on detecting that the shunted DC current through the DC shunt path exceeds a second threshold level. The AC shunt path may be different from the DC shunt path.

[0006] The objects and advantages of the embodiments will be realized and obtained at least by the elements, features and combinations particularly pointed out in the claims.It should be understood that both the foregoing general description and the following detailed description are given as examples and are illustrative, but not limiting of the present disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Example embodiments will be described and explained with additional specificity and detail through the use of the accompanying drawings, in which:

[0008] Figure 1 An example system is shown that may be included in an optical receiver and that may be configured to split a DC current component and an AC current component of a current signal;

[0009] Figure 2A It shows that it can be Figure 1 A system of an example implementation of a system of;

[0010] Figure 2B Shows Figure 2A An example circuit level diagram of an overload circuit of; and

[0011] Figure 3 is a flow chart of an example method of dividing DC current and AC current. DETAILED DESCRIPTION

[0012] In order to avoid distortion at high input current signal levels without changing the functional or parametric operation of the receiver, it may be advantageous to remove a portion of the input current signal in a low distortion manner. In addition, in many cases, it may be advantageous to remove (or "shunt away") the direct current (DC) portion of the input current signal independently from the alternating current (AC) portion of the input signal.

[0013] For example, for an optical receiver, an optical input signal is incident on a photodetector, which generates a current that flows unidirectionally into the receiver circuit. This received current signal typically includes a DC component and an AC component. Because the input current signal can only flow into the optical receiver in one direction, a DC component of the input current may be required that supports the peak-to-peak amplitude of the AC component deviation. In order to process only the AC signal component in the optical receiver, it may be necessary to remove the DC component of the input current. In addition, for large AC signal amplitudes, it may be advantageous to reduce the amplitude of the AC component of the input current for large AC input levels by "shunting away" a portion of the AC component of the input current signal. In addition, in some embodiments, AC shunting can be done in a linear manner to maintain signal integrity. In some embodiments, the result of AC shunting should be equal to scaling the AC component by a constant value <1.

[0014] According to one or more embodiments of the present disclosure, an optical receiver may include an amplifier circuit and an overload circuit, which may be coupled together and configured to remove both a DC input current component and an AC input current component from a current signal generated by a photodetector configured to receive an optical signal and convert the optical signal into a current signal. As described below, the overload circuit may be configured to direct the shunted DC current via a DC shunt path, and may be configured to direct the shunted AC current via an AC shunt path separate from the DC shunt path. In some embodiments, the overload circuit may be configured to detect that the current signal exceeds a specific threshold level, and may be configured to shunt the DC current and the AC current in response to and based on detecting that the current signal exceeds the threshold level.

[0015] In some embodiments, the overload circuit can be configured to detect that the current signal exceeds a threshold level by detecting that the DC component of the current signal exceeds a first threshold level. In these or other embodiments, the overload circuit can be configured to shunt the DC component of the current signal in response to detecting that the DC component of the current signal exceeds the first threshold. Additionally or alternatively, in some embodiments, the overload circuit can be configured to detect that the shunted DC current exceeds a second threshold level. In these or other embodiments, the overload circuit can be configured to shunt the AC component of the current signal in response to and based on detecting that the shunted DC current exceeds the second threshold level. Note that in this particular embodiment, the AC component can be shunted based on detecting that the DC component of the current signal exceeds the first threshold in the following indirect manner: the comparison of the shunted DC component with the second threshold is based on detecting that the DC component of the current signal exceeds the first threshold.

[0016] In the present disclosure, references to the DC current of a current signal may refer to at least a portion of the DC current component of the current signal. Similarly, references to the AC current of a current signal may refer to at least a portion of the AC current component of the current signal.

[0017] In the present disclosure, various types of transistors are described. For example, bipolar junction transistors ("BJTs") and metal oxide semiconductor transistors ("MOSFETs") are described, and the corresponding descriptions use the terms "base," "collector," and "emitter," or "gate," "drain," and "source" to refer to different terminals of the transistors. However, the use of these terms may be used to generally describe similar terminals of other transistor types. For example, the terms "base" and "gate" may generally describe similar control terminals that may be used to control the operation of a transistor.

[0018] Embodiments of the present disclosure will be described with reference to the drawings.

[0019] Figure 1 An example system 100 is shown that can be included in an optical receiver and can be configured to split a DC current component and an AC current component of a current signal via a DC current path and an AC current path separate from the DC current path. The system 100 can generally be part of or form an optical receiver and can include a photodetector 102, a transimpedance amplifier circuit 104 ("amplifier circuit 104"), an overload circuit 106, and a low pass filter 108 ("filter 108").

[0020] The photodetector 102 may include any suitable system, device, or apparatus configured to receive an optical signal and to convert the optical signal into an electrical signal (e.g., in some embodiments, the photodetector 102 may include a photodiode). In particular, in some embodiments, the photodetector 102 may be configured to convert the optical signal into a current signal. The photodetector 102 may be coupled to the amplifier input node 110 such that the photodetector 102 may output a current signal at the amplifier input node 110.

[0021] The amplifier circuit 104 can be coupled to the amplifier input node 110 so that the amplifier circuit 104 can receive the current signal that can be output by the photodetector 102. The amplifier circuit 104 can be configured to convert the current signal received at the amplifier input node 110 into a voltage signal. The amplifier circuit 104 can also be configured to output the voltage signal at the amplifier output node 112.

[0022] In some implementations, the amplifier circuit 104 can include a replica bias circuit configured to generate a replica DC input voltage based on the replica current. In these or other implementations, the replica bias circuit can be configured to output the replica DC input voltage at the first overload node 114.

[0023] Additionally or alternatively, the amplifier circuit 104 may include a core amplifier circuit coupled to the replica bias circuit and configured to set a DC input voltage at the amplifier input node 110 based on the replica current. In these or other embodiments, the replica bias circuit and the core amplifier circuit may include components that are configured and constructed relative to each other such that the replica DC input voltage at the first overload node 114 may correspond to the DC input voltage at the amplifier input node 110. For example, in some embodiments, the replica bias circuit and the core amplifier circuit may include components that are configured and constructed relative to each other such that the replica DC input voltage at the first overload node 114 and the DC input voltage at the amplifier input node 110 may be substantially equal to each other.

[0024] The amplifier circuit 104 may include any suitable system, device, or apparatus configured and arranged to perform the operations of the amplifier circuit 104 listed above. Figure 2A An example configuration of at least a portion of amplifier circuit 104 is included.

[0025] The low pass filter 108 can be coupled to the amplifier output node 112, such that the low pass filter 108 can be configured to receive the voltage signal that can be output by the amplifier circuit 104. The low pass filter 108 can be configured to filter the higher frequency components of the voltage signal that can be received at the amplifier output node 112 to generate a filtered voltage signal. In some embodiments, the low pass filter 108 can be configured to filter out the AC component of the voltage signal, such that the filtered voltage signal can include a DC component of the voltage signal. In some embodiments, the low pass filter 108 can be configured to output the filtered voltage signal at the second overload node 116. In some embodiments, the filtered voltage signal that can be output at the second overload node 116 can be referred to as a replica DC output voltage because the filtered voltage signal can correspond to the average DC voltage of the voltage signal at the amplifier output node 112.

[0026] The low pass filter 108 may include any suitable system, device, or apparatus configured to perform low pass filtering on a voltage signal. For example, in some embodiments, the low pass filter 108 may include a resistor / capacitor ("RC") filter. Figure 2A An example configuration of a low pass filter 108 is included.

[0027] The overload circuit 106 may be coupled to the amplifier input node 110, the first overload node 114, and the second overload node 116. The overload circuit 106 may be configured to receive a replica DC input voltage at the first overload node 114 and may be configured to receive a replica DC output voltage at the second overload node 116. Based on the replica DC input voltage and the replica DC output voltage, the overload circuit 106 may be configured to detect when a current signal at the amplifier input node 110 exceeds a threshold level. In response to and based on detecting that the current signal exceeds the threshold level, the overload circuit 106 may be configured to direct at least a portion of the DC current of the current signal through a DC shunt path that may be configured to shunt the DC current. Additionally, in response to and based on detecting that the current signal exceeds the threshold level, the overload circuit 106 may be configured to direct at least a portion of the AC current of the current signal through an AC shunt path that may be configured to shunt the AC current. The AC shunt path and the DC shunt path may be separate paths from each other, such that the shunted DC current and the shunted AC current may follow different paths.

[0028] In some embodiments, as described above, the overload circuit 106 can be configured to detect that the current signal exceeds the threshold level by detecting that the DC component of the current signal exceeds the first threshold level, and can be configured to shunt the DC current in response to detecting that the current signal exceeds the first threshold level. In these or other embodiments, the overload circuit 106 can be configured to shunt the AC current of the current signal in response to and based on detecting that the shunted DC current exceeds the second threshold level.

[0029] The overload circuit 106 may include any suitable system, device, or apparatus configured and arranged to perform the operations of the overload circuit 106 described above. Figure 2B An example configuration of the overload circuit 106 is included.

[0030] As described above, the system 100 can therefore be configured to shunt the DC current and AC current of the current signal via a DC current path and an AC current path separated from the DC current path. Without departing from the scope of the present disclosure, the system 100 can be modified, added or omitted. For example, the system 100 can include components different from the listed components. In addition, the marking of the specific elements of the system 100 is for ease of description and is not restrictive. For example, in some cases, one or more of the amplifier circuit 104, the overload circuit 106 and the low-pass filter 108 can be considered to be included in a single transimpedance amplifier. In addition, other electrical connections and components can be included to achieve the described shunt. Additionally, the use of the term "coupling" or "coupling" for a component can indicate a direct electrical connection between two components, wherein there may be no other components between the two components. In addition, the use of the term "coupling" or "coupling" for a component can indicate an indirect electrical connection between two components, wherein there may be one or more other components between the two components.

[0031] Figure 2A A system 200 is shown according to at least one embodiment of the present disclosure. The system 200 may be Figure 1 The system 200 may include an amplifier circuit 204, an overload circuit 206, and a low pass filter 208. Figure 2A An example circuit level diagram of amplifier circuit 204 and low pass filter 208 is shown, along with a block diagram representation of overdrive circuit 206 . Figure 2B Shows Figure 2A An example circuit level diagram of the overload circuit 206 is shown in FIG.

[0032] System 200 may include a Figure 1 The amplifier input node 210 of the amplifier input node 110. For example, the amplifier input node 210 can be coupled to a photodetector (eg, Figure 1 The amplifier input node 210 may be coupled to the photodetector such that the current signal generated by the photodetector is received at the amplifier input node 210. In addition, the overdrive circuit 206 and the core amplifier circuit 220 of the amplifier circuit 204 may be respectively coupled to the amplifier input node 210 in the manner shown. The operation of the overdrive circuit 206 and the core amplifier circuit 220 with respect to the amplifier input node 210 is described in further detail below.

[0033] System 200 may also include a Figure 12 and 3. The first overload node 214 of the amplifier circuit 204 is coupled to the first overload node 114 of the amplifier circuit 204. The first overload node 214 can be coupled to the overload circuit 206 in the manner shown and can be coupled to the replica bias circuit 218 of the amplifier circuit 204 in the manner shown. The operation of the overload circuit 206 and the replica bias circuit 218 with respect to the first overload node 214 is described in further detail below.

[0034] System 200 may also include a Figure 1 The second overload node 216 of the second overload node 116. The second overload node 216 can be coupled to the overload circuit 206 in the manner shown and can be coupled to the output of the low pass filter in the manner shown. The operation of the overload circuit 206 and the low pass filter 208 with respect to the second overload node 216 is described in further detail below.

[0035] Additionally, system 200 may include a Figure 1 The amplifier output node 212 of the amplifier output node 112 is connected to the amplifier output node 212. The amplifier output node 212 can be coupled to the core amplifier circuit 220 in the manner shown and can be coupled to the input of the low pass filter 208 in the manner shown. The operation of the core amplifier circuit 220 and the low pass filter 208 with respect to the amplifier output node 212 is described in further detail below.

[0036] As described above, the amplifier circuit 204 can include a replica bias circuit 218. In some embodiments, the replica bias circuit 218 can be configured such that a replica DC input voltage (“VreplicaIn”) at the first overload node 214 corresponds to a DC voltage (“Vin”) at the amplifier input node 210. For example, in some embodiments, the replica bias circuit 218 can be configured such that VreplicaIn is approximately equal to Vin (except for random mismatches). In some embodiments, the values ​​of VreplicaIn and Vin can be based on bias voltages (e.g., base-to-emitter voltage, gate-to-source voltage, etc.) of transistors that can be included in the system 200.

[0037] In particular, replica bias circuit 218 may include a current source 222 coupled to supply node 219 (having supply voltage Vdd) and configured to generate a replica current (“Ireplica”). The value of Ireplica may be selected based on the size, type, bandwidth, etc. of transistors that may be included in system 200 and a target amount of gain for achieving a target impedance value for a target performance of system 200. Current source 222 may include any suitable system, device, or apparatus configured to generate Ireplica.

[0038] The replica bias circuit 218 may also include a resistor element 224 coupled to the current source 222 such that Ireplica may pass through the resistor element 224. The resistor element 224 may include any suitable system, device, or apparatus configured to provide resistance (e.g., one or more resistors, one or more transistors, etc.). Additionally, the replica bias circuit 218 may include an npn BJT (“BJT”) 226. Figure 2A As shown, the collector of BJT 226 and the base of BJT 226 can be coupled to node 225, and node 225 can also be coupled to resistor element 224. This particular configuration of BJT 226 can allow BJT 226 to operate as a diode. In addition, the emitter of BJT 226 can be coupled to the first overload node 214, so that Ireplica can be passed from the collector of BJT 226 to the emitter of BJT 226.

[0039] The replica bias circuit 218 may also include an npn BJT 228 ("BJT 228"), where the base and collector are coupled to the first overload node 214. The emitter of the BJT 228 may be coupled to ground (Gnd). The BJT 228 may therefore be configured as a diode and may be configured to pass Ireplica to ground. Ireplica through the BJT 228 may generate a voltage VreplicaIn that is equal to or approximately equal to the base-emitter voltage (Vbe) of the BJT 228. As discussed in further detail below, the overload circuit 206 may be configured to direct the shunted AC current to the first overload node 214 so that the shunted AC current may be passed to ground through the BJT 228. Thus, in the illustrated embodiment, the AC shunt path 246 of the system 200 may include the overload node 214 and the BJT 228.

[0040] The replica bias circuit 218 may include a voltage buffer 230 that may have an input coupled to the node 223. The voltage buffer 230 may include an output that may be coupled to the node 227. The voltage buffer 230 may include any suitable system, device, or apparatus configured to generate an output voltage (“VBias”) at the node 227 based on the voltage at the node 223. For example, in the illustrated embodiment, the voltage buffer 230 may be configured to generate VBias at the node 227 such that VBias is approximately equal to or equal to the voltage at the node 223.

[0041] like Figure 2AAs shown, in some embodiments, the core amplifier circuit 220 may include two stages. The first stage may include a voltage gain stage, the voltage gain stage including a resistor element 234 and an npn BJT 238 ("BJT 238"). The second stage may include a voltage follower stage, the voltage follower stage including an npn BJT 236 ("BJT 236"), a current source 240, and a feedback resistor element 232 ("resistor element 232").

[0042] The resistor element 232 may be coupled between the amplifier input node 210 and the amplifier output node 212. The resistor element 232 may include any suitable system, device, or apparatus (e.g., one or more resistors, one or more transistors, etc.) configured to provide resistance. The resistor element 232 may cause a voltage drop between the amplifier input node 210 and the amplifier output node 212. Additionally, the amount of the voltage drop may be based on the amount of current passing through the resistor element 232, which may be based on a current signal received from the photodetector at the amplifier input node 210. The output voltage ("Vout") at the amplifier output node 212 may thus vary based on the current signal, such that Vout may be generated as a voltage signal based on the current signal. The amount of resistance of the resistor element 232 may be based on the target gain amount of the amplifier circuit 204 while also maintaining the target bandwidth amount of the amplifier circuit 204.

[0043] In some embodiments, the resistor element 234 may be Figure 2A 227 and 229 in the manner shown in FIG. Resistive element 234 may include any suitable system, device, or apparatus configured to provide resistance (e.g., one or more resistors, one or more transistors, etc.). In some embodiments, resistive element 234 and resistive element 224 may be configured to have the same or substantially the same resistance, and as previously described, VBias may be the same or substantially the same as the voltage at node 223.

[0044] In some embodiments, the base of BJT 236 can be Figure 2A 229, the collector of BJT 236 may be coupled to node 229 in the manner shown in FIG. Figure 2A 2 and the emitter of BJT 236 may be coupled to supply node 219 in the manner shown in FIG. Figure 2A 2 is coupled to the amplifier output node 212 in the manner shown in FIG. 2. In addition, in some embodiments, the base of the BJT 238 can be connected to the amplifier output node 212 in the manner shown in FIG. Figure 2A 2. The collector of BJT 238 can be coupled to amplifier input node 210 in the manner shown in FIG. Figure 2A 2 and the emitter of BJT 238 may be coupled to node 229 in the manner shown in FIG. Figure 2A Additionally, a current source 240 may be coupled between the amplifier output node 212 and ground in the manner shown.

[0045] In normal operation, core amplifier circuit 220 may pull the input current flowing from the photodiode into node 210 through resistive element 232. Because overload circuit 206 may substantially shunt (remove) the DC component of the input current, the DC voltage drop across resistive element 232 may be small or approximately zero.

[0046] The DC voltage at node 229 may be the sum of the following three voltages: the voltage at node 210 (Vbe of BJT 238), the DC voltage across resistive element 232, and the voltage between node 229 and node 212 (Vbe of BJT 236). The voltage at node 210 may be determined by the control voltage Vbe of BJT 238 required to pass the current “IBias” from collector to emitter through BJT 238. Additionally, the voltage between node 229 and node 212 may be determined by the control voltage Vbe of BJT 236 that may be required to pass the current from current source 240 from collector to emitter through BJT 236.

[0047] In some embodiments, the core amplifier circuit 220 can be configured so that the ratio between IBias and Ireplica is a target amount. In some embodiments, the ratio can be a one-to-one ratio, and in other embodiments, the ratio can be such that IBias and Ireplica are multiples of each other.

[0048] For example, for a given target ratio between IBias and Ireplica, device parameters (e.g., emitter area) of BJT 236 and BJT 226 may be selected and configured such that the Vbe of BJT 236 is substantially equal to the Vbe of BJT 226. In these or other embodiments, BJT 238 and BJT 228 may be sized and configured such that the Vbe of BJT 238 is substantially equal to the Vbe of BJT 228. Thus, the voltage at node 229 may be substantially the same as the voltage at node 225. In some embodiments, both node 229 and node 225 may be two Vbes above ground. Also remember that the DC voltage VBias at node 227 may be substantially equal to the voltage at node 223 due to the voltage buffer 230 described previously. Because the DC voltage across resistive element 234 may be substantially equal to the DC voltage across resistive element 224 , the current ratio (IBias / Ireplica) may be equal to or approximately equal to the ratio of (resistance 224 / resistance 234 ).

[0049] In some embodiments, the core amplifier circuit 220 may also include other components not shown to obtain the target value of IBias. For example, in some embodiments, the core amplifier circuit 220 may include one or more current sources configured to contribute to the value of IBias so that IBias is at the target value, and / or may include a common-source common-gate device between the collector of the BJT 238 and the resistor element 234.

[0050] The low pass filter 208 of the illustrated embodiment may be similar to Figure 1 The low pass filter 108 of FIG. 20 is a low pass filter because the low pass filter 208 can be configured to filter the higher frequency components of Vout to generate a filtered voltage signal. In some embodiments, the low pass filter 208 can be configured to filter out the AC component of Vout so that the filtered voltage signal can include a DC component of the voltage signal. The low pass filter 208 can be configured to output the filtered voltage signal at the second overload node 216 as a replica DC output voltage "VreplicaOut".

[0051] In particular, in the illustrated embodiment, the low pass filter 208 may be configured as an RC filter including a resistor element 242 and a capacitor element 244. Figure 2A As shown, the resistor element 242 can be coupled between the amplifier output node 212 and the second overload node 216. Figure 2A As shown, the capacitive element 244 can be coupled between the second overload node 216 and ground. The configuration of the resistive element 242 and the capacitive element 244 as shown and described can provide low pass filtering between the amplifier output node 212 and the second overload node 216 so that VreplicaOut can be a filtered version of Vout. In the illustrated embodiment, VreplicaOut can be a filtered version having a DC value that can be equal to or substantially equal to the DC value of Vout. In these or other embodiments, the low pass filter 208 can be configured so that VreplicaOut can be based on the DC value of Vout but can be other than the DC value of Vout. For example, in some embodiments, the low pass filter 208 can be configured so that VreplicaOut can be a multiple of the DC component of Vout.

[0052] The resistor element 242 and the capacitor element 244 may be selected based on their respective characteristics (e.g., resistance and capacitance) to provide a target amount of low-pass filtering. For example, the resistor element 242 and the capacitor element 244 may be selected so that the low-pass filter 208 has a target frequency response, such as a target cutoff frequency and / or a target slope. In some embodiments, the amount of resistance of the resistor element 242 and the amount of capacitance of the capacitor element 244 may be based on specific manufacturing constraints and characteristics and the amount of area available for the low-pass filter 208.

[0053] The overload circuit 206 may be similar to Figure 1 The overload circuit 106 of FIG. 1 . Specifically, the overload circuit 206 can be configured to receive VreplicaIn at a first overload node 214 and can be configured to receive VreplicaOut at a second overload node 216. The overload circuit 206 can be configured to detect when a current signal at the amplifier input node 210 exceeds a threshold level based on VreplicaIn and VreplicaOut. In response to and based on detecting that the current signal exceeds the threshold level, the overload circuit 206 can be configured to direct at least a portion of a DC current of the current signal through a DC shunt path 248 that can be configured to shunt the DC current. Additionally, in response to and based on detecting that the current signal exceeds the threshold level, the overload circuit 206 can be configured to direct at least a portion of an AC current of the current signal through an AC shunt path 246 via the first overload node. As described above, Figure 2B An example implementation of the overload circuit 206 is shown. As described above, in some implementations, DC shunting can be based on a DC component of the current signal exceeding a first threshold level, and AC shunting can be based on the shunted DC current exceeding a second threshold level.

[0054] Reference Figure 2B, the overload circuit 206 may include an error amplifier 255, which is configured to detect whether the current signal at the amplifier input node 210 exceeds a threshold level based on VreplicaIn and VreplicaOut. In some embodiments, the error amplifier 255 may include a first input terminal 252 and a second input terminal 254. In the illustrated embodiment, the first input terminal 252 may be a non-inverting input terminal of the error amplifier 255 and the second input terminal 254 may be an inverting input terminal of the error amplifier 255. The first input terminal may be coupled to a voltage source 250 that may have a voltage level (“Vthreshold”), and the voltage source 250 may be coupled to a first overload node 214 that may have a voltage of VreplicaIn as previously described. Additionally, the second input terminal 254 may be coupled to a second overload node 216 that may have a voltage of VreplicaOut as previously described. As the level of the current signal at the amplifier input node 210 increases, the voltage across the amplifier input node 210 increases. Figure 2A The voltage drop of the resistor element 232 shown in FIG. 2 can increase, so that the voltage difference between Vin and Vout - and therefore the voltage difference between VreplicaIn and VreplicaOut - can increase. Therefore, when the current signal at the amplifier input node 210 exceeds the threshold level, the voltage difference between VreplicaIn and VreplicaOut will also exceed the threshold level. The voltage level Vthreshold of the voltage source 250 can be based on Figure 2A In the current source 240, current shunting may occur in the current source 240 so that the voltage and current at the output node 212 may be maintained at sufficiently high levels to allow the current source 240 to operate as desired.

[0055] The output terminal 256 of the error amplifier 255 can be coupled to the base of the DC shunt npn BJT 258 (“BJT 258”) such that the error amplifier 255 can be configured to drive (e.g., activate or deactivate) the BJT 258. Additionally, the output terminal 256 can be coupled to the base of the npn BJT 272 (“BJT 272”) of the AC shunt activation circuit 270 (“AC shunt activation circuit 270”) of the overload circuit 206 such that the error amplifier 255 can be configured to drive (e.g., activate or deactivate) the BJT 272.

[0056] like Figure 2BThe error amplifier 255 shown and configured as described above can be configured to output a voltage signal that can activate BJT 258 and BJT 272 in response to the voltage drop from VreplicaIn to VreplicaOut being greater than Vthreshold. As described in further detail below, BJT 258 can at least partially initiate the shunting of DC current when activated. Additionally, as described in further detail below, BJT 272 can operate as a drive transistor that can at least partially initiate the shunting of AC current when activated.

[0057] Because BJT 272 has the same base node 256 and emitter node (ground) as BJT 258, the Vbe of BJT 272 is equal to the Vbe of BJT 258. Therefore, the current Icollector through device BJT 272 can track the DC shunt current through BJT 258 at a ratio (Icollector / I DC shunt) that depends on the ratio of the emitter area of ​​BJT 272 to the emitter area of ​​BJT 258. Therefore, the illustrated configuration of error amplifier 255 can enable error amplifier 255 to at least partially initiate the shunting of DC current and AC current based on VreplicaIn and VreplicaOut.

[0058] In the present disclosure, references to activated or effective transistors may refer to transistors being in a state where current can pass through the transistor, and may include situations where the transistor is operating in a linear operating region or a saturated operating region or in a forward effective mode. In addition, references to transistor deactivation or failure may refer to transistors being in a state where little or no current can pass through the transistor, and may include situations where the transistor is operating in a cutoff operating region. In addition, references to current passing through a transistor in the present disclosure may generally refer to current passing between the collector and emitter in a BJT or current passing between the drain and source in a FET. In addition, references to transistors coupled between nodes or components may refer to drains and sources coupled between nodes or components or collectors and emitters coupled between nodes or components.

[0059] DC Shunt

[0060] When the level of the current signal at the amplifier input node 210 is small (e.g., such that the DC component of Vout does not drop below VreplicaIn-Vthreshold), VreplicaOut can be substantially equal to VreplicaIn. Therefore, the voltage source 250 can make the voltage at the node 252 less than the voltage at the node 216. Therefore, the output node 256 of the error amplifier 255 can be pulled down to ground and force BJT 258 and BJT 272 to turn off. In this case, the DC shunt current and Icollector can be zero or approximately equal to zero.

[0061] As the level of the current signal at the amplifier input node 210 increases, Figure 2A The voltage drop across resistor element 232 shown in FIG. 2 can increase so that the DC voltage difference between Vin and Vout—and therefore the DC voltage difference between VreplicaIn and VreplicaOut—can increase. Thus, when the current signal at amplifier input node 210 exceeds a threshold level, voltage VreplicaOut can drop below VreplicaIn by exceeding a threshold level (e.g., Vthreshold). When this occurs, the voltage at node 216 can drop below the voltage at node 252. The voltage at node 256 at the output of amplifier 255 can also increase and thus turn on BJT 258. This can cause a DC shunt current to be drawn from input node 210 to ground. This can also cause the DC shunt current to be drawn from input node 210 to ground. Figure 2A The DC current in the resistive element 232 decreases, and VreplicaOut may rise back to the voltage VreplicaIn-Vthreshold at the node 252 .

[0062] In addition, the illustrated configuration of the overload circuit 206 may also be such that when the DC component of the current signal at the amplifier input node 210 continues to increase beyond a threshold level, the DC shunt current may also increase in proportion to the increase in the DC component. Specifically, in the illustrated embodiment, the overload circuit 206 may be configured such that the DC shunt current increases by the same amount or approximately the same amount as the increase in the DC component of the current signal at the input node 210. Thus, even for very large DC currents at the input node 210 (e.g., due to a large DC component of the current signal), the current through the resistive element 232 may be limited to Vthreshold divided by the resistance of the resistive element 232 ("R232") ("Vthreshold / R232").

[0063] In summary, when the DC component of the input current at node 110 is below the threshold, the voltage at node 252 (equal to VreplicaIn-Vthreshold) is less than the voltage at node 216 (equal to VreplicaOut). In this case, the voltage at node 256 can be substantially ground, and BJT 258 and BJT 272 can be turned off or substantially off. Therefore, the DC shunt current can be zero or approximately equal to zero, and Icollector can be zero or approximately equal to zero. When the input current at node 110 is above the threshold, the voltage at node 216 VreplicaOut can drop below the voltage at node 252. Then, the error amplifier 255 can control the servo loop. The action of the servo loop can make the DC shunt current be the DC component of the input current at node 110 minus the DC shunt current that can flow through the resistor element 232, so that VreplicaOut is substantially equal to (VreplicaIn-Vthreshold). In some embodiments, Vthreshold can be operated as the first threshold mentioned above.

[0064] AC Shunt

[0065] AC bypass path 246 may include Figure 2A BJT 228 and first overload node 214 are shown. In addition, AC shunt path 246 may include Figure 2B 2. The MOSFET 260 may have a drain coupled to the amplifier input node 210 and a source coupled to the first overload node 214. The MOSFET 260 may have a gate coupled to the AC shunt activation circuit 270 such that the AC shunt activation circuit 270 may be configured to drive the MOSFET 260. A further description of the AC shunt activation circuit 270 and its activation of the MOSFET 260 is given below.

[0066] When MOSFET 260 is effective, MOSFET 260 may provide an electrical connection between amplifier input node 210 and first overload node 214. The electrical connection between amplifier input node 210 and first overload node 214 via MOSFET 260 may allow AC current to pass from amplifier input node 210 to first overload node 214. Thus, at least a portion of AC shunt path 246 may be between amplifier input node 210 and first overload node 214 and may include MOSFET 260. In contrast, when MOSFET 260 is ineffective, MOSFET 260 may make little or no electrical connection between amplifier input node 210 and first overload node 214 such that AC current may not be shunted through AC shunt path 246.

[0067] AC shunt activation circuit 270 may include BJT 272; current source 273; p-type MOSFETs 276, 278, and 280 ("p-mos 276", "p-mos 278", and "p-mos 280"); n-type MOSFETs 282 and 284 ("n-mos 282" and "n-mos 284"); resistor elements 293, 294, 295, and 296; and differential amplifiers 285 and 287; all configured and arranged as shown. Figure 2B As shown. In the illustrated embodiment, current source 273 may include any suitable system, device or apparatus that can be configured to generate current. As shown, p-mos transistors 276, 278 and 280 can be configured as current mirrors relative to each other. In some embodiments, the sizes of p-mos transistors 276, 278 and 280 can be designed to be the same so that the same amount of current can pass through them. In these or other embodiments, the sizes of one or more of p-mos transistors 276, 278 and 280 can be designed differently so that the currents that can pass through p-mos transistors whose sizes are designed differently can be multiples of each other.

[0068] In addition, as shown, the drain of p-mos 278 can be coupled to node 281, and resistive element 294 can be coupled to node 281 and coupled to the gate and drain of n-mos 282. In addition, resistive element 293 can be coupled between node 281 and node 283. Node 283 can be coupled to the gate of MOSFET 260. Resistive element 293 as configured as shown can be operated as an AC blocking resistor. In addition, resistive element 294 and n-mos 282 as configured as shown can form a gate drive load impedance relative to the gate of MOSFET 260. N-mos 282 as configured as shown can be operated as a diode, wherein the source of n-mos 282 is coupled to the first overload node 214.

[0069] In addition, as shown, the drain of p-mos 280 can be coupled to node 289, and resistive element 296 can be coupled to node 289 and coupled to the gate and drain of n-mos 284. In addition, resistive element 295 can be coupled between node 289 and node 261. Resistive element 295 configured as shown can be operated as an AC blocking resistor. In addition, resistive element 296 and n-mos 284 configured as shown can form a body drive load impedance relative to node 261. N-mos 284 configured as shown can be operated as a diode, wherein the source of n-mos 284 is coupled to ground. In some embodiments, resistor elements 293 and 295 can have the same or approximately the same resistance; resistor elements 294 and 296 can have the same or approximately the same resistance; and n-mos 282 and n-mos 284 can have the same or approximately the same size, so that the voltage difference between the body and the gate of MOSFET 260 can be constant or nearly constant, which can reduce electrical overstress of MOSFET 260.

[0070] In addition, in some embodiments, MOSFET 260 can have a relatively small size and can be sensitive (e.g., damaged) to a voltage difference between the gate and the source exceeding a certain level. Therefore, in some embodiments, AC shunt activation circuit 270 can include differential amplifiers 285 and 287. As shown in FIG. 2, differential amplifier 285 can be coupled to node 281, and differential amplifier 287 can be coupled to node 289, and differential amplifier 285 and differential amplifier 287 can be configured to limit the voltage drop across resistor element 294 and across resistor element 296, respectively, to help protect MOSFET 260 from electrical overstress.

[0071] In particular, differential amplifier 285 may include npn BJT 286 (“BJT 286”), npn BJT 288 (“BJT288”), current source 274, and voltage source 297 having a voltage “Vlimit”, which may be based on the maximum voltage level swing that MOSFET 260 can sustain. Similarly, differential amplifier 287 may include npn BJT 290 (“BJT 290”) of the same size or approximately the same size as BJT 286, npn BJT 292 (“BJT292”) of the same size or approximately the same size as BJT 288, current source 275 configured to be the same size or approximately the same size as current source 274, and voltage source 298 having a voltage “Vlimit”. The configuration of differential amplifier 285 and differential amplifier 287 as shown may limit the voltage drop across resistor element 294 and across resistor element 296 by “Vlimit”.

[0072] As the voltage across the resistive element 294 plus the voltage across the n-mos 282 begins to approach Vlimit, the BJT 286 will begin to conduct current, and a portion of the current flowing from the p-mos 278 into the resistive element 294 may be directed through the BJT 286. This reduction in current through the resistive element 294 may reduce and limit the gate drive voltage at the node 281. In a similar manner, as the voltage across the resistive element 296 plus the voltage across the n-mos 284 begins to approach Vlimit, the BJT 290 may begin to conduct current, and a portion of the current flowing from the p-mos 280 into the resistive element 296 may be directed through the BJT 290. This reduction in current through the resistive element 296 may reduce and limit the body drive voltage at the node 289.

[0073] The current source 273 can be configured to generate a threshold current "Ithreshold", and the operation of the AC shunt activation circuit 270 can be based on the relationship between Ithreshold and the current "Icollector" that can pass through the BJT 272, so that the BJT 272 can operate as a driving BJT relative to the AC shunt activation circuit. In addition, as described above, the BJT 272 can be activated by the error amplifier 255 to allow current to pass through it. Therefore, because the amount of Icollector can be controlled by the error amplifier 255, the operation of the AC shunt activation circuit 270 can also be at least partially controlled by the error amplifier 255. In some embodiments, the current (Icollector) through the BJT 272 can be a fixed ratio of the DC shunt current through the BJT 258.

[0074] In some embodiments, Ithreshold can be based on the current ratio between the AC current and the DC current in the input signal and the target point at which AC shunting is initiated relative to the DC current level of the input signal compared to the AC current level of the input signal. In these or other embodiments, BJT 272 can be sized based on Ithreshold so that BJT 272 can allow a current greater than Ithreshold to pass through it. As described above, the value of Ithreshold can be relatively small to reduce power consumption so that the size of BJT 272 can also be designed to be relatively small. For example, for DC current shunting, based on the different current loads that BJT 272 can handle compared to the current load that BJT 258 can handle, the size of BJT 272 can be designed to be 10 times smaller than BJT 258. The size difference between BJT 272 and BJT 258 may be based on a target power savings, where the smaller the size of BJT 272 the greater the power savings, and may also be based on the size of BJT 272 to allow for a target operation of AC shunt activation circuit 270 .

[0075] As described above, the operation of the AC shunt activation circuit 270 can be based on the relationship of Icollector relative to Ithreshold. In particular, the operation of the AC shunt activation circuit 270 can be based on whether: (1) Icollector is less than or equal to Ithreshold; (2) Icollector is slightly greater than Ithreshold; and (3) Icollector is greater than Ithreshold by more than a small amount. Additionally, as described above, Icollector can correspond to a DC shunt current, such that activation of the AC shunt can be based on the relationship between the DC shunt current and Ithreshold. Thus, in some embodiments, Ithreshold can operate as the second threshold referenced above.

[0076] Icollector is less than or equal to Ithreshold

[0077] When Icollector is less than or equal to Ithreshold (e.g., when BJT 272 is deactivated), AC shunt activation circuit 270 may operate as follows. When Icollector is less than or equal to Ithreshold, little or no current may pass through p-mos 276. Additionally, p-mos 278 and p-mos 280 may be configured as current mirrors relative to each other and relative to p-mos 276. Thus, when little or no current passes through p-mos 276, likewise little or no current may pass through p-mos 278 and p-mos 280. In the case of little or no current passing through p-mos 278, the voltage drop across resistive element 294 may be or approximately equal to zero and the amount of current that may pass through n-mos 282 (which may be configured as a diode as shown) may also be or approximately equal to zero. Similarly, with little or no current passing through p-mos 280, the voltage drop across resistive element 296 may be or may be approximately zero, and the amount of current that may pass through n-mos 284 (which may be configured as a diode as shown) may also be or may be approximately zero.

[0078] like Figure 2B As shown, with little or no voltage drop across the resistor element 294 and the n-mos 282, the voltages at nodes 281, 283, 210, and 214 may be the same or approximately the same, so that the voltage "Vgs" across the gate and source of the MOSFET 260 and the voltage "Vds" across the gate and drain of the MOSFET 260 may be or approximately equal to zero. Therefore, the MOSFET 260 may not be effective in this state, so that the AC current may not be shunted. Additionally, with little or no voltage drop across the resistor element 296 and the n-mos 284, the voltages at nodes 289 and 261 may be the same or approximately the same (e.g., ground), so that the voltage "Vdb" across the drain and body of the MOSFET 260 and the voltage "Vsb" across the source and body of the MOSFET 260 may be equal to or approximately equal to each other, so that the body may be reverse biased relative to the drain and source at a value of about Vin or VreplicaIn. Reverse biasing may result in lower junction capacitance at the amplifier input node 210 .

[0079] Icollector is slightly larger than Ithreshold

[0080] When Icollector is slightly greater than Ithreshold, the AC shunt activation circuit 270 may operate as follows. In the present disclosure, in contrast to references to Icollector being greater than Ithreshold, references to Icollector being slightly greater than Ithreshold may indicate that the AC shunt activation circuit 270 is operating in an on state, but not sufficiently for the differential amplifiers 285 and 287 to begin limiting the voltage drop as described above. When Icollector is slightly greater than Ithreshold, the current difference may flow through the p-mos 276 and may therefore be mirrored by the p-mos 278 and the p-mos 280. The voltage drop across the resistive element 294 and the n-mos 282 may rise to the threshold voltage (“Vt”) of the diode that may be formed by the n-mos 282. Furthermore, in some embodiments, the n-mos transistors 282 and 284 may be configured relative to the MOSFET 260 such that the MOSFET 260 may also have a threshold voltage Vt. The voltage drop Vt across the resistive element 294 and the n-mos 282 may result in Vgs-Vt of the MOSFET 260 such that the MOSFET 260 may begin to be activated to allow shunting of AC current through the MOSFET 260. In addition, the voltage drop across the resistive element 296 and the n-mos 284 may also rise to the threshold voltage Vt of the diode that may be formed by the n-mos 284. Because the voltage drops across the resistive element 294 and across the n-mos 282 may be equal to or approximately equal to the voltage drops across the resistive element 296 and the n-mos 284, the voltage difference between the gate and the body of the MOSFET 260 may be approximately the same based on the configuration shown to help avoid electrical overstress of the MOSFET 260.

[0081] Icollector is greater than Ithreshold

[0082] When Icollector is greater than Ithreshold, the AC shunt activation circuit 270 may operate as follows. In the present disclosure, references to Icollector being greater than Ithreshold, as opposed to references to Icollector being slightly greater than Ithreshold, may indicate that the AC shunt activation circuit 270 is operating in an on state, at or slightly below a level that causes the differential amplifiers 285 and 287 to begin limiting the voltage drop as described above. In other words, when Icollector is greater than Ithreshold, the AC shunt activation circuit 270 may operate in a fully on state, and when Icollector is slightly greater than Ithreshold, the AC shunt activation circuit 270 may operate between an off state and a fully on state.

[0083] Similar to when Icollector is slightly greater than Ithreshold, when Icollector is greater than Ithreshold, the current difference can flow through p-mos 276 and can therefore be mirrored by p-mos 278 and p-mos 280. The voltage drop across resistive element 294 can be approximately equal to the overdrive voltage ("Von" or "Vgs-Vt") of MOSFET 260, and can therefore activate MOSFET 260. In addition, the DC voltage between the drain and source of MOSFET 260 can be relatively small, so that the channel resistance of MOSFET 260 can depend inversely on Von, and therefore can depend inversely on the voltage drop across resistive element 294. In this operating mode, the relatively low Vds can result in a substantially linear channel resistance of MOSFET 260, which decreases as more current flows through BJT 272, which can also correspond to a decrease in channel resistance as the DC shunt current rises. Additionally, as described above, the voltage difference between the gate and body of MOSFET 260 may be maintained constant or nearly constant to help avoid electrical overstress of MOSFET 260 .

[0084] Without departing from the scope of the present disclosure, system 200 may be modified, added, or omitted. For example, the characteristics of the listed components (e.g., size, resistance, voltage, current, geometry, type, etc.) may vary according to different implementations. In addition, according to different implementations, other components other than those described may be included in system 200, or one or more components may be removed. In addition, system 200 is described as including certain types of transistors. However, in these or other embodiments, different types of transistors may be used to replace one or more of the described transistors. In addition, for ease of explanation, certain components have been described as being included in certain types of circuits, but the labeling of the circuits is not meant to limit or imply that the components included therein are limited to the functions described with respect to such circuits.

[0085] Figure 3 is a flow chart of an example method 300 for dividing DC current and AC current according to some embodiments described in the present disclosure. In some embodiments, the method 300 may be performed by, for example, Figure 1 and FIG. 2A to FIG. 2B The described systems 100 and 200 are implemented in a system. Although the method 300 is shown as certain operations performed with respect to discrete blocks, various blocks may be divided into additional blocks, combined into fewer blocks, or deleted, depending on the implementation.

[0086] Method 300 may begin at block 302, where an optical signal may be received. At block 304, the optical signal may be converted into a current signal. At block 306, the optical signal may be received at an amplifier input node, and at block 308, the current signal received at the amplifier input node may be converted into a voltage signal. At block 310, the voltage signal may be output at an amplifier output node.

[0087] At block 312, a replica DC input voltage may be received. The replica DC input voltage may correspond to a DC input voltage at an amplifier input node. At block 314, a replica DC output voltage may be received. The replica DC output voltage may correspond to a DC output voltage at an amplifier output node.

[0088] At block 316, it may be detected whether the current signal exceeds a threshold level, such as described above. For example, in some embodiments, it may be determined whether the DC component of the current signal exceeds a first threshold level as described above. At block 318, in response to and based on the current signal exceeding the threshold level, the DC current of the current signal may be directed through a DC shunt path.

[0089] At block 320, in response to and based on the current signal exceeding the threshold level, the AC current of the current signal can be directed through the AC shunt path. As described above, in some embodiments, the threshold at block 316 can be a first threshold, and the AC current can be shunted in response to detecting that the shunted DC current exceeds a second threshold level. As described above, the shunted DC current can be based on the first threshold level, so that the shunting of the AC current can also be based at least indirectly on the first threshold level. In some embodiments, the AC shunt path and the DC shunt path can be separate paths.

[0090] Therefore, according to the present disclosure, method 300 can be used to perform DC shunting and AC shunting. Without departing from the scope of the present disclosure, method 300 can be modified, added or omitted. For example, the operations of method 300 can be implemented in a different order. Additionally or alternatively, two or more operations can be performed simultaneously. In addition, the outlined operations and actions are provided only as examples, and without departing from the essence of the disclosed embodiments, some of the operations and actions may be optional, may be combined into fewer operations and actions, or may be expanded into additional operations and actions. For example, in some embodiments, method 300 can be applied to current signals that are not based on optical signals, so that operations associated with blocks 302 and 304 can be omitted.

[0091] Furthermore, in some embodiments, method 300 may include any number of operations described above with respect to system 100 and system 200. For example, method 300 may include operations related to generating a replica DC input voltage based on the replica current and setting the DC input voltage based on the replica current so that the DC input voltage at the amplifier input node substantially matches the replica DC input voltage. As another example, method 300 may include operations related to activating a DC shunt transistor, an AC shunt transistor, or an AC shunt activation circuit in response to detecting that the current signal exceeds a threshold level. Furthermore, in some embodiments, method 300 may include operations related to filtering the voltage signal using a low pass filter to generate a replica DC output voltage.

[0092] The terms used in this disclosure, and particularly in the appended claims (e.g., the bodies of the appended claims), are generally meant to be “open” terms (e.g., the term “including” should be interpreted as “including but not limited to,” the term “having” should be interpreted as “having at least,” the term “comprising” should be interpreted as “including but not limited to,” etc.).

[0093] Additionally, if a specific number of introduced claim statements is intended, such intent will be expressly recited in the claim, and in the absence of such a statement, no such intent is present. For example, to aid understanding, the appended claims may include the use of the introductory phrases "at least one," "one or more," "at least one of," and "one or more of" to introduce claim statements. However, the use of such phrases should also not be interpreted as implying that the introduction of a claim statement by the indefinite article "a" or "an" limits any particular claim containing such introduced claim statement to embodiments containing only one such statement, even if the claim includes the introductory phrases "one or more" or "at least one" and an indefinite article such as "a" or "an" (e.g., "a" and / or "an" should be interpreted to mean "at least one" or "one or more"); the same applies to definite articles used to introduce claim statements.

[0094] In addition, even if a specific number of an introduced claim statement is explicitly recited, such a statement should be interpreted as meaning at least the recited number (e.g., the unmodified statement "two statements" without other modifiers means at least two statements or two or more statements). Moreover, where idioms like "at least one of A, B, and C, etc." or "one or more of A, B, and C, etc." are used, such constructions are generally intended to include only A, only B, only C, A and B together, A and C together, B and C together, or A, B, and C together, etc.

[0095] In addition, any separated word or phrase representing two or more alternative terms, whether in the specification, claims or drawings, should be understood to contemplate the possibility of including one of the terms, any one of the terms, or both of the terms. For example, the phrase "A or B" should be understood to include the possibility of "A" or "B" or "A and B".

[0096] Additionally, the use of the terms "first," "second," "third," and the like herein is not necessarily used to imply a specific order or number of elements. Typically, the terms "first," "second," "third," and the like are used as general identifiers to distinguish between different elements. In the absence of an indication that the terms "first," "second," "third," and the like imply a specific order, these terms should not be understood to imply a specific order. In addition, in the absence of an indication that the terms "first," "second," "third," and the like imply a specific number of elements, these terms should not be understood to imply a specific number of elements. For example, a first widget may be described as having a first face and a second widget may be described as having a second face. The use of the term "second face" for a second widget may be used to distinguish such a face of the second widget from the "first face" of the first widget, without implying that the second widget has two faces.

[0097] All examples and conditional language stated in the present disclosure are intended to help the reader understand the present disclosure and the teaching objects of the concepts contributed by the inventors to further develop the prior art, and are to be understood as not being limited to such specifically enumerated examples and conditions. Although the embodiments of the present disclosure have been described in detail, various changes, substitutions and variations may be made without departing from the spirit and scope of the present disclosure.

[0098] Invention Concept

[0099] The present invention provides the following inventive concepts:

[0100] 1. An optical receiver, comprising:

[0101] A photodetector, the photodetector being configured to:

[0102] receiving an optical signal;

[0103] converting the optical signal into an electric current signal; and

[0104] outputting the current signal at an amplifier input node;

[0105] an amplifier circuit coupled to the amplifier input node and configured to:

[0106] receiving the current signal at the amplifier input node;

[0107] converting the current signal received at the amplifier input node into a voltage signal; and

[0108] outputting the voltage signal at an amplifier output node; and

[0109] an overdrive circuit coupled to the amplifier input node and configured to:

[0110] receiving a replica DC input voltage at a first overload node, wherein the replica DC input voltage corresponds to a DC input voltage at the amplifier input node;

[0111] receiving a replica DC output voltage at a second overload node, wherein the replica DC output voltage corresponds to a DC output voltage at the amplifier output node;

[0112] detecting that a DC component of the current signal exceeds a first threshold level based on the replicated DC input voltage and the replicated DC output voltage;

[0113] directing a DC current of the current signal through a DC shunt path in response to and based on detecting that the DC component of the current signal exceeds the first threshold level; and

[0114] In response to and based on detecting that the shunted DC current through the DC shunt path exceeds a second threshold level, AC current of the current signal is directed through an AC shunt path that is different from the DC shunt path.

[0115] 2. The optical receiver according to inventive concept 1, wherein the amplifier circuit comprises:

[0116] a replica bias circuit coupled to the first overload node, the replica bias circuit configured to generate the replica DC input voltage based on a replica current; and

[0117] A core amplifier circuit is coupled to the replica bias circuit and the amplifier input node, the core amplifier circuit being configured to set the DC input voltage based on the replica current so that the DC input voltage at the amplifier input node substantially matches the replica DC input voltage.

[0118] 3. An optical receiver according to inventive concept 1, wherein the DC shunt path includes a DC shunt transistor, which is coupled between the amplifier input node and ground, so that the shunted DC current is shunted from the amplifier input node to the ground via the DC shunt transistor.

[0119] 4. An optical receiver according to inventive concept 3, wherein the overload circuit also includes an error amplifier, which is configured to detect that the DC component of the current signal exceeds the first threshold level based on the replica DC input voltage and the replica DC output voltage, wherein the error amplifier includes an error amplifier output, which is coupled to the control terminal of the DC shunt transistor, so that the error amplifier activates the DC shunt transistor in response to detecting that the DC component of the current signal exceeds the first threshold level.

[0120] 5. An optical receiver according to inventive concept 4, wherein the overload circuit further includes an AC shunt activation circuit, which is configured to activate the AC shunt path to shunt the AC current, wherein the AC shunt activation circuit includes a driving transistor configured to drive the AC shunt activation circuit, and wherein the error amplifier output is coupled to the control terminal of the driving transistor, so that the error amplifier controls the activation of the AC shunt path by controlling the voltage at the control terminal of the driving transistor.

[0121] 6. The optical receiver according to inventive concept 1 further includes a low-pass filter coupled between the amplifier output node and the second overload node, the low-pass filter being configured to filter the voltage signal to generate the replica DC output voltage at the second overload node.

[0122] 7. The optical receiver according to Inventive Concept 1, wherein the AC shunt path includes the amplifier input node and the first overload node, so that the AC current is shunted from the amplifier input node to the first overload node.

[0123] 8. The optical receiver according to inventive concept 7, wherein the AC shunt path comprises an AC shunt transistor coupled between the amplifier input node and the first overload node, so that the shunted AC current is transferred to the first overload node through the AC shunt transistor.

[0124] 9. The optical receiver according to inventive concept 8, wherein:

[0125] The overload circuit further includes an AC shunt activation circuit configured to activate the AC shunt transistor;

[0126] The AC shunt activation circuit includes a drive transistor configured to drive the AC shunt activation circuit;

[0127] The overload circuit further includes an error amplifier configured to detect that the current signal exceeds the threshold level based on the replica DC input voltage and the replica DC output voltage; and

[0128] An error amplifier output of the error amplifier is coupled to a control terminal of the drive transistor such that the error amplifier controls activation of the AC shunt transistor by controlling a voltage at the control terminal of the drive transistor.

[0129] 10. An optical receiver according to inventive concept 7, wherein the AC shunt transistor is a first AC shunt transistor, and the AC shunt path includes a second AC shunt transistor, which is coupled between the first overload node and ground, so that the shunted AC current is transferred to the ground via the second AC shunt transistor.

[0130] 11. The optical receiver according to inventive concept 1, wherein the overload circuit is configured such that the DC current guided through the DC shunt path increases in proportion to an increase in the DC component of the current signal.

[0131] 12. A method comprising:

[0132] receiving a current signal at an amplifier input node;

[0133] converting the current signal received at the amplifier input node into a voltage signal;

[0134] outputting the voltage signal at an amplifier output node;

[0135] receiving a replica DC input voltage corresponding to the DC input voltage at the amplifier input node;

[0136] receiving a replica DC output voltage corresponding to the DC output voltage at an output node of the amplifier;

[0137] detecting that a DC component of the current signal exceeds a first threshold level based on the replicated DC input voltage and the replicated DC output voltage;

[0138] directing a DC current of the current signal through a DC shunt path in response to and based on detecting that the DC component of the current signal exceeds the first threshold level; and

[0139] In response to and based on detecting that the shunted DC current through the DC shunt path exceeds a second threshold level, AC current of the current signal is directed through an AC shunt path that is different from the DC shunt path.

[0140] 13. The method according to inventive concept 12 further comprises:

[0141] generating the replicated DC input voltage based on the replicated current; and

[0142] The DC input voltage is set based on the replica current such that the DC input voltage at the amplifier input node substantially matches the replica DC input voltage.

[0143] 14. The method of inventive concept 12, further comprising: activating a DC shunt transistor in response to detecting that the current signal exceeds the threshold level.

[0144] 15. The method of inventive concept 12, further comprising activating an AC shunt transistor in response to detecting that the shunted DC current exceeds the second threshold level.

[0145] 16. The method according to inventive concept 12, further comprising: activating an AC shunt activation circuit in response to detecting that the shunted DC current exceeds the second threshold level, the AC shunt activation circuit being configured to activate the AC shunt path to shunt the AC current.

[0146] 17. The method according to inventive concept 12, further comprising: filtering the voltage signal using a low pass filter to generate the replica DC output voltage.

[0147] 18. A circuit comprising:

[0148] An amplifier circuit, the amplifier circuit being configured to:

[0149] receiving a current signal at an amplifier input node;

[0150] converting the current signal received at the amplifier input node into a voltage signal; and

[0151] outputting the voltage signal at an amplifier output node; and

[0152] an overdrive circuit coupled to the amplifier input node and configured to:

[0153] receiving a replica DC input voltage at a first overload node, wherein the replica DC input voltage corresponds to a DC input voltage at the amplifier input node;

[0154] receiving a replica DC output voltage at a second overload node, wherein the replica DC output voltage corresponds to a DC output voltage at the amplifier output node;

[0155] detecting that a DC component of the current signal exceeds a first threshold level based on the replicated DC input voltage and the replicated DC output voltage;

[0156] directing a DC current of the current signal through a DC shunt path in response to and based on detecting that the DC component of the current signal exceeds the first threshold level; and

[0157] In response to and based on detecting that the shunted DC current through the DC shunt path exceeds a second threshold level, AC current of the current signal is directed through an AC shunt path that is different from the DC shunt path.

[0158] 19. The circuit according to inventive concept 18, wherein the DC shunt path includes a DC shunt transistor, which is coupled between the amplifier input node and ground, so that the shunted DC current is shunted from the amplifier input node to the ground via the DC shunt transistor.

[0159] 20. A circuit according to inventive concept 19, wherein the overload circuit further comprises an error amplifier, wherein the error amplifier is configured to detect that the current signal exceeds the threshold level based on the replica DC input voltage and the replica DC output voltage, wherein the error amplifier comprises an error amplifier output, wherein the error amplifier output is coupled to a control terminal of the DC shunt transistor, such that the error amplifier activates the DC shunt transistor in response to detecting that the current signal exceeds the threshold level.

[0160] 21. A circuit according to inventive concept 20, wherein the overload circuit further includes an AC shunt activation circuit, which is configured to activate the AC shunt path to shunt the AC current, wherein the AC shunt activation circuit includes a driving transistor configured to drive the AC shunt activation circuit, and wherein the error amplifier output is coupled to the control terminal of the driving transistor, so that the error amplifier controls the activation of the AC shunt path by controlling the voltage at the control terminal of the driving transistor.

Claims

1. An optical receiver, comprising: a photodetector configured to receive a light signal and convert the light signal into a current signal; as well as an overload circuit configured to direct a DC current of the current signal through a DC shunt path if a DC component of the current signal exceeds a first threshold level; and directing the AC current of the current signal through an AC shunt path if the shunted DC current through the DC shunt path exceeds a second threshold level, Wherein, it is detected that the DC component of the current signal exceeds the first threshold level based on the replica DC input voltage and the replica DC output voltage.

2. The optical receiver according to claim 1, wherein The photodetector is configured to output the current signal at an amplifier input node, the optical receiver further comprising an amplifier circuit coupled to the amplifier input node and configured to: receiving the current signal at the amplifier input node; converting the current signal received at the amplifier input node into a voltage signal; and The voltage signal is output at an amplifier output node.

3. The optical receiver according to claim 2, wherein: The overdrive circuit is coupled to the amplifier input node, and the overdrive circuit is configured to: receiving the replica DC input voltage at a first overload node, wherein the replica DC input voltage corresponds to a DC input voltage at the amplifier input node; and receiving the replica DC output voltage at a second overload node, wherein the replica DC output voltage corresponds to the DC output voltage at the amplifier output node, The replica DC input voltage is electrically coupled to the base of the DC shunt transistor.

4. The optical receiver according to claim 3, wherein: The amplifier circuit comprises: a replica bias circuit coupled to the first overload node, the replica bias circuit configured to generate the replica DC input voltage based on a replica current; and A core amplifier circuit is coupled to the replica bias circuit and the amplifier input node, the core amplifier circuit being configured to set the DC input voltage based on the replica current so that the DC input voltage at the amplifier input node substantially matches the replica DC input voltage.

5. The optical receiver according to claim 1, wherein The DC shunt path includes a DC shunt transistor configured to shunt the DC current.

6. The optical receiver according to claim 1, wherein The overload circuit comprises: an error amplifier configured to detect that the DC component of the current signal exceeds the first threshold level and to activate a DC shunt transistor in response to detecting that the DC component of the current signal exceeds the first threshold level; and An AC shunt activation circuit is configured to activate the AC shunt path to shunt the AC current, wherein the AC shunt activation circuit includes a drive transistor configured to drive the AC shunt activation circuit, and wherein an error amplifier output is coupled to a control terminal of the drive transistor so that the error amplifier controls the activation of the AC shunt path by controlling the voltage at the control terminal of the drive transistor. 7 . The optical receiver of claim 1 , further comprising a low pass filter configured to filter a voltage signal to generate the replica DC output voltage.

8. The optical receiver according to claim 1, wherein The AC shunt path includes an AC shunt transistor configured to shunt AC current.

9. The optical receiver according to claim 8, wherein: The overload circuit further comprises: an AC shunt activation circuit configured to activate the AC shunt transistor, the AC shunt activation circuit comprising a drive transistor configured to drive the AC shunt activation circuit; and an error amplifier configured to detect that the current signal exceeds the first threshold level based on the replica DC input voltage and the replica DC output voltage, wherein an error amplifier output of the error amplifier is coupled to a control terminal of the drive transistor such that the error amplifier controls activation of the AC shunt transistor by controlling a voltage at the control terminal of the drive transistor.

10. The optical receiver according to claim 8, wherein The AC shunt transistor is a first AC shunt transistor, and the AC shunt path includes a second AC shunt transistor.

11. The optical receiver according to claim 1, wherein The overload circuit is configured such that the DC current directed through the DC shunt path increases in proportion to an increase in the DC component of the current signal.

12. The optical receiver of claim 1, further comprising an amplifier circuit, wherein: The replica DC input voltage corresponds to a DC voltage input to the amplifier circuit.

13. The optical receiver of claim 12, further comprising a replica bias circuit, wherein: The replica bias circuit includes a current source, and The replica bias circuit is configured to generate the replica DC input voltage.

14. A method for dividing a DC current and an AC current, comprising: receiving an optical signal and converting the optical signal into an electric current signal; directing a DC current of the current signal through a DC shunt path in response to and based on detecting that a DC component of the current signal exceeds a first threshold level, wherein the DC component of the current signal exceeding the first threshold level is detected based on a replicated DC input voltage and a replicated DC output voltage; and The AC current of the current signal is directed through an AC shunt path in response to and based on detecting that the shunted DC current through the DC shunt path exceeds a second threshold level, wherein the AC shunt path is different from the DC shunt path.

15. The method according to claim 14, further comprising: converting the current signal received at the amplifier input node into a voltage signal; outputting the voltage signal at an amplifier output node; receiving the replica DC input voltage corresponding to the DC input voltage at the amplifier input node; as well as The replica DC output voltage corresponding to the DC output voltage is received at the amplifier output node.

16. The method according to claim 15, further comprising: generating the replicated DC input voltage based on the replicated current; as well as The DC input voltage is set based on the replica current such that the DC input voltage at the amplifier input node substantially matches the replica DC input voltage.

17. The method according to claim 14, further comprising: activating a DC shunt transistor in response to detecting that the current signal exceeds the first threshold level; and activating an AC shunt transistor in response to detecting that the shunted DC current exceeds the second threshold level.

18. The method according to claim 14, further comprising: The voltage signal is filtered using a low pass filter to generate the replica DC output voltage.

19. A circuit, the circuit comprising an overload circuit, the overload circuit being configured to: directing a DC current of the current signal through a DC shunt path in response to and based on detecting that a DC component of the current signal exceeds a first threshold level, wherein: detecting that the DC component of the current signal exceeds the first threshold level based on a replicated DC input voltage and a replicated DC output voltage; as well as The AC current of the current signal is directed through an AC shunt path in response to and based on detecting that the shunted DC current through the DC shunt path exceeds a second threshold level, wherein the AC shunt path is different from the DC shunt path.

20. The circuit of claim 19, further comprising an amplifier circuit coupled to the overdrive circuit, the amplifier circuit being configured to: receiving a current signal at an amplifier input node; converting the current signal received at the amplifier input node into a voltage signal; and The voltage signal is output at an amplifier output node.

21. The circuit of claim 20, wherein: The overload circuit is further configured to: receiving the replica DC input voltage at a first overload node, wherein the replica DC input voltage corresponds to a DC input voltage at the amplifier input node; and receiving the replica DC output voltage at a second overload node, wherein the replica DC output voltage corresponds to the DC output voltage at the amplifier output node, The replica DC input voltage is electrically coupled to the base of the DC shunt transistor.

22. The circuit of claim 21, wherein: The overload circuit further comprises: an error amplifier configured to detect that the current signal exceeds the first threshold level based on the replica DC input voltage and the replica DC output voltage, wherein the error amplifier includes an error amplifier output coupled to a control terminal of the DC shunt transistor such that the error amplifier activates the DC shunt transistor in response to detecting that the current signal exceeds the first threshold level; and An AC shunt activation circuit is configured to activate the AC shunt path to shunt the AC current, wherein the AC shunt activation circuit includes a drive transistor configured to drive the AC shunt activation circuit, and wherein the error amplifier output is coupled to a control terminal of the drive transistor so that the error amplifier controls the activation of the AC shunt path by controlling the voltage at the control terminal of the drive transistor.

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