Symmetric intra block copy mode

Abstract

A symmetric intra block copy mode is described. Systems, methods, and apparatuses for encoding, decoding, or transcoding digital video are described. An example method of video processing includes performing a conversion between a video block of a video that includes two or more color component blocks and a bitstream representation of the video. The two or more color component blocks are coded according to a coding rule using a plurality of prediction methods, at least one of the plurality of prediction methods being a symmetric intra block copy (SIBC) method.

Description

Technical Field

[0001] This patent document relates to digital video encoding and decoding technologies, including video encoding, transcoding, or decoding. Background Technology

[0002] Digital video accounts for the largest share of bandwidth usage on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, the bandwidth demand for digital video is expected to continue to grow. Summary of the Invention

[0003] This document discloses techniques that can be used by video encoders and decoders for processing the encoded and decoded representation of video or images according to file formats.

[0004] In one example aspect, a video processing method is disclosed. The method includes: performing a conversion between a video block comprising two or more color component blocks and a bitstream representation of the video; wherein, according to encoding and decoding rules, the two or more color component blocks are encoded and decoded using multiple prediction methods, at least one of which is a Symmetric Intra Block Copy (SIBC) method.

[0005] In another example, a different video processing method is disclosed. This method includes: for a conversion between a video block comprising one or more color component blocks and a codec representation of the video, determining whether to use a Symmetric Intra-Block Copy (SIBC) method to encode and decode the color component blocks of the video block according to codec rules; and performing the conversion based on that determination.

[0006] In another example, a different video processing method is disclosed. This method includes performing a conversion between a video block comprising one or more color component blocks and a bitstream representation of the video, wherein the bitstream representation conforms to a format rule specifying whether and how the color component blocks of the video block are encoded and decoded in the bitstream representation.

[0007] In yet another example, a video encoder apparatus is disclosed. This video encoder includes a processor configured to implement the methods described above.

[0008] In yet another example, a video decoder apparatus is disclosed. This video decoder includes a processor configured to implement the methods described above.

[0009] In yet another example, a computer-readable medium on which code is stored is disclosed. This code embodies one of the methods described herein in the form of processor-executable code.

[0010] In yet another example, a computer-readable medium on which a bitstream is stored is disclosed. This bitstream is generated or processed using the methods described in this document.

[0011] These and other features are described throughout this document. Attached Figure Description

[0012] Figure 1 This is a block diagram of an example video processing system.

[0013] Figure 2 This is a block diagram of a video processing device.

[0014] Figure 3 This is a flowchart of an example method for video processing.

[0015] Figure 4 This is a block diagram illustrating a video encoding / decoding system according to some embodiments of the present disclosure.

[0016] Figure 5 This is a block diagram illustrating an encoder according to some embodiments of the present disclosure.

[0017] Figure 6 This is a block diagram illustrating a decoder according to some embodiments of the present disclosure.

[0018] Figure 7 This is a block diagram of a video encoder. Detailed Implementation

[0019] For ease of understanding, chapter headings are used in this document, and the applicability of the techniques and embodiments disclosed in each chapter is not limited to that chapter. Furthermore, the use of H.266 terminology in some descriptions is merely for ease of understanding and not to limit the scope of the disclosed techniques. Thus, the techniques described herein are also applicable to other video codec protocols and designs. In this document, editable changes to text are indicated by strikethrough indicating deleted text and highlighting (including bold and italics) indicating added text, relative to the current draft of the VVC specification.

[0020] 1. Preliminary Discussion

[0021] This document relates to video codec technology. Specifically, it covers transform skipping modes and transform types (including identity transforms) in video codecs. It can be applied to existing video codec standards, such as HEVC, or pending standards (General Video Codec). It can also be applied to future video codec standards or codecs.

[0022] 2. Video Encoding and Decoding Basics

[0023] Video codec standards have primarily evolved through the development of well-known ITU-T and ISO / IEC standards. ITU-T developed H.261 and H.263, while ISO / IEC developed MPEG-1 and MPEG-4 Vision. The two organizations jointly developed the H.262 / MPEG-2 Video, H.264 / MPEG-4 Advanced Video Coding (AVC), and H.265 / HEVC standards. Since H.262, video codec standards have been based on a hybrid video codec architecture, employing temporal prediction plus transform coding. To explore future video codec technologies beyond HEVC, VCEG and MPEG jointly established the Joint Video Exploration Team (JVET) in 2015. Since then, JVET has adopted many new methods and applied them to reference software called the Joint Exploration Model (JEM). In April 2018, a Joint Video Expert Team (JVET) was created between VCEG (Q6 / 16) and ISO / IEC JTC1 SC29 / WG11 (MPEG) to study the VVC standard with the goal of achieving a 50% bitrate reduction compared to HEVC.

[0024] The latest version of the VVC draft, namely Universal Video Codec (Draft 10), can be found at the following URL:

[0025] http: / / phenix.it-sudparis.eu / jvet / doc_end_user / current_document.php?id=10399

[0026] The latest reference software for VVC, called VTM, can be found at the following website:

[0027] https: / / vcgit.hhi.fraunhofer.de / jvet / VVCSoftware_VTM / - / tags / VTM-10.0

[0028] 2.1. Encoding and decoding process of a typical video codec

[0029] Figure 7An example of a VVC encoder block diagram is shown, which includes three in-loop filtering blocks: a deblocking filter (DF), a Sample Adaptive Offset (SAO), and an ALF. Unlike the DF, which uses predefined filters, the SAO and ALF utilize the original samples of the current image to reduce the mean square error between the original and reconstructed samples by adding an offset and applying a finite impulse response (FIR) filter, respectively, by signaling information about the offset and filter coefficients from the encoding / decoding side. The ALF is located at the final processing stage of each image and can be viewed as a tool to attempt to capture and repair artifacts generated in previous stages.

[0030] 3. Examples of technical problems solved by publicly disclosed technical solutions

[0031] The current design of IBC has the following problems:

[0032] 1. Because many text characters and computer-generated graphics are symmetrical, symmetry can be observed more frequently in images of screen content. Encoding and decoding a pattern and its symmetrical image independently is redundant.

[0033] 4. Example Implementations and Solutions

[0034] The following list should be considered as examples for explaining general inventive concepts. These items should not be interpreted narrowly. Furthermore, these items can be combined in any way.

[0035] min(x, y) returns the smaller of x and y.

[0036] max(x, y) returns the larger of x and y.

[0037] Symmetric / Mirror Intra-Block Copying

[0038] Before using the IBC reference block to predict the current block, it is proposed to first determine whether the IBC reference block is horizontally flipped or vertically flipped, or to refine it through other transformation methods (such as clockwise or counterclockwise rotation). This method is called "symmetric IBC".

[0039] A "block" can be a transform unit (TU), prediction unit (PU), coding unit (CU), transform block (TB), prediction block (PB), coding block (CB), or other video units covering multiple samples / pixels. A TU / PU / CU can include one or more color components, such as having only a luma component for two-tree segmentation and the current coding color component being luma; having two chroma components for two-tree segmentation and the current coding color component being chroma; or having three color components for single-tree segmentation.

[0040] In the following disclosure, W and H represent the width and height of the block mentioned, or the width and height of the block mentioned in a particular color component (e.g., the brightness of the three color components CU).

[0041] 1. A method is proposed to use multiple prediction methods for a block, wherein at least one of the multiple prediction methods is SIBC.

[0042] a. In one example, SIBC is used for the luma block, while intra-frame prediction is applied for the other two color components.

[0043] b. In one example, SIBC is used for the luma block, while inter-frame prediction is applied for the other two color components.

[0044] c. In one example, SIBC is used for the luminance block, while the palette prediction method is applied for the other two color components.

[0045] d. In one example, SIBC is used for the luma block, while predictions from the reconstructed luma block are applied for the other two color components.

[0046] Implicit signaling notification using SIBC

[0047] 2. The determination of whether to use SIBC for the first block can depend on the color components of the first block.

[0048] a. For example, SIBC can be applied to the first component of the first block (e.g., luma), while normal intra-frame prediction is always used for the second component of the first block (e.g., Cb or Cr).

[0049] b. For example, SIBC can be applied to all color components of the first block.

[0050] 3. The determination of whether to use SIBC for the first block can depend on the dimensions of the first block.

[0051] a. SIBC applies only when W>=T1 and H>=T2. For example, T1=T2=4.

[0052] b. SIBC applies only when W <= T1 and H <= T2. For example, T1 = T2 = 16.

[0053] c. SIBC only applies when max(W, H) <= T1. For example, T1 = 16.

[0054] d. SIBC only applies when min(W, H) <= T1. For example, T1 = 4.

[0055] e. SIBC only applies when W*H >= T1. For example, T1 = 16.

[0056] f. SIBC only applies when W*H <= T1. For example, T1 = 256.

[0057] g. SIBC only applies when max(W, H) / min(W, H) <= T1. For example, T1 = 1 or T1 = 2.

[0058] h. In the bullet points above, ">=" can be replaced by ">", and "<=" can be replaced by "<".

[0059] 4. The determination of whether to use SIBC may further depend on the encoding / decoding information of the current block.

[0060] a. In one example, this determination may further depend on block vector (BV) information.

[0061] i. In one example, if BVy is zero, then the vertical SIBC will not be applied to the current block.

[0062] ii. In one example, if BVx is zero, then the level SIBC is not applied to the current block.

[0063] b. In one example, whether SIBC is applied may depend on the ABVR precision of the IBC codec block.

[0064] i. In one example, SIBC applies only when the ABVR precision is equal to one or more specific values. For example, SIBC applies only when the ABVR precision is equal to 1 pixel.

[0065] c. In one example, this determination may further depend on the block location within the strip / piece / image / sub-image.

[0066] i. In one example, if the block is located at the image boundary, SIBC can be disabled.

[0067] Explicit signaling notification using SIBC

[0068] 5. Multi-level signaling notifications of SIBC can be used to indicate whether and / or how to apply them, where one signaling notification is at a higher level (e.g., at which more sample points are included compared to a block) and one signaling notification is at a lower level (e.g., at the block level).

[0069] a. In one example, the first higher level is the sequence level, and the second higher level is the image level.

[0070] i. Optionally, in addition, the third higher level is the strip level.

[0071] ii. Alternatively, the lower level is the block level.

[0072] b. In one example, the first higher level is the image level, and the second higher level is the strip level.

[0073] i. Optionally, the lower level is also the block level.

[0074] c. Optionally, furthermore, higher-level instructions can be conditionally signaled, for example, depending on whether IBC is enabled.

[0075] d. In one example, information on how to apply SIBCs may include whether an SIBC (e.g., a horizontal SIBC or a vertical SIBC) is suitable for a video unit (e.g., a sequence, a picture, or a strip).

[0076] e. In one example, is it possible to apply SIBC to blocks that can be signaled in higher-level units, such as in SPS / sequence header / PPS / picture header / strip header?

[0077] i. For example, a signaling notification sibc_enable_flag can be included in the sequence header to indicate whether SIBC can be applied to the sequence.

[0078] 1) Signaling can only be used to notify sibc_enable_flag if IBC is allowed for the sequence (e.g., ibc_enable_flag equals 1).

[0079] 6. Information regarding whether SIBC is used for the first block (represented as SIBC_flag) can be conditionally signaled.

[0080] a. If SIBC_flag is not present in the bitstream, it is assumed that SIBC_flag is the default value, such as 0.

[0081] b. SIBC_flag is only signaled when IBC is used for the first time.

[0082] c. Signaling is only used to notify SIBC_flag when a higher-level unit including the first block indicates that SIBC is allowed.

[0083] d. If it is determined that SIBC is not applicable to the block, no signaling is sent to SIBC_flag.

[0084] e. Whether to signal to SIBC_flag can depend on the dimensions of the first block.

[0085] i. Signaling is only used to notify SIBC_flag when W>=T1 and H>=T2. For example, T1=T2=4.

[0086] ii. Signaling to SIBC_flag is only required when W <= T1 and H <= T2. For example, T1 = T2 = 16.

[0087] iii. SIBC_flag is only notified when max(W, H) <= T1. For example, T1 = 16.

[0088] iv. SIBC_flag is only notified when min(W, H) <= T1. For example, T1 = 4.

[0089] v. Signaling is only sent to SIBC_flag when W*H >= T1. For example, T1 = 16.

[0090] vi. Signaling is only used to notify SIBC_flag when W*H <= T1. For example, T1 = 256.

[0091] vii. SIBC only applies when max(W, H) / min(W, H) <= T1. For example, T1 = 1 or T1 = 2.

[0092] viii. In the bullet points above, ">=" can be replaced by ">", and "<=" can be replaced by "<".

[0093] 7. After the first syntax element of the block (represented as SIBC_flag), a second syntax element (represented as sibc_dir_flag) can be signaled to indicate which SIBC to use.

[0094] a. In one example, SIBC_flag indicates whether SIBC is applied to the block.

[0095] b.sibc_dir_flag indicates which SIBC to use.

[0096] i. For example, sibc_dir_flag=0 means using a horizontal SIBC, and sibc_dir_flag=1 means using a vertical SIBC.

[0097] c.sibc_dir_flag is conditionally signaled by SIBC_flag.

[0098] i. Signaling is only sent to sibc_dir_flag when SIBC_flag indicates that SIBC is used.

[0099] d. sibc_dir_flag and / or SIBC_flag can be encoded and decoded using arithmetic encoding and decoding.

[0100] i.sibc_dir_flag and / or SIBC_flag can be bypassed for encoding and decoding.

[0101] ii. One or more contexts can be used to encode and decode sibc_dir_flag and / or SIBC_flag.

[0102] 1) The context used to encode and decode the SIBC_flag of the current block can depend on the SIBC_flag of neighboring blocks.

[0103] 2) The context used to encode and decode the current block's sibc_dir_flag can depend on the sibc_dir_flag of neighboring blocks.

[0104] 3) Context can be inferred based on block dimensions.

[0105] 4) The context can be deduced based on the encoding and decoding information of neighboring blocks.

[0106] e. If it is determined that only one SIBC is applicable, no signaling is sent to sibc_dir_flag.

[0107] f. Optionally, the applicable SIBC is not notified by signaling, but is dynamically deduced.

[0108] 8. Information about whether SIBC is used for the first block and, if so, which SIBC (represented as SIBC_type_idx) is used can be signaled using non-binary syntax elements.

[0109] a. In one example, the original IBC (i.e., without any transformation) is further regarded as a new transformation (e.g., NON_TRANSFORM) type of the SIBC mode.

[0110] b. In one example, non-binary syntax elements can be binaryized into binary strings with truncated unary, unary, fixed-length, K-order exponential Golomb, etc.

[0111] i. Optionally, in addition, at least one bit is context-coded and at least another bit is bypass-coded.

[0112] ii. Alternatively, the same context may be used for at least two bits.

[0113] iii. Alternatively, for at least two bits in a binary string, different contexts may be used.

[0114] iv. Context can be inferred based on block dimensions.

[0115] v. The context can be inferred based on the encoding and decoding information of neighboring blocks.

[0116] c. In one example, when a non-binary grammar element is equal to K (e.g., K = 0), SIBC is disabled, and the original IBC design is used (i.e., without any transformations).

[0117] i. Optionally, SIBC is also enabled when a non-binary grammar element is not equal to K.

[0118] ii. Optionally, in addition, when a non-binary grammar element is not equal to K but is equal to L, the Lth transformation of the SIBC method is applied.

[0119] d. In one example, SIBC is disabled when the first bit of a non-binary syntax element is equal to K (e.g., K = 0), and the original IBC design is used (i.e., without any transformation).

[0120] i. Optionally, SIBC is enabled when the first binary bit is not equal to K.

[0121] e. In one example, the mapping between the decoded value of a non-binary syntax element and its conversion type can be fixed.

[0122] i. Optionally, the mapping can be determined dynamically.

[0123] 5. Examples

[0124] 5.1. Example #1

[0125] This section presents an example of a solution for the Implicit Selection of Transform Skip (ISTS) mode. Essentially, it follows the design principles of the Implicit Selection of Transform (IST) mode adopted by AVS3. A high-level flag is signaled in the image header to indicate that ISTS is enabled. If ISTS is enabled, the allowed transform set is set to {DCT-II TS}, and the TS mode is determined based on the parity of the number of non-zero coefficients in the block. Simulation results show that, compared to HPM6.0, the proposed ISTS achieves a bit rate reduction of 15.86% and 12.79% for screen content encoding and decoding in AI and RA configurations, respectively. It can be asserted that the increase in encoder and decoder complexity is negligible.

[0126] 5.1.2. The proposed method

[0127] In this contribution, SIBC is proposed. A signaling notification flag is included in each IBC codec and high-precision ABVR CU to indicate whether the prediction mode of the current CU is symmetrical, and the CU size is in the range of 4×4 to 32×32. 0 indicates normal IBC mode, and 1 indicates SIBC mode. When SIBC is applied, an additional 1-bit flag is signaled to indicate whether horizontal or vertical flipping is used. After horizontal flipping, the sample value represented as S(x,y) at coordinates (x,y) is derived as follows:

[0128] S(x,y)=S'(W-1-x,y), (1)

[0129] Where S' represents the sample value before flipping, and W represents the block width. Similarly, after vertical flipping, the sample value denoted as S(x, y) is derived as follows:

[0130] S(x, y)=S'(x, H-1-y), (1)

[0131] Where H represents the block height.

[0132] 5.1.3. Proposed Modifications to the Syntax Table, Semantics, and Decoding Process

[0133] New changes to the syntax table, semantics, and decoding process Bold underline Highlight and delete text using mark.

[0134] 7.1.2.2 Sequence Header

[0135] Table 14 Sequence Header Definitions

[0136]

[0137] 7.1.6 Encoding / Decoding Unit

[0138] Table 15 Definition of Encoding / Decoding Unit

[0139]

[0140]

[0141] 7.2.2.2 Sequence Header

[0142] The symmetric intra-block copy prediction enable flag, sibc_enable_flag, is a binary variable. A value of '1' indicates that prediction is allowed. The symmetric intra-block copy prediction method is used; a value of '0' indicates that the symmetric intra-block copy prediction method is not used. The value of SibcEnableFlag is equal to sibc_enable_flag. If the flag sibc_enable_ does not exist in the bitstream... If the flag is not specified, then the value of SibcEnableFlag is 0.

[0143] 7.2.6 Encoding / Decoding Unit

[0144] The symmetric intra-block copy mode flag sibc_flag is a binary variable. A value of '1' indicates that the current codec unit is using... Use symmetric intra-block copy prediction mode; a value of '0' indicates that the current codec unit is not using symmetric intra-block copy prediction. The SibcFlag value is equal to sibc_flag. If sibc_flag does not exist in the bitstream, then the SibcFlag value is equal to... 0。

[0145] The symmetric intra-block copy mode direction flag sibc_dir_flag is a binary variable. A value of '1' indicates the current encoding / decoding mode. The code unit uses the vertically symmetric intra-block copy prediction mode; a value of '0' indicates that the current codec unit uses the horizontally symmetric intra-block copy prediction mode. Intra-block copy prediction mode. The value of SibcDirFlag is equal to sibc_dir_flag. If sibc_dir_ does not exist in the bitstream... If the flag is not set, then the value of SibcDirFlag is equal to 0.

[0146] 8.3.3.2 Derivation of the Binary Symbolic Model

[0147] 8.3.3.2.1 Derivation of the Binary Symbolic Model

[0148] Table 61 shows the ctxIdxStart and ctxIdxInc syntax elements.

[0149] Syntax elements ctxIdxInc ctxIdxStart Number of ctx abvr_index binIdx 109 2 sbic_flag 0 111 1 sibc_dir_flag 0 112 1

[0150] 9.8 Symmetric / Mirror Intra-Block Copy Prediction

[0151] 9.8.2 Derivation of Predicted Sample Points

[0152] If the current prediction block is a brightness prediction block, let the position of the top-left sample point of the current prediction block in the brightness sample point matrix of the current image be (xE, yE), and then perform the following operations: 1. When SibcFlag is 0, The value of the element predMatrixIbc[x][y] in the brightness prediction sample matrix predMatrixIbc is the sample value at position (((xE+x))+BvE_x>>2,(yE+y))+BvE_y>>2))) in the integer pixel precision brightness sample matrix of the current image before filtering reconstruction. Here, BvE_x and BvE_y are the horizontal and vertical components of the current prediction unit block vector BvE, respectively. 2. SibcFlag is 1 and When SibcDirFlag is 0, the value of the element predMatrixIbc[x][y] in the luminance prediction sample matrix predMatrixIbc is... The position of the integer-pixel precision luminance sample point matrix in the current image's unfiltered reconstruction is (((xE+W-1-x))+BvE_x>>2, The sample values ​​of (yE+y))+BvE_y>>2))) are given. Where W is the width of the brightness prediction sample matrix. 3. SibcFlag is 1 and When SibcDirFlag is 1, the value of the element predMatrixIbc[x][y] in the luminance prediction sample matrix predMatrixIbc is... The position of the integer pixel precision luminance sample point in the unfiltered reconstructed matrix of the current image is (((xE+x))+BvE_x>>2,(yE+H- The sample values ​​of 1-y))+BvE_y>>2))) are given. Where H is the height of the brightness prediction sample matrix.

[0153] If the current prediction block is a chroma prediction block, denote the position (xE, yE) of the top-left corner sample of the luminance prediction block containing the top-left corner sample of the current prediction block in the luminance sample matrix of the current image, and perform the following operations: 1. SibcFlag is 0 hour, The value of the element `predMatrixIBc[x][y]` in the chroma prediction sample matrix `predMatrixIbc` is the sample value at position (((xE+2×x))+BvC_x>>2,(yE+2×y))+BvC_y>>2))) in the 1 / 2 precision chroma sample matrix of the current image before filtering and reconstruction. Here, `BvC_x` and `BvC_y` are the horizontal and vertical components of the block vector `BvE`, which contains the spatial motion information storage unit of the sample at the lower right corner of the current prediction block, respectively. The element values ​​at each position in the 1 / 2 precision chroma sample matrix of the reference image are obtained through interpolation. 2. When SibcFlag is 1 and SibcDirFlag is 0, the chromaticity prediction sample matrix The value of the element predMatrixIBc[x][y] in predMatrixIbc is the half-precision chromaticity of the current image before filtering and reconstruction. The sample values ​​at positions (((xE+2×(W-1-x)))+BvC_x>>2,(yE+2×y))+BvC_y>>2))) in the sample matrix. In the diagram, W represents the width of the chromaticity prediction sample matrix. 3. When SibcFlag is 1 and SibcDirFlag is 1, the chromaticity prediction sample matrix... The value of the element predMatrixIBc[x][y] in predMatrixIbc is the half-precision chromaticity of the current image before filtering and reconstruction. The sample values ​​at positions (((xE+2×x))+BvC_x>>2,(yE+2×(H-1-y)))+BvC_y>>2))) in the sample matrix. H represents the height of the chromaticity prediction sample matrix.

[0154] Figure 1 This is a block diagram illustrating an example video processing system 1900 in which various techniques disclosed herein may be implemented. Various implementations may include some or all of the components of system 1900. System 1900 may include an input 1902 for receiving video content. The video content may be received in a raw or uncompressed format, such as 8 or 10-bit multi-component pixel values, or it may be in a compressed or encoded format. Input 1902 may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interfaces include wired interfaces such as Ethernet, Passive Optical Network (PON), etc., and wireless interfaces such as Wi-Fi or cellular interfaces.

[0155] System 1900 may include a codec component 1904 capable of implementing the various codec or encoding methods described in this document. Codec component 1904 can reduce the average bit rate of the video from input 1902 to the output of codec component 1904 to produce a codec representation of the video. Codec techniques are therefore sometimes referred to as video compression or video transcoding techniques. The output of codec component 1904 may be stored or transmitted via a communication connection, as represented by component 1906. The bitstream (or codec) representation of the video received at input 1902, whether stored or communicated, can be used by component 1908 to generate pixel values ​​or transmit as displayable video to display interface 1910. The process of generating user-visible video from the bitstream representation is sometimes referred to as video decompression. Furthermore, although some video processing operations are referred to as “codec” operations or tools, it will be understood that codec tools or operations are used at the encoder, and the corresponding decoding tools or operations that inversely represent the codec results will be performed by the decoder.

[0156] Examples of peripheral bus interfaces or display interfaces may include Universal Serial Bus (USB), High Definition Multimedia Interface (HDMI), or DisplayPort. Examples of storage interfaces include SATA (Serial Advanced Technology Attachment), PCI, IDE, etc. The technologies described in this document can be found in a variety of electronic devices, such as mobile phones, laptops, smartphones, or other devices capable of performing digital data processing and / or video display.

[0157] Figure 2 This is a block diagram of a video processing apparatus 3600. Apparatus 3600 can be used to implement one or more methods described herein. Apparatus 3600 can be embodied in a smartphone, tablet, computer, Internet of Things (IoT) receiver, etc. Apparatus 3600 may include one or more processors 3602, one or more memories 3604, and video processing hardware 3606. The processors(multiple) 3602 may be configured to implement one or more methods described herein. The memories(multiple) 604 may be used to store data and code for implementing the methods and techniques described herein. The video processing hardware 606 may be used to implement some of the techniques described herein in a hardware circuit system. In some embodiments, the video processing hardware 3606 may be at least partially included in the processor 3602 (e.g., a graphics coprocessor).

[0158] Figure 4 This is a block diagram illustrating an example video codec system 100 that can utilize the techniques disclosed herein.

[0159] like Figure 4 As shown, the video encoding / decoding system 100 may include a source device 110 and a target device 120. The source device 110 generates encoded video data, and this source device 110 may be referred to as a video encoding device. The target device 120 can decode the encoded video data generated by the source device 110, and the target device 120 may be referred to as a video decoding device.

[0160] The source device 110 may include a video source 112, a video encoder 114, and an input / output (I / O) interface 116.

[0161] Video source 112 may include sources such as video capture devices, interfaces for receiving video data from video content providers, and / or computer graphics systems for generating video data, or combinations of these sources. Video data may include one or more pictures. Video encoder 114 encodes the video data from video source 112 to generate a bitstream. The bitstream may include a sequence of bits forming a codec representation of the video data. The bitstream may include codec pictures and related data. A codec picture is a codec representation of a picture. Related data may include sequence parameter sets, picture parameter sets, and other syntax structures. I / O interface 116 may include a modulator / demodulator (modem) and / or a transmitter. Encoded video data may be transmitted directly to target device 120 via I / O interface 116 through network 130a. Encoded video data may also be stored on storage medium / server 130b for access by target device 120.

[0162] The target device 120 may include an I / O interface 126, a video decoder 124, and a display device 122.

[0163] I / O interface 126 may include a receiver and / or a modem. I / O interface 126 may acquire encoded video data from source device 110 or storage medium / server 130b. Video decoder 124 may decode the encoded video data. Display device 122 may display the decoded video data to a user. Display device 122 may be integrated with target device 120 or may be external to target device 120 configured to interface with an external display device.

[0164] The video encoder 114 and the video decoder 124 can operate according to video compression standards, such as the High Efficiency Video Codec (HEVC) standard, the Universal Video Codec (VVM) standard, and other current and / or additional standards.

[0165] Figure 5 This is a block diagram illustrating an example of a video encoder 200, which can be... Figure 4The video encoder 114 in the system 100 shown.

[0166] The video encoder 200 can be configured to perform any or all of the technologies disclosed herein. Figure 5 In the example, the video encoder 200 includes multiple functional components. The techniques described in this disclosure can be shared among the various components of the video encoder 200. In some examples, the processor can be configured to perform any or all of the techniques described in this disclosure.

[0167] The functional components of the video encoder 200 may include a segmentation unit 201, a prediction unit 202 (which may include a mode selection unit 203, a motion estimation unit 204, a motion compensation unit 205, and an intra-frame prediction unit 206), a residual generation unit 207, a transform unit 208, a quantization unit 209, an inverse quantization unit 210, an inverse transform unit 211, a reconstruction unit 212, a buffer 213, and an entropy coding unit 214.

[0168] In other examples, the video encoder 200 may include more, fewer, or different functional components. In one example, the prediction unit 202 may include an intra-block copy (IBC) unit. The IBC unit can perform prediction in IBC mode, where at least one reference picture is the picture containing the current video block.

[0169] Furthermore, some components, such as the motion estimation unit 204 and the motion compensation unit 205, can be highly integrated, but for illustrative purposes, in Figure 5 The examples are shown separately.

[0170] The segmentation unit 201 can segment an image into one or more video blocks. The video encoder 200 and the video decoder 300 can support various video block sizes.

[0171] The mode selection unit 203 can select one of the encoding / decoding modes (e.g., intra-frame or inter-frame) based on the error result, and provide the resulting intra-frame or inter-frame codec block to the residual generation unit 207 to generate residual block data, and to the reconstruction unit 212 to reconstruct the coded block for use as a reference picture. In some examples, the mode selection unit 203 can select a combination of intra-frame and inter-frame prediction modes (CIIP), where the prediction is based on the inter-frame prediction signal and the intra-frame prediction signal. In the case of inter-frame prediction, the mode selection unit 203 can also select the resolution of the block's motion vector (e.g., sub-pixel or integer pixel precision).

[0172] To perform inter-frame prediction on the current video block, motion estimation unit 204 can generate motion information for the current video block by comparing one or more reference frames from buffer 213 with the current video block. Motion compensation unit 205 can determine the predicted video block for the current video block based on the motion information and decoded samples of images from buffer 213 other than the image associated with the current video block.

[0173] The motion estimation unit 204 and the motion compensation unit 205 can perform different operations on the current video block, for example, depending on whether the current video block is in an I-band, P-band, or B-band.

[0174] In some examples, motion estimation unit 204 can perform unidirectional prediction on the current video block, and can search for reference images in list 0 or list 1 for reference video blocks of the current video block. Motion estimation unit 204 can then generate a reference index indicating the reference image in list 0 or list 1, which contains the reference video block and a motion vector indicating the spatial displacement between the current video block and the reference video block. Motion estimation unit 204 can output the reference index, prediction direction indicator, and motion vector as motion information for the current video block. Motion compensation unit 205 can generate a predicted video block for the current block based on the reference video block indicated by the motion information of the current video block.

[0175] In other examples, motion estimation unit 204 can perform bidirectional prediction on the current video block. Motion estimation unit 204 can search for a reference video block for the current video block in the reference images in list 0, and can also search for another reference video block for the current video block in list 1. Motion estimation unit 204 can then generate a reference index indicating the reference images in lists 0 and 1 containing the reference video blocks, and a motion vector indicating the spatial displacement between the reference video blocks and the current video block. Motion estimation unit 204 can output the reference index and motion vector of the current video block as motion information for the current video block. Motion compensation unit 205 can generate a predicted video block for the current video block based on the reference video blocks indicated by the motion information of the current video block.

[0176] In some examples, the motion estimation unit 204 can output a complete set of motion information for use in the decoder's decoding process.

[0177] In some examples, the motion estimation unit 204 may not output the complete set of motion information for the current video. Instead, the motion estimation unit 204 may refer to motion information signaling from another video block to inform the motion information of the current video block. For example, the motion estimation unit 204 may determine that the motion information of the current video block is sufficiently similar to the motion information of neighboring video blocks.

[0178] In one example, the motion estimation unit 204 may indicate a value in the syntax structure associated with the current video block that indicates to the video decoder 300 that the current video block has the same motion information as another video block.

[0179] In another example, motion estimation unit 204 can identify another video block and motion vector difference (MVD) in the syntax structure associated with the current video block. The motion vector difference indicates the difference between the motion vector of the current video block and the motion vector of the indicated video block. Video decoder 300 can use the motion vector of the indicated video block and the motion vector difference to determine the motion vector of the current video block.

[0180] As discussed above, the video encoder 200 can predictively signal motion vectors. Two examples of predictive signaling notification techniques that can be implemented by the video encoder 200 include Advanced Motion Vector Prediction (AMVP) and Merge Pattern Signaling Notification.

[0181] Intra-prediction unit 206 can perform intra-prediction on the current video block. When intra-prediction unit 206 performs intra-prediction on the current video block, it can generate prediction data for the current video block based on decoded samples from other video blocks in the same frame. The prediction data for the current video block can include the predicted video block and various syntax elements.

[0182] The residual generation unit 207 can generate residual data for the current video block by subtracting (e.g., indicated by a minus sign) multiple predicted video blocks from the current video block. The residual data for the current video block may include residual video blocks corresponding to different sample components of the samples in the current video block.

[0183] In other examples, such as in skip mode, there may be no residual data for the current video block, and the residual generation unit 207 may not perform the subtraction operation.

[0184] The transform processing unit 208 can generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to the residual video blocks associated with the current video block.

[0185] After the transform processing unit 208 generates a transform coefficient video block associated with the current video block, the quantization unit 209 can quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values ​​associated with the current video block.

[0186] Inverse quantization unit 210 and inverse transform unit 211 can apply inverse quantization and inverse transform to the transform coefficient video block, respectively, to reconstruct the residual video block from the transform coefficient video block. Reconstruction unit 212 can add the reconstructed residual video block to the corresponding samples from one or more predicted video blocks generated by prediction unit 202 to produce a reconstructed video block associated with the current block, which is stored in buffer 213.

[0187] After the video block is reconstructed by reconstruction unit 212, a loop filtering operation can be performed to reduce video block artifacts in the video block.

[0188] Entropy encoding unit 214 can receive data from other functional components of video encoder 200. When entropy encoding unit 214 receives data, it can perform one or more entropy encoding operations to generate entropy encoded data and output a bit stream including the entropy encoded data.

[0189] Figure 6 This is a block diagram illustrating an example of a video decoder 300, which can be... Figure 4 The video decoder 114 in the system 100 shown.

[0190] The video decoder 300 can be configured to perform any or all of the technologies disclosed herein. Figure 6 In the example, the video decoder 300 includes multiple functional components. The techniques described in this disclosure can be shared among the various components of the video decoder 300. In some examples, the processor can be configured to perform any or all of the techniques described in this disclosure.

[0191] exist Figure 6 In the example, video decoder 300 includes an entropy decoding unit 301, a motion compensation unit 302, an intra-frame prediction unit 303, an inverse quantization unit 304, an inverse transform unit 305, a reconstruction unit 306, and a buffer 307. In some examples, video decoder 300 can perform functions typically associated with video encoder 200. Figure 5 The encoding process described is the opposite of the decoding process.

[0192] The entropy decoding unit 301 can retrieve the encoded bitstream. The encoded bitstream may include entropy-coded video data (e.g., encoded blocks of video data). The entropy decoding unit 301 can decode the entropy-coded video data, and based on the entropy-coded video data, the motion compensation unit 302 can determine motion information including motion vectors, motion vector precision, reference image list index, and other motion information. The motion compensation unit 302 can determine such information, for example, by executing AMVP and Merge modes.

[0193] The motion compensation unit 302 can generate motion compensation blocks and can perform interpolation based on an interpolation filter. The identifier of the interpolation filter to be used at sub-pixel precision can be included in the syntax element.

[0194] The motion compensation unit 302 can use an interpolation filter, such as that used by the video encoder 200 during the encoding of a video block, to calculate the interpolation of sub-integer pixels of the reference block. The motion compensation unit 302 can determine the interpolation filter used by the video encoder 200 based on the received syntax information, and use the interpolation filter to generate the prediction block.

[0195] The motion compensation unit 302 may use some syntax information to determine the size of the blocks used to encode (multiple) frames and / or (multiple) stripes of the encoded video sequence, segmentation information describing how each macroblock of the image of the encoded video sequence is segmented, a pattern indicating how each segment is encoded, one or more reference frames (and a list of reference frames) for each inter-frame coded block, and other information for decoding the encoded video sequence.

[0196] Intra-prediction unit 303 can use, for example, an intra-prediction mode received in the bitstream to form prediction blocks from spatially adjacent blocks. Inverse quantization unit 303 performs inverse quantization, i.e., dequantization, on the quantized video block coefficients provided in the bitstream and decoded by entropy decoding unit 301. Inverse transform unit 303 applies an inverse transform.

[0197] The reconstruction unit 306 can add the residual block to the corresponding prediction block generated by the motion compensation unit 202 or the intra-frame prediction unit 303 to form a decoded block. If necessary, a deblocking filter can also be applied to filter the decoded block to remove block artifacts. The decoded video block is then stored in the buffer 307 to provide a reference block for subsequent motion compensation / intra-frame prediction, and also generates the decoded video for presentation on the display device.

[0198] The following is a list of preferred solutions for some embodiments.

[0199] The following solutions illustrate example embodiments of the techniques discussed in the previous section (e.g., item 1).

[0200] 1. A video processing method (e.g., Figure 3 The described method 700) includes: performing (702) a conversion between a video block comprising two or more color component blocks and a bitstream representation of the video; wherein, according to encoding and decoding rules, the two or more color component blocks are encoded and decoded using a variety of prediction methods, at least one of which is a Symmetric Intra-Block Copy (SIBC) method.

[0201] 2. The method according to Solution 1, wherein the rule specifies that the SIBC method is used for the luminance component block in two or more color component blocks, and the intra-frame encoding / decoding method is used for the other color component blocks in two or more color component blocks.

[0202] 3. The method according to Solution 1, wherein the rule specifies that the SIBC method is used for the luminance component blocks in two or more color component blocks, and the inter-frame encoding / decoding method is used for the other color component blocks in two or more color component blocks.

[0203] 4. The method according to Solution 1, wherein the rule specifies that the SIBC method is used for the luminance component blocks in two or more color component blocks, and the palette prediction encoding / decoding method is used for the other color component blocks in two or more color component blocks.

[0204] 5. The method according to Solution 1, wherein the rule specifies that the SIBC method is used for the luminance component blocks in two or more color component blocks, and the reconstructed luminance block of the luminance component block is used to encode and decode the other color component blocks of the two or more color component blocks.

[0205] The following solutions illustrate example embodiments of the techniques discussed in the previous section (e.g., item 2).

[0206] 6. A video processing method, comprising: for a conversion between a video block comprising one or more color component blocks and a codec representation of the video, determining whether to use the Symmetric Intra-Block Copy (SIBC) method to encode and decode the color component blocks of the video block according to codec rules; and performing the conversion based on the determination.

[0207] 7. The method described in Solution 6, wherein the encoding / decoding rules specify that the luminance component blocks are encoded and decoded using the SIBC method, and the other color component blocks are encoded and decoded using the intra-frame prediction method.

[0208] 8. The method described in Solution 6, wherein the encoding / decoding rules specify the use of the SIBC method to encode and decode each component block in one or more component blocks.

[0209] The following solutions illustrate example embodiments of the techniques discussed in the previous section (e.g., item 3).

[0210] 9. The method described in Solution 6, wherein the rules are based on the dimensions of video blocks.

[0211] 10. The method described in Solution 9, wherein the rule stipulates that the use of the SIBC method must meet the following conditions:

[0212] a. SIBC only applies when W>=T1 and H>=T2.

[0213] b. SIBC only applies when W <= T1 and H <= T2.

[0214] c. SIBC only applies when max(W, H) <= T1.

[0215] d. SIBC is only applicable when min(W, H) <= T1.

[0216] e. SIBC only applies when W*H >= T1.

[0217] f. SIBC only applies when W*H <= T1.

[0218] g. SIBC is only applicable when max(W, H) / min(W, H) <= T1;

[0219] T1 and T2 are rational numbers.

[0220] 11. The method according to solution 10, wherein T1 = 1, 2, 4, 8, 16 or 256, and T2 = 4 or 16.

[0221] The following solutions illustrate example embodiments of the techniques discussed in the previous section (e.g., item 4).

[0222] 12. The method according to any one of solutions 1-11, wherein the rules depend on the encoding / decoding information of the video blocks.

[0223] 13. The method according to solution 12, wherein the encoding / decoding information includes information about whether the video block uses block vector encoding / decoding.

[0224] The following solutions illustrate example embodiments of the techniques discussed in the previous section (e.g., items 5-8).

[0225] 14. A video processing method comprising: performing a conversion between a video block comprising one or more color component blocks and a bitstream representation of the video, wherein the bitstream representation conforms to a format rule, wherein the format rule specifies whether and how the color component blocks of the video block are encoded and decoded in the bitstream representation.

[0226] 15. The method according to solution 14, wherein the format rules specify that, for indication, the bitstream representation includes at least a first syntax element at a first codec level and a second syntax element at a second codec level, wherein the first level is a level higher than the video block level, and the second level is a level lower than the video block level.

[0227] 16. The method according to solution 14, wherein the format rules specify, based on encoding / decoding characteristics, conditionally include syntax elements for indication.

[0228] 17. The method according to solution 16, wherein the encoding / decoding features include whether intra-block copying mode is enabled for video blocks.

[0229] 18. The method according to solution 16, wherein the encoding / decoding features include the dimensions of the video blocks.

[0230] 19. The method according to any one of solutions 14-18, wherein the format rule specifies the inclusion of two fields to indicate the use of the SIBC method, wherein the first field signals the use of the SIBC method, and the second field following the first field indicates the symmetric type used by the SIBC method.

[0231] 20. The method according to solution 19, wherein the first field and the second field include non-metasyntactic elements.

[0232] 21. The method according to any one of solutions 1-20, wherein the conversion includes generating a bitstream representation from the video.

[0233] 22. The method according to any one of solutions 1-20, wherein the conversion includes decoding the bitstream representation to generate video.

[0234] 23. A video decoding apparatus, comprising a processor configured to implement one or more of the methods described in solutions 1 to 22.

[0235] 24. A video encoding apparatus, comprising a processor configured to implement one or more of the methods described in solutions 1 to 22.

[0236] 25. A computer program product having computer code stored thereon, which, when executed by a processor, causes the processor to implement the method of any one of solutions 1 to 22.

[0237] 26. A computer-readable medium storing a bitstream representation generated according to any one of solutions 1 to 22.

[0238] 27. The methods, apparatus or systems described in this document.

[0239] In the solution described in this paper, the encoder conforms to the format rules by generating a codec representation based on those rules. In the solution described in this paper, the decoder, knowing the presence or absence of syntax elements according to the format rules, uses the format rules to parse the syntax elements in the codec representation to generate the decoded video.

[0240] In this document, the term "video processing" can refer to video encoding, video decoding, video compression, or video decompression. For example, a video compression algorithm can be applied during the conversion from the pixel representation of a video to its corresponding bitstream representation, and vice versa. The bitstream representation of the current video block can, for example, correspond to bits juxtaposed or scattered in different places within the bitstream, as defined by the syntax. For example, a macroblock can be encoded based on the error residual values ​​after transformation and encoding / decoding, and also using bits from the header and other fields in the bitstream. Furthermore, during the conversion, the decoder can, based on this determination, parse the bitstream knowing that some fields may or may not be present, as described in the solutions above. Similarly, the encoder can determine whether to include or exclude certain syntax fields and generate the codec representation accordingly by including or excluding syntax fields from the codec representation.

[0241] The disclosed and other solutions, examples, embodiments, modules, and functional operations described in this document can be implemented in digital electronic circuits, or in computer software, firmware, or hardware (including the structures disclosed in this document and their equivalents), or in a combination of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer-readable medium for use by a data processing apparatus to operate or control the operation of the data processing apparatus. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a combination of substances affecting machine-readable propagation signals, or a combination of one or more of them. The term "data processing apparatus" includes all means, devices, and machines for processing data, including, for example, a programmable processor, a computer, or multiple processors or computers. In addition to hardware, the apparatus may also include code that creates an operating environment for the computer program in question, for example, code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. Propagation signals are artificially generated signals, such as machine-generated electrical signals, optical signals, or electromagnetic signals, generated to encode information for transmission to a suitable receiver device.

[0242] Computer programs (also known as programs, software, software applications, scripts, or code) can be written in any programming language (including compiled or interpreted languages) and can be deployed in any form, including as standalone programs or as modules, components, subroutines, or other units suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored as part of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., a file storing one or more modules, subroutines, or code sections). Computer programs can be deployed to run on a single computer or on multiple computers located at a single site or distributed across multiple sites and interconnected through a communications network.

[0243] The processes and logic described in this document can be executed by one or more programmable processors running one or more computer programs to perform functions by manipulating input data and generating outputs. The processes and logic can also be executed by dedicated logic circuits, and the devices can be implemented as dedicated logic circuits, such as FPGAs (Field Programmable Gate Arrays) or ASICs (Application-Specific Integrated Circuits).

[0244] Processors suitable for running computer programs include, for example, general-purpose and special-purpose microprocessors, and any one or more processors of any type of digital computer. Typically, a processor receives instructions and data from read-only memory or random access memory, or both. The basic components of a computer are a processor for executing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks) for storing data, or operatively coupled to receive data from, transfer data to, or receive data from and transfer data to such mass storage devices. However, a computer does not require such devices. Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media, and memory devices, including, for example, semiconductor memory devices such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The processor and memory may be supplemented by or incorporated into special-purpose logic circuitry.

[0245] While this patent document contains numerous details, these details should not be construed as limiting any subject matter or potentially claimed scope, but rather as descriptions of features specific to particular embodiments of a particular art. Certain features described in this patent document within the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented separately in multiple embodiments or in any suitable sub-combination. Furthermore, although features may be described above as functioning in certain combinations and even initially claimed in this way, in some cases one or more features from the claimed combination may be excluded from the combination, and the claimed combination may be for sub-combinations or variations thereof.

[0246] Similarly, although operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring the operations to be performed in the specific order shown or in a sequential manner, or as performing all shown operations to achieve the desired result. Furthermore, the separation of various system components in the embodiments described in this patent document should not be construed as requiring such separation in all embodiments.

[0247] Only some implementation methods and examples are described, and other implementation methods, enhancements and variations can be made based on the content described and shown in this patent document.

Claims

1. A video processing method, comprising: Perform a conversion between a video block comprising two or more color component blocks and the bitstream representation of the video; In this process, according to the encoding and decoding rules, multiple prediction methods are used to encode and decode the two or more color component blocks, and at least one of the multiple prediction methods is the Symmetric Intra-Block Copy (SIBC) method. The rule specifies that the SIBC method is used on the luminance component block of the two or more color component blocks, and the reconstructed luminance block of the luminance component block is used to encode and decode the other color component blocks of the two or more color component blocks. Specifically, based on the size of the luminance component block and the adaptive block vector resolution (ABVR) accuracy, it is determined whether a third syntax element exists in the bitstream, and the third syntax element indicates whether the SIBC is used.

2. The method according to claim 1, wherein, The rule specifies that the SIBC method should be used for the luminance component block in the two or more color component blocks, and that the intra-frame encoding / decoding method should be used for the other color component blocks in the two or more color component blocks.

3. The method according to claim 1, wherein, The rule specifies that the SIBC method should be used for the luminance component block in the two or more color component blocks, and the inter-frame encoding / decoding method should be used for the other color component blocks in the two or more color component blocks.

4. The method according to claim 1, wherein, The rule specifies that the SIBC method should be used for the luminance component blocks in the two or more color component blocks, and the palette prediction encoding / decoding method should be used for the other color component blocks in the two or more color component blocks.

5. The method according to claim 1, further comprising: For the conversion between a video block comprising one or more color component blocks and the codec representation of the video, the codec rules determine whether to use the Symmetric Intra-Block Copy (SIBC) method to encode and decode the color component blocks of the video block; and The conversion is performed based on the determination.

6. The method according to claim 5, wherein, The encoding / decoding rules specify that the SIBC method should be used to encode and decode the luma component blocks, and that the intra-frame prediction method should be used to encode and decode the other color component blocks.

7. The method according to claim 5, wherein, The encoding / decoding rules specify that each component block in the one or more component blocks should be encoded / decoded using the SIBC method.

8. The method according to claim 5, wherein, The rules are based on the dimensions of the video blocks.

9. The method according to claim 8, wherein, The rules stipulate that the use of the SIBC method must meet the following conditions: a. The SIBC applies only when W>=T1 and H>=T2. b. The SIBC applies only when W <= T1 and H <= T2. c. The SIBC is only applicable when max(W, H) <= T1. d. The SIBC is only applicable when min(W, H) <= T1. e. The SIBC is only applicable when W*H >= T1. f. The SIBC is only applicable when W*H <= T1, or g. The SIBC is only applicable when max(W, H) / min(W, H) <= T1; T1 and T2 are rational numbers.

10. The method according to claim 9, wherein, T1 = 1, 2, 4, 8, 16 or 256, and T2 = 4 or 16.

11. The method according to claim 5, wherein, The rules depend on the encoding and decoding information of the video block.

12. The method according to claim 11, wherein, The encoding / decoding information includes information about whether the video block uses block vector encoding / decoding.

13. The method according to claim 1, further comprising: Perform a conversion between a video block comprising one or more color component blocks and the bitstream representation of the video. The bitstream represents a format that conforms to certain rules. The format rules specify whether and how the symmetric intra-block copy (SIBC) method is used to encode and decode the color component blocks of the video block in the bitstream representation.

14. The method according to claim 13, wherein, The format rules specify that, for the purpose of the instruction, the bitstream representation includes at least a first syntax element at a first codec level and a second syntax element at a second codec level, wherein the first codec level is a level higher than the video block level, and the second codec level is a level lower than the video block level.

15. The method according to claim 13, wherein, The format rules specify that, based on encoding and decoding characteristics, syntax elements are conditionally included for the purposes of the instructions.

16. The method according to claim 15, wherein, The encoding / decoding features include whether to enable intra-block copying mode for the video block.

17. The method according to claim 15, wherein, The encoding / decoding characteristics include the dimensions of the video blocks.

18. The method according to claim 13, wherein, The format rules specify two fields to indicate the use of the SIBC method, wherein the first field signals the use of the SIBC method, and the second field following the first field indicates the symmetric type used by the SIBC method.

19. The method according to claim 18, wherein, The first field and the second field include non-binary syntax elements.

20. The method according to claim 1, wherein, The conversion includes generating the bitstream representation from the video.

21. The method according to claim 1, wherein, The conversion includes decoding the bitstream representation to generate the video.

22. A video decoding apparatus comprising a processor configured to implement the method of any one of claims 1 to 21.

23. A video encoding apparatus comprising a processor configured to implement the method of any one of claims 1 to 21.

24. A computer program product having computer code stored thereon, which, when executed by a processor, causes the processor to perform the method of any one of claims 1 to 21.

25. A computer-readable medium, wherein, The computer-readable medium stores instructions to cause the processor to perform the method of any one of claims 1 to 21.

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